/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loop-acceleration/diamond_1-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 22:14:13,991 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 22:14:13,993 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 22:14:14,033 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 22:14:14,033 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 22:14:14,035 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 22:14:14,038 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 22:14:14,044 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 22:14:14,046 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 22:14:14,051 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 22:14:14,052 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 22:14:14,053 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 22:14:14,053 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 22:14:14,055 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 22:14:14,056 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 22:14:14,057 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 22:14:14,058 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 22:14:14,059 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 22:14:14,062 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 22:14:14,068 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 22:14:14,070 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 22:14:14,071 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 22:14:14,072 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 22:14:14,072 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 22:14:14,074 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 22:14:14,079 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 22:14:14,087 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 22:14:14,088 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 22:14:14,090 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 22:14:14,091 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-07 22:14:14,120 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 22:14:14,121 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 22:14:14,121 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-07 22:14:14,122 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-07 22:14:14,122 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-07 22:14:14,123 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-07 22:14:14,123 INFO L138 SettingsManager]: * Use SBE=true [2022-04-07 22:14:14,123 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 22:14:14,123 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 22:14:14,124 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 22:14:14,124 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 22:14:14,124 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 22:14:14,124 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 22:14:14,124 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 22:14:14,125 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 22:14:14,125 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 22:14:14,125 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 22:14:14,125 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 22:14:14,125 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 22:14:14,125 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:14:14,125 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 22:14:14,126 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-07 22:14:14,126 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-07 22:14:14,126 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 22:14:14,126 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-07 22:14:14,126 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-07 22:14:14,126 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-07 22:14:14,126 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-07 22:14:14,128 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 22:14:14,128 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 22:14:14,383 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 22:14:14,413 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 22:14:14,415 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 22:14:14,416 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 22:14:14,417 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 22:14:14,418 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/diamond_1-1.c [2022-04-07 22:14:14,483 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0f6fb8271/b4026a8d161847708dd2c46878215053/FLAG16815b3fc [2022-04-07 22:14:14,852 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 22:14:14,853 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-1.c [2022-04-07 22:14:14,858 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0f6fb8271/b4026a8d161847708dd2c46878215053/FLAG16815b3fc [2022-04-07 22:14:15,272 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0f6fb8271/b4026a8d161847708dd2c46878215053 [2022-04-07 22:14:15,274 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 22:14:15,275 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 22:14:15,277 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 22:14:15,286 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 22:14:15,289 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 22:14:15,290 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,291 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@87c4203 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15, skipping insertion in model container [2022-04-07 22:14:15,291 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,296 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 22:14:15,306 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 22:14:15,449 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-1.c[373,386] [2022-04-07 22:14:15,459 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:14:15,467 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 22:14:15,481 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loop-acceleration/diamond_1-1.c[373,386] [2022-04-07 22:14:15,484 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:14:15,495 INFO L208 MainTranslator]: Completed translation [2022-04-07 22:14:15,495 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15 WrapperNode [2022-04-07 22:14:15,495 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 22:14:15,497 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 22:14:15,497 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 22:14:15,497 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 22:14:15,506 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,506 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,511 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,511 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,516 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,520 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,521 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,523 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 22:14:15,524 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 22:14:15,524 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 22:14:15,524 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 22:14:15,525 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,532 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:14:15,543 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:14:15,555 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 22:14:15,579 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 22:14:15,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 22:14:15,602 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 22:14:15,602 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 22:14:15,602 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 22:14:15,602 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 22:14:15,603 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 22:14:15,603 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 22:14:15,603 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 22:14:15,603 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 22:14:15,603 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 22:14:15,603 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 22:14:15,603 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 22:14:15,603 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 22:14:15,604 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 22:14:15,604 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 22:14:15,604 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 22:14:15,604 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 22:14:15,604 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 22:14:15,652 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 22:14:15,654 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 22:14:15,748 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 22:14:15,754 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 22:14:15,755 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-07 22:14:15,756 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:14:15 BoogieIcfgContainer [2022-04-07 22:14:15,756 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 22:14:15,757 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 22:14:15,758 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 22:14:15,759 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 22:14:15,762 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:14:15" (1/1) ... [2022-04-07 22:14:15,764 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-07 22:14:15,781 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:14:15 BasicIcfg [2022-04-07 22:14:15,782 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 22:14:15,783 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 22:14:15,783 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 22:14:15,786 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 22:14:15,787 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 10:14:15" (1/4) ... [2022-04-07 22:14:15,787 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@57717f10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:14:15, skipping insertion in model container [2022-04-07 22:14:15,787 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:14:15" (2/4) ... [2022-04-07 22:14:15,788 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@57717f10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:14:15, skipping insertion in model container [2022-04-07 22:14:15,788 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:14:15" (3/4) ... [2022-04-07 22:14:15,788 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@57717f10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 10:14:15, skipping insertion in model container [2022-04-07 22:14:15,788 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:14:15" (4/4) ... [2022-04-07 22:14:15,789 INFO L111 eAbstractionObserver]: Analyzing ICFG diamond_1-1.cqvasr [2022-04-07 22:14:15,794 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-07 22:14:15,794 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 22:14:15,855 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 22:14:15,861 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 22:14:15,861 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 22:14:15,886 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:14:15,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-07 22:14:15,890 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:14:15,891 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:14:15,891 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:14:15,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:14:15,896 INFO L85 PathProgramCache]: Analyzing trace with hash -756157467, now seen corresponding path program 1 times [2022-04-07 22:14:15,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:14:15,904 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79370110] [2022-04-07 22:14:15,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:14:15,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:14:15,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:16,030 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:14:16,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:16,049 INFO L290 TraceCheckUtils]: 0: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22#true} is VALID [2022-04-07 22:14:16,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {22#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 22:14:16,050 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {22#true} {22#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 22:14:16,052 INFO L272 TraceCheckUtils]: 0: Hoare triple {22#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:14:16,052 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {22#true} is VALID [2022-04-07 22:14:16,053 INFO L290 TraceCheckUtils]: 2: Hoare triple {22#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 22:14:16,053 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {22#true} {22#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 22:14:16,053 INFO L272 TraceCheckUtils]: 4: Hoare triple {22#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#true} is VALID [2022-04-07 22:14:16,054 INFO L290 TraceCheckUtils]: 5: Hoare triple {22#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {22#true} is VALID [2022-04-07 22:14:16,055 INFO L290 TraceCheckUtils]: 6: Hoare triple {22#true} [51] L18-2-->L17-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-07 22:14:16,055 INFO L272 TraceCheckUtils]: 7: Hoare triple {23#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {23#false} is VALID [2022-04-07 22:14:16,055 INFO L290 TraceCheckUtils]: 8: Hoare triple {23#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23#false} is VALID [2022-04-07 22:14:16,056 INFO L290 TraceCheckUtils]: 9: Hoare triple {23#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-07 22:14:16,056 INFO L290 TraceCheckUtils]: 10: Hoare triple {23#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23#false} is VALID [2022-04-07 22:14:16,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:16,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:14:16,057 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [79370110] [2022-04-07 22:14:16,058 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [79370110] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:14:16,058 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:14:16,058 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 22:14:16,060 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948652490] [2022-04-07 22:14:16,061 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:14:16,065 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-07 22:14:16,066 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:14:16,069 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,085 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:16,086 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 22:14:16,086 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:14:16,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 22:14:16,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:14:16,109 INFO L87 Difference]: Start difference. First operand has 19 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:16,185 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2022-04-07 22:14:16,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 22:14:16,186 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-07 22:14:16,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:14:16,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-07 22:14:16,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 34 transitions. [2022-04-07 22:14:16,199 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 34 transitions. [2022-04-07 22:14:16,242 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:16,250 INFO L225 Difference]: With dead ends: 30 [2022-04-07 22:14:16,250 INFO L226 Difference]: Without dead ends: 13 [2022-04-07 22:14:16,252 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:14:16,256 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 11 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:14:16,257 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 22 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:14:16,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2022-04-07 22:14:16,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-04-07 22:14:16,284 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:14:16,284 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,285 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,285 INFO L87 Difference]: Start difference. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:16,288 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-07 22:14:16,288 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-07 22:14:16,288 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:16,289 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:16,289 INFO L74 IsIncluded]: Start isIncluded. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-07 22:14:16,289 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-07 22:14:16,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:16,292 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-04-07 22:14:16,292 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-07 22:14:16,292 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:16,292 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:16,293 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:14:16,293 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:14:16,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 8 states have (on average 1.25) internal successors, (10), 8 states have internal predecessors, (10), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2022-04-07 22:14:16,296 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 14 transitions. Word has length 11 [2022-04-07 22:14:16,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:14:16,296 INFO L478 AbstractCegarLoop]: Abstraction has 13 states and 14 transitions. [2022-04-07 22:14:16,299 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,299 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 14 transitions. [2022-04-07 22:14:16,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-07 22:14:16,299 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:14:16,300 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:14:16,300 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 22:14:16,300 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:14:16,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:14:16,301 INFO L85 PathProgramCache]: Analyzing trace with hash -755233946, now seen corresponding path program 1 times [2022-04-07 22:14:16,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:14:16,302 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773255060] [2022-04-07 22:14:16,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:14:16,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:14:16,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:16,454 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:14:16,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:16,486 INFO L290 TraceCheckUtils]: 0: Hoare triple {121#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {115#true} is VALID [2022-04-07 22:14:16,486 INFO L290 TraceCheckUtils]: 1: Hoare triple {115#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 22:14:16,487 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {115#true} {115#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 22:14:16,488 INFO L272 TraceCheckUtils]: 0: Hoare triple {115#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {121#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:14:16,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {121#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {115#true} is VALID [2022-04-07 22:14:16,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {115#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 22:14:16,489 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {115#true} {115#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 22:14:16,489 INFO L272 TraceCheckUtils]: 4: Hoare triple {115#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {115#true} is VALID [2022-04-07 22:14:16,490 INFO L290 TraceCheckUtils]: 5: Hoare triple {115#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {120#(= main_~x~0 0)} is VALID [2022-04-07 22:14:16,490 INFO L290 TraceCheckUtils]: 6: Hoare triple {120#(= main_~x~0 0)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-07 22:14:16,491 INFO L272 TraceCheckUtils]: 7: Hoare triple {116#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {116#false} is VALID [2022-04-07 22:14:16,491 INFO L290 TraceCheckUtils]: 8: Hoare triple {116#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {116#false} is VALID [2022-04-07 22:14:16,491 INFO L290 TraceCheckUtils]: 9: Hoare triple {116#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-07 22:14:16,491 INFO L290 TraceCheckUtils]: 10: Hoare triple {116#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {116#false} is VALID [2022-04-07 22:14:16,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:16,492 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:14:16,492 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1773255060] [2022-04-07 22:14:16,492 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1773255060] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:14:16,492 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:14:16,492 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 22:14:16,493 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [141210785] [2022-04-07 22:14:16,493 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:14:16,494 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-07 22:14:16,494 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:14:16,494 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,521 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:16,521 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 22:14:16,522 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:14:16,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 22:14:16,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 22:14:16,526 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:16,624 INFO L93 Difference]: Finished difference Result 20 states and 22 transitions. [2022-04-07 22:14:16,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 22:14:16,625 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-07 22:14:16,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:14:16,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 22 transitions. [2022-04-07 22:14:16,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 22 transitions. [2022-04-07 22:14:16,633 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 22 transitions. [2022-04-07 22:14:16,658 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:16,662 INFO L225 Difference]: With dead ends: 20 [2022-04-07 22:14:16,663 INFO L226 Difference]: Without dead ends: 15 [2022-04-07 22:14:16,667 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:14:16,671 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 10 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 18 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:14:16,671 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [10 Valid, 18 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:14:16,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-07 22:14:16,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 14. [2022-04-07 22:14:16,689 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:14:16,690 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,690 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,690 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:16,692 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 22:14:16,692 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 22:14:16,692 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:16,692 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:16,692 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 22:14:16,693 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 22:14:16,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:16,694 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 22:14:16,694 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 22:14:16,694 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:16,694 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:16,694 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:14:16,695 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:14:16,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2022-04-07 22:14:16,696 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 11 [2022-04-07 22:14:16,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:14:16,696 INFO L478 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-04-07 22:14:16,697 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:16,697 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-07 22:14:16,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-07 22:14:16,697 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:14:16,697 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:14:16,698 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 22:14:16,698 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:14:16,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:14:16,698 INFO L85 PathProgramCache]: Analyzing trace with hash 980092676, now seen corresponding path program 1 times [2022-04-07 22:14:16,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:14:16,699 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676341056] [2022-04-07 22:14:16,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:14:16,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:14:16,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:16,829 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:14:16,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:16,844 INFO L290 TraceCheckUtils]: 0: Hoare triple {215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {208#true} is VALID [2022-04-07 22:14:16,845 INFO L290 TraceCheckUtils]: 1: Hoare triple {208#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:16,845 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {208#true} {208#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:16,846 INFO L272 TraceCheckUtils]: 0: Hoare triple {208#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:14:16,846 INFO L290 TraceCheckUtils]: 1: Hoare triple {215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {208#true} is VALID [2022-04-07 22:14:16,847 INFO L290 TraceCheckUtils]: 2: Hoare triple {208#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:16,847 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {208#true} {208#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:16,847 INFO L272 TraceCheckUtils]: 4: Hoare triple {208#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:16,848 INFO L290 TraceCheckUtils]: 5: Hoare triple {208#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {213#(= main_~x~0 0)} is VALID [2022-04-07 22:14:16,848 INFO L290 TraceCheckUtils]: 6: Hoare triple {213#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {213#(= main_~x~0 0)} is VALID [2022-04-07 22:14:16,849 INFO L290 TraceCheckUtils]: 7: Hoare triple {213#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_8 2)) (= (mod v_main_~y~0_4 2) 0)) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_4} AuxVars[] AssignedVars[main_~x~0] {214#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:16,849 INFO L290 TraceCheckUtils]: 8: Hoare triple {214#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 2))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 22:14:16,850 INFO L272 TraceCheckUtils]: 9: Hoare triple {209#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {209#false} is VALID [2022-04-07 22:14:16,850 INFO L290 TraceCheckUtils]: 10: Hoare triple {209#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {209#false} is VALID [2022-04-07 22:14:16,850 INFO L290 TraceCheckUtils]: 11: Hoare triple {209#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 22:14:16,851 INFO L290 TraceCheckUtils]: 12: Hoare triple {209#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 22:14:16,851 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:16,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:14:16,851 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676341056] [2022-04-07 22:14:16,852 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [676341056] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:14:16,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [343552752] [2022-04-07 22:14:16,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:14:16,852 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:14:16,852 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:14:16,854 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:14:16,887 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 22:14:16,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:16,914 INFO L263 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 22:14:16,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:16,925 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:14:17,365 INFO L272 TraceCheckUtils]: 0: Hoare triple {208#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:17,365 INFO L290 TraceCheckUtils]: 1: Hoare triple {208#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {208#true} is VALID [2022-04-07 22:14:17,366 INFO L290 TraceCheckUtils]: 2: Hoare triple {208#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:17,366 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {208#true} {208#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:17,366 INFO L272 TraceCheckUtils]: 4: Hoare triple {208#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:17,369 INFO L290 TraceCheckUtils]: 5: Hoare triple {208#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {213#(= main_~x~0 0)} is VALID [2022-04-07 22:14:17,370 INFO L290 TraceCheckUtils]: 6: Hoare triple {213#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {213#(= main_~x~0 0)} is VALID [2022-04-07 22:14:17,372 INFO L290 TraceCheckUtils]: 7: Hoare triple {213#(= main_~x~0 0)} [55] L18-->L18-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_8 2)) (= (mod v_main_~y~0_4 2) 0)) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_4} AuxVars[] AssignedVars[main_~x~0] {240#(and (<= (mod main_~y~0 2) 0) (= main_~x~0 2))} is VALID [2022-04-07 22:14:17,373 INFO L290 TraceCheckUtils]: 8: Hoare triple {240#(and (<= (mod main_~y~0 2) 0) (= main_~x~0 2))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {240#(and (<= (mod main_~y~0 2) 0) (= main_~x~0 2))} is VALID [2022-04-07 22:14:17,374 INFO L272 TraceCheckUtils]: 9: Hoare triple {240#(and (<= (mod main_~y~0 2) 0) (= main_~x~0 2))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {247#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:14:17,375 INFO L290 TraceCheckUtils]: 10: Hoare triple {247#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {251#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:14:17,375 INFO L290 TraceCheckUtils]: 11: Hoare triple {251#(<= 1 __VERIFIER_assert_~cond)} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 22:14:17,376 INFO L290 TraceCheckUtils]: 12: Hoare triple {209#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 22:14:17,376 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:17,376 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:14:17,834 INFO L290 TraceCheckUtils]: 12: Hoare triple {209#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 22:14:17,835 INFO L290 TraceCheckUtils]: 11: Hoare triple {251#(<= 1 __VERIFIER_assert_~cond)} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {209#false} is VALID [2022-04-07 22:14:17,835 INFO L290 TraceCheckUtils]: 10: Hoare triple {247#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {251#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:14:17,836 INFO L272 TraceCheckUtils]: 9: Hoare triple {267#(= (mod main_~x~0 2) (mod main_~y~0 2))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {247#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:14:17,836 INFO L290 TraceCheckUtils]: 8: Hoare triple {267#(= (mod main_~x~0 2) (mod main_~y~0 2))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {267#(= (mod main_~x~0 2) (mod main_~y~0 2))} is VALID [2022-04-07 22:14:17,837 INFO L290 TraceCheckUtils]: 7: Hoare triple {274#(<= (mod main_~x~0 2) 0)} [55] L18-->L18-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_8 2)) (= (mod v_main_~y~0_4 2) 0)) InVars {main_~x~0=v_main_~x~0_8, main_~y~0=v_main_~y~0_4} OutVars{main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_4} AuxVars[] AssignedVars[main_~x~0] {267#(= (mod main_~x~0 2) (mod main_~y~0 2))} is VALID [2022-04-07 22:14:17,838 INFO L290 TraceCheckUtils]: 6: Hoare triple {274#(<= (mod main_~x~0 2) 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {274#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-07 22:14:17,838 INFO L290 TraceCheckUtils]: 5: Hoare triple {208#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {274#(<= (mod main_~x~0 2) 0)} is VALID [2022-04-07 22:14:17,839 INFO L272 TraceCheckUtils]: 4: Hoare triple {208#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:17,839 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {208#true} {208#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:17,839 INFO L290 TraceCheckUtils]: 2: Hoare triple {208#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:17,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {208#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {208#true} is VALID [2022-04-07 22:14:17,839 INFO L272 TraceCheckUtils]: 0: Hoare triple {208#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {208#true} is VALID [2022-04-07 22:14:17,840 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:17,840 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [343552752] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:14:17,840 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:14:17,840 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 6] total 10 [2022-04-07 22:14:17,840 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985998396] [2022-04-07 22:14:17,841 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:14:17,841 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-07 22:14:17,842 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:14:17,842 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:17,864 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:17,864 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 22:14:17,864 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:14:17,865 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 22:14:17,865 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2022-04-07 22:14:17,865 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:18,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:18,268 INFO L93 Difference]: Finished difference Result 36 states and 49 transitions. [2022-04-07 22:14:18,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-07 22:14:18,268 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-07 22:14:18,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:14:18,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:18,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 49 transitions. [2022-04-07 22:14:18,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:18,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 49 transitions. [2022-04-07 22:14:18,274 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 49 transitions. [2022-04-07 22:14:18,336 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:18,337 INFO L225 Difference]: With dead ends: 36 [2022-04-07 22:14:18,337 INFO L226 Difference]: Without dead ends: 21 [2022-04-07 22:14:18,338 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=79, Invalid=263, Unknown=0, NotChecked=0, Total=342 [2022-04-07 22:14:18,339 INFO L913 BasicCegarLoop]: 9 mSDtfsCounter, 26 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 101 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:14:18,339 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 36 Invalid, 101 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:14:18,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-04-07 22:14:18,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2022-04-07 22:14:18,348 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:14:18,348 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:18,348 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:18,349 INFO L87 Difference]: Start difference. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:18,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:18,350 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2022-04-07 22:14:18,350 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2022-04-07 22:14:18,351 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:18,351 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:18,351 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-07 22:14:18,351 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-07 22:14:18,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:18,353 INFO L93 Difference]: Finished difference Result 21 states and 21 transitions. [2022-04-07 22:14:18,353 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2022-04-07 22:14:18,353 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:18,353 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:18,353 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:14:18,353 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:14:18,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 15 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:18,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2022-04-07 22:14:18,355 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 13 [2022-04-07 22:14:18,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:14:18,355 INFO L478 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2022-04-07 22:14:18,356 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 8 states have internal predecessors, (18), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:18,356 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2022-04-07 22:14:18,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:14:18,356 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:14:18,357 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:14:18,385 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 22:14:18,582 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:14:18,583 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:14:18,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:14:18,583 INFO L85 PathProgramCache]: Analyzing trace with hash -1058670374, now seen corresponding path program 1 times [2022-04-07 22:14:18,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:14:18,584 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209302715] [2022-04-07 22:14:18,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:14:18,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:14:18,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:18,705 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:14:18,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:18,719 INFO L290 TraceCheckUtils]: 0: Hoare triple {454#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {444#true} is VALID [2022-04-07 22:14:18,719 INFO L290 TraceCheckUtils]: 1: Hoare triple {444#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:18,719 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {444#true} {444#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:18,720 INFO L272 TraceCheckUtils]: 0: Hoare triple {444#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {454#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:14:18,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {454#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {444#true} is VALID [2022-04-07 22:14:18,721 INFO L290 TraceCheckUtils]: 2: Hoare triple {444#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:18,721 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {444#true} {444#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:18,721 INFO L272 TraceCheckUtils]: 4: Hoare triple {444#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:18,721 INFO L290 TraceCheckUtils]: 5: Hoare triple {444#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {449#(= main_~x~0 0)} is VALID [2022-04-07 22:14:18,722 INFO L290 TraceCheckUtils]: 6: Hoare triple {449#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {449#(= main_~x~0 0)} is VALID [2022-04-07 22:14:18,722 INFO L290 TraceCheckUtils]: 7: Hoare triple {449#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {450#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:18,723 INFO L290 TraceCheckUtils]: 8: Hoare triple {450#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {450#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:18,724 INFO L290 TraceCheckUtils]: 9: Hoare triple {450#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {451#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:18,724 INFO L290 TraceCheckUtils]: 10: Hoare triple {451#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {451#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:18,725 INFO L290 TraceCheckUtils]: 11: Hoare triple {451#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {452#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:18,726 INFO L290 TraceCheckUtils]: 12: Hoare triple {452#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {452#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:18,726 INFO L290 TraceCheckUtils]: 13: Hoare triple {452#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {453#(and (<= main_~x~0 4) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-07 22:14:18,728 INFO L290 TraceCheckUtils]: 14: Hoare triple {453#(and (<= main_~x~0 4) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:18,728 INFO L272 TraceCheckUtils]: 15: Hoare triple {445#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {445#false} is VALID [2022-04-07 22:14:18,728 INFO L290 TraceCheckUtils]: 16: Hoare triple {445#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {445#false} is VALID [2022-04-07 22:14:18,728 INFO L290 TraceCheckUtils]: 17: Hoare triple {445#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:18,729 INFO L290 TraceCheckUtils]: 18: Hoare triple {445#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:18,729 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:18,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:14:18,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209302715] [2022-04-07 22:14:18,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [209302715] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:14:18,730 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [147582730] [2022-04-07 22:14:18,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:14:18,730 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:14:18,730 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:14:18,731 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:14:18,758 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 22:14:18,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:18,782 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-07 22:14:18,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:18,794 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:14:19,062 INFO L272 TraceCheckUtils]: 0: Hoare triple {444#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:19,063 INFO L290 TraceCheckUtils]: 1: Hoare triple {444#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {444#true} is VALID [2022-04-07 22:14:19,063 INFO L290 TraceCheckUtils]: 2: Hoare triple {444#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:19,063 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {444#true} {444#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:19,063 INFO L272 TraceCheckUtils]: 4: Hoare triple {444#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:19,064 INFO L290 TraceCheckUtils]: 5: Hoare triple {444#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {449#(= main_~x~0 0)} is VALID [2022-04-07 22:14:19,064 INFO L290 TraceCheckUtils]: 6: Hoare triple {449#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {449#(= main_~x~0 0)} is VALID [2022-04-07 22:14:19,065 INFO L290 TraceCheckUtils]: 7: Hoare triple {449#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {450#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:19,066 INFO L290 TraceCheckUtils]: 8: Hoare triple {450#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {450#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:19,067 INFO L290 TraceCheckUtils]: 9: Hoare triple {450#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {451#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:19,067 INFO L290 TraceCheckUtils]: 10: Hoare triple {451#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {451#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:19,070 INFO L290 TraceCheckUtils]: 11: Hoare triple {451#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {452#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:19,070 INFO L290 TraceCheckUtils]: 12: Hoare triple {452#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {452#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:19,071 INFO L290 TraceCheckUtils]: 13: Hoare triple {452#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {497#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 22:14:19,072 INFO L290 TraceCheckUtils]: 14: Hoare triple {497#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:19,072 INFO L272 TraceCheckUtils]: 15: Hoare triple {445#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {445#false} is VALID [2022-04-07 22:14:19,072 INFO L290 TraceCheckUtils]: 16: Hoare triple {445#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {445#false} is VALID [2022-04-07 22:14:19,073 INFO L290 TraceCheckUtils]: 17: Hoare triple {445#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:19,073 INFO L290 TraceCheckUtils]: 18: Hoare triple {445#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:19,073 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:19,073 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:14:19,235 INFO L290 TraceCheckUtils]: 18: Hoare triple {445#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:19,236 INFO L290 TraceCheckUtils]: 17: Hoare triple {445#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:19,236 INFO L290 TraceCheckUtils]: 16: Hoare triple {445#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {445#false} is VALID [2022-04-07 22:14:19,236 INFO L272 TraceCheckUtils]: 15: Hoare triple {445#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {445#false} is VALID [2022-04-07 22:14:19,237 INFO L290 TraceCheckUtils]: 14: Hoare triple {525#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {445#false} is VALID [2022-04-07 22:14:19,238 INFO L290 TraceCheckUtils]: 13: Hoare triple {529#(< (mod (+ main_~x~0 1) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {525#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-07 22:14:19,239 INFO L290 TraceCheckUtils]: 12: Hoare triple {529#(< (mod (+ main_~x~0 1) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {529#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-07 22:14:19,240 INFO L290 TraceCheckUtils]: 11: Hoare triple {536#(< (mod (+ main_~x~0 2) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {529#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-07 22:14:19,241 INFO L290 TraceCheckUtils]: 10: Hoare triple {536#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {536#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-07 22:14:19,247 INFO L290 TraceCheckUtils]: 9: Hoare triple {543#(< (mod (+ main_~x~0 3) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {536#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-07 22:14:19,248 INFO L290 TraceCheckUtils]: 8: Hoare triple {543#(< (mod (+ main_~x~0 3) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {543#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-07 22:14:19,251 INFO L290 TraceCheckUtils]: 7: Hoare triple {550#(< (mod (+ main_~x~0 4) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {543#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-07 22:14:19,253 INFO L290 TraceCheckUtils]: 6: Hoare triple {550#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {550#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-07 22:14:19,253 INFO L290 TraceCheckUtils]: 5: Hoare triple {444#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {550#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-07 22:14:19,253 INFO L272 TraceCheckUtils]: 4: Hoare triple {444#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:19,253 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {444#true} {444#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:19,253 INFO L290 TraceCheckUtils]: 2: Hoare triple {444#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:19,254 INFO L290 TraceCheckUtils]: 1: Hoare triple {444#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {444#true} is VALID [2022-04-07 22:14:19,254 INFO L272 TraceCheckUtils]: 0: Hoare triple {444#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#true} is VALID [2022-04-07 22:14:19,254 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:19,254 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [147582730] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:14:19,254 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:14:19,254 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-07 22:14:19,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [544264642] [2022-04-07 22:14:19,255 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:14:19,255 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:14:19,256 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:14:19,256 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,299 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:19,299 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 22:14:19,300 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:14:19,300 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 22:14:19,300 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2022-04-07 22:14:19,301 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:19,885 INFO L93 Difference]: Finished difference Result 39 states and 41 transitions. [2022-04-07 22:14:19,885 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 22:14:19,885 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:14:19,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:14:19,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 39 transitions. [2022-04-07 22:14:19,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 39 transitions. [2022-04-07 22:14:19,890 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 39 transitions. [2022-04-07 22:14:19,931 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:19,932 INFO L225 Difference]: With dead ends: 39 [2022-04-07 22:14:19,932 INFO L226 Difference]: Without dead ends: 34 [2022-04-07 22:14:19,933 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=175, Invalid=377, Unknown=0, NotChecked=0, Total=552 [2022-04-07 22:14:19,934 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 30 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 97 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 43 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 97 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:14:19,934 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 43 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 97 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:14:19,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-07 22:14:19,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 32. [2022-04-07 22:14:19,965 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:14:19,966 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,966 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,966 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:19,970 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-07 22:14:19,970 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-07 22:14:19,970 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:19,970 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:19,971 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-07 22:14:19,972 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-07 22:14:19,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:19,976 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-07 22:14:19,976 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-07 22:14:19,976 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:19,977 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:19,977 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:14:19,977 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:14:19,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.037037037037037) internal successors, (28), 27 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2022-04-07 22:14:19,978 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 19 [2022-04-07 22:14:19,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:14:19,979 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2022-04-07 22:14:19,979 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:19,979 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2022-04-07 22:14:19,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 22:14:19,980 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:14:19,980 INFO L499 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:14:20,006 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-07 22:14:20,195 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 22:14:20,196 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:14:20,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:14:20,196 INFO L85 PathProgramCache]: Analyzing trace with hash -2013590648, now seen corresponding path program 2 times [2022-04-07 22:14:20,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:14:20,196 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144822562] [2022-04-07 22:14:20,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:14:20,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:14:20,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:20,465 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:14:20,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:20,472 INFO L290 TraceCheckUtils]: 0: Hoare triple {786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-07 22:14:20,472 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,472 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {770#true} {770#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,473 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:14:20,473 INFO L290 TraceCheckUtils]: 1: Hoare triple {786#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-07 22:14:20,473 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,473 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,474 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,474 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {775#(= main_~x~0 0)} is VALID [2022-04-07 22:14:20,474 INFO L290 TraceCheckUtils]: 6: Hoare triple {775#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {775#(= main_~x~0 0)} is VALID [2022-04-07 22:14:20,475 INFO L290 TraceCheckUtils]: 7: Hoare triple {775#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {776#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:20,476 INFO L290 TraceCheckUtils]: 8: Hoare triple {776#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {776#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:20,476 INFO L290 TraceCheckUtils]: 9: Hoare triple {776#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {777#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:20,477 INFO L290 TraceCheckUtils]: 10: Hoare triple {777#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {777#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:20,477 INFO L290 TraceCheckUtils]: 11: Hoare triple {777#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {778#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:20,478 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {778#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:20,478 INFO L290 TraceCheckUtils]: 13: Hoare triple {778#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {779#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 22:14:20,479 INFO L290 TraceCheckUtils]: 14: Hoare triple {779#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {779#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 22:14:20,480 INFO L290 TraceCheckUtils]: 15: Hoare triple {779#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {780#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 22:14:20,480 INFO L290 TraceCheckUtils]: 16: Hoare triple {780#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {780#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 22:14:20,481 INFO L290 TraceCheckUtils]: 17: Hoare triple {780#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {781#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 22:14:20,481 INFO L290 TraceCheckUtils]: 18: Hoare triple {781#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {781#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 22:14:20,482 INFO L290 TraceCheckUtils]: 19: Hoare triple {781#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {782#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 22:14:20,482 INFO L290 TraceCheckUtils]: 20: Hoare triple {782#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {782#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 22:14:20,483 INFO L290 TraceCheckUtils]: 21: Hoare triple {782#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {783#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 22:14:20,483 INFO L290 TraceCheckUtils]: 22: Hoare triple {783#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {783#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 22:14:20,484 INFO L290 TraceCheckUtils]: 23: Hoare triple {783#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {784#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 22:14:20,485 INFO L290 TraceCheckUtils]: 24: Hoare triple {784#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {784#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 22:14:20,485 INFO L290 TraceCheckUtils]: 25: Hoare triple {784#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {785#(and (<= main_~x~0 10) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} is VALID [2022-04-07 22:14:20,486 INFO L290 TraceCheckUtils]: 26: Hoare triple {785#(and (<= main_~x~0 10) (not (<= (+ (div main_~x~0 4294967296) 1) 0)))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:20,486 INFO L272 TraceCheckUtils]: 27: Hoare triple {771#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {771#false} is VALID [2022-04-07 22:14:20,486 INFO L290 TraceCheckUtils]: 28: Hoare triple {771#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {771#false} is VALID [2022-04-07 22:14:20,486 INFO L290 TraceCheckUtils]: 29: Hoare triple {771#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:20,487 INFO L290 TraceCheckUtils]: 30: Hoare triple {771#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:20,487 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:20,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:14:20,487 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144822562] [2022-04-07 22:14:20,487 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [144822562] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:14:20,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1156866451] [2022-04-07 22:14:20,488 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:14:20,488 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:14:20,488 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:14:20,489 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:14:20,500 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 22:14:20,554 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:14:20,554 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:14:20,555 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-07 22:14:20,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:20,564 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:14:20,915 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,915 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-07 22:14:20,915 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,915 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,916 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:20,916 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {775#(= main_~x~0 0)} is VALID [2022-04-07 22:14:20,916 INFO L290 TraceCheckUtils]: 6: Hoare triple {775#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {775#(= main_~x~0 0)} is VALID [2022-04-07 22:14:20,917 INFO L290 TraceCheckUtils]: 7: Hoare triple {775#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {776#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:20,918 INFO L290 TraceCheckUtils]: 8: Hoare triple {776#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {776#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:20,919 INFO L290 TraceCheckUtils]: 9: Hoare triple {776#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {777#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:20,919 INFO L290 TraceCheckUtils]: 10: Hoare triple {777#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {777#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:20,920 INFO L290 TraceCheckUtils]: 11: Hoare triple {777#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {778#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:20,920 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {778#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:20,921 INFO L290 TraceCheckUtils]: 13: Hoare triple {778#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {779#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 22:14:20,921 INFO L290 TraceCheckUtils]: 14: Hoare triple {779#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {779#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 22:14:20,922 INFO L290 TraceCheckUtils]: 15: Hoare triple {779#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {780#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 22:14:20,923 INFO L290 TraceCheckUtils]: 16: Hoare triple {780#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {780#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 22:14:20,923 INFO L290 TraceCheckUtils]: 17: Hoare triple {780#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {781#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 22:14:20,924 INFO L290 TraceCheckUtils]: 18: Hoare triple {781#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {781#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 22:14:20,924 INFO L290 TraceCheckUtils]: 19: Hoare triple {781#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {782#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 22:14:20,925 INFO L290 TraceCheckUtils]: 20: Hoare triple {782#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {782#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 22:14:20,928 INFO L290 TraceCheckUtils]: 21: Hoare triple {782#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {783#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 22:14:20,929 INFO L290 TraceCheckUtils]: 22: Hoare triple {783#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {783#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 22:14:20,929 INFO L290 TraceCheckUtils]: 23: Hoare triple {783#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {784#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 22:14:20,930 INFO L290 TraceCheckUtils]: 24: Hoare triple {784#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {784#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 22:14:20,930 INFO L290 TraceCheckUtils]: 25: Hoare triple {784#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {865#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-07 22:14:20,931 INFO L290 TraceCheckUtils]: 26: Hoare triple {865#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:20,931 INFO L272 TraceCheckUtils]: 27: Hoare triple {771#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {771#false} is VALID [2022-04-07 22:14:20,931 INFO L290 TraceCheckUtils]: 28: Hoare triple {771#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {771#false} is VALID [2022-04-07 22:14:20,931 INFO L290 TraceCheckUtils]: 29: Hoare triple {771#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:20,931 INFO L290 TraceCheckUtils]: 30: Hoare triple {771#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:20,932 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:20,932 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:14:21,321 INFO L290 TraceCheckUtils]: 30: Hoare triple {771#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:21,322 INFO L290 TraceCheckUtils]: 29: Hoare triple {771#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:21,322 INFO L290 TraceCheckUtils]: 28: Hoare triple {771#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {771#false} is VALID [2022-04-07 22:14:21,322 INFO L272 TraceCheckUtils]: 27: Hoare triple {771#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {771#false} is VALID [2022-04-07 22:14:21,322 INFO L290 TraceCheckUtils]: 26: Hoare triple {893#(< (mod main_~x~0 4294967296) 99)} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {771#false} is VALID [2022-04-07 22:14:21,323 INFO L290 TraceCheckUtils]: 25: Hoare triple {897#(< (mod (+ main_~x~0 1) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {893#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-07 22:14:21,328 INFO L290 TraceCheckUtils]: 24: Hoare triple {897#(< (mod (+ main_~x~0 1) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {897#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-07 22:14:21,329 INFO L290 TraceCheckUtils]: 23: Hoare triple {904#(< (mod (+ main_~x~0 2) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {897#(< (mod (+ main_~x~0 1) 4294967296) 99)} is VALID [2022-04-07 22:14:21,330 INFO L290 TraceCheckUtils]: 22: Hoare triple {904#(< (mod (+ main_~x~0 2) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {904#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-07 22:14:21,330 INFO L290 TraceCheckUtils]: 21: Hoare triple {911#(< (mod (+ main_~x~0 3) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {904#(< (mod (+ main_~x~0 2) 4294967296) 99)} is VALID [2022-04-07 22:14:21,331 INFO L290 TraceCheckUtils]: 20: Hoare triple {911#(< (mod (+ main_~x~0 3) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {911#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-07 22:14:21,332 INFO L290 TraceCheckUtils]: 19: Hoare triple {918#(< (mod (+ main_~x~0 4) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {911#(< (mod (+ main_~x~0 3) 4294967296) 99)} is VALID [2022-04-07 22:14:21,332 INFO L290 TraceCheckUtils]: 18: Hoare triple {918#(< (mod (+ main_~x~0 4) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {918#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-07 22:14:21,333 INFO L290 TraceCheckUtils]: 17: Hoare triple {925#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {918#(< (mod (+ main_~x~0 4) 4294967296) 99)} is VALID [2022-04-07 22:14:21,333 INFO L290 TraceCheckUtils]: 16: Hoare triple {925#(< (mod (+ 5 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {925#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-07 22:14:21,334 INFO L290 TraceCheckUtils]: 15: Hoare triple {932#(< (mod (+ main_~x~0 6) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {925#(< (mod (+ 5 main_~x~0) 4294967296) 99)} is VALID [2022-04-07 22:14:21,334 INFO L290 TraceCheckUtils]: 14: Hoare triple {932#(< (mod (+ main_~x~0 6) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {932#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-07 22:14:21,335 INFO L290 TraceCheckUtils]: 13: Hoare triple {939#(< (mod (+ 7 main_~x~0) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {932#(< (mod (+ main_~x~0 6) 4294967296) 99)} is VALID [2022-04-07 22:14:21,336 INFO L290 TraceCheckUtils]: 12: Hoare triple {939#(< (mod (+ 7 main_~x~0) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {939#(< (mod (+ 7 main_~x~0) 4294967296) 99)} is VALID [2022-04-07 22:14:21,336 INFO L290 TraceCheckUtils]: 11: Hoare triple {946#(< (mod (+ main_~x~0 8) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {939#(< (mod (+ 7 main_~x~0) 4294967296) 99)} is VALID [2022-04-07 22:14:21,337 INFO L290 TraceCheckUtils]: 10: Hoare triple {946#(< (mod (+ main_~x~0 8) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {946#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-07 22:14:21,337 INFO L290 TraceCheckUtils]: 9: Hoare triple {953#(< (mod (+ main_~x~0 9) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {946#(< (mod (+ main_~x~0 8) 4294967296) 99)} is VALID [2022-04-07 22:14:21,338 INFO L290 TraceCheckUtils]: 8: Hoare triple {953#(< (mod (+ main_~x~0 9) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {953#(< (mod (+ main_~x~0 9) 4294967296) 99)} is VALID [2022-04-07 22:14:21,339 INFO L290 TraceCheckUtils]: 7: Hoare triple {960#(< (mod (+ main_~x~0 10) 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {953#(< (mod (+ main_~x~0 9) 4294967296) 99)} is VALID [2022-04-07 22:14:21,339 INFO L290 TraceCheckUtils]: 6: Hoare triple {960#(< (mod (+ main_~x~0 10) 4294967296) 99)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {960#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-07 22:14:21,339 INFO L290 TraceCheckUtils]: 5: Hoare triple {770#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {960#(< (mod (+ main_~x~0 10) 4294967296) 99)} is VALID [2022-04-07 22:14:21,340 INFO L272 TraceCheckUtils]: 4: Hoare triple {770#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:21,340 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {770#true} {770#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:21,340 INFO L290 TraceCheckUtils]: 2: Hoare triple {770#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:21,340 INFO L290 TraceCheckUtils]: 1: Hoare triple {770#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {770#true} is VALID [2022-04-07 22:14:21,340 INFO L272 TraceCheckUtils]: 0: Hoare triple {770#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {770#true} is VALID [2022-04-07 22:14:21,340 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:21,341 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1156866451] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:14:21,341 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:14:21,341 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2022-04-07 22:14:21,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2063972098] [2022-04-07 22:14:21,341 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:14:21,342 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 22:14:21,342 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:14:21,342 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:21,405 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:21,405 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 22:14:21,405 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:14:21,405 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 22:14:21,406 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=458, Unknown=0, NotChecked=0, Total=650 [2022-04-07 22:14:21,406 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:25,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:25,051 INFO L93 Difference]: Finished difference Result 63 states and 68 transitions. [2022-04-07 22:14:25,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-07 22:14:25,052 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 22:14:25,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:14:25,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:25,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 66 transitions. [2022-04-07 22:14:25,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:25,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 66 transitions. [2022-04-07 22:14:25,056 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 66 transitions. [2022-04-07 22:14:25,147 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:25,149 INFO L225 Difference]: With dead ends: 63 [2022-04-07 22:14:25,149 INFO L226 Difference]: Without dead ends: 58 [2022-04-07 22:14:25,150 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 52 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 268 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=643, Invalid=1613, Unknown=0, NotChecked=0, Total=2256 [2022-04-07 22:14:25,151 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 50 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 331 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 377 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 331 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:14:25,151 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [50 Valid, 68 Invalid, 377 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 331 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 22:14:25,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-04-07 22:14:25,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 56. [2022-04-07 22:14:25,198 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:14:25,198 INFO L82 GeneralOperation]: Start isEquivalent. First operand 58 states. Second operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:25,199 INFO L74 IsIncluded]: Start isIncluded. First operand 58 states. Second operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:25,199 INFO L87 Difference]: Start difference. First operand 58 states. Second operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:25,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:25,204 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2022-04-07 22:14:25,204 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2022-04-07 22:14:25,209 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:25,210 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:25,210 INFO L74 IsIncluded]: Start isIncluded. First operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-07 22:14:25,210 INFO L87 Difference]: Start difference. First operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 58 states. [2022-04-07 22:14:25,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:25,215 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2022-04-07 22:14:25,215 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2022-04-07 22:14:25,215 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:25,215 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:25,215 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:14:25,215 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:14:25,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 51 states have internal predecessors, (52), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:25,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2022-04-07 22:14:25,218 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 31 [2022-04-07 22:14:25,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:14:25,218 INFO L478 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2022-04-07 22:14:25,219 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 2.0) internal successors, (52), 25 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:25,219 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2022-04-07 22:14:25,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-04-07 22:14:25,223 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:14:25,224 INFO L499 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:14:25,251 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-07 22:14:25,448 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:14:25,448 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:14:25,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:14:25,449 INFO L85 PathProgramCache]: Analyzing trace with hash 23523812, now seen corresponding path program 3 times [2022-04-07 22:14:25,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:14:25,449 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [195418185] [2022-04-07 22:14:25,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:14:25,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:14:25,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:26,079 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:14:26,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:26,096 INFO L290 TraceCheckUtils]: 0: Hoare triple {1352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1324#true} is VALID [2022-04-07 22:14:26,096 INFO L290 TraceCheckUtils]: 1: Hoare triple {1324#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:26,096 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1324#true} {1324#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:26,097 INFO L272 TraceCheckUtils]: 0: Hoare triple {1324#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:14:26,097 INFO L290 TraceCheckUtils]: 1: Hoare triple {1352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1324#true} is VALID [2022-04-07 22:14:26,097 INFO L290 TraceCheckUtils]: 2: Hoare triple {1324#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:26,097 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1324#true} {1324#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:26,097 INFO L272 TraceCheckUtils]: 4: Hoare triple {1324#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:26,098 INFO L290 TraceCheckUtils]: 5: Hoare triple {1324#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {1329#(= main_~x~0 0)} is VALID [2022-04-07 22:14:26,098 INFO L290 TraceCheckUtils]: 6: Hoare triple {1329#(= main_~x~0 0)} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1329#(= main_~x~0 0)} is VALID [2022-04-07 22:14:26,099 INFO L290 TraceCheckUtils]: 7: Hoare triple {1329#(= main_~x~0 0)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1330#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:26,099 INFO L290 TraceCheckUtils]: 8: Hoare triple {1330#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1330#(and (<= 1 main_~x~0) (<= main_~x~0 1))} is VALID [2022-04-07 22:14:26,100 INFO L290 TraceCheckUtils]: 9: Hoare triple {1330#(and (<= 1 main_~x~0) (<= main_~x~0 1))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1331#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:26,101 INFO L290 TraceCheckUtils]: 10: Hoare triple {1331#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1331#(and (<= 2 main_~x~0) (<= main_~x~0 2))} is VALID [2022-04-07 22:14:26,101 INFO L290 TraceCheckUtils]: 11: Hoare triple {1331#(and (<= 2 main_~x~0) (<= main_~x~0 2))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1332#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:26,101 INFO L290 TraceCheckUtils]: 12: Hoare triple {1332#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1332#(and (<= main_~x~0 3) (<= 3 main_~x~0))} is VALID [2022-04-07 22:14:26,102 INFO L290 TraceCheckUtils]: 13: Hoare triple {1332#(and (<= main_~x~0 3) (<= 3 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1333#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 22:14:26,102 INFO L290 TraceCheckUtils]: 14: Hoare triple {1333#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1333#(and (<= main_~x~0 4) (<= 4 main_~x~0))} is VALID [2022-04-07 22:14:26,103 INFO L290 TraceCheckUtils]: 15: Hoare triple {1333#(and (<= main_~x~0 4) (<= 4 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1334#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 22:14:26,103 INFO L290 TraceCheckUtils]: 16: Hoare triple {1334#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1334#(and (<= 5 main_~x~0) (<= main_~x~0 5))} is VALID [2022-04-07 22:14:26,104 INFO L290 TraceCheckUtils]: 17: Hoare triple {1334#(and (<= 5 main_~x~0) (<= main_~x~0 5))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1335#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 22:14:26,104 INFO L290 TraceCheckUtils]: 18: Hoare triple {1335#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1335#(and (<= 6 main_~x~0) (<= main_~x~0 6))} is VALID [2022-04-07 22:14:26,105 INFO L290 TraceCheckUtils]: 19: Hoare triple {1335#(and (<= 6 main_~x~0) (<= main_~x~0 6))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1336#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 22:14:26,105 INFO L290 TraceCheckUtils]: 20: Hoare triple {1336#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1336#(and (<= main_~x~0 7) (<= 7 main_~x~0))} is VALID [2022-04-07 22:14:26,106 INFO L290 TraceCheckUtils]: 21: Hoare triple {1336#(and (<= main_~x~0 7) (<= 7 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1337#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 22:14:26,106 INFO L290 TraceCheckUtils]: 22: Hoare triple {1337#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1337#(and (<= main_~x~0 8) (<= 8 main_~x~0))} is VALID [2022-04-07 22:14:26,107 INFO L290 TraceCheckUtils]: 23: Hoare triple {1337#(and (<= main_~x~0 8) (<= 8 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1338#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 22:14:26,107 INFO L290 TraceCheckUtils]: 24: Hoare triple {1338#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1338#(and (<= main_~x~0 9) (<= 9 main_~x~0))} is VALID [2022-04-07 22:14:26,108 INFO L290 TraceCheckUtils]: 25: Hoare triple {1338#(and (<= main_~x~0 9) (<= 9 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1339#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-07 22:14:26,109 INFO L290 TraceCheckUtils]: 26: Hoare triple {1339#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1339#(and (<= main_~x~0 10) (<= 10 main_~x~0))} is VALID [2022-04-07 22:14:26,109 INFO L290 TraceCheckUtils]: 27: Hoare triple {1339#(and (<= main_~x~0 10) (<= 10 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1340#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-07 22:14:26,110 INFO L290 TraceCheckUtils]: 28: Hoare triple {1340#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1340#(and (<= main_~x~0 11) (<= 11 main_~x~0))} is VALID [2022-04-07 22:14:26,110 INFO L290 TraceCheckUtils]: 29: Hoare triple {1340#(and (<= main_~x~0 11) (<= 11 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1341#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-07 22:14:26,111 INFO L290 TraceCheckUtils]: 30: Hoare triple {1341#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1341#(and (<= main_~x~0 12) (<= 12 main_~x~0))} is VALID [2022-04-07 22:14:26,111 INFO L290 TraceCheckUtils]: 31: Hoare triple {1341#(and (<= main_~x~0 12) (<= 12 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1342#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-07 22:14:26,112 INFO L290 TraceCheckUtils]: 32: Hoare triple {1342#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1342#(and (<= main_~x~0 13) (<= 13 main_~x~0))} is VALID [2022-04-07 22:14:26,112 INFO L290 TraceCheckUtils]: 33: Hoare triple {1342#(and (<= main_~x~0 13) (<= 13 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1343#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-07 22:14:26,113 INFO L290 TraceCheckUtils]: 34: Hoare triple {1343#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1343#(and (<= 14 main_~x~0) (<= main_~x~0 14))} is VALID [2022-04-07 22:14:26,114 INFO L290 TraceCheckUtils]: 35: Hoare triple {1343#(and (<= 14 main_~x~0) (<= main_~x~0 14))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1344#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-07 22:14:26,114 INFO L290 TraceCheckUtils]: 36: Hoare triple {1344#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1344#(and (<= 15 main_~x~0) (<= main_~x~0 15))} is VALID [2022-04-07 22:14:26,115 INFO L290 TraceCheckUtils]: 37: Hoare triple {1344#(and (<= 15 main_~x~0) (<= main_~x~0 15))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1345#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-07 22:14:26,115 INFO L290 TraceCheckUtils]: 38: Hoare triple {1345#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1345#(and (<= main_~x~0 16) (<= 16 main_~x~0))} is VALID [2022-04-07 22:14:26,116 INFO L290 TraceCheckUtils]: 39: Hoare triple {1345#(and (<= main_~x~0 16) (<= 16 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1346#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-07 22:14:26,116 INFO L290 TraceCheckUtils]: 40: Hoare triple {1346#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1346#(and (<= 17 main_~x~0) (<= main_~x~0 17))} is VALID [2022-04-07 22:14:26,117 INFO L290 TraceCheckUtils]: 41: Hoare triple {1346#(and (<= 17 main_~x~0) (<= main_~x~0 17))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1347#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-07 22:14:26,117 INFO L290 TraceCheckUtils]: 42: Hoare triple {1347#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1347#(and (<= main_~x~0 18) (<= 18 main_~x~0))} is VALID [2022-04-07 22:14:26,118 INFO L290 TraceCheckUtils]: 43: Hoare triple {1347#(and (<= main_~x~0 18) (<= 18 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1348#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-07 22:14:26,118 INFO L290 TraceCheckUtils]: 44: Hoare triple {1348#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1348#(and (<= 19 main_~x~0) (<= main_~x~0 19))} is VALID [2022-04-07 22:14:26,119 INFO L290 TraceCheckUtils]: 45: Hoare triple {1348#(and (<= 19 main_~x~0) (<= main_~x~0 19))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1349#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-07 22:14:26,119 INFO L290 TraceCheckUtils]: 46: Hoare triple {1349#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1349#(and (<= main_~x~0 20) (<= 20 main_~x~0))} is VALID [2022-04-07 22:14:26,120 INFO L290 TraceCheckUtils]: 47: Hoare triple {1349#(and (<= main_~x~0 20) (<= 20 main_~x~0))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1350#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-07 22:14:26,120 INFO L290 TraceCheckUtils]: 48: Hoare triple {1350#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1350#(and (<= 21 main_~x~0) (<= main_~x~0 21))} is VALID [2022-04-07 22:14:26,121 INFO L290 TraceCheckUtils]: 49: Hoare triple {1350#(and (<= 21 main_~x~0) (<= main_~x~0 21))} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1351#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 22))} is VALID [2022-04-07 22:14:26,122 INFO L290 TraceCheckUtils]: 50: Hoare triple {1351#(and (not (<= (+ (div main_~x~0 4294967296) 1) 0)) (<= main_~x~0 22))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1325#false} is VALID [2022-04-07 22:14:26,122 INFO L272 TraceCheckUtils]: 51: Hoare triple {1325#false} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {1325#false} is VALID [2022-04-07 22:14:26,122 INFO L290 TraceCheckUtils]: 52: Hoare triple {1325#false} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1325#false} is VALID [2022-04-07 22:14:26,122 INFO L290 TraceCheckUtils]: 53: Hoare triple {1325#false} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1325#false} is VALID [2022-04-07 22:14:26,122 INFO L290 TraceCheckUtils]: 54: Hoare triple {1325#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1325#false} is VALID [2022-04-07 22:14:26,123 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:14:26,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:14:26,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [195418185] [2022-04-07 22:14:26,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [195418185] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:14:26,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1173133291] [2022-04-07 22:14:26,123 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:14:26,124 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:14:26,124 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:14:26,125 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:14:26,131 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 22:14:26,182 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 22:14:26,182 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:14:26,183 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 22:14:26,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:14:26,257 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:14:27,337 INFO L272 TraceCheckUtils]: 0: Hoare triple {1324#true} [45] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,337 INFO L290 TraceCheckUtils]: 1: Hoare triple {1324#true} [47] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select |v_#length_1| 2) 14) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L290 TraceCheckUtils]: 2: Hoare triple {1324#true} [50] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1324#true} {1324#true} [64] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L272 TraceCheckUtils]: 4: Hoare triple {1324#true} [46] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L290 TraceCheckUtils]: 5: Hoare triple {1324#true} [49] mainENTRY-->L18-2: Formula: (and (= v_main_~y~0_2 |v_main_#t~nondet4_2|) (= v_main_~x~0_3 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_2} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L290 TraceCheckUtils]: 6: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L290 TraceCheckUtils]: 7: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L290 TraceCheckUtils]: 8: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L290 TraceCheckUtils]: 9: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,338 INFO L290 TraceCheckUtils]: 10: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,339 INFO L290 TraceCheckUtils]: 11: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,339 INFO L290 TraceCheckUtils]: 12: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,339 INFO L290 TraceCheckUtils]: 13: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,339 INFO L290 TraceCheckUtils]: 14: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,339 INFO L290 TraceCheckUtils]: 15: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,339 INFO L290 TraceCheckUtils]: 16: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,339 INFO L290 TraceCheckUtils]: 17: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,339 INFO L290 TraceCheckUtils]: 18: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,340 INFO L290 TraceCheckUtils]: 19: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,340 INFO L290 TraceCheckUtils]: 20: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,340 INFO L290 TraceCheckUtils]: 21: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,340 INFO L290 TraceCheckUtils]: 22: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,340 INFO L290 TraceCheckUtils]: 23: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,340 INFO L290 TraceCheckUtils]: 24: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,340 INFO L290 TraceCheckUtils]: 25: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,341 INFO L290 TraceCheckUtils]: 26: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,341 INFO L290 TraceCheckUtils]: 27: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,341 INFO L290 TraceCheckUtils]: 28: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,341 INFO L290 TraceCheckUtils]: 29: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,341 INFO L290 TraceCheckUtils]: 30: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,341 INFO L290 TraceCheckUtils]: 31: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,341 INFO L290 TraceCheckUtils]: 32: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 33: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 34: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 35: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 36: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 37: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 38: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 39: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 40: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 41: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,342 INFO L290 TraceCheckUtils]: 42: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,343 INFO L290 TraceCheckUtils]: 43: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,343 INFO L290 TraceCheckUtils]: 44: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,343 INFO L290 TraceCheckUtils]: 45: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,343 INFO L290 TraceCheckUtils]: 46: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1324#true} is VALID [2022-04-07 22:14:27,343 INFO L290 TraceCheckUtils]: 47: Hoare triple {1324#true} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1324#true} is VALID [2022-04-07 22:14:27,343 INFO L290 TraceCheckUtils]: 48: Hoare triple {1324#true} [53] L18-2-->L18: Formula: (< (mod v_main_~x~0_6 4294967296) 99) InVars {main_~x~0=v_main_~x~0_6} OutVars{main_~x~0=v_main_~x~0_6} AuxVars[] AssignedVars[] {1500#(< (mod main_~x~0 4294967296) 99)} is VALID [2022-04-07 22:14:27,345 INFO L290 TraceCheckUtils]: 49: Hoare triple {1500#(< (mod main_~x~0 4294967296) 99)} [56] L18-->L18-2: Formula: (and (not (= (mod v_main_~y~0_1 2) 0)) (= v_main_~x~0_1 (+ v_main_~x~0_2 1))) InVars {main_~x~0=v_main_~x~0_2, main_~y~0=v_main_~y~0_1} OutVars{main_#t~post5=|v_main_#t~post5_1|, main_~y~0=v_main_~y~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_~x~0, main_#t~post5] {1504#(and (not (= (mod main_~y~0 2) 0)) (< (mod (+ main_~x~0 4294967295) 4294967296) 99))} is VALID [2022-04-07 22:14:27,345 INFO L290 TraceCheckUtils]: 50: Hoare triple {1504#(and (not (= (mod main_~y~0 2) 0)) (< (mod (+ main_~x~0 4294967295) 4294967296) 99))} [52] L18-2-->L17-2: Formula: (not (< (mod v_main_~x~0_5 4294967296) 99)) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1508#(and (not (= (mod main_~y~0 2) 0)) (< (mod (+ main_~x~0 4294967295) 4294967296) 99) (not (< (mod main_~x~0 4294967296) 99)))} is VALID [2022-04-07 22:14:27,348 INFO L272 TraceCheckUtils]: 51: Hoare triple {1508#(and (not (= (mod main_~y~0 2) 0)) (< (mod (+ main_~x~0 4294967295) 4294967296) 99) (not (< (mod main_~x~0 4294967296) 99)))} [54] L17-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_9 2) (mod v_main_~y~0_5 2)) 1 0)) InVars {main_~x~0=v_main_~x~0_9, main_~y~0=v_main_~y~0_5} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~y~0] {1512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:14:27,351 INFO L290 TraceCheckUtils]: 52: Hoare triple {1512#(<= 1 |__VERIFIER_assert_#in~cond|)} [58] __VERIFIER_assertENTRY-->L7: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:14:27,351 INFO L290 TraceCheckUtils]: 53: Hoare triple {1516#(<= 1 __VERIFIER_assert_~cond)} [59] L7-->L8: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1325#false} is VALID [2022-04-07 22:14:27,351 INFO L290 TraceCheckUtils]: 54: Hoare triple {1325#false} [61] L8-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1325#false} is VALID [2022-04-07 22:14:27,352 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 441 trivial. 0 not checked. [2022-04-07 22:14:27,352 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-07 22:14:27,352 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1173133291] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:14:27,352 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-07 22:14:27,352 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [26] total 31 [2022-04-07 22:14:27,352 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637188006] [2022-04-07 22:14:27,352 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:14:27,353 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 55 [2022-04-07 22:14:27,353 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:14:27,353 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:27,371 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:27,372 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 22:14:27,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:14:27,372 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 22:14:27,373 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=825, Unknown=0, NotChecked=0, Total=930 [2022-04-07 22:14:27,373 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:27,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:27,561 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2022-04-07 22:14:27,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 22:14:27,561 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 55 [2022-04-07 22:14:27,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:14:27,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:27,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 15 transitions. [2022-04-07 22:14:27,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:27,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 15 transitions. [2022-04-07 22:14:27,564 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 15 transitions. [2022-04-07 22:14:27,617 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:14:27,618 INFO L225 Difference]: With dead ends: 56 [2022-04-07 22:14:27,641 INFO L226 Difference]: Without dead ends: 0 [2022-04-07 22:14:27,642 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=113, Invalid=943, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 22:14:27,642 INFO L913 BasicCegarLoop]: 7 mSDtfsCounter, 3 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:14:27,642 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 29 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:14:27,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2022-04-07 22:14:27,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2022-04-07 22:14:27,643 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:14:27,643 INFO L82 GeneralOperation]: Start isEquivalent. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-07 22:14:27,643 INFO L74 IsIncluded]: Start isIncluded. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-07 22:14:27,643 INFO L87 Difference]: Start difference. First operand 0 states. Second operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-07 22:14:27,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:27,644 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-07 22:14:27,644 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-07 22:14:27,644 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:27,644 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:27,644 INFO L74 IsIncluded]: Start isIncluded. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-07 22:14:27,644 INFO L87 Difference]: Start difference. First operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand 0 states. [2022-04-07 22:14:27,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:14:27,644 INFO L93 Difference]: Finished difference Result 0 states and 0 transitions. [2022-04-07 22:14:27,644 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-07 22:14:27,644 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:27,645 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:14:27,645 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:14:27,645 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:14:27,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 0 states, 0 states have (on average 0.0) internal successors, (0), 0 states have internal predecessors, (0), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-04-07 22:14:27,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2022-04-07 22:14:27,645 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 55 [2022-04-07 22:14:27,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:14:27,645 INFO L478 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2022-04-07 22:14:27,645 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:14:27,645 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2022-04-07 22:14:27,646 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:14:27,648 INFO L788 garLoopResultBuilder]: Registering result SAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-04-07 22:14:27,672 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-07 22:14:27,859 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:14:27,861 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. [2022-04-07 22:14:28,116 INFO L878 garLoopResultBuilder]: At program point ULTIMATE.initENTRY(line -1) the Hoare annotation is: (and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|)) [2022-04-07 22:14:28,116 INFO L882 garLoopResultBuilder]: For program point ULTIMATE.initFINAL(line -1) no Hoare annotation was computed. [2022-04-07 22:14:28,116 INFO L882 garLoopResultBuilder]: For program point ULTIMATE.initEXIT(line -1) no Hoare annotation was computed. [2022-04-07 22:14:28,116 INFO L885 garLoopResultBuilder]: At program point ULTIMATE.startENTRY(line -1) the Hoare annotation is: true [2022-04-07 22:14:28,116 INFO L885 garLoopResultBuilder]: At program point L-1(line -1) the Hoare annotation is: true [2022-04-07 22:14:28,116 INFO L882 garLoopResultBuilder]: For program point ULTIMATE.startFINAL(line -1) no Hoare annotation was computed. [2022-04-07 22:14:28,117 INFO L882 garLoopResultBuilder]: For program point ULTIMATE.startEXIT(line -1) no Hoare annotation was computed. [2022-04-07 22:14:28,117 INFO L885 garLoopResultBuilder]: At program point mainENTRY(lines 13 26) the Hoare annotation is: true [2022-04-07 22:14:28,117 INFO L878 garLoopResultBuilder]: At program point L18-2(lines 17 23) the Hoare annotation is: (let ((.cse3 (mod main_~x~0 2))) (let ((.cse1 (= .cse3 (mod main_~y~0 2))) (.cse2 (< (mod (+ main_~x~0 4294967295) 4294967296) 99)) (.cse0 (<= .cse3 0))) (or (and .cse0 .cse1) (= main_~x~0 0) (and .cse2 .cse1) (and .cse2 .cse0)))) [2022-04-07 22:14:28,117 INFO L878 garLoopResultBuilder]: At program point L17-2(lines 17 23) the Hoare annotation is: (= (mod main_~x~0 2) (mod main_~y~0 2)) [2022-04-07 22:14:28,117 INFO L882 garLoopResultBuilder]: For program point L18(lines 18 22) no Hoare annotation was computed. [2022-04-07 22:14:28,117 INFO L882 garLoopResultBuilder]: For program point mainFINAL(lines 13 26) no Hoare annotation was computed. [2022-04-07 22:14:28,117 INFO L882 garLoopResultBuilder]: For program point mainEXIT(lines 13 26) no Hoare annotation was computed. [2022-04-07 22:14:28,117 INFO L885 garLoopResultBuilder]: At program point __VERIFIER_assertENTRY(lines 6 11) the Hoare annotation is: true [2022-04-07 22:14:28,117 INFO L882 garLoopResultBuilder]: For program point L7(lines 7 9) no Hoare annotation was computed. [2022-04-07 22:14:28,117 INFO L882 garLoopResultBuilder]: For program point L8(line 8) no Hoare annotation was computed. [2022-04-07 22:14:28,117 INFO L882 garLoopResultBuilder]: For program point L7-2(lines 6 11) no Hoare annotation was computed. [2022-04-07 22:14:28,118 INFO L882 garLoopResultBuilder]: For program point __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION(line 8) no Hoare annotation was computed. [2022-04-07 22:14:28,118 INFO L882 garLoopResultBuilder]: For program point __VERIFIER_assertEXIT(lines 6 11) no Hoare annotation was computed. [2022-04-07 22:14:28,121 INFO L719 BasicCegarLoop]: Path program histogram: [3, 1, 1, 1] [2022-04-07 22:14:28,123 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-04-07 22:14:28,127 WARN L170 areAnnotationChecker]: ULTIMATE.initFINAL has no Hoare annotation [2022-04-07 22:14:28,128 WARN L170 areAnnotationChecker]: L7 has no Hoare annotation [2022-04-07 22:14:28,128 WARN L170 areAnnotationChecker]: ULTIMATE.initFINAL has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: L18 has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: L7 has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: L7 has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: ULTIMATE.initEXIT has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: L18 has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: L18 has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: L8 has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: L8 has no Hoare annotation [2022-04-07 22:14:28,140 WARN L170 areAnnotationChecker]: L7-2 has no Hoare annotation [2022-04-07 22:14:28,141 WARN L170 areAnnotationChecker]: __VERIFIER_assertEXIT has no Hoare annotation [2022-04-07 22:14:28,141 WARN L170 areAnnotationChecker]: mainFINAL has no Hoare annotation [2022-04-07 22:14:28,141 WARN L170 areAnnotationChecker]: mainEXIT has no Hoare annotation [2022-04-07 22:14:28,141 WARN L170 areAnnotationChecker]: ULTIMATE.startFINAL has no Hoare annotation [2022-04-07 22:14:28,141 INFO L163 areAnnotationChecker]: CFG has 6 edges. 6 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [2022-04-07 22:14:28,151 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 10:14:28 BasicIcfg [2022-04-07 22:14:28,151 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-04-07 22:14:28,152 INFO L158 Benchmark]: Toolchain (without parser) took 12876.67ms. Allocated memory was 191.9MB in the beginning and 239.1MB in the end (delta: 47.2MB). Free memory was 131.8MB in the beginning and 168.0MB in the end (delta: -36.2MB). Peak memory consumption was 11.9MB. Max. memory is 8.0GB. [2022-04-07 22:14:28,152 INFO L158 Benchmark]: CDTParser took 0.12ms. Allocated memory is still 191.9MB. Free memory is still 148.0MB. There was no memory consumed. Max. memory is 8.0GB. [2022-04-07 22:14:28,153 INFO L158 Benchmark]: CACSL2BoogieTranslator took 219.02ms. Allocated memory was 191.9MB in the beginning and 239.1MB in the end (delta: 47.2MB). Free memory was 131.7MB in the beginning and 209.2MB in the end (delta: -77.5MB). Peak memory consumption was 8.8MB. Max. memory is 8.0GB. [2022-04-07 22:14:28,153 INFO L158 Benchmark]: Boogie Preprocessor took 26.57ms. Allocated memory is still 239.1MB. Free memory was 209.2MB in the beginning and 208.1MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-04-07 22:14:28,153 INFO L158 Benchmark]: RCFGBuilder took 232.82ms. Allocated memory is still 239.1MB. Free memory was 208.1MB in the beginning and 197.1MB in the end (delta: 11.0MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. [2022-04-07 22:14:28,153 INFO L158 Benchmark]: IcfgTransformer took 24.43ms. Allocated memory is still 239.1MB. Free memory was 197.1MB in the beginning and 196.1MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-04-07 22:14:28,154 INFO L158 Benchmark]: TraceAbstraction took 12368.00ms. Allocated memory is still 239.1MB. Free memory was 195.5MB in the beginning and 168.0MB in the end (delta: 27.6MB). Peak memory consumption was 28.6MB. Max. memory is 8.0GB. [2022-04-07 22:14:28,155 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - AssertionsEnabledResult: Assertions are enabled Assertions are enabled - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12ms. Allocated memory is still 191.9MB. Free memory is still 148.0MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 219.02ms. Allocated memory was 191.9MB in the beginning and 239.1MB in the end (delta: 47.2MB). Free memory was 131.7MB in the beginning and 209.2MB in the end (delta: -77.5MB). Peak memory consumption was 8.8MB. Max. memory is 8.0GB. * Boogie Preprocessor took 26.57ms. Allocated memory is still 239.1MB. Free memory was 209.2MB in the beginning and 208.1MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 232.82ms. Allocated memory is still 239.1MB. Free memory was 208.1MB in the beginning and 197.1MB in the end (delta: 11.0MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. * IcfgTransformer took 24.43ms. Allocated memory is still 239.1MB. Free memory was 197.1MB in the beginning and 196.1MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * TraceAbstraction took 12368.00ms. Allocated memory is still 239.1MB. Free memory was 195.5MB in the beginning and 168.0MB in the end (delta: 27.6MB). Peak memory consumption was 28.6MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - PositiveResult [Line: 8]: call to reach_error is unreachable For all program executions holds that call to reach_error is unreachable at this location - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 19 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 12.3s, OverallIterations: 6, TraceHistogramMax: 22, PathProgramHistogramMax: 3, EmptinessCheckTime: 0.0s, AutomataDifference: 5.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.3s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 131 SdHoareTripleChecker+Valid, 0.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 130 mSDsluCounter, 216 SdHoareTripleChecker+Invalid, 0.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 148 mSDsCounter, 114 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 538 IncrementalHoareTripleChecker+Invalid, 652 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 114 mSolverCounterUnsat, 68 mSDtfsCounter, 538 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 292 GetRequests, 169 SyntacticMatches, 3 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 396 ImplicationChecksByTransitivity, 4.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=56occurred in iteration=5, InterpolantAutomatonStates: 65, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 6 MinimizatonAttempts, 6 StatesRemovedByMinimization, 4 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 7 LocationsWithAnnotation, 14 PreInvPairs, 42 NumberOfFragments, 63 HoareAnnotationTreeSize, 14 FomulaSimplifications, 4 FormulaSimplificationTreeSizeReduction, 0.1s HoareSimplificationTime, 7 FomulaSimplificationsInter, 834 FormulaSimplificationTreeSizeReductionInter, 0.2s HoareSimplificationTimeInter, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 4.7s InterpolantComputationTime, 258 NumberOfCodeBlocks, 218 NumberOfCodeBlocksAsserted, 13 NumberOfCheckSat, 308 ConstructedInterpolants, 0 QuantifiedInterpolants, 1230 SizeOfPredicates, 5 NumberOfNonLiveVariables, 281 ConjunctsInSsa, 50 ConjunctsInUnsatCore, 13 InterpolantComputations, 3 PerfectInterpolantSequences, 484/1319 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - AllSpecificationsHoldResult: All specifications hold 1 specifications checked. All of them hold - InvariantResult [Line: 17]: Loop Invariant Derived loop invariant: (((x % 2 <= 0 && x % 2 == y % 2) || x == 0) || ((x + 4294967295) % 4294967296 < 99 && x % 2 == y % 2)) || ((x + 4294967295) % 4294967296 < 99 && x % 2 <= 0) RESULT: Ultimate proved your program to be correct! [2022-04-07 22:14:28,172 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...