/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de31.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 22:52:57,364 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 22:52:57,366 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 22:52:57,394 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 22:52:57,395 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 22:52:57,396 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 22:52:57,398 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 22:52:57,403 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 22:52:57,404 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 22:52:57,408 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 22:52:57,409 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 22:52:57,410 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 22:52:57,410 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 22:52:57,412 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 22:52:57,413 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 22:52:57,416 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 22:52:57,416 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 22:52:57,417 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 22:52:57,419 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 22:52:57,422 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 22:52:57,423 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 22:52:57,424 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 22:52:57,425 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 22:52:57,425 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 22:52:57,426 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 22:52:57,428 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 22:52:57,437 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 22:52:57,437 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 22:52:57,439 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 22:52:57,439 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-07 22:52:57,463 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 22:52:57,464 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 22:52:57,464 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-07 22:52:57,464 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-07 22:52:57,465 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-07 22:52:57,465 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-07 22:52:57,466 INFO L138 SettingsManager]: * Use SBE=true [2022-04-07 22:52:57,466 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 22:52:57,466 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 22:52:57,466 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 22:52:57,467 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 22:52:57,467 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 22:52:57,467 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 22:52:57,467 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 22:52:57,467 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 22:52:57,467 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 22:52:57,467 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 22:52:57,467 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 22:52:57,468 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 22:52:57,468 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:52:57,468 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 22:52:57,468 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-07 22:52:57,468 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-07 22:52:57,468 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 22:52:57,469 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-07 22:52:57,469 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-07 22:52:57,469 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-07 22:52:57,469 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-07 22:52:57,470 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 22:52:57,470 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 22:52:57,679 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 22:52:57,694 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 22:52:57,696 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 22:52:57,697 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 22:52:57,699 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 22:52:57,700 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de31.c [2022-04-07 22:52:57,751 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9c95ad206/2a3226f51aaa4cda88acb0ca6bda3ffe/FLAG28bdc2abc [2022-04-07 22:52:58,087 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 22:52:58,087 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c [2022-04-07 22:52:58,092 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9c95ad206/2a3226f51aaa4cda88acb0ca6bda3ffe/FLAG28bdc2abc [2022-04-07 22:52:58,523 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9c95ad206/2a3226f51aaa4cda88acb0ca6bda3ffe [2022-04-07 22:52:58,525 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 22:52:58,526 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 22:52:58,529 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 22:52:58,529 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 22:52:58,532 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 22:52:58,533 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,534 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2cacbf17 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58, skipping insertion in model container [2022-04-07 22:52:58,535 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,540 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 22:52:58,551 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 22:52:58,692 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c[368,381] [2022-04-07 22:52:58,714 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:52:58,720 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 22:52:58,735 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c[368,381] [2022-04-07 22:52:58,740 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:52:58,750 INFO L208 MainTranslator]: Completed translation [2022-04-07 22:52:58,751 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58 WrapperNode [2022-04-07 22:52:58,751 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 22:52:58,752 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 22:52:58,752 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 22:52:58,752 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 22:52:58,761 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,762 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,769 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,769 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,782 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,785 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,786 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,787 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 22:52:58,788 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 22:52:58,788 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 22:52:58,788 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 22:52:58,789 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (1/1) ... [2022-04-07 22:52:58,801 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:52:58,810 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:52:58,820 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 22:52:58,838 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 22:52:58,849 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 22:52:58,849 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 22:52:58,849 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 22:52:58,850 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 22:52:58,850 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 22:52:58,850 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 22:52:58,850 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 22:52:58,850 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 22:52:58,850 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 22:52:58,850 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 22:52:58,850 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 22:52:58,850 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 22:52:58,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 22:52:58,851 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 22:52:58,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 22:52:58,851 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 22:52:58,851 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 22:52:58,851 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 22:52:58,895 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 22:52:58,896 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 22:52:59,000 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 22:52:59,006 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 22:52:59,006 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-07 22:52:59,007 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:52:59 BoogieIcfgContainer [2022-04-07 22:52:59,007 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 22:52:59,008 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 22:52:59,008 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 22:52:59,009 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 22:52:59,012 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:52:59" (1/1) ... [2022-04-07 22:52:59,013 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-07 22:52:59,031 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:52:59 BasicIcfg [2022-04-07 22:52:59,031 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 22:52:59,033 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 22:52:59,033 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 22:52:59,035 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 22:52:59,035 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 10:52:58" (1/4) ... [2022-04-07 22:52:59,035 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@183bd179 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:52:59, skipping insertion in model container [2022-04-07 22:52:59,036 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:52:58" (2/4) ... [2022-04-07 22:52:59,036 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@183bd179 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:52:59, skipping insertion in model container [2022-04-07 22:52:59,036 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:52:59" (3/4) ... [2022-04-07 22:52:59,036 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@183bd179 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 10:52:59, skipping insertion in model container [2022-04-07 22:52:59,036 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:52:59" (4/4) ... [2022-04-07 22:52:59,037 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de31.cqvasr [2022-04-07 22:52:59,046 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-07 22:52:59,046 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 22:52:59,081 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 22:52:59,091 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 22:52:59,091 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 22:52:59,108 INFO L276 IsEmpty]: Start isEmpty. Operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:52:59,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 22:52:59,112 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:52:59,113 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:52:59,114 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:52:59,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:52:59,122 INFO L85 PathProgramCache]: Analyzing trace with hash -1909530012, now seen corresponding path program 1 times [2022-04-07 22:52:59,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:52:59,130 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991277745] [2022-04-07 22:52:59,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:52:59,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:52:59,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:52:59,299 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:52:59,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:52:59,313 INFO L290 TraceCheckUtils]: 0: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-07 22:52:59,314 INFO L290 TraceCheckUtils]: 1: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 22:52:59,314 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 22:52:59,315 INFO L272 TraceCheckUtils]: 0: Hoare triple {25#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:52:59,316 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-07 22:52:59,316 INFO L290 TraceCheckUtils]: 2: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 22:52:59,316 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 22:52:59,317 INFO L272 TraceCheckUtils]: 4: Hoare triple {25#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-07 22:52:59,317 INFO L290 TraceCheckUtils]: 5: Hoare triple {25#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25#true} is VALID [2022-04-07 22:52:59,318 INFO L290 TraceCheckUtils]: 6: Hoare triple {25#true} [70] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 22:52:59,318 INFO L290 TraceCheckUtils]: 7: Hoare triple {26#false} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {26#false} is VALID [2022-04-07 22:52:59,318 INFO L290 TraceCheckUtils]: 8: Hoare triple {26#false} [74] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 22:52:59,318 INFO L290 TraceCheckUtils]: 9: Hoare triple {26#false} [77] L29-1-->L29-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 22:52:59,319 INFO L272 TraceCheckUtils]: 10: Hoare triple {26#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {26#false} is VALID [2022-04-07 22:52:59,319 INFO L290 TraceCheckUtils]: 11: Hoare triple {26#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26#false} is VALID [2022-04-07 22:52:59,319 INFO L290 TraceCheckUtils]: 12: Hoare triple {26#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 22:52:59,319 INFO L290 TraceCheckUtils]: 13: Hoare triple {26#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-07 22:52:59,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:52:59,320 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:52:59,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991277745] [2022-04-07 22:52:59,321 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [991277745] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:52:59,321 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:52:59,321 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 22:52:59,322 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2037761874] [2022-04-07 22:52:59,323 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:52:59,326 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 22:52:59,328 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:52:59,330 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,347 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:52:59,347 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 22:52:59,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:52:59,378 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 22:52:59,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:52:59,380 INFO L87 Difference]: Start difference. First operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:52:59,474 INFO L93 Difference]: Finished difference Result 37 states and 48 transitions. [2022-04-07 22:52:59,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 22:52:59,475 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 22:52:59,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:52:59,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2022-04-07 22:52:59,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2022-04-07 22:52:59,494 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 48 transitions. [2022-04-07 22:52:59,565 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:52:59,572 INFO L225 Difference]: With dead ends: 37 [2022-04-07 22:52:59,572 INFO L226 Difference]: Without dead ends: 15 [2022-04-07 22:52:59,576 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:52:59,578 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 15 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:52:59,580 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 26 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:52:59,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-07 22:52:59,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-07 22:52:59,612 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:52:59,613 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,613 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,614 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:52:59,618 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 22:52:59,618 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 22:52:59,619 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:52:59,619 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:52:59,619 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 22:52:59,620 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-07 22:52:59,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:52:59,628 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-07 22:52:59,628 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 22:52:59,629 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:52:59,629 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:52:59,629 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:52:59,630 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:52:59,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2022-04-07 22:52:59,637 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 17 transitions. Word has length 14 [2022-04-07 22:52:59,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:52:59,640 INFO L478 AbstractCegarLoop]: Abstraction has 15 states and 17 transitions. [2022-04-07 22:52:59,641 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,641 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-07 22:52:59,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-07 22:52:59,642 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:52:59,642 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:52:59,642 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 22:52:59,642 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:52:59,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:52:59,643 INFO L85 PathProgramCache]: Analyzing trace with hash -137167005, now seen corresponding path program 1 times [2022-04-07 22:52:59,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:52:59,643 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662181344] [2022-04-07 22:52:59,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:52:59,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:52:59,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:52:59,944 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:52:59,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:52:59,962 INFO L290 TraceCheckUtils]: 0: Hoare triple {144#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {134#true} is VALID [2022-04-07 22:52:59,962 INFO L290 TraceCheckUtils]: 1: Hoare triple {134#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-07 22:52:59,962 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134#true} {134#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-07 22:52:59,963 INFO L272 TraceCheckUtils]: 0: Hoare triple {134#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {144#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:52:59,963 INFO L290 TraceCheckUtils]: 1: Hoare triple {144#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {134#true} is VALID [2022-04-07 22:52:59,964 INFO L290 TraceCheckUtils]: 2: Hoare triple {134#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-07 22:52:59,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134#true} {134#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-07 22:52:59,964 INFO L272 TraceCheckUtils]: 4: Hoare triple {134#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-07 22:52:59,965 INFO L290 TraceCheckUtils]: 5: Hoare triple {134#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {139#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:52:59,966 INFO L290 TraceCheckUtils]: 6: Hoare triple {139#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {140#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-07 22:52:59,967 INFO L290 TraceCheckUtils]: 7: Hoare triple {140#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 22:52:59,968 INFO L290 TraceCheckUtils]: 8: Hoare triple {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 22:52:59,968 INFO L290 TraceCheckUtils]: 9: Hoare triple {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-07 22:52:59,969 INFO L272 TraceCheckUtils]: 10: Hoare triple {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {142#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:52:59,970 INFO L290 TraceCheckUtils]: 11: Hoare triple {142#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {143#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:52:59,971 INFO L290 TraceCheckUtils]: 12: Hoare triple {143#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {135#false} is VALID [2022-04-07 22:52:59,971 INFO L290 TraceCheckUtils]: 13: Hoare triple {135#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {135#false} is VALID [2022-04-07 22:52:59,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:52:59,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:52:59,972 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662181344] [2022-04-07 22:52:59,972 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [662181344] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:52:59,973 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:52:59,973 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-07 22:52:59,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1144340147] [2022-04-07 22:52:59,973 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:52:59,974 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 22:52:59,974 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:52:59,975 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:52:59,988 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:52:59,989 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 22:52:59,989 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:52:59,990 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 22:52:59,990 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2022-04-07 22:52:59,990 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. Second operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:00,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:00,296 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2022-04-07 22:53:00,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 22:53:00,296 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-07 22:53:00,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:53:00,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:00,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 35 transitions. [2022-04-07 22:53:00,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:00,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 35 transitions. [2022-04-07 22:53:00,301 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 35 transitions. [2022-04-07 22:53:00,338 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:00,339 INFO L225 Difference]: With dead ends: 29 [2022-04-07 22:53:00,340 INFO L226 Difference]: Without dead ends: 16 [2022-04-07 22:53:00,343 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-07 22:53:00,346 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 24 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:53:00,347 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 38 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:53:00,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-07 22:53:00,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-07 22:53:00,357 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:53:00,358 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:00,359 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:00,359 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:00,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:00,360 INFO L93 Difference]: Finished difference Result 16 states and 18 transitions. [2022-04-07 22:53:00,360 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-07 22:53:00,360 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:00,361 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:00,361 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-07 22:53:00,361 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-07 22:53:00,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:00,362 INFO L93 Difference]: Finished difference Result 16 states and 18 transitions. [2022-04-07 22:53:00,362 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-07 22:53:00,363 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:00,363 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:00,363 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:53:00,363 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:53:00,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:00,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2022-04-07 22:53:00,364 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 18 transitions. Word has length 14 [2022-04-07 22:53:00,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:53:00,364 INFO L478 AbstractCegarLoop]: Abstraction has 16 states and 18 transitions. [2022-04-07 22:53:00,365 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:00,365 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-07 22:53:00,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 22:53:00,365 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:53:00,365 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:53:00,365 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 22:53:00,366 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:53:00,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:53:00,366 INFO L85 PathProgramCache]: Analyzing trace with hash 1476846263, now seen corresponding path program 1 times [2022-04-07 22:53:00,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:53:00,366 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588178224] [2022-04-07 22:53:00,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:00,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:53:00,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:00,467 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:53:00,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:00,490 INFO L290 TraceCheckUtils]: 0: Hoare triple {266#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {258#true} is VALID [2022-04-07 22:53:00,490 INFO L290 TraceCheckUtils]: 1: Hoare triple {258#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,491 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258#true} {258#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,492 INFO L272 TraceCheckUtils]: 0: Hoare triple {258#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {266#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:53:00,495 INFO L290 TraceCheckUtils]: 1: Hoare triple {266#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {258#true} is VALID [2022-04-07 22:53:00,495 INFO L290 TraceCheckUtils]: 2: Hoare triple {258#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,495 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258#true} {258#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,496 INFO L272 TraceCheckUtils]: 4: Hoare triple {258#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,499 INFO L290 TraceCheckUtils]: 5: Hoare triple {258#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {263#(= main_~y~0 0)} is VALID [2022-04-07 22:53:00,500 INFO L290 TraceCheckUtils]: 6: Hoare triple {263#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:00,500 INFO L290 TraceCheckUtils]: 7: Hoare triple {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:00,501 INFO L290 TraceCheckUtils]: 8: Hoare triple {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {265#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:53:00,502 INFO L290 TraceCheckUtils]: 9: Hoare triple {265#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,502 INFO L290 TraceCheckUtils]: 10: Hoare triple {259#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,502 INFO L272 TraceCheckUtils]: 11: Hoare triple {259#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {259#false} is VALID [2022-04-07 22:53:00,503 INFO L290 TraceCheckUtils]: 12: Hoare triple {259#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {259#false} is VALID [2022-04-07 22:53:00,503 INFO L290 TraceCheckUtils]: 13: Hoare triple {259#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,503 INFO L290 TraceCheckUtils]: 14: Hoare triple {259#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,504 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:00,504 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:53:00,504 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588178224] [2022-04-07 22:53:00,504 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1588178224] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:53:00,504 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [19700593] [2022-04-07 22:53:00,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:00,505 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:00,505 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:53:00,506 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:53:00,511 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 22:53:00,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:00,550 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 22:53:00,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:00,571 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:53:00,888 INFO L272 TraceCheckUtils]: 0: Hoare triple {258#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,888 INFO L290 TraceCheckUtils]: 1: Hoare triple {258#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {258#true} is VALID [2022-04-07 22:53:00,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {258#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,889 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258#true} {258#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,889 INFO L272 TraceCheckUtils]: 4: Hoare triple {258#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:00,889 INFO L290 TraceCheckUtils]: 5: Hoare triple {258#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {263#(= main_~y~0 0)} is VALID [2022-04-07 22:53:00,890 INFO L290 TraceCheckUtils]: 6: Hoare triple {263#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:00,891 INFO L290 TraceCheckUtils]: 7: Hoare triple {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:00,891 INFO L290 TraceCheckUtils]: 8: Hoare triple {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {294#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:53:00,892 INFO L290 TraceCheckUtils]: 9: Hoare triple {294#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,892 INFO L290 TraceCheckUtils]: 10: Hoare triple {259#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,892 INFO L272 TraceCheckUtils]: 11: Hoare triple {259#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {259#false} is VALID [2022-04-07 22:53:00,893 INFO L290 TraceCheckUtils]: 12: Hoare triple {259#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {259#false} is VALID [2022-04-07 22:53:00,893 INFO L290 TraceCheckUtils]: 13: Hoare triple {259#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,893 INFO L290 TraceCheckUtils]: 14: Hoare triple {259#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,893 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:00,893 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:53:00,998 INFO L290 TraceCheckUtils]: 14: Hoare triple {259#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,999 INFO L290 TraceCheckUtils]: 13: Hoare triple {259#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:00,999 INFO L290 TraceCheckUtils]: 12: Hoare triple {259#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {259#false} is VALID [2022-04-07 22:53:00,999 INFO L272 TraceCheckUtils]: 11: Hoare triple {259#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {259#false} is VALID [2022-04-07 22:53:01,000 INFO L290 TraceCheckUtils]: 10: Hoare triple {259#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:01,000 INFO L290 TraceCheckUtils]: 9: Hoare triple {328#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-07 22:53:01,001 INFO L290 TraceCheckUtils]: 8: Hoare triple {332#(< 0 (mod main_~y~0 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {328#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:53:01,004 INFO L290 TraceCheckUtils]: 7: Hoare triple {332#(< 0 (mod main_~y~0 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {332#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:53:01,006 INFO L290 TraceCheckUtils]: 6: Hoare triple {339#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {332#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:53:01,006 INFO L290 TraceCheckUtils]: 5: Hoare triple {258#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {339#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:53:01,006 INFO L272 TraceCheckUtils]: 4: Hoare triple {258#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:01,007 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258#true} {258#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:01,007 INFO L290 TraceCheckUtils]: 2: Hoare triple {258#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:01,007 INFO L290 TraceCheckUtils]: 1: Hoare triple {258#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {258#true} is VALID [2022-04-07 22:53:01,007 INFO L272 TraceCheckUtils]: 0: Hoare triple {258#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-07 22:53:01,008 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:01,008 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [19700593] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:53:01,008 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:53:01,008 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-07 22:53:01,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2105312874] [2022-04-07 22:53:01,010 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:53:01,011 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:53:01,012 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:53:01,012 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,031 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:01,033 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 22:53:01,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:53:01,034 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 22:53:01,034 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-07 22:53:01,036 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. Second operand has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:01,435 INFO L93 Difference]: Finished difference Result 40 states and 56 transitions. [2022-04-07 22:53:01,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 22:53:01,435 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:53:01,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:53:01,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 56 transitions. [2022-04-07 22:53:01,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 56 transitions. [2022-04-07 22:53:01,440 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 56 transitions. [2022-04-07 22:53:01,507 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:01,508 INFO L225 Difference]: With dead ends: 40 [2022-04-07 22:53:01,508 INFO L226 Difference]: Without dead ends: 34 [2022-04-07 22:53:01,508 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2022-04-07 22:53:01,510 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 48 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:53:01,510 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [48 Valid, 34 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:53:01,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-07 22:53:01,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 28. [2022-04-07 22:53:01,531 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:53:01,531 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,531 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,531 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:01,533 INFO L93 Difference]: Finished difference Result 34 states and 43 transitions. [2022-04-07 22:53:01,534 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 43 transitions. [2022-04-07 22:53:01,534 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:01,534 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:01,534 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-07 22:53:01,535 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-07 22:53:01,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:01,537 INFO L93 Difference]: Finished difference Result 34 states and 43 transitions. [2022-04-07 22:53:01,537 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 43 transitions. [2022-04-07 22:53:01,537 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:01,537 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:01,537 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:53:01,537 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:53:01,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 35 transitions. [2022-04-07 22:53:01,539 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 35 transitions. Word has length 15 [2022-04-07 22:53:01,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:53:01,539 INFO L478 AbstractCegarLoop]: Abstraction has 28 states and 35 transitions. [2022-04-07 22:53:01,540 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:01,540 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 35 transitions. [2022-04-07 22:53:01,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 22:53:01,540 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:53:01,540 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:53:01,568 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 22:53:01,765 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:01,765 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:53:01,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:53:01,766 INFO L85 PathProgramCache]: Analyzing trace with hash 957906802, now seen corresponding path program 1 times [2022-04-07 22:53:01,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:53:01,766 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457898479] [2022-04-07 22:53:01,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:01,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:53:01,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:02,117 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:53:02,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:02,123 INFO L290 TraceCheckUtils]: 0: Hoare triple {562#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {549#true} is VALID [2022-04-07 22:53:02,123 INFO L290 TraceCheckUtils]: 1: Hoare triple {549#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,123 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {549#true} {549#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,124 INFO L272 TraceCheckUtils]: 0: Hoare triple {549#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {562#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:53:02,124 INFO L290 TraceCheckUtils]: 1: Hoare triple {562#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {549#true} is VALID [2022-04-07 22:53:02,124 INFO L290 TraceCheckUtils]: 2: Hoare triple {549#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,124 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {549#true} {549#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,125 INFO L272 TraceCheckUtils]: 4: Hoare triple {549#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,125 INFO L290 TraceCheckUtils]: 5: Hoare triple {549#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {554#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:53:02,127 INFO L290 TraceCheckUtils]: 6: Hoare triple {554#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {555#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~y~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-07 22:53:02,129 INFO L290 TraceCheckUtils]: 7: Hoare triple {555#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~y~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {556#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-07 22:53:02,130 INFO L290 TraceCheckUtils]: 8: Hoare triple {556#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {557#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) main_~z~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:02,133 INFO L290 TraceCheckUtils]: 9: Hoare triple {557#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) main_~z~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {558#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) main_~z~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ main_~z~0 (* (div (+ (- 1) main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:02,134 INFO L290 TraceCheckUtils]: 10: Hoare triple {558#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) main_~z~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ main_~z~0 (* (div (+ (- 1) main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {558#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) main_~z~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ main_~z~0 (* (div (+ (- 1) main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:02,137 INFO L290 TraceCheckUtils]: 11: Hoare triple {558#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) main_~z~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ main_~z~0 (* (div (+ (- 1) main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:02,138 INFO L290 TraceCheckUtils]: 12: Hoare triple {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:02,139 INFO L272 TraceCheckUtils]: 13: Hoare triple {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {560#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:53:02,139 INFO L290 TraceCheckUtils]: 14: Hoare triple {560#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {561#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:53:02,140 INFO L290 TraceCheckUtils]: 15: Hoare triple {561#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-07 22:53:02,140 INFO L290 TraceCheckUtils]: 16: Hoare triple {550#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-07 22:53:02,140 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:02,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:53:02,141 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457898479] [2022-04-07 22:53:02,141 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1457898479] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:53:02,141 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1218286571] [2022-04-07 22:53:02,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:02,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:02,141 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:53:02,142 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:53:02,143 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 22:53:02,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:02,180 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-07 22:53:02,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:02,189 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:53:02,609 INFO L272 TraceCheckUtils]: 0: Hoare triple {549#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,609 INFO L290 TraceCheckUtils]: 1: Hoare triple {549#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {549#true} is VALID [2022-04-07 22:53:02,609 INFO L290 TraceCheckUtils]: 2: Hoare triple {549#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,610 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {549#true} {549#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,610 INFO L272 TraceCheckUtils]: 4: Hoare triple {549#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:02,611 INFO L290 TraceCheckUtils]: 5: Hoare triple {549#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {554#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:53:02,612 INFO L290 TraceCheckUtils]: 6: Hoare triple {554#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {584#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} is VALID [2022-04-07 22:53:02,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {584#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {588#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:53:02,614 INFO L290 TraceCheckUtils]: 8: Hoare triple {588#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:53:02,616 INFO L290 TraceCheckUtils]: 9: Hoare triple {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {596#(and (<= (mod (+ main_~n~0 4294967295) 4294967296) 0) (= (+ main_~z~0 1) 1))} is VALID [2022-04-07 22:53:02,616 INFO L290 TraceCheckUtils]: 10: Hoare triple {596#(and (<= (mod (+ main_~n~0 4294967295) 4294967296) 0) (= (+ main_~z~0 1) 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {596#(and (<= (mod (+ main_~n~0 4294967295) 4294967296) 0) (= (+ main_~z~0 1) 1))} is VALID [2022-04-07 22:53:02,617 INFO L290 TraceCheckUtils]: 11: Hoare triple {596#(and (<= (mod (+ main_~n~0 4294967295) 4294967296) 0) (= (+ main_~z~0 1) 1))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:53:02,617 INFO L290 TraceCheckUtils]: 12: Hoare triple {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:53:02,619 INFO L272 TraceCheckUtils]: 13: Hoare triple {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {609#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:53:02,619 INFO L290 TraceCheckUtils]: 14: Hoare triple {609#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {613#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:53:02,620 INFO L290 TraceCheckUtils]: 15: Hoare triple {613#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-07 22:53:02,620 INFO L290 TraceCheckUtils]: 16: Hoare triple {550#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-07 22:53:02,620 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:02,620 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:53:03,177 INFO L290 TraceCheckUtils]: 16: Hoare triple {550#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-07 22:53:03,178 INFO L290 TraceCheckUtils]: 15: Hoare triple {613#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-07 22:53:03,179 INFO L290 TraceCheckUtils]: 14: Hoare triple {609#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {613#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:53:03,180 INFO L272 TraceCheckUtils]: 13: Hoare triple {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {609#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:53:03,182 INFO L290 TraceCheckUtils]: 12: Hoare triple {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:03,183 INFO L290 TraceCheckUtils]: 11: Hoare triple {635#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:03,185 INFO L290 TraceCheckUtils]: 10: Hoare triple {635#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {635#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:03,186 INFO L290 TraceCheckUtils]: 9: Hoare triple {642#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {635#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:03,187 INFO L290 TraceCheckUtils]: 8: Hoare triple {646#(or (not (< 0 (mod main_~y~0 4294967296))) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {642#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 22:53:03,188 INFO L290 TraceCheckUtils]: 7: Hoare triple {650#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {646#(or (not (< 0 (mod main_~y~0 4294967296))) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:53:03,189 INFO L290 TraceCheckUtils]: 6: Hoare triple {654#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {650#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:53:03,191 INFO L290 TraceCheckUtils]: 5: Hoare triple {549#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {654#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:53:03,191 INFO L272 TraceCheckUtils]: 4: Hoare triple {549#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:03,191 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {549#true} {549#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:03,191 INFO L290 TraceCheckUtils]: 2: Hoare triple {549#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:03,191 INFO L290 TraceCheckUtils]: 1: Hoare triple {549#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {549#true} is VALID [2022-04-07 22:53:03,191 INFO L272 TraceCheckUtils]: 0: Hoare triple {549#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-07 22:53:03,192 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:03,192 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1218286571] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:53:03,192 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:53:03,192 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 22 [2022-04-07 22:53:03,192 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685871416] [2022-04-07 22:53:03,192 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:53:03,193 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 22:53:03,193 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:53:03,194 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:03,242 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:03,242 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-07 22:53:03,242 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:53:03,243 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-07 22:53:03,243 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=394, Unknown=0, NotChecked=0, Total=462 [2022-04-07 22:53:03,243 INFO L87 Difference]: Start difference. First operand 28 states and 35 transitions. Second operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:05,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:05,617 INFO L93 Difference]: Finished difference Result 56 states and 71 transitions. [2022-04-07 22:53:05,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-07 22:53:05,618 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 22:53:05,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:53:05,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:05,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 71 transitions. [2022-04-07 22:53:05,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:05,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 71 transitions. [2022-04-07 22:53:05,623 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 71 transitions. [2022-04-07 22:53:07,837 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 70 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:07,838 INFO L225 Difference]: With dead ends: 56 [2022-04-07 22:53:07,838 INFO L226 Difference]: Without dead ends: 39 [2022-04-07 22:53:07,839 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 22 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 565 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=388, Invalid=1868, Unknown=0, NotChecked=0, Total=2256 [2022-04-07 22:53:07,840 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 91 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 79 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 79 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:53:07,840 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [91 Valid, 62 Invalid, 265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [79 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 22:53:07,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2022-04-07 22:53:07,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 25. [2022-04-07 22:53:07,882 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:53:07,882 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:07,882 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:07,883 INFO L87 Difference]: Start difference. First operand 39 states. Second operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:07,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:07,885 INFO L93 Difference]: Finished difference Result 39 states and 51 transitions. [2022-04-07 22:53:07,885 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2022-04-07 22:53:07,885 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:07,885 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:07,885 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 39 states. [2022-04-07 22:53:07,886 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 39 states. [2022-04-07 22:53:07,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:07,887 INFO L93 Difference]: Finished difference Result 39 states and 51 transitions. [2022-04-07 22:53:07,887 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2022-04-07 22:53:07,888 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:07,888 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:07,888 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:53:07,888 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:53:07,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:07,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 31 transitions. [2022-04-07 22:53:07,889 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 31 transitions. Word has length 17 [2022-04-07 22:53:07,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:53:07,889 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 31 transitions. [2022-04-07 22:53:07,890 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:07,890 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 31 transitions. [2022-04-07 22:53:07,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 22:53:07,890 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:53:07,890 INFO L499 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:53:07,917 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 22:53:08,108 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-07 22:53:08,109 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:53:08,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:53:08,109 INFO L85 PathProgramCache]: Analyzing trace with hash 1465594979, now seen corresponding path program 2 times [2022-04-07 22:53:08,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:53:08,110 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887473555] [2022-04-07 22:53:08,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:08,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:53:08,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:08,218 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:53:08,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:08,228 INFO L290 TraceCheckUtils]: 0: Hoare triple {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-07 22:53:08,228 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,228 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {931#true} {931#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,229 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:53:08,229 INFO L290 TraceCheckUtils]: 1: Hoare triple {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-07 22:53:08,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,229 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,229 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,230 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {936#(= main_~y~0 0)} is VALID [2022-04-07 22:53:08,230 INFO L290 TraceCheckUtils]: 6: Hoare triple {936#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {937#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:08,231 INFO L290 TraceCheckUtils]: 7: Hoare triple {937#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {938#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:08,232 INFO L290 TraceCheckUtils]: 8: Hoare triple {938#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {939#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:08,233 INFO L290 TraceCheckUtils]: 9: Hoare triple {939#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:53:08,233 INFO L290 TraceCheckUtils]: 10: Hoare triple {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:53:08,234 INFO L290 TraceCheckUtils]: 11: Hoare triple {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {941#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:53:08,234 INFO L290 TraceCheckUtils]: 12: Hoare triple {941#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,235 INFO L290 TraceCheckUtils]: 13: Hoare triple {932#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,235 INFO L272 TraceCheckUtils]: 14: Hoare triple {932#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {932#false} is VALID [2022-04-07 22:53:08,235 INFO L290 TraceCheckUtils]: 15: Hoare triple {932#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {932#false} is VALID [2022-04-07 22:53:08,235 INFO L290 TraceCheckUtils]: 16: Hoare triple {932#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,235 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,235 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:08,236 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:53:08,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887473555] [2022-04-07 22:53:08,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [887473555] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:53:08,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [722569052] [2022-04-07 22:53:08,236 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:53:08,236 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:08,236 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:53:08,239 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:53:08,266 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 22:53:08,291 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:53:08,291 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:53:08,292 INFO L263 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 22:53:08,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:08,301 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:53:08,525 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,525 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-07 22:53:08,525 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,525 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,526 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,526 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {936#(= main_~y~0 0)} is VALID [2022-04-07 22:53:08,526 INFO L290 TraceCheckUtils]: 6: Hoare triple {936#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {937#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:08,527 INFO L290 TraceCheckUtils]: 7: Hoare triple {937#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {938#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:08,529 INFO L290 TraceCheckUtils]: 8: Hoare triple {938#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {939#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:08,529 INFO L290 TraceCheckUtils]: 9: Hoare triple {939#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:53:08,530 INFO L290 TraceCheckUtils]: 10: Hoare triple {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:53:08,530 INFO L290 TraceCheckUtils]: 11: Hoare triple {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {979#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:53:08,531 INFO L290 TraceCheckUtils]: 12: Hoare triple {979#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,531 INFO L290 TraceCheckUtils]: 13: Hoare triple {932#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,531 INFO L272 TraceCheckUtils]: 14: Hoare triple {932#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {932#false} is VALID [2022-04-07 22:53:08,531 INFO L290 TraceCheckUtils]: 15: Hoare triple {932#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {932#false} is VALID [2022-04-07 22:53:08,531 INFO L290 TraceCheckUtils]: 16: Hoare triple {932#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,532 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,532 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:08,532 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:53:08,669 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,670 INFO L290 TraceCheckUtils]: 16: Hoare triple {932#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,671 INFO L290 TraceCheckUtils]: 15: Hoare triple {932#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {932#false} is VALID [2022-04-07 22:53:08,672 INFO L272 TraceCheckUtils]: 14: Hoare triple {932#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {932#false} is VALID [2022-04-07 22:53:08,672 INFO L290 TraceCheckUtils]: 13: Hoare triple {932#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,673 INFO L290 TraceCheckUtils]: 12: Hoare triple {1013#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-07 22:53:08,673 INFO L290 TraceCheckUtils]: 11: Hoare triple {1017#(< 0 (mod main_~y~0 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1013#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:53:08,674 INFO L290 TraceCheckUtils]: 10: Hoare triple {1017#(< 0 (mod main_~y~0 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1017#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:53:08,675 INFO L290 TraceCheckUtils]: 9: Hoare triple {1024#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1017#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:53:08,676 INFO L290 TraceCheckUtils]: 8: Hoare triple {1028#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1024#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:53:08,676 INFO L290 TraceCheckUtils]: 7: Hoare triple {1032#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1028#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:53:08,677 INFO L290 TraceCheckUtils]: 6: Hoare triple {1036#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1032#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:53:08,678 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1036#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:53:08,678 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,678 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,678 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,678 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-07 22:53:08,678 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-07 22:53:08,679 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:08,679 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [722569052] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:53:08,679 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:53:08,679 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-07 22:53:08,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2125625959] [2022-04-07 22:53:08,679 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:53:08,680 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 22:53:08,682 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:53:08,682 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:08,708 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:08,708 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 22:53:08,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:53:08,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 22:53:08,709 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2022-04-07 22:53:08,709 INFO L87 Difference]: Start difference. First operand 25 states and 31 transitions. Second operand has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:10,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:10,198 INFO L93 Difference]: Finished difference Result 78 states and 119 transitions. [2022-04-07 22:53:10,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-07 22:53:10,198 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 22:53:10,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:53:10,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:10,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 110 transitions. [2022-04-07 22:53:10,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:10,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 110 transitions. [2022-04-07 22:53:10,207 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 110 transitions. [2022-04-07 22:53:10,337 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:10,339 INFO L225 Difference]: With dead ends: 78 [2022-04-07 22:53:10,339 INFO L226 Difference]: Without dead ends: 72 [2022-04-07 22:53:10,340 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=391, Invalid=1091, Unknown=0, NotChecked=0, Total=1482 [2022-04-07 22:53:10,340 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 150 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 239 mSolverCounterSat, 126 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 365 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 126 IncrementalHoareTripleChecker+Valid, 239 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:53:10,341 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [150 Valid, 58 Invalid, 365 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [126 Valid, 239 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 22:53:10,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-04-07 22:53:10,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 44. [2022-04-07 22:53:10,426 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:53:10,426 INFO L82 GeneralOperation]: Start isEquivalent. First operand 72 states. Second operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:10,426 INFO L74 IsIncluded]: Start isIncluded. First operand 72 states. Second operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:10,427 INFO L87 Difference]: Start difference. First operand 72 states. Second operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:10,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:10,429 INFO L93 Difference]: Finished difference Result 72 states and 96 transitions. [2022-04-07 22:53:10,429 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 96 transitions. [2022-04-07 22:53:10,430 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:10,430 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:10,430 INFO L74 IsIncluded]: Start isIncluded. First operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 72 states. [2022-04-07 22:53:10,431 INFO L87 Difference]: Start difference. First operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 72 states. [2022-04-07 22:53:10,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:10,433 INFO L93 Difference]: Finished difference Result 72 states and 96 transitions. [2022-04-07 22:53:10,433 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 96 transitions. [2022-04-07 22:53:10,434 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:10,434 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:10,434 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:53:10,434 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:53:10,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:10,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 58 transitions. [2022-04-07 22:53:10,436 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 58 transitions. Word has length 18 [2022-04-07 22:53:10,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:53:10,436 INFO L478 AbstractCegarLoop]: Abstraction has 44 states and 58 transitions. [2022-04-07 22:53:10,437 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:10,437 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 58 transitions. [2022-04-07 22:53:10,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:53:10,437 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:53:10,437 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:53:10,460 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 22:53:10,651 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:10,652 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:53:10,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:53:10,652 INFO L85 PathProgramCache]: Analyzing trace with hash 2109292951, now seen corresponding path program 2 times [2022-04-07 22:53:10,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:53:10,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492418720] [2022-04-07 22:53:10,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:10,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:53:10,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:10,739 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:53:10,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:10,744 INFO L290 TraceCheckUtils]: 0: Hoare triple {1446#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1436#true} is VALID [2022-04-07 22:53:10,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {1436#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,744 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1436#true} {1436#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,745 INFO L272 TraceCheckUtils]: 0: Hoare triple {1436#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1446#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:53:10,745 INFO L290 TraceCheckUtils]: 1: Hoare triple {1446#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1436#true} is VALID [2022-04-07 22:53:10,745 INFO L290 TraceCheckUtils]: 2: Hoare triple {1436#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,745 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1436#true} {1436#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,745 INFO L272 TraceCheckUtils]: 4: Hoare triple {1436#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,746 INFO L290 TraceCheckUtils]: 5: Hoare triple {1436#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1441#(= main_~y~0 0)} is VALID [2022-04-07 22:53:10,746 INFO L290 TraceCheckUtils]: 6: Hoare triple {1441#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1442#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:10,747 INFO L290 TraceCheckUtils]: 7: Hoare triple {1442#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:10,748 INFO L290 TraceCheckUtils]: 8: Hoare triple {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:10,748 INFO L290 TraceCheckUtils]: 9: Hoare triple {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1444#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:53:10,749 INFO L290 TraceCheckUtils]: 10: Hoare triple {1444#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1445#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:53:10,749 INFO L290 TraceCheckUtils]: 11: Hoare triple {1445#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:10,750 INFO L290 TraceCheckUtils]: 12: Hoare triple {1437#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-07 22:53:10,750 INFO L290 TraceCheckUtils]: 13: Hoare triple {1437#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-07 22:53:10,750 INFO L290 TraceCheckUtils]: 14: Hoare triple {1437#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:10,750 INFO L272 TraceCheckUtils]: 15: Hoare triple {1437#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1437#false} is VALID [2022-04-07 22:53:10,750 INFO L290 TraceCheckUtils]: 16: Hoare triple {1437#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1437#false} is VALID [2022-04-07 22:53:10,750 INFO L290 TraceCheckUtils]: 17: Hoare triple {1437#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:10,751 INFO L290 TraceCheckUtils]: 18: Hoare triple {1437#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:10,751 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:53:10,751 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:53:10,751 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492418720] [2022-04-07 22:53:10,751 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1492418720] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:53:10,751 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1137095945] [2022-04-07 22:53:10,751 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:53:10,752 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:10,752 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:53:10,756 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:53:10,763 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 22:53:10,806 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:53:10,806 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:53:10,807 INFO L263 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 22:53:10,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:10,819 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:53:10,924 INFO L272 TraceCheckUtils]: 0: Hoare triple {1436#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,925 INFO L290 TraceCheckUtils]: 1: Hoare triple {1436#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1436#true} is VALID [2022-04-07 22:53:10,925 INFO L290 TraceCheckUtils]: 2: Hoare triple {1436#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,925 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1436#true} {1436#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,925 INFO L272 TraceCheckUtils]: 4: Hoare triple {1436#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:10,926 INFO L290 TraceCheckUtils]: 5: Hoare triple {1436#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1441#(= main_~y~0 0)} is VALID [2022-04-07 22:53:10,926 INFO L290 TraceCheckUtils]: 6: Hoare triple {1441#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1442#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:10,927 INFO L290 TraceCheckUtils]: 7: Hoare triple {1442#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:10,927 INFO L290 TraceCheckUtils]: 8: Hoare triple {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:10,928 INFO L290 TraceCheckUtils]: 9: Hoare triple {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1477#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:10,928 INFO L290 TraceCheckUtils]: 10: Hoare triple {1477#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1481#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:53:10,929 INFO L290 TraceCheckUtils]: 11: Hoare triple {1481#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:10,929 INFO L290 TraceCheckUtils]: 12: Hoare triple {1437#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-07 22:53:10,930 INFO L290 TraceCheckUtils]: 13: Hoare triple {1437#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-07 22:53:10,930 INFO L290 TraceCheckUtils]: 14: Hoare triple {1437#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:10,930 INFO L272 TraceCheckUtils]: 15: Hoare triple {1437#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1437#false} is VALID [2022-04-07 22:53:10,930 INFO L290 TraceCheckUtils]: 16: Hoare triple {1437#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1437#false} is VALID [2022-04-07 22:53:10,930 INFO L290 TraceCheckUtils]: 17: Hoare triple {1437#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:10,930 INFO L290 TraceCheckUtils]: 18: Hoare triple {1437#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:10,930 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:53:10,930 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:53:11,049 INFO L290 TraceCheckUtils]: 18: Hoare triple {1437#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:11,049 INFO L290 TraceCheckUtils]: 17: Hoare triple {1437#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:11,050 INFO L290 TraceCheckUtils]: 16: Hoare triple {1437#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1437#false} is VALID [2022-04-07 22:53:11,050 INFO L272 TraceCheckUtils]: 15: Hoare triple {1437#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1437#false} is VALID [2022-04-07 22:53:11,050 INFO L290 TraceCheckUtils]: 14: Hoare triple {1437#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-07 22:53:11,051 INFO L290 TraceCheckUtils]: 13: Hoare triple {1521#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-07 22:53:11,057 INFO L290 TraceCheckUtils]: 12: Hoare triple {1525#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1521#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:53:11,058 INFO L290 TraceCheckUtils]: 11: Hoare triple {1529#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1525#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:53:11,059 INFO L290 TraceCheckUtils]: 10: Hoare triple {1533#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1529#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:53:11,060 INFO L290 TraceCheckUtils]: 9: Hoare triple {1436#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1533#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:53:11,061 INFO L290 TraceCheckUtils]: 8: Hoare triple {1436#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:11,061 INFO L290 TraceCheckUtils]: 7: Hoare triple {1436#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1436#true} is VALID [2022-04-07 22:53:11,061 INFO L290 TraceCheckUtils]: 6: Hoare triple {1436#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1436#true} is VALID [2022-04-07 22:53:11,061 INFO L290 TraceCheckUtils]: 5: Hoare triple {1436#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1436#true} is VALID [2022-04-07 22:53:11,061 INFO L272 TraceCheckUtils]: 4: Hoare triple {1436#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:11,061 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1436#true} {1436#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:11,061 INFO L290 TraceCheckUtils]: 2: Hoare triple {1436#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:11,062 INFO L290 TraceCheckUtils]: 1: Hoare triple {1436#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1436#true} is VALID [2022-04-07 22:53:11,062 INFO L272 TraceCheckUtils]: 0: Hoare triple {1436#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-07 22:53:11,062 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:53:11,062 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1137095945] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:53:11,062 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:53:11,062 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2022-04-07 22:53:11,063 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706154500] [2022-04-07 22:53:11,063 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:53:11,063 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:53:11,063 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:53:11,064 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,088 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:11,089 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 22:53:11,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:53:11,089 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 22:53:11,089 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-07 22:53:11,090 INFO L87 Difference]: Start difference. First operand 44 states and 58 transitions. Second operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:11,698 INFO L93 Difference]: Finished difference Result 72 states and 96 transitions. [2022-04-07 22:53:11,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 22:53:11,699 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:53:11,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:53:11,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 52 transitions. [2022-04-07 22:53:11,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 52 transitions. [2022-04-07 22:53:11,702 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 52 transitions. [2022-04-07 22:53:11,760 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:11,761 INFO L225 Difference]: With dead ends: 72 [2022-04-07 22:53:11,761 INFO L226 Difference]: Without dead ends: 61 [2022-04-07 22:53:11,762 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=128, Invalid=522, Unknown=0, NotChecked=0, Total=650 [2022-04-07 22:53:11,763 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 27 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:53:11,763 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 39 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:53:11,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2022-04-07 22:53:11,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 51. [2022-04-07 22:53:11,908 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:53:11,909 INFO L82 GeneralOperation]: Start isEquivalent. First operand 61 states. Second operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,909 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,909 INFO L87 Difference]: Start difference. First operand 61 states. Second operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:11,911 INFO L93 Difference]: Finished difference Result 61 states and 80 transitions. [2022-04-07 22:53:11,911 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 80 transitions. [2022-04-07 22:53:11,912 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:11,912 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:11,912 INFO L74 IsIncluded]: Start isIncluded. First operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 61 states. [2022-04-07 22:53:11,912 INFO L87 Difference]: Start difference. First operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 61 states. [2022-04-07 22:53:11,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:11,914 INFO L93 Difference]: Finished difference Result 61 states and 80 transitions. [2022-04-07 22:53:11,914 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 80 transitions. [2022-04-07 22:53:11,914 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:11,914 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:11,914 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:53:11,914 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:53:11,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 69 transitions. [2022-04-07 22:53:11,916 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 69 transitions. Word has length 19 [2022-04-07 22:53:11,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:53:11,916 INFO L478 AbstractCegarLoop]: Abstraction has 51 states and 69 transitions. [2022-04-07 22:53:11,917 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:11,917 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 69 transitions. [2022-04-07 22:53:11,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-07 22:53:11,917 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:53:11,917 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:53:11,940 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 22:53:12,140 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:12,140 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:53:12,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:53:12,141 INFO L85 PathProgramCache]: Analyzing trace with hash 801531459, now seen corresponding path program 3 times [2022-04-07 22:53:12,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:53:12,141 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100957954] [2022-04-07 22:53:12,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:12,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:53:12,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:12,524 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:53:12,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:12,537 INFO L290 TraceCheckUtils]: 0: Hoare triple {1925#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1910#true} is VALID [2022-04-07 22:53:12,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {1910#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:12,538 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1910#true} {1910#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:12,541 INFO L272 TraceCheckUtils]: 0: Hoare triple {1910#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1925#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:53:12,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {1925#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1910#true} is VALID [2022-04-07 22:53:12,542 INFO L290 TraceCheckUtils]: 2: Hoare triple {1910#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:12,542 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1910#true} {1910#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:12,542 INFO L272 TraceCheckUtils]: 4: Hoare triple {1910#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:12,542 INFO L290 TraceCheckUtils]: 5: Hoare triple {1910#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1915#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:53:12,544 INFO L290 TraceCheckUtils]: 6: Hoare triple {1915#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1916#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:12,616 INFO L290 TraceCheckUtils]: 7: Hoare triple {1916#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1917#(and (<= 2 main_~y~0) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 22:53:12,617 INFO L290 TraceCheckUtils]: 8: Hoare triple {1917#(and (<= 2 main_~y~0) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1918#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:12,618 INFO L290 TraceCheckUtils]: 9: Hoare triple {1918#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:53:12,619 INFO L290 TraceCheckUtils]: 10: Hoare triple {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} is VALID [2022-04-07 22:53:12,620 INFO L290 TraceCheckUtils]: 11: Hoare triple {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} is VALID [2022-04-07 22:53:12,621 INFO L290 TraceCheckUtils]: 12: Hoare triple {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} is VALID [2022-04-07 22:53:12,621 INFO L290 TraceCheckUtils]: 13: Hoare triple {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} is VALID [2022-04-07 22:53:12,623 INFO L290 TraceCheckUtils]: 14: Hoare triple {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:12,624 INFO L290 TraceCheckUtils]: 15: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:12,625 INFO L272 TraceCheckUtils]: 16: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1923#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:53:12,625 INFO L290 TraceCheckUtils]: 17: Hoare triple {1923#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1924#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:53:12,625 INFO L290 TraceCheckUtils]: 18: Hoare triple {1924#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-07 22:53:12,626 INFO L290 TraceCheckUtils]: 19: Hoare triple {1911#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-07 22:53:12,626 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:12,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:53:12,626 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100957954] [2022-04-07 22:53:12,626 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [100957954] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:53:12,626 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [200055132] [2022-04-07 22:53:12,626 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:53:12,626 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:12,627 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:53:12,631 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:53:12,655 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 22:53:12,693 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-07 22:53:12,693 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:53:12,694 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-07 22:53:12,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:12,702 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:53:37,189 INFO L272 TraceCheckUtils]: 0: Hoare triple {1910#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:37,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {1910#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1910#true} is VALID [2022-04-07 22:53:37,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {1910#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:37,189 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1910#true} {1910#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:37,190 INFO L272 TraceCheckUtils]: 4: Hoare triple {1910#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:37,190 INFO L290 TraceCheckUtils]: 5: Hoare triple {1910#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1915#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:53:37,191 INFO L290 TraceCheckUtils]: 6: Hoare triple {1915#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1947#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0))} is VALID [2022-04-07 22:53:37,192 INFO L290 TraceCheckUtils]: 7: Hoare triple {1947#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1951#(and (= (+ (- 2) main_~y~0) 0) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 22:53:37,192 INFO L290 TraceCheckUtils]: 8: Hoare triple {1951#(and (= (+ (- 2) main_~y~0) 0) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1918#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:37,193 INFO L290 TraceCheckUtils]: 9: Hoare triple {1918#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:53:37,194 INFO L290 TraceCheckUtils]: 10: Hoare triple {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} is VALID [2022-04-07 22:53:37,195 INFO L290 TraceCheckUtils]: 11: Hoare triple {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} is VALID [2022-04-07 22:53:37,195 INFO L290 TraceCheckUtils]: 12: Hoare triple {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} is VALID [2022-04-07 22:53:37,197 INFO L290 TraceCheckUtils]: 13: Hoare triple {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} is VALID [2022-04-07 22:53:37,198 INFO L290 TraceCheckUtils]: 14: Hoare triple {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:53:37,198 INFO L290 TraceCheckUtils]: 15: Hoare triple {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:53:37,201 INFO L272 TraceCheckUtils]: 16: Hoare triple {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1979#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:53:37,201 INFO L290 TraceCheckUtils]: 17: Hoare triple {1979#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1983#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:53:37,202 INFO L290 TraceCheckUtils]: 18: Hoare triple {1983#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-07 22:53:37,202 INFO L290 TraceCheckUtils]: 19: Hoare triple {1911#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-07 22:53:37,202 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:37,202 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:53:37,804 INFO L290 TraceCheckUtils]: 19: Hoare triple {1911#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-07 22:53:37,805 INFO L290 TraceCheckUtils]: 18: Hoare triple {1983#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-07 22:53:37,805 INFO L290 TraceCheckUtils]: 17: Hoare triple {1979#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1983#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:53:37,806 INFO L272 TraceCheckUtils]: 16: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1979#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:53:37,807 INFO L290 TraceCheckUtils]: 15: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:37,808 INFO L290 TraceCheckUtils]: 14: Hoare triple {2005#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:37,808 INFO L290 TraceCheckUtils]: 13: Hoare triple {2009#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2005#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:37,809 INFO L290 TraceCheckUtils]: 12: Hoare triple {2009#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2009#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:53:37,810 INFO L290 TraceCheckUtils]: 11: Hoare triple {2005#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2009#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:53:37,811 INFO L290 TraceCheckUtils]: 10: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2005#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:37,812 INFO L290 TraceCheckUtils]: 9: Hoare triple {2022#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:37,812 INFO L290 TraceCheckUtils]: 8: Hoare triple {2026#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2022#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:53:37,814 INFO L290 TraceCheckUtils]: 7: Hoare triple {2030#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2026#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:53:37,815 INFO L290 TraceCheckUtils]: 6: Hoare triple {2034#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2030#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:53:37,816 INFO L290 TraceCheckUtils]: 5: Hoare triple {1910#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2034#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:53:37,816 INFO L272 TraceCheckUtils]: 4: Hoare triple {1910#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:37,816 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1910#true} {1910#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:37,816 INFO L290 TraceCheckUtils]: 2: Hoare triple {1910#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:37,817 INFO L290 TraceCheckUtils]: 1: Hoare triple {1910#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1910#true} is VALID [2022-04-07 22:53:37,817 INFO L272 TraceCheckUtils]: 0: Hoare triple {1910#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-07 22:53:37,817 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:37,817 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [200055132] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:53:37,817 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:53:37,817 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11, 11] total 23 [2022-04-07 22:53:37,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [894812823] [2022-04-07 22:53:37,818 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:53:37,818 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 22:53:37,818 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:53:37,819 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:37,875 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:37,875 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-07 22:53:37,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:53:37,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-07 22:53:37,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=440, Unknown=0, NotChecked=0, Total=506 [2022-04-07 22:53:37,876 INFO L87 Difference]: Start difference. First operand 51 states and 69 transitions. Second operand has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:41,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:41,103 INFO L93 Difference]: Finished difference Result 93 states and 119 transitions. [2022-04-07 22:53:41,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-07 22:53:41,103 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 22:53:41,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:53:41,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:41,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 73 transitions. [2022-04-07 22:53:41,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:41,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 73 transitions. [2022-04-07 22:53:41,111 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 73 transitions. [2022-04-07 22:53:41,435 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:41,436 INFO L225 Difference]: With dead ends: 93 [2022-04-07 22:53:41,436 INFO L226 Difference]: Without dead ends: 69 [2022-04-07 22:53:41,437 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 443 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=311, Invalid=1945, Unknown=0, NotChecked=0, Total=2256 [2022-04-07 22:53:41,438 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 66 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 271 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 322 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 271 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 22:53:41,438 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [66 Valid, 60 Invalid, 322 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 271 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-07 22:53:41,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-07 22:53:41,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 51. [2022-04-07 22:53:41,614 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:53:41,615 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:41,615 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:41,615 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:41,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:41,621 INFO L93 Difference]: Finished difference Result 69 states and 91 transitions. [2022-04-07 22:53:41,621 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 91 transitions. [2022-04-07 22:53:41,622 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:41,622 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:41,622 INFO L74 IsIncluded]: Start isIncluded. First operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 69 states. [2022-04-07 22:53:41,622 INFO L87 Difference]: Start difference. First operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 69 states. [2022-04-07 22:53:41,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:41,625 INFO L93 Difference]: Finished difference Result 69 states and 91 transitions. [2022-04-07 22:53:41,625 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 91 transitions. [2022-04-07 22:53:41,625 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:41,625 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:41,625 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:53:41,625 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:53:41,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:41,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 68 transitions. [2022-04-07 22:53:41,627 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 68 transitions. Word has length 20 [2022-04-07 22:53:41,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:53:41,627 INFO L478 AbstractCegarLoop]: Abstraction has 51 states and 68 transitions. [2022-04-07 22:53:41,627 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:41,627 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 68 transitions. [2022-04-07 22:53:41,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-07 22:53:41,627 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:53:41,628 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:53:41,655 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 22:53:41,843 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:41,844 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:53:41,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:53:41,844 INFO L85 PathProgramCache]: Analyzing trace with hash 465015230, now seen corresponding path program 4 times [2022-04-07 22:53:41,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:53:41,844 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487090609] [2022-04-07 22:53:41,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:41,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:53:41,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:41,982 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:53:41,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:42,004 INFO L290 TraceCheckUtils]: 0: Hoare triple {2480#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2468#true} is VALID [2022-04-07 22:53:42,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {2468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,005 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2468#true} {2468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,006 INFO L272 TraceCheckUtils]: 0: Hoare triple {2468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2480#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:53:42,006 INFO L290 TraceCheckUtils]: 1: Hoare triple {2480#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2468#true} is VALID [2022-04-07 22:53:42,006 INFO L290 TraceCheckUtils]: 2: Hoare triple {2468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,006 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2468#true} {2468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,006 INFO L272 TraceCheckUtils]: 4: Hoare triple {2468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,007 INFO L290 TraceCheckUtils]: 5: Hoare triple {2468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2473#(= main_~y~0 0)} is VALID [2022-04-07 22:53:42,007 INFO L290 TraceCheckUtils]: 6: Hoare triple {2473#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:42,008 INFO L290 TraceCheckUtils]: 7: Hoare triple {2474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:42,009 INFO L290 TraceCheckUtils]: 8: Hoare triple {2475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:42,009 INFO L290 TraceCheckUtils]: 9: Hoare triple {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:42,010 INFO L290 TraceCheckUtils]: 10: Hoare triple {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2477#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 22:53:42,010 INFO L290 TraceCheckUtils]: 11: Hoare triple {2477#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2478#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:53:42,011 INFO L290 TraceCheckUtils]: 12: Hoare triple {2478#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2479#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:53:42,012 INFO L290 TraceCheckUtils]: 13: Hoare triple {2479#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,012 INFO L290 TraceCheckUtils]: 14: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-07 22:53:42,012 INFO L290 TraceCheckUtils]: 15: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-07 22:53:42,012 INFO L290 TraceCheckUtils]: 16: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-07 22:53:42,012 INFO L290 TraceCheckUtils]: 17: Hoare triple {2469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,013 INFO L272 TraceCheckUtils]: 18: Hoare triple {2469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2469#false} is VALID [2022-04-07 22:53:42,013 INFO L290 TraceCheckUtils]: 19: Hoare triple {2469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2469#false} is VALID [2022-04-07 22:53:42,013 INFO L290 TraceCheckUtils]: 20: Hoare triple {2469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,013 INFO L290 TraceCheckUtils]: 21: Hoare triple {2469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,013 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:53:42,013 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:53:42,013 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487090609] [2022-04-07 22:53:42,013 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1487090609] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:53:42,014 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [601638014] [2022-04-07 22:53:42,014 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:53:42,014 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:42,014 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:53:42,015 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:53:42,051 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 22:53:42,084 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:53:42,084 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:53:42,085 INFO L263 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-07 22:53:42,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:42,093 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:53:42,246 INFO L272 TraceCheckUtils]: 0: Hoare triple {2468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,246 INFO L290 TraceCheckUtils]: 1: Hoare triple {2468#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2468#true} is VALID [2022-04-07 22:53:42,246 INFO L290 TraceCheckUtils]: 2: Hoare triple {2468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,246 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2468#true} {2468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,246 INFO L272 TraceCheckUtils]: 4: Hoare triple {2468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,246 INFO L290 TraceCheckUtils]: 5: Hoare triple {2468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2473#(= main_~y~0 0)} is VALID [2022-04-07 22:53:42,247 INFO L290 TraceCheckUtils]: 6: Hoare triple {2473#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:42,251 INFO L290 TraceCheckUtils]: 7: Hoare triple {2474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:42,252 INFO L290 TraceCheckUtils]: 8: Hoare triple {2475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:42,253 INFO L290 TraceCheckUtils]: 9: Hoare triple {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:42,253 INFO L290 TraceCheckUtils]: 10: Hoare triple {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2514#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:42,254 INFO L290 TraceCheckUtils]: 11: Hoare triple {2514#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2518#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:53:42,255 INFO L290 TraceCheckUtils]: 12: Hoare triple {2518#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2522#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} is VALID [2022-04-07 22:53:42,255 INFO L290 TraceCheckUtils]: 13: Hoare triple {2522#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,255 INFO L290 TraceCheckUtils]: 14: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-07 22:53:42,255 INFO L290 TraceCheckUtils]: 15: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-07 22:53:42,256 INFO L290 TraceCheckUtils]: 16: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-07 22:53:42,256 INFO L290 TraceCheckUtils]: 17: Hoare triple {2469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,256 INFO L272 TraceCheckUtils]: 18: Hoare triple {2469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2469#false} is VALID [2022-04-07 22:53:42,256 INFO L290 TraceCheckUtils]: 19: Hoare triple {2469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2469#false} is VALID [2022-04-07 22:53:42,256 INFO L290 TraceCheckUtils]: 20: Hoare triple {2469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,256 INFO L290 TraceCheckUtils]: 21: Hoare triple {2469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,257 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:53:42,257 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:53:42,440 INFO L290 TraceCheckUtils]: 21: Hoare triple {2469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,440 INFO L290 TraceCheckUtils]: 20: Hoare triple {2469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,440 INFO L290 TraceCheckUtils]: 19: Hoare triple {2469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2469#false} is VALID [2022-04-07 22:53:42,440 INFO L272 TraceCheckUtils]: 18: Hoare triple {2469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2469#false} is VALID [2022-04-07 22:53:42,441 INFO L290 TraceCheckUtils]: 17: Hoare triple {2469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-07 22:53:42,441 INFO L290 TraceCheckUtils]: 16: Hoare triple {2565#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-07 22:53:42,444 INFO L290 TraceCheckUtils]: 15: Hoare triple {2569#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2565#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:53:42,445 INFO L290 TraceCheckUtils]: 14: Hoare triple {2573#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2569#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:53:42,446 INFO L290 TraceCheckUtils]: 13: Hoare triple {2577#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2573#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:53:42,449 INFO L290 TraceCheckUtils]: 12: Hoare triple {2581#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2577#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:53:42,452 INFO L290 TraceCheckUtils]: 11: Hoare triple {2585#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2581#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:53:42,453 INFO L290 TraceCheckUtils]: 10: Hoare triple {2468#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2585#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:53:42,453 INFO L290 TraceCheckUtils]: 9: Hoare triple {2468#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,453 INFO L290 TraceCheckUtils]: 8: Hoare triple {2468#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2468#true} is VALID [2022-04-07 22:53:42,453 INFO L290 TraceCheckUtils]: 7: Hoare triple {2468#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2468#true} is VALID [2022-04-07 22:53:42,453 INFO L290 TraceCheckUtils]: 6: Hoare triple {2468#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2468#true} is VALID [2022-04-07 22:53:42,453 INFO L290 TraceCheckUtils]: 5: Hoare triple {2468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2468#true} is VALID [2022-04-07 22:53:42,454 INFO L272 TraceCheckUtils]: 4: Hoare triple {2468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,454 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2468#true} {2468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,454 INFO L290 TraceCheckUtils]: 2: Hoare triple {2468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,454 INFO L290 TraceCheckUtils]: 1: Hoare triple {2468#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2468#true} is VALID [2022-04-07 22:53:42,454 INFO L272 TraceCheckUtils]: 0: Hoare triple {2468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-07 22:53:42,454 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:53:42,454 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [601638014] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:53:42,455 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:53:42,455 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 8] total 19 [2022-04-07 22:53:42,455 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [432171057] [2022-04-07 22:53:42,455 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:53:42,455 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 22:53:42,456 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:53:42,456 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:42,487 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:42,488 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 22:53:42,488 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:53:42,488 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 22:53:42,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-04-07 22:53:42,489 INFO L87 Difference]: Start difference. First operand 51 states and 68 transitions. Second operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:43,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:43,513 INFO L93 Difference]: Finished difference Result 84 states and 112 transitions. [2022-04-07 22:53:43,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-07 22:53:43,514 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 22:53:43,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:53:43,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:43,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 61 transitions. [2022-04-07 22:53:43,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:43,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 61 transitions. [2022-04-07 22:53:43,517 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 61 transitions. [2022-04-07 22:53:43,587 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:43,588 INFO L225 Difference]: With dead ends: 84 [2022-04-07 22:53:43,588 INFO L226 Difference]: Without dead ends: 68 [2022-04-07 22:53:43,589 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=215, Invalid=1117, Unknown=0, NotChecked=0, Total=1332 [2022-04-07 22:53:43,590 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 246 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:53:43,590 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [25 Valid, 51 Invalid, 246 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 22:53:43,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2022-04-07 22:53:43,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 56. [2022-04-07 22:53:43,794 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:53:43,795 INFO L82 GeneralOperation]: Start isEquivalent. First operand 68 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:43,795 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:43,795 INFO L87 Difference]: Start difference. First operand 68 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:43,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:43,797 INFO L93 Difference]: Finished difference Result 68 states and 87 transitions. [2022-04-07 22:53:43,797 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 87 transitions. [2022-04-07 22:53:43,797 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:43,797 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:43,798 INFO L74 IsIncluded]: Start isIncluded. First operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-07 22:53:43,798 INFO L87 Difference]: Start difference. First operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-07 22:53:43,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:43,800 INFO L93 Difference]: Finished difference Result 68 states and 87 transitions. [2022-04-07 22:53:43,800 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 87 transitions. [2022-04-07 22:53:43,800 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:43,800 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:43,800 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:53:43,800 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:53:43,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:43,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 74 transitions. [2022-04-07 22:53:43,802 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 74 transitions. Word has length 22 [2022-04-07 22:53:43,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:53:43,802 INFO L478 AbstractCegarLoop]: Abstraction has 56 states and 74 transitions. [2022-04-07 22:53:43,802 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:43,802 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 74 transitions. [2022-04-07 22:53:43,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-07 22:53:43,803 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:53:43,803 INFO L499 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:53:43,825 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-07 22:53:44,023 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:44,024 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:53:44,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:53:44,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1245601634, now seen corresponding path program 5 times [2022-04-07 22:53:44,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:53:44,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164688934] [2022-04-07 22:53:44,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:44,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:53:44,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:44,182 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:53:44,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:44,186 INFO L290 TraceCheckUtils]: 0: Hoare triple {3033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-07 22:53:44,186 INFO L290 TraceCheckUtils]: 1: Hoare triple {3019#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,187 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3019#true} {3019#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,187 INFO L272 TraceCheckUtils]: 0: Hoare triple {3019#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:53:44,187 INFO L290 TraceCheckUtils]: 1: Hoare triple {3033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-07 22:53:44,187 INFO L290 TraceCheckUtils]: 2: Hoare triple {3019#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,187 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3019#true} {3019#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,188 INFO L272 TraceCheckUtils]: 4: Hoare triple {3019#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,188 INFO L290 TraceCheckUtils]: 5: Hoare triple {3019#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3024#(= main_~y~0 0)} is VALID [2022-04-07 22:53:44,188 INFO L290 TraceCheckUtils]: 6: Hoare triple {3024#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3025#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:44,189 INFO L290 TraceCheckUtils]: 7: Hoare triple {3025#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3026#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:44,190 INFO L290 TraceCheckUtils]: 8: Hoare triple {3026#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3027#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:44,191 INFO L290 TraceCheckUtils]: 9: Hoare triple {3027#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3028#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:53:44,191 INFO L290 TraceCheckUtils]: 10: Hoare triple {3028#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3029#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:53:44,192 INFO L290 TraceCheckUtils]: 11: Hoare triple {3029#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:53:44,193 INFO L290 TraceCheckUtils]: 12: Hoare triple {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:53:44,193 INFO L290 TraceCheckUtils]: 13: Hoare triple {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3031#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 22:53:44,194 INFO L290 TraceCheckUtils]: 14: Hoare triple {3031#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3032#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:53:44,194 INFO L290 TraceCheckUtils]: 15: Hoare triple {3032#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,195 INFO L290 TraceCheckUtils]: 16: Hoare triple {3020#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3020#false} is VALID [2022-04-07 22:53:44,195 INFO L290 TraceCheckUtils]: 17: Hoare triple {3020#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,195 INFO L272 TraceCheckUtils]: 18: Hoare triple {3020#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3020#false} is VALID [2022-04-07 22:53:44,195 INFO L290 TraceCheckUtils]: 19: Hoare triple {3020#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3020#false} is VALID [2022-04-07 22:53:44,195 INFO L290 TraceCheckUtils]: 20: Hoare triple {3020#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,195 INFO L290 TraceCheckUtils]: 21: Hoare triple {3020#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,195 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:53:44,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:53:44,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164688934] [2022-04-07 22:53:44,196 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1164688934] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:53:44,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1589038735] [2022-04-07 22:53:44,196 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:53:44,196 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:44,196 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:53:44,199 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:53:44,201 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 22:53:44,240 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 22:53:44,241 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:53:44,241 INFO L263 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 19 conjunts are in the unsatisfiable core [2022-04-07 22:53:44,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:44,247 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:53:44,448 INFO L272 TraceCheckUtils]: 0: Hoare triple {3019#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,448 INFO L290 TraceCheckUtils]: 1: Hoare triple {3019#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-07 22:53:44,448 INFO L290 TraceCheckUtils]: 2: Hoare triple {3019#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,448 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3019#true} {3019#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,449 INFO L272 TraceCheckUtils]: 4: Hoare triple {3019#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,449 INFO L290 TraceCheckUtils]: 5: Hoare triple {3019#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3024#(= main_~y~0 0)} is VALID [2022-04-07 22:53:44,450 INFO L290 TraceCheckUtils]: 6: Hoare triple {3024#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3025#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:44,450 INFO L290 TraceCheckUtils]: 7: Hoare triple {3025#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3026#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:53:44,451 INFO L290 TraceCheckUtils]: 8: Hoare triple {3026#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3027#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:53:44,452 INFO L290 TraceCheckUtils]: 9: Hoare triple {3027#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3028#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:53:44,453 INFO L290 TraceCheckUtils]: 10: Hoare triple {3028#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3029#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:53:44,453 INFO L290 TraceCheckUtils]: 11: Hoare triple {3029#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:53:44,454 INFO L290 TraceCheckUtils]: 12: Hoare triple {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:53:44,454 INFO L290 TraceCheckUtils]: 13: Hoare triple {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3031#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 22:53:44,455 INFO L290 TraceCheckUtils]: 14: Hoare triple {3031#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3079#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 22:53:44,456 INFO L290 TraceCheckUtils]: 15: Hoare triple {3079#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,456 INFO L290 TraceCheckUtils]: 16: Hoare triple {3020#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3020#false} is VALID [2022-04-07 22:53:44,456 INFO L290 TraceCheckUtils]: 17: Hoare triple {3020#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,456 INFO L272 TraceCheckUtils]: 18: Hoare triple {3020#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3020#false} is VALID [2022-04-07 22:53:44,456 INFO L290 TraceCheckUtils]: 19: Hoare triple {3020#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3020#false} is VALID [2022-04-07 22:53:44,456 INFO L290 TraceCheckUtils]: 20: Hoare triple {3020#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,457 INFO L290 TraceCheckUtils]: 21: Hoare triple {3020#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,457 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:53:44,457 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:53:44,666 INFO L290 TraceCheckUtils]: 21: Hoare triple {3020#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,666 INFO L290 TraceCheckUtils]: 20: Hoare triple {3020#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,666 INFO L290 TraceCheckUtils]: 19: Hoare triple {3020#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3020#false} is VALID [2022-04-07 22:53:44,666 INFO L272 TraceCheckUtils]: 18: Hoare triple {3020#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3020#false} is VALID [2022-04-07 22:53:44,666 INFO L290 TraceCheckUtils]: 17: Hoare triple {3020#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,667 INFO L290 TraceCheckUtils]: 16: Hoare triple {3020#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3020#false} is VALID [2022-04-07 22:53:44,667 INFO L290 TraceCheckUtils]: 15: Hoare triple {3119#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-07 22:53:44,668 INFO L290 TraceCheckUtils]: 14: Hoare triple {3123#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3119#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:53:44,668 INFO L290 TraceCheckUtils]: 13: Hoare triple {3127#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3123#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 22:53:44,668 INFO L290 TraceCheckUtils]: 12: Hoare triple {3127#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3127#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:53:44,669 INFO L290 TraceCheckUtils]: 11: Hoare triple {3134#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3127#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:53:44,670 INFO L290 TraceCheckUtils]: 10: Hoare triple {3138#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3134#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:53:44,671 INFO L290 TraceCheckUtils]: 9: Hoare triple {3142#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3138#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:53:44,671 INFO L290 TraceCheckUtils]: 8: Hoare triple {3146#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3142#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:53:44,672 INFO L290 TraceCheckUtils]: 7: Hoare triple {3150#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3146#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:53:44,673 INFO L290 TraceCheckUtils]: 6: Hoare triple {3154#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3150#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:53:44,673 INFO L290 TraceCheckUtils]: 5: Hoare triple {3019#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3154#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 22:53:44,673 INFO L272 TraceCheckUtils]: 4: Hoare triple {3019#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,673 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3019#true} {3019#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,673 INFO L290 TraceCheckUtils]: 2: Hoare triple {3019#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,673 INFO L290 TraceCheckUtils]: 1: Hoare triple {3019#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-07 22:53:44,674 INFO L272 TraceCheckUtils]: 0: Hoare triple {3019#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-07 22:53:44,674 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:53:44,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1589038735] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:53:44,674 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:53:44,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 22 [2022-04-07 22:53:44,674 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409650976] [2022-04-07 22:53:44,674 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:53:44,675 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 22:53:44,676 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:53:44,676 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:44,702 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:44,702 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-07 22:53:44,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:53:44,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-07 22:53:44,703 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2022-04-07 22:53:44,703 INFO L87 Difference]: Start difference. First operand 56 states and 74 transitions. Second operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:50,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:50,975 INFO L93 Difference]: Finished difference Result 154 states and 223 transitions. [2022-04-07 22:53:50,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2022-04-07 22:53:50,976 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 22:53:50,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:53:50,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:50,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 169 transitions. [2022-04-07 22:53:50,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:50,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 169 transitions. [2022-04-07 22:53:50,993 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 65 states and 169 transitions. [2022-04-07 22:53:51,342 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 169 edges. 169 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:53:51,344 INFO L225 Difference]: With dead ends: 154 [2022-04-07 22:53:51,344 INFO L226 Difference]: Without dead ends: 144 [2022-04-07 22:53:51,346 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2347 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=1701, Invalid=5271, Unknown=0, NotChecked=0, Total=6972 [2022-04-07 22:53:51,346 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 242 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 407 mSolverCounterSat, 316 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 242 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 723 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 316 IncrementalHoareTripleChecker+Valid, 407 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-07 22:53:51,347 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [242 Valid, 71 Invalid, 723 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [316 Valid, 407 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-07 22:53:51,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2022-04-07 22:53:51,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 76. [2022-04-07 22:53:51,630 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:53:51,631 INFO L82 GeneralOperation]: Start isEquivalent. First operand 144 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:51,631 INFO L74 IsIncluded]: Start isIncluded. First operand 144 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:51,631 INFO L87 Difference]: Start difference. First operand 144 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:51,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:51,634 INFO L93 Difference]: Finished difference Result 144 states and 186 transitions. [2022-04-07 22:53:51,634 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2022-04-07 22:53:51,634 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:51,634 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:51,635 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-07 22:53:51,635 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-07 22:53:51,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:53:51,637 INFO L93 Difference]: Finished difference Result 144 states and 186 transitions. [2022-04-07 22:53:51,638 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2022-04-07 22:53:51,638 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:53:51,638 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:53:51,638 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:53:51,638 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:53:51,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:51,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 103 transitions. [2022-04-07 22:53:51,640 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 103 transitions. Word has length 22 [2022-04-07 22:53:51,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:53:51,640 INFO L478 AbstractCegarLoop]: Abstraction has 76 states and 103 transitions. [2022-04-07 22:53:51,640 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:53:51,640 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 103 transitions. [2022-04-07 22:53:51,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 22:53:51,641 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:53:51,641 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:53:51,660 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 22:53:51,855 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:51,856 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:53:51,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:53:51,856 INFO L85 PathProgramCache]: Analyzing trace with hash 660626, now seen corresponding path program 6 times [2022-04-07 22:53:51,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:53:51,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002182582] [2022-04-07 22:53:51,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:53:51,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:53:51,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:52,292 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:53:52,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:52,296 INFO L290 TraceCheckUtils]: 0: Hoare triple {3964#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3947#true} is VALID [2022-04-07 22:53:52,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {3947#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:53:52,296 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3947#true} {3947#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:53:52,297 INFO L272 TraceCheckUtils]: 0: Hoare triple {3947#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3964#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:53:52,297 INFO L290 TraceCheckUtils]: 1: Hoare triple {3964#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3947#true} is VALID [2022-04-07 22:53:52,297 INFO L290 TraceCheckUtils]: 2: Hoare triple {3947#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:53:52,297 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3947#true} {3947#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:53:52,297 INFO L272 TraceCheckUtils]: 4: Hoare triple {3947#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:53:52,298 INFO L290 TraceCheckUtils]: 5: Hoare triple {3947#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3952#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:53:52,301 INFO L290 TraceCheckUtils]: 6: Hoare triple {3952#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3953#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:53:52,343 INFO L290 TraceCheckUtils]: 7: Hoare triple {3953#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3954#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:53:52,363 INFO L290 TraceCheckUtils]: 8: Hoare triple {3954#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3955#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-07 22:53:52,364 INFO L290 TraceCheckUtils]: 9: Hoare triple {3955#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 3) main_~n~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3956#(and (<= main_~y~0 3) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-07 22:53:52,365 INFO L290 TraceCheckUtils]: 10: Hoare triple {3956#(and (<= main_~y~0 3) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 3) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-07 22:53:52,366 INFO L290 TraceCheckUtils]: 11: Hoare triple {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:53:52,367 INFO L290 TraceCheckUtils]: 12: Hoare triple {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} is VALID [2022-04-07 22:53:52,367 INFO L290 TraceCheckUtils]: 13: Hoare triple {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:53:52,368 INFO L290 TraceCheckUtils]: 14: Hoare triple {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:53:52,369 INFO L290 TraceCheckUtils]: 15: Hoare triple {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} is VALID [2022-04-07 22:53:52,370 INFO L290 TraceCheckUtils]: 16: Hoare triple {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:53:52,371 INFO L290 TraceCheckUtils]: 17: Hoare triple {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:52,372 INFO L290 TraceCheckUtils]: 18: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:53:52,373 INFO L272 TraceCheckUtils]: 19: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3962#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:53:52,373 INFO L290 TraceCheckUtils]: 20: Hoare triple {3962#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3963#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:53:52,373 INFO L290 TraceCheckUtils]: 21: Hoare triple {3963#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-07 22:53:52,373 INFO L290 TraceCheckUtils]: 22: Hoare triple {3948#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-07 22:53:52,374 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:53:52,374 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:53:52,374 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002182582] [2022-04-07 22:53:52,374 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2002182582] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:53:52,374 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [853645610] [2022-04-07 22:53:52,374 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 22:53:52,374 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:53:52,374 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:53:52,375 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:53:52,376 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 22:53:52,438 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-07 22:53:52,438 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:53:52,439 INFO L263 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 40 conjunts are in the unsatisfiable core [2022-04-07 22:53:52,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:53:52,453 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:54:15,191 INFO L272 TraceCheckUtils]: 0: Hoare triple {3947#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:54:15,192 INFO L290 TraceCheckUtils]: 1: Hoare triple {3947#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3947#true} is VALID [2022-04-07 22:54:15,192 INFO L290 TraceCheckUtils]: 2: Hoare triple {3947#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:54:15,192 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3947#true} {3947#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:54:15,192 INFO L272 TraceCheckUtils]: 4: Hoare triple {3947#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:54:15,192 INFO L290 TraceCheckUtils]: 5: Hoare triple {3947#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3952#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:54:15,193 INFO L290 TraceCheckUtils]: 6: Hoare triple {3952#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3986#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} is VALID [2022-04-07 22:54:15,194 INFO L290 TraceCheckUtils]: 7: Hoare triple {3986#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3990#(and (= (+ (- 2) main_~y~0) 0) (= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-07 22:54:15,194 INFO L290 TraceCheckUtils]: 8: Hoare triple {3990#(and (= (+ (- 2) main_~y~0) 0) (= main_~n~0 (+ main_~x~0 2)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3994#(and (= (+ main_~x~0 3) main_~n~0) (= (+ main_~y~0 (- 3)) 0))} is VALID [2022-04-07 22:54:15,195 INFO L290 TraceCheckUtils]: 9: Hoare triple {3994#(and (= (+ main_~x~0 3) main_~n~0) (= (+ main_~y~0 (- 3)) 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3998#(and (= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (= (+ main_~y~0 (- 3)) 0))} is VALID [2022-04-07 22:54:15,195 INFO L290 TraceCheckUtils]: 10: Hoare triple {3998#(and (= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (= (+ main_~y~0 (- 3)) 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4002#(and (= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (= 0 (+ main_~z~0 (- 3))))} is VALID [2022-04-07 22:54:15,196 INFO L290 TraceCheckUtils]: 11: Hoare triple {4002#(and (= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (= 0 (+ main_~z~0 (- 3))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4006#(and (= 3 (+ main_~z~0 1)) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-07 22:54:15,197 INFO L290 TraceCheckUtils]: 12: Hoare triple {4006#(and (= 3 (+ main_~z~0 1)) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (= main_~n~0 (+ main_~x~0 2)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4010#(and (= main_~x~0 (+ (- 1) main_~n~0)) (= 3 (+ main_~z~0 2)) (not (< 0 (mod (+ main_~n~0 4294967293) 4294967296))))} is VALID [2022-04-07 22:54:15,198 INFO L290 TraceCheckUtils]: 13: Hoare triple {4010#(and (= main_~x~0 (+ (- 1) main_~n~0)) (= 3 (+ main_~z~0 2)) (not (< 0 (mod (+ main_~n~0 4294967293) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:54:15,198 INFO L290 TraceCheckUtils]: 14: Hoare triple {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:54:15,199 INFO L290 TraceCheckUtils]: 15: Hoare triple {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} is VALID [2022-04-07 22:54:15,200 INFO L290 TraceCheckUtils]: 16: Hoare triple {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:54:15,201 INFO L290 TraceCheckUtils]: 17: Hoare triple {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-07 22:54:15,201 INFO L290 TraceCheckUtils]: 18: Hoare triple {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-07 22:54:15,203 INFO L272 TraceCheckUtils]: 19: Hoare triple {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4032#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:54:15,204 INFO L290 TraceCheckUtils]: 20: Hoare triple {4032#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4036#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:54:15,204 INFO L290 TraceCheckUtils]: 21: Hoare triple {4036#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-07 22:54:15,204 INFO L290 TraceCheckUtils]: 22: Hoare triple {3948#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-07 22:54:15,204 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:54:15,204 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:54:15,975 INFO L290 TraceCheckUtils]: 22: Hoare triple {3948#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-07 22:54:15,976 INFO L290 TraceCheckUtils]: 21: Hoare triple {4036#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-07 22:54:15,977 INFO L290 TraceCheckUtils]: 20: Hoare triple {4032#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4036#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:54:15,978 INFO L272 TraceCheckUtils]: 19: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4032#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:54:15,978 INFO L290 TraceCheckUtils]: 18: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:15,980 INFO L290 TraceCheckUtils]: 17: Hoare triple {4058#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:15,981 INFO L290 TraceCheckUtils]: 16: Hoare triple {4062#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4058#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:15,982 INFO L290 TraceCheckUtils]: 15: Hoare triple {4066#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4062#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:54:15,983 INFO L290 TraceCheckUtils]: 14: Hoare triple {4066#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4066#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:15,984 INFO L290 TraceCheckUtils]: 13: Hoare triple {4062#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4066#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:15,985 INFO L290 TraceCheckUtils]: 12: Hoare triple {4058#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4062#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:54:15,987 INFO L290 TraceCheckUtils]: 11: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4058#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:15,987 INFO L290 TraceCheckUtils]: 10: Hoare triple {4082#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:15,988 INFO L290 TraceCheckUtils]: 9: Hoare triple {4086#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4082#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:54:15,989 INFO L290 TraceCheckUtils]: 8: Hoare triple {4090#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4086#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:54:15,991 INFO L290 TraceCheckUtils]: 7: Hoare triple {4094#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4090#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:54:15,992 INFO L290 TraceCheckUtils]: 6: Hoare triple {4098#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4094#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:54:15,993 INFO L290 TraceCheckUtils]: 5: Hoare triple {3947#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4098#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:54:15,993 INFO L272 TraceCheckUtils]: 4: Hoare triple {3947#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:54:15,993 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3947#true} {3947#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:54:15,993 INFO L290 TraceCheckUtils]: 2: Hoare triple {3947#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:54:15,993 INFO L290 TraceCheckUtils]: 1: Hoare triple {3947#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3947#true} is VALID [2022-04-07 22:54:15,993 INFO L272 TraceCheckUtils]: 0: Hoare triple {3947#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-07 22:54:15,993 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:54:15,993 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [853645610] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:54:15,994 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:54:15,994 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 13] total 32 [2022-04-07 22:54:15,994 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1728102460] [2022-04-07 22:54:15,994 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:54:15,994 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:54:15,995 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:54:15,995 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:16,056 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:54:16,056 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-07 22:54:16,056 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:54:16,056 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-07 22:54:16,057 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=871, Unknown=0, NotChecked=0, Total=992 [2022-04-07 22:54:16,057 INFO L87 Difference]: Start difference. First operand 76 states and 103 transitions. Second operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:20,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:54:20,687 INFO L93 Difference]: Finished difference Result 126 states and 161 transitions. [2022-04-07 22:54:20,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-07 22:54:20,688 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:54:20,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:54:20,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:20,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 77 transitions. [2022-04-07 22:54:20,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:20,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 77 transitions. [2022-04-07 22:54:20,691 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 77 transitions. [2022-04-07 22:54:21,022 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:54:21,023 INFO L225 Difference]: With dead ends: 126 [2022-04-07 22:54:21,023 INFO L226 Difference]: Without dead ends: 98 [2022-04-07 22:54:21,025 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 865 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=456, Invalid=3450, Unknown=0, NotChecked=0, Total=3906 [2022-04-07 22:54:21,025 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 69 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 526 mSolverCounterSat, 71 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 597 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 71 IncrementalHoareTripleChecker+Valid, 526 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-07 22:54:21,025 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [69 Valid, 101 Invalid, 597 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [71 Valid, 526 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-07 22:54:21,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-07 22:54:21,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 75. [2022-04-07 22:54:21,313 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:54:21,314 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:21,314 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:21,314 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:21,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:54:21,316 INFO L93 Difference]: Finished difference Result 98 states and 129 transitions. [2022-04-07 22:54:21,316 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 129 transitions. [2022-04-07 22:54:21,316 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:54:21,316 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:54:21,316 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-07 22:54:21,316 INFO L87 Difference]: Start difference. First operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-07 22:54:21,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:54:21,318 INFO L93 Difference]: Finished difference Result 98 states and 129 transitions. [2022-04-07 22:54:21,318 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 129 transitions. [2022-04-07 22:54:21,318 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:54:21,318 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:54:21,318 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:54:21,318 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:54:21,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:21,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 100 transitions. [2022-04-07 22:54:21,320 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 100 transitions. Word has length 23 [2022-04-07 22:54:21,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:54:21,320 INFO L478 AbstractCegarLoop]: Abstraction has 75 states and 100 transitions. [2022-04-07 22:54:21,320 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:21,320 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 100 transitions. [2022-04-07 22:54:21,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 22:54:21,320 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:54:21,321 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:54:21,337 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 22:54:21,521 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 22:54:21,521 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:54:21,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:54:21,522 INFO L85 PathProgramCache]: Analyzing trace with hash -1529937545, now seen corresponding path program 7 times [2022-04-07 22:54:21,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:54:21,522 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963826374] [2022-04-07 22:54:21,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:54:21,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:54:21,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:54:21,670 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:54:21,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:54:21,679 INFO L290 TraceCheckUtils]: 0: Hoare triple {4709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4695#true} is VALID [2022-04-07 22:54:21,679 INFO L290 TraceCheckUtils]: 1: Hoare triple {4695#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,679 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4695#true} {4695#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,679 INFO L272 TraceCheckUtils]: 0: Hoare triple {4695#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:54:21,679 INFO L290 TraceCheckUtils]: 1: Hoare triple {4709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4695#true} is VALID [2022-04-07 22:54:21,680 INFO L290 TraceCheckUtils]: 2: Hoare triple {4695#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,680 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4695#true} {4695#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,680 INFO L272 TraceCheckUtils]: 4: Hoare triple {4695#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,680 INFO L290 TraceCheckUtils]: 5: Hoare triple {4695#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4700#(= main_~y~0 0)} is VALID [2022-04-07 22:54:21,680 INFO L290 TraceCheckUtils]: 6: Hoare triple {4700#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:54:21,681 INFO L290 TraceCheckUtils]: 7: Hoare triple {4701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4702#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:54:21,682 INFO L290 TraceCheckUtils]: 8: Hoare triple {4702#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:54:21,682 INFO L290 TraceCheckUtils]: 9: Hoare triple {4703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:54:21,682 INFO L290 TraceCheckUtils]: 10: Hoare triple {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:54:21,683 INFO L290 TraceCheckUtils]: 11: Hoare triple {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4705#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:54:21,683 INFO L290 TraceCheckUtils]: 12: Hoare triple {4705#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4706#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 22:54:21,684 INFO L290 TraceCheckUtils]: 13: Hoare triple {4706#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4707#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:54:21,685 INFO L290 TraceCheckUtils]: 14: Hoare triple {4707#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4708#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:54:21,685 INFO L290 TraceCheckUtils]: 15: Hoare triple {4708#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:21,685 INFO L290 TraceCheckUtils]: 16: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:21,685 INFO L290 TraceCheckUtils]: 17: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:21,685 INFO L290 TraceCheckUtils]: 18: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:21,685 INFO L290 TraceCheckUtils]: 19: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:21,685 INFO L290 TraceCheckUtils]: 20: Hoare triple {4696#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:21,685 INFO L272 TraceCheckUtils]: 21: Hoare triple {4696#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4696#false} is VALID [2022-04-07 22:54:21,686 INFO L290 TraceCheckUtils]: 22: Hoare triple {4696#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4696#false} is VALID [2022-04-07 22:54:21,686 INFO L290 TraceCheckUtils]: 23: Hoare triple {4696#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:21,686 INFO L290 TraceCheckUtils]: 24: Hoare triple {4696#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:21,686 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:54:21,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:54:21,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963826374] [2022-04-07 22:54:21,686 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [963826374] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:54:21,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [551801140] [2022-04-07 22:54:21,686 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 22:54:21,686 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:54:21,686 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:54:21,687 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:54:21,688 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 22:54:21,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:54:21,723 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-07 22:54:21,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:54:21,732 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:54:21,903 INFO L272 TraceCheckUtils]: 0: Hoare triple {4695#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,903 INFO L290 TraceCheckUtils]: 1: Hoare triple {4695#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4695#true} is VALID [2022-04-07 22:54:21,903 INFO L290 TraceCheckUtils]: 2: Hoare triple {4695#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,904 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4695#true} {4695#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,904 INFO L272 TraceCheckUtils]: 4: Hoare triple {4695#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:21,904 INFO L290 TraceCheckUtils]: 5: Hoare triple {4695#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4700#(= main_~y~0 0)} is VALID [2022-04-07 22:54:21,904 INFO L290 TraceCheckUtils]: 6: Hoare triple {4700#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:54:21,905 INFO L290 TraceCheckUtils]: 7: Hoare triple {4701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4702#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:54:21,905 INFO L290 TraceCheckUtils]: 8: Hoare triple {4702#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:54:21,906 INFO L290 TraceCheckUtils]: 9: Hoare triple {4703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:54:21,906 INFO L290 TraceCheckUtils]: 10: Hoare triple {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:54:21,907 INFO L290 TraceCheckUtils]: 11: Hoare triple {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4746#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:54:21,907 INFO L290 TraceCheckUtils]: 12: Hoare triple {4746#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4750#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:54:21,908 INFO L290 TraceCheckUtils]: 13: Hoare triple {4750#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4754#(and (<= main_~y~0 4) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 4 main_~y~0))} is VALID [2022-04-07 22:54:21,908 INFO L290 TraceCheckUtils]: 14: Hoare triple {4754#(and (<= main_~y~0 4) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 4 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4758#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:54:21,909 INFO L290 TraceCheckUtils]: 15: Hoare triple {4758#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 4) (<= 4 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:21,909 INFO L290 TraceCheckUtils]: 16: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:21,909 INFO L290 TraceCheckUtils]: 17: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:21,909 INFO L290 TraceCheckUtils]: 18: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:21,909 INFO L290 TraceCheckUtils]: 19: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:21,909 INFO L290 TraceCheckUtils]: 20: Hoare triple {4696#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:21,909 INFO L272 TraceCheckUtils]: 21: Hoare triple {4696#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4696#false} is VALID [2022-04-07 22:54:21,910 INFO L290 TraceCheckUtils]: 22: Hoare triple {4696#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4696#false} is VALID [2022-04-07 22:54:21,910 INFO L290 TraceCheckUtils]: 23: Hoare triple {4696#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:21,910 INFO L290 TraceCheckUtils]: 24: Hoare triple {4696#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:21,910 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:54:21,910 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:54:22,150 INFO L290 TraceCheckUtils]: 24: Hoare triple {4696#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:22,151 INFO L290 TraceCheckUtils]: 23: Hoare triple {4696#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:22,151 INFO L290 TraceCheckUtils]: 22: Hoare triple {4696#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4696#false} is VALID [2022-04-07 22:54:22,151 INFO L272 TraceCheckUtils]: 21: Hoare triple {4696#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4696#false} is VALID [2022-04-07 22:54:22,151 INFO L290 TraceCheckUtils]: 20: Hoare triple {4696#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-07 22:54:22,151 INFO L290 TraceCheckUtils]: 19: Hoare triple {4804#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-07 22:54:22,152 INFO L290 TraceCheckUtils]: 18: Hoare triple {4808#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4804#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:54:22,153 INFO L290 TraceCheckUtils]: 17: Hoare triple {4812#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4808#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:54:22,154 INFO L290 TraceCheckUtils]: 16: Hoare triple {4816#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4812#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:54:22,154 INFO L290 TraceCheckUtils]: 15: Hoare triple {4820#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4816#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:54:22,155 INFO L290 TraceCheckUtils]: 14: Hoare triple {4824#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4820#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-07 22:54:22,156 INFO L290 TraceCheckUtils]: 13: Hoare triple {4828#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4824#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:54:22,157 INFO L290 TraceCheckUtils]: 12: Hoare triple {4832#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4828#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-07 22:54:22,157 INFO L290 TraceCheckUtils]: 11: Hoare triple {4695#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4832#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:54:22,157 INFO L290 TraceCheckUtils]: 10: Hoare triple {4695#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:22,157 INFO L290 TraceCheckUtils]: 9: Hoare triple {4695#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4695#true} is VALID [2022-04-07 22:54:22,157 INFO L290 TraceCheckUtils]: 8: Hoare triple {4695#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4695#true} is VALID [2022-04-07 22:54:22,157 INFO L290 TraceCheckUtils]: 7: Hoare triple {4695#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4695#true} is VALID [2022-04-07 22:54:22,157 INFO L290 TraceCheckUtils]: 6: Hoare triple {4695#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4695#true} is VALID [2022-04-07 22:54:22,158 INFO L290 TraceCheckUtils]: 5: Hoare triple {4695#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4695#true} is VALID [2022-04-07 22:54:22,158 INFO L272 TraceCheckUtils]: 4: Hoare triple {4695#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:22,158 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4695#true} {4695#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:22,158 INFO L290 TraceCheckUtils]: 2: Hoare triple {4695#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:22,158 INFO L290 TraceCheckUtils]: 1: Hoare triple {4695#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4695#true} is VALID [2022-04-07 22:54:22,158 INFO L272 TraceCheckUtils]: 0: Hoare triple {4695#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-07 22:54:22,158 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:54:22,158 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [551801140] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:54:22,158 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:54:22,158 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 24 [2022-04-07 22:54:22,159 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1618535006] [2022-04-07 22:54:22,159 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:54:22,159 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 22:54:22,159 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:54:22,159 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:22,187 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:54:22,188 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-07 22:54:22,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:54:22,188 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-07 22:54:22,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=457, Unknown=0, NotChecked=0, Total=552 [2022-04-07 22:54:22,188 INFO L87 Difference]: Start difference. First operand 75 states and 100 transitions. Second operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:23,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:54:23,967 INFO L93 Difference]: Finished difference Result 119 states and 160 transitions. [2022-04-07 22:54:23,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-07 22:54:23,967 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 22:54:23,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:54:23,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:23,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 70 transitions. [2022-04-07 22:54:23,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:23,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 70 transitions. [2022-04-07 22:54:23,970 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 70 transitions. [2022-04-07 22:54:24,049 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:54:24,051 INFO L225 Difference]: With dead ends: 119 [2022-04-07 22:54:24,051 INFO L226 Difference]: Without dead ends: 100 [2022-04-07 22:54:24,052 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 393 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=304, Invalid=1858, Unknown=0, NotChecked=0, Total=2162 [2022-04-07 22:54:24,052 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 29 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 339 mSolverCounterSat, 62 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 401 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 62 IncrementalHoareTripleChecker+Valid, 339 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:54:24,053 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 74 Invalid, 401 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [62 Valid, 339 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 22:54:24,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-04-07 22:54:24,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 82. [2022-04-07 22:54:24,397 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:54:24,398 INFO L82 GeneralOperation]: Start isEquivalent. First operand 100 states. Second operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:24,398 INFO L74 IsIncluded]: Start isIncluded. First operand 100 states. Second operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:24,398 INFO L87 Difference]: Start difference. First operand 100 states. Second operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:24,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:54:24,400 INFO L93 Difference]: Finished difference Result 100 states and 129 transitions. [2022-04-07 22:54:24,400 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 129 transitions. [2022-04-07 22:54:24,400 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:54:24,400 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:54:24,401 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-07 22:54:24,401 INFO L87 Difference]: Start difference. First operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-07 22:54:24,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:54:24,403 INFO L93 Difference]: Finished difference Result 100 states and 129 transitions. [2022-04-07 22:54:24,403 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 129 transitions. [2022-04-07 22:54:24,403 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:54:24,403 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:54:24,403 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:54:24,403 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:54:24,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:24,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 110 transitions. [2022-04-07 22:54:24,405 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 110 transitions. Word has length 25 [2022-04-07 22:54:24,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:54:24,405 INFO L478 AbstractCegarLoop]: Abstraction has 82 states and 110 transitions. [2022-04-07 22:54:24,405 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:24,405 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 110 transitions. [2022-04-07 22:54:24,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 22:54:24,406 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:54:24,406 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:54:24,423 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-07 22:54:24,611 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:54:24,612 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:54:24,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:54:24,612 INFO L85 PathProgramCache]: Analyzing trace with hash -1167600349, now seen corresponding path program 8 times [2022-04-07 22:54:24,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:54:24,612 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34031565] [2022-04-07 22:54:24,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:54:24,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:54:24,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:54:25,105 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:54:25,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:54:25,112 INFO L290 TraceCheckUtils]: 0: Hoare triple {5464#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5445#true} is VALID [2022-04-07 22:54:25,112 INFO L290 TraceCheckUtils]: 1: Hoare triple {5445#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:25,112 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5445#true} {5445#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:25,119 INFO L272 TraceCheckUtils]: 0: Hoare triple {5445#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5464#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:54:25,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {5464#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5445#true} is VALID [2022-04-07 22:54:25,120 INFO L290 TraceCheckUtils]: 2: Hoare triple {5445#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:25,120 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5445#true} {5445#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:25,120 INFO L272 TraceCheckUtils]: 4: Hoare triple {5445#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:25,121 INFO L290 TraceCheckUtils]: 5: Hoare triple {5445#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5450#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:54:25,123 INFO L290 TraceCheckUtils]: 6: Hoare triple {5450#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5451#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:54:25,129 INFO L290 TraceCheckUtils]: 7: Hoare triple {5451#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5452#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:54:25,131 INFO L290 TraceCheckUtils]: 8: Hoare triple {5452#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5453#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:25,138 INFO L290 TraceCheckUtils]: 9: Hoare triple {5453#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5454#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 4) main_~n~0) (<= main_~y~0 4) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= 4 main_~y~0))} is VALID [2022-04-07 22:54:25,139 INFO L290 TraceCheckUtils]: 10: Hoare triple {5454#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 4) main_~n~0) (<= main_~y~0 4) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5455#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4) main_~n~0) (<= main_~y~0 4))} is VALID [2022-04-07 22:54:25,140 INFO L290 TraceCheckUtils]: 11: Hoare triple {5455#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4) main_~n~0) (<= main_~y~0 4))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:54:25,141 INFO L290 TraceCheckUtils]: 12: Hoare triple {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:25,142 INFO L290 TraceCheckUtils]: 13: Hoare triple {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} is VALID [2022-04-07 22:54:25,143 INFO L290 TraceCheckUtils]: 14: Hoare triple {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:25,144 INFO L290 TraceCheckUtils]: 15: Hoare triple {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:25,144 INFO L290 TraceCheckUtils]: 16: Hoare triple {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:25,145 INFO L290 TraceCheckUtils]: 17: Hoare triple {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:25,146 INFO L290 TraceCheckUtils]: 18: Hoare triple {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} is VALID [2022-04-07 22:54:25,147 INFO L290 TraceCheckUtils]: 19: Hoare triple {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:25,149 INFO L290 TraceCheckUtils]: 20: Hoare triple {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:25,149 INFO L290 TraceCheckUtils]: 21: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:25,150 INFO L272 TraceCheckUtils]: 22: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5462#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:54:25,150 INFO L290 TraceCheckUtils]: 23: Hoare triple {5462#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5463#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:54:25,151 INFO L290 TraceCheckUtils]: 24: Hoare triple {5463#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-07 22:54:25,151 INFO L290 TraceCheckUtils]: 25: Hoare triple {5446#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-07 22:54:25,151 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:54:25,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:54:25,151 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34031565] [2022-04-07 22:54:25,151 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [34031565] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:54:25,151 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [584131881] [2022-04-07 22:54:25,151 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:54:25,152 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:54:25,152 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:54:25,152 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:54:25,153 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-07 22:54:25,235 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:54:25,235 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:54:25,236 INFO L263 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 52 conjunts are in the unsatisfiable core [2022-04-07 22:54:25,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:54:25,252 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:54:55,028 INFO L272 TraceCheckUtils]: 0: Hoare triple {5445#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:55,028 INFO L290 TraceCheckUtils]: 1: Hoare triple {5445#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5445#true} is VALID [2022-04-07 22:54:55,029 INFO L290 TraceCheckUtils]: 2: Hoare triple {5445#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:55,029 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5445#true} {5445#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:55,029 INFO L272 TraceCheckUtils]: 4: Hoare triple {5445#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:55,030 INFO L290 TraceCheckUtils]: 5: Hoare triple {5445#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5450#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:54:55,031 INFO L290 TraceCheckUtils]: 6: Hoare triple {5450#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5451#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:54:55,043 INFO L290 TraceCheckUtils]: 7: Hoare triple {5451#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5452#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:54:55,046 INFO L290 TraceCheckUtils]: 8: Hoare triple {5452#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5492#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:55,047 INFO L290 TraceCheckUtils]: 9: Hoare triple {5492#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5496#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:54:55,048 INFO L290 TraceCheckUtils]: 10: Hoare triple {5496#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5500#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:54:55,049 INFO L290 TraceCheckUtils]: 11: Hoare triple {5500#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5504#(and (<= 4 main_~z~0) (<= main_~x~0 (+ (* (div (+ main_~z~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967291)) (<= main_~z~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~z~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:54:55,052 INFO L290 TraceCheckUtils]: 12: Hoare triple {5504#(and (<= 4 main_~z~0) (<= main_~x~0 (+ (* (div (+ main_~z~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967291)) (<= main_~z~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~z~0 main_~x~0) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5508#(and (<= main_~x~0 (+ (* (div (+ main_~z~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967292)) (<= main_~z~0 3) (<= 3 main_~z~0) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= (+ main_~z~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:54:55,054 INFO L290 TraceCheckUtils]: 13: Hoare triple {5508#(and (<= main_~x~0 (+ (* (div (+ main_~z~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967292)) (<= main_~z~0 3) (<= 3 main_~z~0) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= (+ main_~z~0 main_~x~0) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5512#(and (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~z~0 2) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~z~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)) (<= (+ main_~z~0 main_~x~0) main_~n~0) (<= 2 main_~z~0))} is VALID [2022-04-07 22:54:55,059 INFO L290 TraceCheckUtils]: 14: Hoare triple {5512#(and (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~z~0 2) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~z~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)) (<= (+ main_~z~0 main_~x~0) main_~n~0) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5516#(and (<= main_~z~0 1) (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= main_~x~0 (+ 4294967294 (* (div (+ main_~z~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 1 main_~z~0) (<= (+ main_~z~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:54:55,063 INFO L290 TraceCheckUtils]: 15: Hoare triple {5516#(and (<= main_~z~0 1) (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= main_~x~0 (+ 4294967294 (* (div (+ main_~z~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 1 main_~z~0) (<= (+ main_~z~0 main_~x~0) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:55,063 INFO L290 TraceCheckUtils]: 16: Hoare triple {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:55,064 INFO L290 TraceCheckUtils]: 17: Hoare triple {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:55,065 INFO L290 TraceCheckUtils]: 18: Hoare triple {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} is VALID [2022-04-07 22:54:55,066 INFO L290 TraceCheckUtils]: 19: Hoare triple {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-07 22:54:55,067 INFO L290 TraceCheckUtils]: 20: Hoare triple {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:54:55,067 INFO L290 TraceCheckUtils]: 21: Hoare triple {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:54:55,069 INFO L272 TraceCheckUtils]: 22: Hoare triple {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5541#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:54:55,069 INFO L290 TraceCheckUtils]: 23: Hoare triple {5541#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5545#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:54:55,070 INFO L290 TraceCheckUtils]: 24: Hoare triple {5545#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-07 22:54:55,070 INFO L290 TraceCheckUtils]: 25: Hoare triple {5446#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-07 22:54:55,070 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:54:55,070 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:54:56,444 INFO L290 TraceCheckUtils]: 25: Hoare triple {5446#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-07 22:54:56,444 INFO L290 TraceCheckUtils]: 24: Hoare triple {5545#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-07 22:54:56,445 INFO L290 TraceCheckUtils]: 23: Hoare triple {5541#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5545#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:54:56,446 INFO L272 TraceCheckUtils]: 22: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5541#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:54:56,447 INFO L290 TraceCheckUtils]: 21: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:56,448 INFO L290 TraceCheckUtils]: 20: Hoare triple {5567#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:56,449 INFO L290 TraceCheckUtils]: 19: Hoare triple {5571#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5567#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:56,450 INFO L290 TraceCheckUtils]: 18: Hoare triple {5575#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5571#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:54:56,452 INFO L290 TraceCheckUtils]: 17: Hoare triple {5579#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5575#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:56,452 INFO L290 TraceCheckUtils]: 16: Hoare triple {5579#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5579#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:54:56,454 INFO L290 TraceCheckUtils]: 15: Hoare triple {5575#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5579#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:54:56,455 INFO L290 TraceCheckUtils]: 14: Hoare triple {5571#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5575#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:56,456 INFO L290 TraceCheckUtils]: 13: Hoare triple {5567#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5571#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:54:56,458 INFO L290 TraceCheckUtils]: 12: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5567#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:56,458 INFO L290 TraceCheckUtils]: 11: Hoare triple {5598#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:54:56,459 INFO L290 TraceCheckUtils]: 10: Hoare triple {5602#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5598#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:54:56,461 INFO L290 TraceCheckUtils]: 9: Hoare triple {5606#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5602#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:54:56,463 INFO L290 TraceCheckUtils]: 8: Hoare triple {5610#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5606#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:54:56,465 INFO L290 TraceCheckUtils]: 7: Hoare triple {5614#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5610#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:54:56,467 INFO L290 TraceCheckUtils]: 6: Hoare triple {5618#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5614#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:54:56,468 INFO L290 TraceCheckUtils]: 5: Hoare triple {5445#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5618#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 22:54:56,468 INFO L272 TraceCheckUtils]: 4: Hoare triple {5445#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:56,468 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5445#true} {5445#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:56,468 INFO L290 TraceCheckUtils]: 2: Hoare triple {5445#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:56,469 INFO L290 TraceCheckUtils]: 1: Hoare triple {5445#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5445#true} is VALID [2022-04-07 22:54:56,469 INFO L272 TraceCheckUtils]: 0: Hoare triple {5445#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-07 22:54:56,469 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:54:56,469 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [584131881] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:54:56,469 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:54:56,469 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19, 15] total 36 [2022-04-07 22:54:56,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495928193] [2022-04-07 22:54:56,470 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:54:56,470 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 22:54:56,470 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:54:56,470 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:54:56,631 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:54:56,631 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-07 22:54:56,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:54:56,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-07 22:54:56,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=145, Invalid=1115, Unknown=0, NotChecked=0, Total=1260 [2022-04-07 22:54:56,632 INFO L87 Difference]: Start difference. First operand 82 states and 110 transitions. Second operand has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:13,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:55:13,334 INFO L93 Difference]: Finished difference Result 140 states and 178 transitions. [2022-04-07 22:55:13,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2022-04-07 22:55:13,334 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 22:55:13,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:55:13,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:13,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 89 transitions. [2022-04-07 22:55:13,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:13,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 89 transitions. [2022-04-07 22:55:13,337 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 41 states and 89 transitions. [2022-04-07 22:55:15,126 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:55:15,127 INFO L225 Difference]: With dead ends: 140 [2022-04-07 22:55:15,127 INFO L226 Difference]: Without dead ends: 105 [2022-04-07 22:55:15,129 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 32 SyntacticMatches, 6 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1230 ImplicationChecksByTransitivity, 12.8s TimeCoverageRelationStatistics Valid=583, Invalid=4819, Unknown=0, NotChecked=0, Total=5402 [2022-04-07 22:55:15,129 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 91 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 639 mSolverCounterSat, 104 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 743 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 104 IncrementalHoareTripleChecker+Valid, 639 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:55:15,129 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [91 Valid, 98 Invalid, 743 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [104 Valid, 639 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2022-04-07 22:55:15,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2022-04-07 22:55:15,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 76. [2022-04-07 22:55:15,445 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:55:15,445 INFO L82 GeneralOperation]: Start isEquivalent. First operand 105 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:15,445 INFO L74 IsIncluded]: Start isIncluded. First operand 105 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:15,445 INFO L87 Difference]: Start difference. First operand 105 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:15,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:55:15,448 INFO L93 Difference]: Finished difference Result 105 states and 138 transitions. [2022-04-07 22:55:15,448 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 138 transitions. [2022-04-07 22:55:15,448 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:55:15,448 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:55:15,448 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 105 states. [2022-04-07 22:55:15,448 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 105 states. [2022-04-07 22:55:15,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:55:15,450 INFO L93 Difference]: Finished difference Result 105 states and 138 transitions. [2022-04-07 22:55:15,450 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 138 transitions. [2022-04-07 22:55:15,451 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:55:15,451 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:55:15,451 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:55:15,451 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:55:15,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:15,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 103 transitions. [2022-04-07 22:55:15,452 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 103 transitions. Word has length 26 [2022-04-07 22:55:15,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:55:15,453 INFO L478 AbstractCegarLoop]: Abstraction has 76 states and 103 transitions. [2022-04-07 22:55:15,453 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:15,453 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 103 transitions. [2022-04-07 22:55:15,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 22:55:15,453 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:55:15,453 INFO L499 BasicCegarLoop]: trace histogram [7, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:55:15,479 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-07 22:55:15,679 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-07 22:55:15,680 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:55:15,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:55:15,680 INFO L85 PathProgramCache]: Analyzing trace with hash -1028834537, now seen corresponding path program 9 times [2022-04-07 22:55:15,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:55:15,680 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090688068] [2022-04-07 22:55:15,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:55:15,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:55:15,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:55:15,884 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:55:15,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:55:15,888 INFO L290 TraceCheckUtils]: 0: Hoare triple {6285#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6267#true} is VALID [2022-04-07 22:55:15,888 INFO L290 TraceCheckUtils]: 1: Hoare triple {6267#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:15,888 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6267#true} {6267#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:15,889 INFO L272 TraceCheckUtils]: 0: Hoare triple {6267#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6285#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:55:15,889 INFO L290 TraceCheckUtils]: 1: Hoare triple {6285#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6267#true} is VALID [2022-04-07 22:55:15,889 INFO L290 TraceCheckUtils]: 2: Hoare triple {6267#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:15,889 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6267#true} {6267#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:15,889 INFO L272 TraceCheckUtils]: 4: Hoare triple {6267#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:15,889 INFO L290 TraceCheckUtils]: 5: Hoare triple {6267#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6272#(= main_~y~0 0)} is VALID [2022-04-07 22:55:15,890 INFO L290 TraceCheckUtils]: 6: Hoare triple {6272#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6273#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:55:15,890 INFO L290 TraceCheckUtils]: 7: Hoare triple {6273#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6274#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:55:15,891 INFO L290 TraceCheckUtils]: 8: Hoare triple {6274#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6275#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:55:15,892 INFO L290 TraceCheckUtils]: 9: Hoare triple {6275#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6276#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:55:15,892 INFO L290 TraceCheckUtils]: 10: Hoare triple {6276#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6277#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:55:15,893 INFO L290 TraceCheckUtils]: 11: Hoare triple {6277#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6278#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:55:15,893 INFO L290 TraceCheckUtils]: 12: Hoare triple {6278#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6279#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:55:15,894 INFO L290 TraceCheckUtils]: 13: Hoare triple {6279#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6279#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:55:15,894 INFO L290 TraceCheckUtils]: 14: Hoare triple {6279#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6280#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 22:55:15,895 INFO L290 TraceCheckUtils]: 15: Hoare triple {6280#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6281#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 22:55:15,895 INFO L290 TraceCheckUtils]: 16: Hoare triple {6281#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6282#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 22:55:15,896 INFO L290 TraceCheckUtils]: 17: Hoare triple {6282#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6283#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:55:15,896 INFO L290 TraceCheckUtils]: 18: Hoare triple {6283#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6284#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:55:15,897 INFO L290 TraceCheckUtils]: 19: Hoare triple {6284#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:15,897 INFO L290 TraceCheckUtils]: 20: Hoare triple {6268#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6268#false} is VALID [2022-04-07 22:55:15,897 INFO L290 TraceCheckUtils]: 21: Hoare triple {6268#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6268#false} is VALID [2022-04-07 22:55:15,897 INFO L290 TraceCheckUtils]: 22: Hoare triple {6268#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:15,897 INFO L272 TraceCheckUtils]: 23: Hoare triple {6268#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6268#false} is VALID [2022-04-07 22:55:15,897 INFO L290 TraceCheckUtils]: 24: Hoare triple {6268#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6268#false} is VALID [2022-04-07 22:55:15,897 INFO L290 TraceCheckUtils]: 25: Hoare triple {6268#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:15,897 INFO L290 TraceCheckUtils]: 26: Hoare triple {6268#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:15,897 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:55:15,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:55:15,898 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090688068] [2022-04-07 22:55:15,898 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1090688068] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:55:15,898 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1241285191] [2022-04-07 22:55:15,898 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:55:15,898 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:55:15,898 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:55:15,899 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:55:15,899 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-07 22:55:15,943 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 22:55:15,944 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:55:15,944 INFO L263 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 22:55:15,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:55:15,951 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:55:16,102 INFO L272 TraceCheckUtils]: 0: Hoare triple {6267#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 1: Hoare triple {6267#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 2: Hoare triple {6267#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6267#true} {6267#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L272 TraceCheckUtils]: 4: Hoare triple {6267#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 5: Hoare triple {6267#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 6: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 7: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 8: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 9: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 10: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,103 INFO L290 TraceCheckUtils]: 11: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,104 INFO L290 TraceCheckUtils]: 12: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,104 INFO L290 TraceCheckUtils]: 13: Hoare triple {6267#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,104 INFO L290 TraceCheckUtils]: 14: Hoare triple {6267#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6331#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 22:55:16,104 INFO L290 TraceCheckUtils]: 15: Hoare triple {6331#(= main_~z~0 main_~y~0)} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6335#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-07 22:55:16,105 INFO L290 TraceCheckUtils]: 16: Hoare triple {6335#(= main_~y~0 (+ main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6339#(= (+ main_~z~0 1) (+ (- 1) main_~y~0))} is VALID [2022-04-07 22:55:16,106 INFO L290 TraceCheckUtils]: 17: Hoare triple {6339#(= (+ main_~z~0 1) (+ (- 1) main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:55:16,106 INFO L290 TraceCheckUtils]: 18: Hoare triple {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:55:16,106 INFO L290 TraceCheckUtils]: 19: Hoare triple {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:55:16,107 INFO L290 TraceCheckUtils]: 20: Hoare triple {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6353#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:55:16,108 INFO L290 TraceCheckUtils]: 21: Hoare triple {6353#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6357#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:55:16,108 INFO L290 TraceCheckUtils]: 22: Hoare triple {6357#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:16,108 INFO L272 TraceCheckUtils]: 23: Hoare triple {6268#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6268#false} is VALID [2022-04-07 22:55:16,109 INFO L290 TraceCheckUtils]: 24: Hoare triple {6268#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6268#false} is VALID [2022-04-07 22:55:16,109 INFO L290 TraceCheckUtils]: 25: Hoare triple {6268#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:16,109 INFO L290 TraceCheckUtils]: 26: Hoare triple {6268#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:16,109 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-07 22:55:16,109 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:55:16,256 INFO L290 TraceCheckUtils]: 26: Hoare triple {6268#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:16,256 INFO L290 TraceCheckUtils]: 25: Hoare triple {6268#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:16,256 INFO L290 TraceCheckUtils]: 24: Hoare triple {6268#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6268#false} is VALID [2022-04-07 22:55:16,256 INFO L272 TraceCheckUtils]: 23: Hoare triple {6268#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6268#false} is VALID [2022-04-07 22:55:16,257 INFO L290 TraceCheckUtils]: 22: Hoare triple {6357#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6268#false} is VALID [2022-04-07 22:55:16,257 INFO L290 TraceCheckUtils]: 21: Hoare triple {6353#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6357#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:55:16,258 INFO L290 TraceCheckUtils]: 20: Hoare triple {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6353#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:55:16,258 INFO L290 TraceCheckUtils]: 19: Hoare triple {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:55:16,259 INFO L290 TraceCheckUtils]: 18: Hoare triple {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:55:16,259 INFO L290 TraceCheckUtils]: 17: Hoare triple {6400#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6343#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:55:16,260 INFO L290 TraceCheckUtils]: 16: Hoare triple {6404#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6400#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 22:55:16,261 INFO L290 TraceCheckUtils]: 15: Hoare triple {6408#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6404#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:55:16,261 INFO L290 TraceCheckUtils]: 14: Hoare triple {6267#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6408#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:55:16,261 INFO L290 TraceCheckUtils]: 13: Hoare triple {6267#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,261 INFO L290 TraceCheckUtils]: 12: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,261 INFO L290 TraceCheckUtils]: 11: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,261 INFO L290 TraceCheckUtils]: 10: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L290 TraceCheckUtils]: 9: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L290 TraceCheckUtils]: 8: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L290 TraceCheckUtils]: 7: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L290 TraceCheckUtils]: 6: Hoare triple {6267#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L290 TraceCheckUtils]: 5: Hoare triple {6267#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L272 TraceCheckUtils]: 4: Hoare triple {6267#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6267#true} {6267#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L290 TraceCheckUtils]: 2: Hoare triple {6267#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L290 TraceCheckUtils]: 1: Hoare triple {6267#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L272 TraceCheckUtils]: 0: Hoare triple {6267#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6267#true} is VALID [2022-04-07 22:55:16,262 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-07 22:55:16,263 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1241285191] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:55:16,263 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:55:16,263 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8, 8] total 25 [2022-04-07 22:55:16,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234980603] [2022-04-07 22:55:16,263 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:55:16,263 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:55:16,264 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:55:16,264 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:16,295 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:55:16,295 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-07 22:55:16,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:55:16,295 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-07 22:55:16,296 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=501, Unknown=0, NotChecked=0, Total=600 [2022-04-07 22:55:16,296 INFO L87 Difference]: Start difference. First operand 76 states and 103 transitions. Second operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:19,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:55:19,206 INFO L93 Difference]: Finished difference Result 128 states and 172 transitions. [2022-04-07 22:55:19,206 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-04-07 22:55:19,206 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:55:19,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:55:19,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:19,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 106 transitions. [2022-04-07 22:55:19,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:19,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 106 transitions. [2022-04-07 22:55:19,208 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 39 states and 106 transitions. [2022-04-07 22:55:19,312 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:55:19,313 INFO L225 Difference]: With dead ends: 128 [2022-04-07 22:55:19,314 INFO L226 Difference]: Without dead ends: 114 [2022-04-07 22:55:19,315 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 696 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=649, Invalid=3011, Unknown=0, NotChecked=0, Total=3660 [2022-04-07 22:55:19,315 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 104 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 764 mSolverCounterSat, 160 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 104 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 924 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 160 IncrementalHoareTripleChecker+Valid, 764 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-07 22:55:19,315 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [104 Valid, 99 Invalid, 924 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [160 Valid, 764 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-07 22:55:19,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2022-04-07 22:55:19,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 83. [2022-04-07 22:55:19,700 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:55:19,701 INFO L82 GeneralOperation]: Start isEquivalent. First operand 114 states. Second operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:19,701 INFO L74 IsIncluded]: Start isIncluded. First operand 114 states. Second operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:19,701 INFO L87 Difference]: Start difference. First operand 114 states. Second operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:19,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:55:19,703 INFO L93 Difference]: Finished difference Result 114 states and 143 transitions. [2022-04-07 22:55:19,703 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 143 transitions. [2022-04-07 22:55:19,707 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:55:19,707 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:55:19,707 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 114 states. [2022-04-07 22:55:19,708 INFO L87 Difference]: Start difference. First operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 114 states. [2022-04-07 22:55:19,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:55:19,710 INFO L93 Difference]: Finished difference Result 114 states and 143 transitions. [2022-04-07 22:55:19,710 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 143 transitions. [2022-04-07 22:55:19,710 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:55:19,710 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:55:19,710 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:55:19,710 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:55:19,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:19,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 105 transitions. [2022-04-07 22:55:19,712 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 105 transitions. Word has length 27 [2022-04-07 22:55:19,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:55:19,712 INFO L478 AbstractCegarLoop]: Abstraction has 83 states and 105 transitions. [2022-04-07 22:55:19,713 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:19,713 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 105 transitions. [2022-04-07 22:55:19,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 22:55:19,713 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:55:19,713 INFO L499 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:55:19,735 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-07 22:55:19,927 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-07 22:55:19,928 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:55:19,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:55:19,928 INFO L85 PathProgramCache]: Analyzing trace with hash 1035576247, now seen corresponding path program 3 times [2022-04-07 22:55:19,928 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:55:19,928 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763446589] [2022-04-07 22:55:19,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:55:19,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:55:19,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:55:20,178 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:55:20,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:55:20,182 INFO L290 TraceCheckUtils]: 0: Hoare triple {7115#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7095#true} is VALID [2022-04-07 22:55:20,182 INFO L290 TraceCheckUtils]: 1: Hoare triple {7095#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,182 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7095#true} {7095#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,182 INFO L272 TraceCheckUtils]: 0: Hoare triple {7095#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7115#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:55:20,182 INFO L290 TraceCheckUtils]: 1: Hoare triple {7115#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7095#true} is VALID [2022-04-07 22:55:20,182 INFO L290 TraceCheckUtils]: 2: Hoare triple {7095#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,182 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7095#true} {7095#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,183 INFO L272 TraceCheckUtils]: 4: Hoare triple {7095#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,183 INFO L290 TraceCheckUtils]: 5: Hoare triple {7095#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7100#(= main_~y~0 0)} is VALID [2022-04-07 22:55:20,184 INFO L290 TraceCheckUtils]: 6: Hoare triple {7100#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7101#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:55:20,184 INFO L290 TraceCheckUtils]: 7: Hoare triple {7101#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7102#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:55:20,185 INFO L290 TraceCheckUtils]: 8: Hoare triple {7102#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7103#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:55:20,186 INFO L290 TraceCheckUtils]: 9: Hoare triple {7103#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7104#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:55:20,187 INFO L290 TraceCheckUtils]: 10: Hoare triple {7104#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7105#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:55:20,187 INFO L290 TraceCheckUtils]: 11: Hoare triple {7105#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7106#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:55:20,188 INFO L290 TraceCheckUtils]: 12: Hoare triple {7106#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7107#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:55:20,189 INFO L290 TraceCheckUtils]: 13: Hoare triple {7107#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7108#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 22:55:20,190 INFO L290 TraceCheckUtils]: 14: Hoare triple {7108#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7109#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 22:55:20,190 INFO L290 TraceCheckUtils]: 15: Hoare triple {7109#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7110#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 22:55:20,191 INFO L290 TraceCheckUtils]: 16: Hoare triple {7110#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7111#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:55:20,192 INFO L290 TraceCheckUtils]: 17: Hoare triple {7111#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7112#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 22:55:20,193 INFO L290 TraceCheckUtils]: 18: Hoare triple {7112#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7113#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:55:20,193 INFO L290 TraceCheckUtils]: 19: Hoare triple {7113#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7113#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:55:20,194 INFO L290 TraceCheckUtils]: 20: Hoare triple {7113#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7114#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:55:20,194 INFO L290 TraceCheckUtils]: 21: Hoare triple {7114#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:20,194 INFO L290 TraceCheckUtils]: 22: Hoare triple {7096#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:20,194 INFO L272 TraceCheckUtils]: 23: Hoare triple {7096#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7096#false} is VALID [2022-04-07 22:55:20,195 INFO L290 TraceCheckUtils]: 24: Hoare triple {7096#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7096#false} is VALID [2022-04-07 22:55:20,195 INFO L290 TraceCheckUtils]: 25: Hoare triple {7096#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:20,195 INFO L290 TraceCheckUtils]: 26: Hoare triple {7096#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:20,195 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:55:20,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:55:20,195 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1763446589] [2022-04-07 22:55:20,195 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1763446589] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:55:20,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [134829981] [2022-04-07 22:55:20,196 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:55:20,196 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:55:20,196 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:55:20,199 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:55:20,221 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-07 22:55:20,338 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-04-07 22:55:20,338 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:55:20,339 INFO L263 TraceCheckSpWp]: Trace formula consists of 124 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-07 22:55:20,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:55:20,348 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:55:20,632 INFO L272 TraceCheckUtils]: 0: Hoare triple {7095#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,632 INFO L290 TraceCheckUtils]: 1: Hoare triple {7095#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7095#true} is VALID [2022-04-07 22:55:20,632 INFO L290 TraceCheckUtils]: 2: Hoare triple {7095#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,633 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7095#true} {7095#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,633 INFO L272 TraceCheckUtils]: 4: Hoare triple {7095#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:20,633 INFO L290 TraceCheckUtils]: 5: Hoare triple {7095#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7100#(= main_~y~0 0)} is VALID [2022-04-07 22:55:20,633 INFO L290 TraceCheckUtils]: 6: Hoare triple {7100#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7101#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:55:20,634 INFO L290 TraceCheckUtils]: 7: Hoare triple {7101#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7102#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:55:20,635 INFO L290 TraceCheckUtils]: 8: Hoare triple {7102#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7103#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:55:20,635 INFO L290 TraceCheckUtils]: 9: Hoare triple {7103#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7104#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:55:20,636 INFO L290 TraceCheckUtils]: 10: Hoare triple {7104#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7105#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:55:20,637 INFO L290 TraceCheckUtils]: 11: Hoare triple {7105#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7106#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:55:20,638 INFO L290 TraceCheckUtils]: 12: Hoare triple {7106#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7107#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:55:20,638 INFO L290 TraceCheckUtils]: 13: Hoare triple {7107#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7108#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 22:55:20,639 INFO L290 TraceCheckUtils]: 14: Hoare triple {7108#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7109#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 22:55:20,640 INFO L290 TraceCheckUtils]: 15: Hoare triple {7109#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7110#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 22:55:20,640 INFO L290 TraceCheckUtils]: 16: Hoare triple {7110#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7111#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:55:20,641 INFO L290 TraceCheckUtils]: 17: Hoare triple {7111#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7112#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 22:55:20,642 INFO L290 TraceCheckUtils]: 18: Hoare triple {7112#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7113#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:55:20,642 INFO L290 TraceCheckUtils]: 19: Hoare triple {7113#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7113#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:55:20,642 INFO L290 TraceCheckUtils]: 20: Hoare triple {7113#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7179#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 22:55:20,643 INFO L290 TraceCheckUtils]: 21: Hoare triple {7179#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:20,643 INFO L290 TraceCheckUtils]: 22: Hoare triple {7096#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:20,643 INFO L272 TraceCheckUtils]: 23: Hoare triple {7096#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7096#false} is VALID [2022-04-07 22:55:20,643 INFO L290 TraceCheckUtils]: 24: Hoare triple {7096#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7096#false} is VALID [2022-04-07 22:55:20,643 INFO L290 TraceCheckUtils]: 25: Hoare triple {7096#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:20,644 INFO L290 TraceCheckUtils]: 26: Hoare triple {7096#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:20,644 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:55:20,644 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:55:21,093 INFO L290 TraceCheckUtils]: 26: Hoare triple {7096#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:21,094 INFO L290 TraceCheckUtils]: 25: Hoare triple {7096#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:21,094 INFO L290 TraceCheckUtils]: 24: Hoare triple {7096#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7096#false} is VALID [2022-04-07 22:55:21,094 INFO L272 TraceCheckUtils]: 23: Hoare triple {7096#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7096#false} is VALID [2022-04-07 22:55:21,094 INFO L290 TraceCheckUtils]: 22: Hoare triple {7096#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:21,095 INFO L290 TraceCheckUtils]: 21: Hoare triple {7213#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7096#false} is VALID [2022-04-07 22:55:21,096 INFO L290 TraceCheckUtils]: 20: Hoare triple {7217#(< 0 (mod main_~y~0 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7213#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:55:21,096 INFO L290 TraceCheckUtils]: 19: Hoare triple {7217#(< 0 (mod main_~y~0 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7217#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:55:21,097 INFO L290 TraceCheckUtils]: 18: Hoare triple {7224#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7217#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:55:21,098 INFO L290 TraceCheckUtils]: 17: Hoare triple {7228#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7224#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:55:21,099 INFO L290 TraceCheckUtils]: 16: Hoare triple {7232#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7228#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:55:21,100 INFO L290 TraceCheckUtils]: 15: Hoare triple {7236#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7232#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:55:21,101 INFO L290 TraceCheckUtils]: 14: Hoare triple {7240#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7236#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:55:21,101 INFO L290 TraceCheckUtils]: 13: Hoare triple {7244#(< 0 (mod (+ main_~y~0 6) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7240#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 22:55:21,102 INFO L290 TraceCheckUtils]: 12: Hoare triple {7248#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7244#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 22:55:21,103 INFO L290 TraceCheckUtils]: 11: Hoare triple {7252#(< 0 (mod (+ main_~y~0 8) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7248#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 22:55:21,104 INFO L290 TraceCheckUtils]: 10: Hoare triple {7256#(< 0 (mod (+ main_~y~0 9) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7252#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 22:55:21,105 INFO L290 TraceCheckUtils]: 9: Hoare triple {7260#(< 0 (mod (+ main_~y~0 10) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7256#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 22:55:21,106 INFO L290 TraceCheckUtils]: 8: Hoare triple {7264#(< 0 (mod (+ main_~y~0 11) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7260#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 22:55:21,107 INFO L290 TraceCheckUtils]: 7: Hoare triple {7268#(< 0 (mod (+ main_~y~0 12) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7264#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 22:55:21,107 INFO L290 TraceCheckUtils]: 6: Hoare triple {7272#(< 0 (mod (+ main_~y~0 13) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7268#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-07 22:55:21,108 INFO L290 TraceCheckUtils]: 5: Hoare triple {7095#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7272#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-07 22:55:21,108 INFO L272 TraceCheckUtils]: 4: Hoare triple {7095#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:21,108 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7095#true} {7095#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:21,108 INFO L290 TraceCheckUtils]: 2: Hoare triple {7095#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:21,108 INFO L290 TraceCheckUtils]: 1: Hoare triple {7095#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7095#true} is VALID [2022-04-07 22:55:21,109 INFO L272 TraceCheckUtils]: 0: Hoare triple {7095#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7095#true} is VALID [2022-04-07 22:55:21,109 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:55:21,109 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [134829981] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:55:21,109 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:55:21,109 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 34 [2022-04-07 22:55:21,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149117212] [2022-04-07 22:55:21,109 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:55:21,110 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:55:21,110 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:55:21,110 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:21,147 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:55:21,147 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-07 22:55:21,147 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:55:21,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-07 22:55:21,148 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=859, Unknown=0, NotChecked=0, Total=1122 [2022-04-07 22:55:21,148 INFO L87 Difference]: Start difference. First operand 83 states and 105 transitions. Second operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:55:32,809 WARN L232 SmtUtils]: Spent 5.48s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 22:55:58,937 WARN L232 SmtUtils]: Spent 6.10s on a formula simplification that was a NOOP. DAG size: 63 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 22:56:32,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:56:32,513 INFO L93 Difference]: Finished difference Result 399 states and 542 transitions. [2022-04-07 22:56:32,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2022-04-07 22:56:32,513 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:56:32,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:56:32,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:32,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 249 transitions. [2022-04-07 22:56:32,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:32,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 249 transitions. [2022-04-07 22:56:32,520 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 68 states and 249 transitions. [2022-04-07 22:56:35,421 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 249 edges. 249 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:56:35,431 INFO L225 Difference]: With dead ends: 399 [2022-04-07 22:56:35,431 INFO L226 Difference]: Without dead ends: 371 [2022-04-07 22:56:35,435 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2585 ImplicationChecksByTransitivity, 65.0s TimeCoverageRelationStatistics Valid=2476, Invalid=7225, Unknown=1, NotChecked=0, Total=9702 [2022-04-07 22:56:35,435 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 932 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 1093 mSolverCounterSat, 720 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 932 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 1813 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 720 IncrementalHoareTripleChecker+Valid, 1093 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:56:35,435 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [932 Valid, 105 Invalid, 1813 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [720 Valid, 1093 Invalid, 0 Unknown, 0 Unchecked, 3.1s Time] [2022-04-07 22:56:35,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2022-04-07 22:56:36,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 122. [2022-04-07 22:56:36,120 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:56:36,121 INFO L82 GeneralOperation]: Start isEquivalent. First operand 371 states. Second operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:36,121 INFO L74 IsIncluded]: Start isIncluded. First operand 371 states. Second operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:36,121 INFO L87 Difference]: Start difference. First operand 371 states. Second operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:36,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:56:36,130 INFO L93 Difference]: Finished difference Result 371 states and 478 transitions. [2022-04-07 22:56:36,130 INFO L276 IsEmpty]: Start isEmpty. Operand 371 states and 478 transitions. [2022-04-07 22:56:36,130 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:56:36,130 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:56:36,131 INFO L74 IsIncluded]: Start isIncluded. First operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 371 states. [2022-04-07 22:56:36,131 INFO L87 Difference]: Start difference. First operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 371 states. [2022-04-07 22:56:36,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:56:36,139 INFO L93 Difference]: Finished difference Result 371 states and 478 transitions. [2022-04-07 22:56:36,139 INFO L276 IsEmpty]: Start isEmpty. Operand 371 states and 478 transitions. [2022-04-07 22:56:36,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:56:36,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:56:36,140 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:56:36,140 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:56:36,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:36,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 161 transitions. [2022-04-07 22:56:36,143 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 161 transitions. Word has length 27 [2022-04-07 22:56:36,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:56:36,143 INFO L478 AbstractCegarLoop]: Abstraction has 122 states and 161 transitions. [2022-04-07 22:56:36,143 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:36,143 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 161 transitions. [2022-04-07 22:56:36,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 22:56:36,144 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:56:36,144 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:56:36,150 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-07 22:56:36,350 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-07 22:56:36,351 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:56:36,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:56:36,351 INFO L85 PathProgramCache]: Analyzing trace with hash 627420638, now seen corresponding path program 10 times [2022-04-07 22:56:36,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:56:36,351 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1386126902] [2022-04-07 22:56:36,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:56:36,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:56:36,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:56:36,541 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:56:36,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:56:36,546 INFO L290 TraceCheckUtils]: 0: Hoare triple {8950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8934#true} is VALID [2022-04-07 22:56:36,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {8934#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,547 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8934#true} {8934#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,547 INFO L272 TraceCheckUtils]: 0: Hoare triple {8934#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:56:36,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {8950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8934#true} is VALID [2022-04-07 22:56:36,548 INFO L290 TraceCheckUtils]: 2: Hoare triple {8934#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,548 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8934#true} {8934#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,548 INFO L272 TraceCheckUtils]: 4: Hoare triple {8934#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {8934#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8939#(= main_~y~0 0)} is VALID [2022-04-07 22:56:36,549 INFO L290 TraceCheckUtils]: 6: Hoare triple {8939#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8940#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:56:36,549 INFO L290 TraceCheckUtils]: 7: Hoare triple {8940#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8941#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:56:36,550 INFO L290 TraceCheckUtils]: 8: Hoare triple {8941#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8942#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:56:36,551 INFO L290 TraceCheckUtils]: 9: Hoare triple {8942#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8943#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:56:36,551 INFO L290 TraceCheckUtils]: 10: Hoare triple {8943#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8944#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:36,552 INFO L290 TraceCheckUtils]: 11: Hoare triple {8944#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8944#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:36,552 INFO L290 TraceCheckUtils]: 12: Hoare triple {8944#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8945#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 22:56:36,553 INFO L290 TraceCheckUtils]: 13: Hoare triple {8945#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8946#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:56:36,554 INFO L290 TraceCheckUtils]: 14: Hoare triple {8946#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8947#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 22:56:36,554 INFO L290 TraceCheckUtils]: 15: Hoare triple {8947#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8948#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:56:36,555 INFO L290 TraceCheckUtils]: 16: Hoare triple {8948#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8949#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:56:36,556 INFO L290 TraceCheckUtils]: 17: Hoare triple {8949#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:36,556 INFO L290 TraceCheckUtils]: 18: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,556 INFO L290 TraceCheckUtils]: 19: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,556 INFO L290 TraceCheckUtils]: 20: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,556 INFO L290 TraceCheckUtils]: 21: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,556 INFO L290 TraceCheckUtils]: 22: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,556 INFO L290 TraceCheckUtils]: 23: Hoare triple {8935#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:36,556 INFO L272 TraceCheckUtils]: 24: Hoare triple {8935#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8935#false} is VALID [2022-04-07 22:56:36,556 INFO L290 TraceCheckUtils]: 25: Hoare triple {8935#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8935#false} is VALID [2022-04-07 22:56:36,557 INFO L290 TraceCheckUtils]: 26: Hoare triple {8935#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:36,557 INFO L290 TraceCheckUtils]: 27: Hoare triple {8935#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:36,557 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 22:56:36,557 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:56:36,557 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1386126902] [2022-04-07 22:56:36,557 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1386126902] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:56:36,557 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [623242335] [2022-04-07 22:56:36,557 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:56:36,558 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:56:36,558 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:56:36,559 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:56:36,583 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-07 22:56:36,609 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:56:36,609 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:56:36,610 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-07 22:56:36,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:56:36,618 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:56:36,826 INFO L272 TraceCheckUtils]: 0: Hoare triple {8934#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,826 INFO L290 TraceCheckUtils]: 1: Hoare triple {8934#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8934#true} is VALID [2022-04-07 22:56:36,826 INFO L290 TraceCheckUtils]: 2: Hoare triple {8934#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,827 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8934#true} {8934#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,827 INFO L272 TraceCheckUtils]: 4: Hoare triple {8934#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:36,827 INFO L290 TraceCheckUtils]: 5: Hoare triple {8934#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8939#(= main_~y~0 0)} is VALID [2022-04-07 22:56:36,827 INFO L290 TraceCheckUtils]: 6: Hoare triple {8939#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8940#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:56:36,828 INFO L290 TraceCheckUtils]: 7: Hoare triple {8940#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8941#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:56:36,828 INFO L290 TraceCheckUtils]: 8: Hoare triple {8941#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8942#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:56:36,829 INFO L290 TraceCheckUtils]: 9: Hoare triple {8942#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8943#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:56:36,830 INFO L290 TraceCheckUtils]: 10: Hoare triple {8943#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8944#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:36,830 INFO L290 TraceCheckUtils]: 11: Hoare triple {8944#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8944#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:36,830 INFO L290 TraceCheckUtils]: 12: Hoare triple {8944#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8990#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:36,831 INFO L290 TraceCheckUtils]: 13: Hoare triple {8990#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8994#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:56:36,831 INFO L290 TraceCheckUtils]: 14: Hoare triple {8994#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8998#(and (= main_~y~0 (+ main_~z~0 2)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:36,832 INFO L290 TraceCheckUtils]: 15: Hoare triple {8998#(and (= main_~y~0 (+ main_~z~0 2)) (<= 5 main_~y~0) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9002#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 3)) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:36,833 INFO L290 TraceCheckUtils]: 16: Hoare triple {9002#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 3)) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9006#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 4)) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:36,833 INFO L290 TraceCheckUtils]: 17: Hoare triple {9006#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 4)) (<= main_~y~0 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:36,833 INFO L290 TraceCheckUtils]: 18: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,833 INFO L290 TraceCheckUtils]: 19: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,833 INFO L290 TraceCheckUtils]: 20: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,833 INFO L290 TraceCheckUtils]: 21: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,833 INFO L290 TraceCheckUtils]: 22: Hoare triple {8935#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:36,833 INFO L290 TraceCheckUtils]: 23: Hoare triple {8935#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:36,834 INFO L272 TraceCheckUtils]: 24: Hoare triple {8935#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8935#false} is VALID [2022-04-07 22:56:36,834 INFO L290 TraceCheckUtils]: 25: Hoare triple {8935#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8935#false} is VALID [2022-04-07 22:56:36,834 INFO L290 TraceCheckUtils]: 26: Hoare triple {8935#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:36,834 INFO L290 TraceCheckUtils]: 27: Hoare triple {8935#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:36,834 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 22:56:36,834 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:56:37,131 INFO L290 TraceCheckUtils]: 27: Hoare triple {8935#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:37,131 INFO L290 TraceCheckUtils]: 26: Hoare triple {8935#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:37,131 INFO L290 TraceCheckUtils]: 25: Hoare triple {8935#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8935#false} is VALID [2022-04-07 22:56:37,131 INFO L272 TraceCheckUtils]: 24: Hoare triple {8935#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8935#false} is VALID [2022-04-07 22:56:37,131 INFO L290 TraceCheckUtils]: 23: Hoare triple {8935#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8935#false} is VALID [2022-04-07 22:56:37,132 INFO L290 TraceCheckUtils]: 22: Hoare triple {9055#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8935#false} is VALID [2022-04-07 22:56:37,133 INFO L290 TraceCheckUtils]: 21: Hoare triple {9059#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9055#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:56:37,133 INFO L290 TraceCheckUtils]: 20: Hoare triple {9063#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9059#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:56:37,134 INFO L290 TraceCheckUtils]: 19: Hoare triple {9067#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9063#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:56:37,135 INFO L290 TraceCheckUtils]: 18: Hoare triple {9071#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9067#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:56:37,135 INFO L290 TraceCheckUtils]: 17: Hoare triple {9075#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {9071#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 22:56:37,136 INFO L290 TraceCheckUtils]: 16: Hoare triple {9079#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9075#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 22:56:37,137 INFO L290 TraceCheckUtils]: 15: Hoare triple {9083#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9079#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 22:56:37,140 INFO L290 TraceCheckUtils]: 14: Hoare triple {9087#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9083#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 22:56:37,141 INFO L290 TraceCheckUtils]: 13: Hoare triple {9091#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9087#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 22:56:37,141 INFO L290 TraceCheckUtils]: 12: Hoare triple {8934#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {9091#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 22:56:37,141 INFO L290 TraceCheckUtils]: 11: Hoare triple {8934#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:37,141 INFO L290 TraceCheckUtils]: 10: Hoare triple {8934#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8934#true} is VALID [2022-04-07 22:56:37,141 INFO L290 TraceCheckUtils]: 9: Hoare triple {8934#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L290 TraceCheckUtils]: 8: Hoare triple {8934#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L290 TraceCheckUtils]: 7: Hoare triple {8934#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L290 TraceCheckUtils]: 6: Hoare triple {8934#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L290 TraceCheckUtils]: 5: Hoare triple {8934#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L272 TraceCheckUtils]: 4: Hoare triple {8934#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8934#true} {8934#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L290 TraceCheckUtils]: 2: Hoare triple {8934#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L290 TraceCheckUtils]: 1: Hoare triple {8934#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L272 TraceCheckUtils]: 0: Hoare triple {8934#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8934#true} is VALID [2022-04-07 22:56:37,142 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 22:56:37,142 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [623242335] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:56:37,142 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:56:37,143 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 12] total 29 [2022-04-07 22:56:37,143 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672232661] [2022-04-07 22:56:37,143 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:56:37,143 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 22:56:37,143 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:56:37,144 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:37,178 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:56:37,178 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-07 22:56:37,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:56:37,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-07 22:56:37,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=685, Unknown=0, NotChecked=0, Total=812 [2022-04-07 22:56:37,179 INFO L87 Difference]: Start difference. First operand 122 states and 161 transitions. Second operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:40,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:56:40,104 INFO L93 Difference]: Finished difference Result 209 states and 264 transitions. [2022-04-07 22:56:40,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-07 22:56:40,104 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 22:56:40,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:56:40,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:40,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 76 transitions. [2022-04-07 22:56:40,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:40,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 76 transitions. [2022-04-07 22:56:40,107 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 76 transitions. [2022-04-07 22:56:40,208 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:56:40,210 INFO L225 Difference]: With dead ends: 209 [2022-04-07 22:56:40,211 INFO L226 Difference]: Without dead ends: 159 [2022-04-07 22:56:40,212 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 49 SyntacticMatches, 1 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 600 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=405, Invalid=2787, Unknown=0, NotChecked=0, Total=3192 [2022-04-07 22:56:40,212 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 31 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 477 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 546 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 477 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 22:56:40,213 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 89 Invalid, 546 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 477 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-07 22:56:40,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2022-04-07 22:56:41,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 136. [2022-04-07 22:56:41,076 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:56:41,077 INFO L82 GeneralOperation]: Start isEquivalent. First operand 159 states. Second operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:41,077 INFO L74 IsIncluded]: Start isIncluded. First operand 159 states. Second operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:41,077 INFO L87 Difference]: Start difference. First operand 159 states. Second operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:41,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:56:41,081 INFO L93 Difference]: Finished difference Result 159 states and 200 transitions. [2022-04-07 22:56:41,081 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 200 transitions. [2022-04-07 22:56:41,081 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:56:41,082 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:56:41,082 INFO L74 IsIncluded]: Start isIncluded. First operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 159 states. [2022-04-07 22:56:41,082 INFO L87 Difference]: Start difference. First operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 159 states. [2022-04-07 22:56:41,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:56:41,085 INFO L93 Difference]: Finished difference Result 159 states and 200 transitions. [2022-04-07 22:56:41,085 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 200 transitions. [2022-04-07 22:56:41,085 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:56:41,085 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:56:41,085 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:56:41,085 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:56:41,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:41,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 177 transitions. [2022-04-07 22:56:41,088 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 177 transitions. Word has length 28 [2022-04-07 22:56:41,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:56:41,088 INFO L478 AbstractCegarLoop]: Abstraction has 136 states and 177 transitions. [2022-04-07 22:56:41,088 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:56:41,089 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 177 transitions. [2022-04-07 22:56:41,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 22:56:41,089 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:56:41,090 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:56:41,117 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-07 22:56:41,311 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-07 22:56:41,311 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:56:41,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:56:41,312 INFO L85 PathProgramCache]: Analyzing trace with hash 1023844786, now seen corresponding path program 11 times [2022-04-07 22:56:41,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:56:41,312 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858367613] [2022-04-07 22:56:41,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:56:41,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:56:41,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:56:41,926 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:56:41,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:56:41,939 INFO L290 TraceCheckUtils]: 0: Hoare triple {10085#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10064#true} is VALID [2022-04-07 22:56:41,939 INFO L290 TraceCheckUtils]: 1: Hoare triple {10064#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:56:41,939 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10064#true} {10064#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:56:41,940 INFO L272 TraceCheckUtils]: 0: Hoare triple {10064#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10085#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:56:41,940 INFO L290 TraceCheckUtils]: 1: Hoare triple {10085#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10064#true} is VALID [2022-04-07 22:56:41,940 INFO L290 TraceCheckUtils]: 2: Hoare triple {10064#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:56:41,940 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10064#true} {10064#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:56:41,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {10064#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:56:41,941 INFO L290 TraceCheckUtils]: 5: Hoare triple {10064#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10069#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:56:41,945 INFO L290 TraceCheckUtils]: 6: Hoare triple {10069#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10070#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:56:41,948 INFO L290 TraceCheckUtils]: 7: Hoare triple {10070#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10071#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:56:41,953 INFO L290 TraceCheckUtils]: 8: Hoare triple {10071#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10072#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:56:41,959 INFO L290 TraceCheckUtils]: 9: Hoare triple {10072#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10073#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:56:41,972 INFO L290 TraceCheckUtils]: 10: Hoare triple {10073#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10074#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 5) main_~n~0) (<= 5 main_~y~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 5))} is VALID [2022-04-07 22:56:41,973 INFO L290 TraceCheckUtils]: 11: Hoare triple {10074#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 5) main_~n~0) (<= 5 main_~y~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10075#(and (<= main_~y~0 5) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-07 22:56:41,974 INFO L290 TraceCheckUtils]: 12: Hoare triple {10075#(and (<= main_~y~0 5) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 5) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10076#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} is VALID [2022-04-07 22:56:41,975 INFO L290 TraceCheckUtils]: 13: Hoare triple {10076#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10077#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-07 22:56:41,976 INFO L290 TraceCheckUtils]: 14: Hoare triple {10077#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10078#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} is VALID [2022-04-07 22:56:41,978 INFO L290 TraceCheckUtils]: 15: Hoare triple {10078#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10079#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:56:41,979 INFO L290 TraceCheckUtils]: 16: Hoare triple {10079#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10080#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:56:41,980 INFO L290 TraceCheckUtils]: 17: Hoare triple {10080#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10081#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:56:41,980 INFO L290 TraceCheckUtils]: 18: Hoare triple {10081#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10081#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:56:41,982 INFO L290 TraceCheckUtils]: 19: Hoare triple {10081#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10080#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:56:41,983 INFO L290 TraceCheckUtils]: 20: Hoare triple {10080#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10079#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:56:41,984 INFO L290 TraceCheckUtils]: 21: Hoare triple {10079#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10078#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} is VALID [2022-04-07 22:56:41,985 INFO L290 TraceCheckUtils]: 22: Hoare triple {10078#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10077#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-07 22:56:41,988 INFO L290 TraceCheckUtils]: 23: Hoare triple {10077#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:56:41,988 INFO L290 TraceCheckUtils]: 24: Hoare triple {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:56:41,989 INFO L272 TraceCheckUtils]: 25: Hoare triple {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10083#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:56:41,990 INFO L290 TraceCheckUtils]: 26: Hoare triple {10083#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10084#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:56:41,990 INFO L290 TraceCheckUtils]: 27: Hoare triple {10084#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10065#false} is VALID [2022-04-07 22:56:41,990 INFO L290 TraceCheckUtils]: 28: Hoare triple {10065#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#false} is VALID [2022-04-07 22:56:41,991 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:56:41,991 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:56:41,991 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858367613] [2022-04-07 22:56:41,991 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1858367613] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:56:41,991 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [508892115] [2022-04-07 22:56:41,991 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:56:41,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:56:41,992 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:56:41,995 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:56:41,997 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-07 22:56:42,280 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 22:56:42,281 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:56:42,282 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 51 conjunts are in the unsatisfiable core [2022-04-07 22:56:42,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:56:42,292 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:09,964 INFO L272 TraceCheckUtils]: 0: Hoare triple {10064#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:57:09,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {10064#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10064#true} is VALID [2022-04-07 22:57:09,964 INFO L290 TraceCheckUtils]: 2: Hoare triple {10064#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:57:09,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10064#true} {10064#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:57:09,965 INFO L272 TraceCheckUtils]: 4: Hoare triple {10064#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:57:09,965 INFO L290 TraceCheckUtils]: 5: Hoare triple {10064#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10069#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:09,966 INFO L290 TraceCheckUtils]: 6: Hoare triple {10069#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10070#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:09,968 INFO L290 TraceCheckUtils]: 7: Hoare triple {10070#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10110#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 22:57:09,969 INFO L290 TraceCheckUtils]: 8: Hoare triple {10110#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10114#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:09,971 INFO L290 TraceCheckUtils]: 9: Hoare triple {10114#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10118#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 22:57:09,972 INFO L290 TraceCheckUtils]: 10: Hoare triple {10118#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10122#(and (<= 5 main_~y~0) (<= main_~x~0 (+ 4294967290 (* (div (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:57:09,980 INFO L290 TraceCheckUtils]: 11: Hoare triple {10122#(and (<= 5 main_~y~0) (<= main_~x~0 (+ 4294967290 (* (div (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10075#(and (<= main_~y~0 5) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-07 22:57:09,980 INFO L290 TraceCheckUtils]: 12: Hoare triple {10075#(and (<= main_~y~0 5) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 5) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10076#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} is VALID [2022-04-07 22:57:09,981 INFO L290 TraceCheckUtils]: 13: Hoare triple {10076#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10077#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-07 22:57:09,982 INFO L290 TraceCheckUtils]: 14: Hoare triple {10077#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10078#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} is VALID [2022-04-07 22:57:09,983 INFO L290 TraceCheckUtils]: 15: Hoare triple {10078#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10079#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:57:09,984 INFO L290 TraceCheckUtils]: 16: Hoare triple {10079#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10080#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:57:09,985 INFO L290 TraceCheckUtils]: 17: Hoare triple {10080#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10081#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:57:09,986 INFO L290 TraceCheckUtils]: 18: Hoare triple {10081#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10081#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:57:09,987 INFO L290 TraceCheckUtils]: 19: Hoare triple {10081#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10080#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 22:57:09,987 INFO L290 TraceCheckUtils]: 20: Hoare triple {10080#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10079#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-07 22:57:09,988 INFO L290 TraceCheckUtils]: 21: Hoare triple {10079#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10078#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} is VALID [2022-04-07 22:57:09,992 INFO L290 TraceCheckUtils]: 22: Hoare triple {10078#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10077#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-07 22:57:09,993 INFO L290 TraceCheckUtils]: 23: Hoare triple {10077#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10076#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} is VALID [2022-04-07 22:57:09,994 INFO L290 TraceCheckUtils]: 24: Hoare triple {10076#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10076#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} is VALID [2022-04-07 22:57:09,996 INFO L272 TraceCheckUtils]: 25: Hoare triple {10076#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10168#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:57:09,996 INFO L290 TraceCheckUtils]: 26: Hoare triple {10168#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10172#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:57:09,997 INFO L290 TraceCheckUtils]: 27: Hoare triple {10172#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10065#false} is VALID [2022-04-07 22:57:09,997 INFO L290 TraceCheckUtils]: 28: Hoare triple {10065#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#false} is VALID [2022-04-07 22:57:09,997 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:09,997 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:13,358 INFO L290 TraceCheckUtils]: 28: Hoare triple {10065#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#false} is VALID [2022-04-07 22:57:13,359 INFO L290 TraceCheckUtils]: 27: Hoare triple {10172#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10065#false} is VALID [2022-04-07 22:57:13,359 INFO L290 TraceCheckUtils]: 26: Hoare triple {10168#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10172#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:57:13,360 INFO L272 TraceCheckUtils]: 25: Hoare triple {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10168#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:57:13,360 INFO L290 TraceCheckUtils]: 24: Hoare triple {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,361 INFO L290 TraceCheckUtils]: 23: Hoare triple {10194#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,362 INFO L290 TraceCheckUtils]: 22: Hoare triple {10198#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10194#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,363 INFO L290 TraceCheckUtils]: 21: Hoare triple {10202#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10198#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:13,364 INFO L290 TraceCheckUtils]: 20: Hoare triple {10206#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10202#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,365 INFO L290 TraceCheckUtils]: 19: Hoare triple {10210#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10206#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:13,366 INFO L290 TraceCheckUtils]: 18: Hoare triple {10210#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10210#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,366 INFO L290 TraceCheckUtils]: 17: Hoare triple {10206#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10210#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,367 INFO L290 TraceCheckUtils]: 16: Hoare triple {10202#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10206#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:13,368 INFO L290 TraceCheckUtils]: 15: Hoare triple {10198#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10202#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,369 INFO L290 TraceCheckUtils]: 14: Hoare triple {10194#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10198#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:13,370 INFO L290 TraceCheckUtils]: 13: Hoare triple {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10194#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,371 INFO L290 TraceCheckUtils]: 12: Hoare triple {10232#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10082#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:13,371 INFO L290 TraceCheckUtils]: 11: Hoare triple {10236#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10232#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:13,377 INFO L290 TraceCheckUtils]: 10: Hoare triple {10240#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10236#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:57:13,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {10244#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10240#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:57:13,380 INFO L290 TraceCheckUtils]: 8: Hoare triple {10248#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10244#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:57:13,382 INFO L290 TraceCheckUtils]: 7: Hoare triple {10252#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10248#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:57:13,384 INFO L290 TraceCheckUtils]: 6: Hoare triple {10256#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10252#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 22:57:13,385 INFO L290 TraceCheckUtils]: 5: Hoare triple {10064#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10256#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:57:13,385 INFO L272 TraceCheckUtils]: 4: Hoare triple {10064#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:57:13,385 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10064#true} {10064#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:57:13,385 INFO L290 TraceCheckUtils]: 2: Hoare triple {10064#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:57:13,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {10064#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10064#true} is VALID [2022-04-07 22:57:13,386 INFO L272 TraceCheckUtils]: 0: Hoare triple {10064#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10064#true} is VALID [2022-04-07 22:57:13,386 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:13,386 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [508892115] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:13,386 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:13,386 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 17] total 37 [2022-04-07 22:57:13,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1998027984] [2022-04-07 22:57:13,387 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:13,387 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 22:57:13,387 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:13,388 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:13,663 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:13,663 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-07 22:57:13,663 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:13,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-07 22:57:13,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1191, Unknown=0, NotChecked=0, Total=1332 [2022-04-07 22:57:13,664 INFO L87 Difference]: Start difference. First operand 136 states and 177 transitions. Second operand has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:20,043 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 22:57:26,960 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.33s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 22:57:46,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:46,374 INFO L93 Difference]: Finished difference Result 211 states and 257 transitions. [2022-04-07 22:57:46,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-04-07 22:57:46,374 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 22:57:46,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:46,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:46,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 84 transitions. [2022-04-07 22:57:46,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:46,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 84 transitions. [2022-04-07 22:57:46,377 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 45 states and 84 transitions. [2022-04-07 22:57:49,301 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 83 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:49,304 INFO L225 Difference]: With dead ends: 211 [2022-04-07 22:57:49,304 INFO L226 Difference]: Without dead ends: 179 [2022-04-07 22:57:49,306 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 41 SyntacticMatches, 5 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1171 ImplicationChecksByTransitivity, 24.2s TimeCoverageRelationStatistics Valid=632, Invalid=5530, Unknown=0, NotChecked=0, Total=6162 [2022-04-07 22:57:49,306 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 90 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 675 mSolverCounterSat, 115 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 90 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 115 IncrementalHoareTripleChecker+Valid, 675 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.8s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:49,306 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [90 Valid, 119 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [115 Valid, 675 Invalid, 1 Unknown, 0 Unchecked, 6.8s Time] [2022-04-07 22:57:49,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-04-07 22:57:50,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 124. [2022-04-07 22:57:50,100 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:50,100 INFO L82 GeneralOperation]: Start isEquivalent. First operand 179 states. Second operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:50,101 INFO L74 IsIncluded]: Start isIncluded. First operand 179 states. Second operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:50,101 INFO L87 Difference]: Start difference. First operand 179 states. Second operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:50,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:50,104 INFO L93 Difference]: Finished difference Result 179 states and 223 transitions. [2022-04-07 22:57:50,104 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 223 transitions. [2022-04-07 22:57:50,104 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:50,104 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:50,104 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-07 22:57:50,104 INFO L87 Difference]: Start difference. First operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-07 22:57:50,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:50,107 INFO L93 Difference]: Finished difference Result 179 states and 223 transitions. [2022-04-07 22:57:50,107 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 223 transitions. [2022-04-07 22:57:50,108 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:50,108 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:50,108 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:50,108 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:50,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:50,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 162 transitions. [2022-04-07 22:57:50,110 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 162 transitions. Word has length 29 [2022-04-07 22:57:50,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:50,110 INFO L478 AbstractCegarLoop]: Abstraction has 124 states and 162 transitions. [2022-04-07 22:57:50,111 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:50,111 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 162 transitions. [2022-04-07 22:57:50,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 22:57:50,111 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:50,111 INFO L499 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:50,121 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:50,315 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:50,316 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:50,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:50,316 INFO L85 PathProgramCache]: Analyzing trace with hash -1406825826, now seen corresponding path program 12 times [2022-04-07 22:57:50,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:50,316 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499068087] [2022-04-07 22:57:50,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:50,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:50,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:50,653 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:50,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:50,657 INFO L290 TraceCheckUtils]: 0: Hoare triple {11278#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11256#true} is VALID [2022-04-07 22:57:50,657 INFO L290 TraceCheckUtils]: 1: Hoare triple {11256#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:50,657 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11256#true} {11256#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:50,658 INFO L272 TraceCheckUtils]: 0: Hoare triple {11256#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11278#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:50,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {11278#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11256#true} is VALID [2022-04-07 22:57:50,658 INFO L290 TraceCheckUtils]: 2: Hoare triple {11256#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:50,658 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11256#true} {11256#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:50,658 INFO L272 TraceCheckUtils]: 4: Hoare triple {11256#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:50,658 INFO L290 TraceCheckUtils]: 5: Hoare triple {11256#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11261#(= main_~y~0 0)} is VALID [2022-04-07 22:57:50,659 INFO L290 TraceCheckUtils]: 6: Hoare triple {11261#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11262#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:50,660 INFO L290 TraceCheckUtils]: 7: Hoare triple {11262#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11263#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:50,660 INFO L290 TraceCheckUtils]: 8: Hoare triple {11263#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11264#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:57:50,661 INFO L290 TraceCheckUtils]: 9: Hoare triple {11264#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11265#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:57:50,662 INFO L290 TraceCheckUtils]: 10: Hoare triple {11265#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11266#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:57:50,662 INFO L290 TraceCheckUtils]: 11: Hoare triple {11266#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11267#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:57:50,663 INFO L290 TraceCheckUtils]: 12: Hoare triple {11267#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11268#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:57:50,664 INFO L290 TraceCheckUtils]: 13: Hoare triple {11268#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11269#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 22:57:50,664 INFO L290 TraceCheckUtils]: 14: Hoare triple {11269#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11270#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 22:57:50,665 INFO L290 TraceCheckUtils]: 15: Hoare triple {11270#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11271#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 22:57:50,666 INFO L290 TraceCheckUtils]: 16: Hoare triple {11271#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11272#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:57:50,666 INFO L290 TraceCheckUtils]: 17: Hoare triple {11272#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11273#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 22:57:50,667 INFO L290 TraceCheckUtils]: 18: Hoare triple {11273#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11274#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:57:50,668 INFO L290 TraceCheckUtils]: 19: Hoare triple {11274#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11275#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 22:57:50,668 INFO L290 TraceCheckUtils]: 20: Hoare triple {11275#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11275#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 22:57:50,669 INFO L290 TraceCheckUtils]: 21: Hoare triple {11275#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11276#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 22:57:50,669 INFO L290 TraceCheckUtils]: 22: Hoare triple {11276#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11277#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:57:50,670 INFO L290 TraceCheckUtils]: 23: Hoare triple {11277#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:50,670 INFO L290 TraceCheckUtils]: 24: Hoare triple {11257#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11257#false} is VALID [2022-04-07 22:57:50,670 INFO L290 TraceCheckUtils]: 25: Hoare triple {11257#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:50,670 INFO L272 TraceCheckUtils]: 26: Hoare triple {11257#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11257#false} is VALID [2022-04-07 22:57:50,670 INFO L290 TraceCheckUtils]: 27: Hoare triple {11257#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11257#false} is VALID [2022-04-07 22:57:50,670 INFO L290 TraceCheckUtils]: 28: Hoare triple {11257#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:50,671 INFO L290 TraceCheckUtils]: 29: Hoare triple {11257#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:50,671 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:50,671 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:50,671 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499068087] [2022-04-07 22:57:50,671 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [499068087] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:50,671 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1968396759] [2022-04-07 22:57:50,671 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 22:57:50,671 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:50,671 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:50,675 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:50,676 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-07 22:57:50,884 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-07 22:57:50,885 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:57:50,886 INFO L263 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-07 22:57:50,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:50,895 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:51,189 INFO L272 TraceCheckUtils]: 0: Hoare triple {11256#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:51,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {11256#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11256#true} is VALID [2022-04-07 22:57:51,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {11256#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:51,189 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11256#true} {11256#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:51,189 INFO L272 TraceCheckUtils]: 4: Hoare triple {11256#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:51,190 INFO L290 TraceCheckUtils]: 5: Hoare triple {11256#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11261#(= main_~y~0 0)} is VALID [2022-04-07 22:57:51,190 INFO L290 TraceCheckUtils]: 6: Hoare triple {11261#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11262#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:51,191 INFO L290 TraceCheckUtils]: 7: Hoare triple {11262#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11263#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:51,192 INFO L290 TraceCheckUtils]: 8: Hoare triple {11263#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11264#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:57:51,193 INFO L290 TraceCheckUtils]: 9: Hoare triple {11264#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11265#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:57:51,193 INFO L290 TraceCheckUtils]: 10: Hoare triple {11265#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11266#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:57:51,194 INFO L290 TraceCheckUtils]: 11: Hoare triple {11266#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11267#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:57:51,195 INFO L290 TraceCheckUtils]: 12: Hoare triple {11267#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11268#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:57:51,195 INFO L290 TraceCheckUtils]: 13: Hoare triple {11268#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11269#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 22:57:51,196 INFO L290 TraceCheckUtils]: 14: Hoare triple {11269#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11270#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 22:57:51,197 INFO L290 TraceCheckUtils]: 15: Hoare triple {11270#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11271#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 22:57:51,197 INFO L290 TraceCheckUtils]: 16: Hoare triple {11271#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11272#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:57:51,198 INFO L290 TraceCheckUtils]: 17: Hoare triple {11272#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11273#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 22:57:51,199 INFO L290 TraceCheckUtils]: 18: Hoare triple {11273#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11274#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:57:51,200 INFO L290 TraceCheckUtils]: 19: Hoare triple {11274#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11275#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 22:57:51,200 INFO L290 TraceCheckUtils]: 20: Hoare triple {11275#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11275#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 22:57:51,201 INFO L290 TraceCheckUtils]: 21: Hoare triple {11275#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11276#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 22:57:51,201 INFO L290 TraceCheckUtils]: 22: Hoare triple {11276#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11348#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 22:57:51,202 INFO L290 TraceCheckUtils]: 23: Hoare triple {11348#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:51,202 INFO L290 TraceCheckUtils]: 24: Hoare triple {11257#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11257#false} is VALID [2022-04-07 22:57:51,202 INFO L290 TraceCheckUtils]: 25: Hoare triple {11257#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:51,202 INFO L272 TraceCheckUtils]: 26: Hoare triple {11257#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11257#false} is VALID [2022-04-07 22:57:51,202 INFO L290 TraceCheckUtils]: 27: Hoare triple {11257#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11257#false} is VALID [2022-04-07 22:57:51,202 INFO L290 TraceCheckUtils]: 28: Hoare triple {11257#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:51,202 INFO L290 TraceCheckUtils]: 29: Hoare triple {11257#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:51,203 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:51,203 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:51,736 INFO L290 TraceCheckUtils]: 29: Hoare triple {11257#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:51,736 INFO L290 TraceCheckUtils]: 28: Hoare triple {11257#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:51,736 INFO L290 TraceCheckUtils]: 27: Hoare triple {11257#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11257#false} is VALID [2022-04-07 22:57:51,736 INFO L272 TraceCheckUtils]: 26: Hoare triple {11257#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11257#false} is VALID [2022-04-07 22:57:51,737 INFO L290 TraceCheckUtils]: 25: Hoare triple {11257#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:51,737 INFO L290 TraceCheckUtils]: 24: Hoare triple {11257#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11257#false} is VALID [2022-04-07 22:57:51,737 INFO L290 TraceCheckUtils]: 23: Hoare triple {11388#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11257#false} is VALID [2022-04-07 22:57:51,738 INFO L290 TraceCheckUtils]: 22: Hoare triple {11392#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11388#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:57:51,738 INFO L290 TraceCheckUtils]: 21: Hoare triple {11396#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11392#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 22:57:51,738 INFO L290 TraceCheckUtils]: 20: Hoare triple {11396#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11396#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:57:51,739 INFO L290 TraceCheckUtils]: 19: Hoare triple {11403#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11396#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:57:51,741 INFO L290 TraceCheckUtils]: 18: Hoare triple {11407#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11403#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:57:51,742 INFO L290 TraceCheckUtils]: 17: Hoare triple {11411#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11407#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:57:51,743 INFO L290 TraceCheckUtils]: 16: Hoare triple {11415#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11411#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:57:51,744 INFO L290 TraceCheckUtils]: 15: Hoare triple {11419#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11415#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:57:51,744 INFO L290 TraceCheckUtils]: 14: Hoare triple {11423#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11419#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:57:51,745 INFO L290 TraceCheckUtils]: 13: Hoare triple {11427#(< 0 (mod (+ main_~y~0 6) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11423#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 22:57:51,746 INFO L290 TraceCheckUtils]: 12: Hoare triple {11431#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11427#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 22:57:51,746 INFO L290 TraceCheckUtils]: 11: Hoare triple {11435#(< 0 (mod (+ main_~y~0 8) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11431#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 22:57:51,747 INFO L290 TraceCheckUtils]: 10: Hoare triple {11439#(< 0 (mod (+ main_~y~0 9) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11435#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 22:57:51,748 INFO L290 TraceCheckUtils]: 9: Hoare triple {11443#(< 0 (mod (+ main_~y~0 10) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11439#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 22:57:51,748 INFO L290 TraceCheckUtils]: 8: Hoare triple {11447#(< 0 (mod (+ main_~y~0 11) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11443#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 22:57:51,749 INFO L290 TraceCheckUtils]: 7: Hoare triple {11451#(< 0 (mod (+ main_~y~0 12) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11447#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 22:57:51,750 INFO L290 TraceCheckUtils]: 6: Hoare triple {11455#(< 0 (mod (+ main_~y~0 13) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11451#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-07 22:57:51,750 INFO L290 TraceCheckUtils]: 5: Hoare triple {11256#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11455#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-07 22:57:51,750 INFO L272 TraceCheckUtils]: 4: Hoare triple {11256#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:51,750 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11256#true} {11256#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:51,750 INFO L290 TraceCheckUtils]: 2: Hoare triple {11256#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:51,751 INFO L290 TraceCheckUtils]: 1: Hoare triple {11256#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11256#true} is VALID [2022-04-07 22:57:51,751 INFO L272 TraceCheckUtils]: 0: Hoare triple {11256#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11256#true} is VALID [2022-04-07 22:57:51,751 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:51,751 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1968396759] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:51,751 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:51,751 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 38 [2022-04-07 22:57:51,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [498314016] [2022-04-07 22:57:51,751 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:51,752 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 22:57:51,752 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:51,752 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:51,789 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:51,789 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-07 22:57:51,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:51,790 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-07 22:57:51,790 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=1102, Unknown=0, NotChecked=0, Total=1406 [2022-04-07 22:57:51,790 INFO L87 Difference]: Start difference. First operand 124 states and 162 transitions. Second operand has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:06,151 WARN L232 SmtUtils]: Spent 7.62s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 22:58:31,452 WARN L232 SmtUtils]: Spent 12.84s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 22:58:48,489 WARN L232 SmtUtils]: Spent 5.53s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 22:59:01,284 WARN L232 SmtUtils]: Spent 6.16s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 22:59:34,888 WARN L232 SmtUtils]: Spent 7.79s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 22:59:44,109 WARN L232 SmtUtils]: Spent 6.06s on a formula simplification that was a NOOP. DAG size: 63 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:00:02,948 WARN L232 SmtUtils]: Spent 5.88s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:00:13,595 WARN L232 SmtUtils]: Spent 5.82s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:01:56,109 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.97s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:01:58,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:58,227 INFO L93 Difference]: Finished difference Result 456 states and 602 transitions. [2022-04-07 23:01:58,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 136 states. [2022-04-07 23:01:58,227 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:01:58,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:01:58,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:58,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 312 transitions. [2022-04-07 23:01:58,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:58,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 312 transitions. [2022-04-07 23:01:58,235 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 136 states and 312 transitions. [2022-04-07 23:02:00,452 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 312 edges. 312 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:00,462 INFO L225 Difference]: With dead ends: 456 [2022-04-07 23:02:00,462 INFO L226 Difference]: Without dead ends: 438 [2022-04-07 23:02:00,466 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 169 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10996 ImplicationChecksByTransitivity, 227.9s TimeCoverageRelationStatistics Valid=7019, Invalid=22051, Unknown=0, NotChecked=0, Total=29070 [2022-04-07 23:02:00,467 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 876 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 1315 mSolverCounterSat, 1135 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 876 SdHoareTripleChecker+Valid, 116 SdHoareTripleChecker+Invalid, 2450 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1135 IncrementalHoareTripleChecker+Valid, 1315 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 9.3s IncrementalHoareTripleChecker+Time [2022-04-07 23:02:00,467 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [876 Valid, 116 Invalid, 2450 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1135 Valid, 1315 Invalid, 0 Unknown, 0 Unchecked, 9.3s Time] [2022-04-07 23:02:00,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 438 states. [2022-04-07 23:02:01,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 438 to 137. [2022-04-07 23:02:01,365 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:02:01,365 INFO L82 GeneralOperation]: Start isEquivalent. First operand 438 states. Second operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:01,366 INFO L74 IsIncluded]: Start isIncluded. First operand 438 states. Second operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:01,366 INFO L87 Difference]: Start difference. First operand 438 states. Second operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:01,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:01,376 INFO L93 Difference]: Finished difference Result 438 states and 551 transitions. [2022-04-07 23:02:01,376 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 551 transitions. [2022-04-07 23:02:01,377 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:01,377 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:01,377 INFO L74 IsIncluded]: Start isIncluded. First operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 438 states. [2022-04-07 23:02:01,377 INFO L87 Difference]: Start difference. First operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 438 states. [2022-04-07 23:02:01,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:01,387 INFO L93 Difference]: Finished difference Result 438 states and 551 transitions. [2022-04-07 23:02:01,387 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 551 transitions. [2022-04-07 23:02:01,388 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:01,388 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:01,388 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:02:01,388 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:02:01,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:01,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 179 transitions. [2022-04-07 23:02:01,390 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 179 transitions. Word has length 30 [2022-04-07 23:02:01,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:02:01,390 INFO L478 AbstractCegarLoop]: Abstraction has 137 states and 179 transitions. [2022-04-07 23:02:01,390 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:01,390 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 179 transitions. [2022-04-07 23:02:01,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 23:02:01,391 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:02:01,391 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:02:01,399 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2022-04-07 23:02:01,595 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-07 23:02:01,595 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:02:01,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:02:01,596 INFO L85 PathProgramCache]: Analyzing trace with hash 389024087, now seen corresponding path program 13 times [2022-04-07 23:02:01,596 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:02:01,596 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1147722288] [2022-04-07 23:02:01,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:02:01,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:02:01,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:01,832 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:02:01,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:01,836 INFO L290 TraceCheckUtils]: 0: Hoare triple {13520#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13502#true} is VALID [2022-04-07 23:02:01,836 INFO L290 TraceCheckUtils]: 1: Hoare triple {13502#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:01,836 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13502#true} {13502#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:01,836 INFO L272 TraceCheckUtils]: 0: Hoare triple {13502#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13520#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:02:01,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {13520#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13502#true} is VALID [2022-04-07 23:02:01,837 INFO L290 TraceCheckUtils]: 2: Hoare triple {13502#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:01,837 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13502#true} {13502#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:01,837 INFO L272 TraceCheckUtils]: 4: Hoare triple {13502#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:01,837 INFO L290 TraceCheckUtils]: 5: Hoare triple {13502#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13507#(= main_~y~0 0)} is VALID [2022-04-07 23:02:01,838 INFO L290 TraceCheckUtils]: 6: Hoare triple {13507#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13508#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:01,839 INFO L290 TraceCheckUtils]: 7: Hoare triple {13508#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13509#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:02:01,839 INFO L290 TraceCheckUtils]: 8: Hoare triple {13509#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13510#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:02:01,840 INFO L290 TraceCheckUtils]: 9: Hoare triple {13510#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13511#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:02:01,841 INFO L290 TraceCheckUtils]: 10: Hoare triple {13511#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13512#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:01,841 INFO L290 TraceCheckUtils]: 11: Hoare triple {13512#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13513#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:01,842 INFO L290 TraceCheckUtils]: 12: Hoare triple {13513#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13513#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:01,842 INFO L290 TraceCheckUtils]: 13: Hoare triple {13513#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13514#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:02:01,843 INFO L290 TraceCheckUtils]: 14: Hoare triple {13514#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13515#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:02:01,844 INFO L290 TraceCheckUtils]: 15: Hoare triple {13515#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13516#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:02:01,844 INFO L290 TraceCheckUtils]: 16: Hoare triple {13516#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13517#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:02:01,845 INFO L290 TraceCheckUtils]: 17: Hoare triple {13517#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13518#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:02:01,846 INFO L290 TraceCheckUtils]: 18: Hoare triple {13518#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13519#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 23:02:01,846 INFO L290 TraceCheckUtils]: 19: Hoare triple {13519#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:01,847 INFO L290 TraceCheckUtils]: 20: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:01,847 INFO L290 TraceCheckUtils]: 21: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:01,847 INFO L290 TraceCheckUtils]: 22: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:01,847 INFO L290 TraceCheckUtils]: 23: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:01,847 INFO L290 TraceCheckUtils]: 24: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:01,847 INFO L290 TraceCheckUtils]: 25: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:01,847 INFO L290 TraceCheckUtils]: 26: Hoare triple {13503#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:01,847 INFO L272 TraceCheckUtils]: 27: Hoare triple {13503#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13503#false} is VALID [2022-04-07 23:02:01,852 INFO L290 TraceCheckUtils]: 28: Hoare triple {13503#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13503#false} is VALID [2022-04-07 23:02:01,853 INFO L290 TraceCheckUtils]: 29: Hoare triple {13503#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:01,853 INFO L290 TraceCheckUtils]: 30: Hoare triple {13503#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:01,853 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:02:01,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:02:01,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1147722288] [2022-04-07 23:02:01,853 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1147722288] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:02:01,853 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1738978572] [2022-04-07 23:02:01,854 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 23:02:01,854 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:01,854 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:02:01,855 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:02:01,878 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-07 23:02:01,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:01,907 INFO L263 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 38 conjunts are in the unsatisfiable core [2022-04-07 23:02:01,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:01,916 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:02:02,184 INFO L272 TraceCheckUtils]: 0: Hoare triple {13502#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,184 INFO L290 TraceCheckUtils]: 1: Hoare triple {13502#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13502#true} is VALID [2022-04-07 23:02:02,184 INFO L290 TraceCheckUtils]: 2: Hoare triple {13502#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,184 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13502#true} {13502#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,184 INFO L272 TraceCheckUtils]: 4: Hoare triple {13502#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,187 INFO L290 TraceCheckUtils]: 5: Hoare triple {13502#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13507#(= main_~y~0 0)} is VALID [2022-04-07 23:02:02,187 INFO L290 TraceCheckUtils]: 6: Hoare triple {13507#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13508#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:02,188 INFO L290 TraceCheckUtils]: 7: Hoare triple {13508#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13509#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:02:02,189 INFO L290 TraceCheckUtils]: 8: Hoare triple {13509#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13510#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:02:02,189 INFO L290 TraceCheckUtils]: 9: Hoare triple {13510#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13511#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:02:02,190 INFO L290 TraceCheckUtils]: 10: Hoare triple {13511#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13512#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:02,191 INFO L290 TraceCheckUtils]: 11: Hoare triple {13512#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13513#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:02,192 INFO L290 TraceCheckUtils]: 12: Hoare triple {13513#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13513#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:02,192 INFO L290 TraceCheckUtils]: 13: Hoare triple {13513#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13563#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:02,193 INFO L290 TraceCheckUtils]: 14: Hoare triple {13563#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13567#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:02:02,194 INFO L290 TraceCheckUtils]: 15: Hoare triple {13567#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13571#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:02,195 INFO L290 TraceCheckUtils]: 16: Hoare triple {13571#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13575#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:02,195 INFO L290 TraceCheckUtils]: 17: Hoare triple {13575#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13579#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:02,196 INFO L290 TraceCheckUtils]: 18: Hoare triple {13579#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13583#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:02,197 INFO L290 TraceCheckUtils]: 19: Hoare triple {13583#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:02,197 INFO L290 TraceCheckUtils]: 20: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:02,197 INFO L290 TraceCheckUtils]: 21: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:02,197 INFO L290 TraceCheckUtils]: 22: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:02,197 INFO L290 TraceCheckUtils]: 23: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:02,198 INFO L290 TraceCheckUtils]: 24: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:02,198 INFO L290 TraceCheckUtils]: 25: Hoare triple {13503#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:02,198 INFO L290 TraceCheckUtils]: 26: Hoare triple {13503#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:02,198 INFO L272 TraceCheckUtils]: 27: Hoare triple {13503#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13503#false} is VALID [2022-04-07 23:02:02,198 INFO L290 TraceCheckUtils]: 28: Hoare triple {13503#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13503#false} is VALID [2022-04-07 23:02:02,198 INFO L290 TraceCheckUtils]: 29: Hoare triple {13503#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:02,198 INFO L290 TraceCheckUtils]: 30: Hoare triple {13503#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:02,198 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:02:02,199 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:02:02,581 INFO L290 TraceCheckUtils]: 30: Hoare triple {13503#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:02,581 INFO L290 TraceCheckUtils]: 29: Hoare triple {13503#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:02,582 INFO L290 TraceCheckUtils]: 28: Hoare triple {13503#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13503#false} is VALID [2022-04-07 23:02:02,582 INFO L272 TraceCheckUtils]: 27: Hoare triple {13503#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13503#false} is VALID [2022-04-07 23:02:02,582 INFO L290 TraceCheckUtils]: 26: Hoare triple {13503#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13503#false} is VALID [2022-04-07 23:02:02,582 INFO L290 TraceCheckUtils]: 25: Hoare triple {13635#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13503#false} is VALID [2022-04-07 23:02:02,583 INFO L290 TraceCheckUtils]: 24: Hoare triple {13639#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13635#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:02:02,584 INFO L290 TraceCheckUtils]: 23: Hoare triple {13643#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13639#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:02:02,584 INFO L290 TraceCheckUtils]: 22: Hoare triple {13647#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13643#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:02:02,585 INFO L290 TraceCheckUtils]: 21: Hoare triple {13651#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13647#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:02:02,586 INFO L290 TraceCheckUtils]: 20: Hoare triple {13655#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13651#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:02:02,589 INFO L290 TraceCheckUtils]: 19: Hoare triple {13659#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13655#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:02:02,590 INFO L290 TraceCheckUtils]: 18: Hoare triple {13663#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13659#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 23:02:02,591 INFO L290 TraceCheckUtils]: 17: Hoare triple {13667#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13663#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:02:02,592 INFO L290 TraceCheckUtils]: 16: Hoare triple {13671#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13667#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:02:02,593 INFO L290 TraceCheckUtils]: 15: Hoare triple {13675#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13671#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:02:02,594 INFO L290 TraceCheckUtils]: 14: Hoare triple {13679#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13675#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-07 23:02:02,594 INFO L290 TraceCheckUtils]: 13: Hoare triple {13502#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13679#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} is VALID [2022-04-07 23:02:02,594 INFO L290 TraceCheckUtils]: 12: Hoare triple {13502#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,594 INFO L290 TraceCheckUtils]: 11: Hoare triple {13502#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L290 TraceCheckUtils]: 10: Hoare triple {13502#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L290 TraceCheckUtils]: 9: Hoare triple {13502#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L290 TraceCheckUtils]: 8: Hoare triple {13502#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L290 TraceCheckUtils]: 7: Hoare triple {13502#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L290 TraceCheckUtils]: 6: Hoare triple {13502#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L290 TraceCheckUtils]: 5: Hoare triple {13502#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L272 TraceCheckUtils]: 4: Hoare triple {13502#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13502#true} {13502#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {13502#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L290 TraceCheckUtils]: 1: Hoare triple {13502#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13502#true} is VALID [2022-04-07 23:02:02,595 INFO L272 TraceCheckUtils]: 0: Hoare triple {13502#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13502#true} is VALID [2022-04-07 23:02:02,596 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:02:02,596 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1738978572] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:02:02,596 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:02:02,596 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 14] total 34 [2022-04-07 23:02:02,596 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356520601] [2022-04-07 23:02:02,596 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:02:02,596 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:02:02,597 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:02:02,597 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:02,641 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:02,641 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-07 23:02:02,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:02:02,641 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-07 23:02:02,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=959, Unknown=0, NotChecked=0, Total=1122 [2022-04-07 23:02:02,642 INFO L87 Difference]: Start difference. First operand 137 states and 179 transitions. Second operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:06,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:06,994 INFO L93 Difference]: Finished difference Result 242 states and 303 transitions. [2022-04-07 23:02:06,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-04-07 23:02:06,994 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:02:06,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:02:06,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:06,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 85 transitions. [2022-04-07 23:02:06,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:06,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 85 transitions. [2022-04-07 23:02:06,996 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 36 states and 85 transitions. [2022-04-07 23:02:07,132 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:07,134 INFO L225 Difference]: With dead ends: 242 [2022-04-07 23:02:07,134 INFO L226 Difference]: Without dead ends: 179 [2022-04-07 23:02:07,135 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 851 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=518, Invalid=3904, Unknown=0, NotChecked=0, Total=4422 [2022-04-07 23:02:07,135 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 32 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 622 mSolverCounterSat, 90 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 712 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 90 IncrementalHoareTripleChecker+Valid, 622 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-07 23:02:07,135 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [32 Valid, 99 Invalid, 712 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [90 Valid, 622 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-07 23:02:07,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-04-07 23:02:08,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 153. [2022-04-07 23:02:08,222 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:02:08,223 INFO L82 GeneralOperation]: Start isEquivalent. First operand 179 states. Second operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:08,223 INFO L74 IsIncluded]: Start isIncluded. First operand 179 states. Second operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:08,223 INFO L87 Difference]: Start difference. First operand 179 states. Second operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:08,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:08,225 INFO L93 Difference]: Finished difference Result 179 states and 223 transitions. [2022-04-07 23:02:08,225 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 223 transitions. [2022-04-07 23:02:08,225 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:08,225 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:08,226 INFO L74 IsIncluded]: Start isIncluded. First operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-07 23:02:08,226 INFO L87 Difference]: Start difference. First operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-07 23:02:08,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:08,228 INFO L93 Difference]: Finished difference Result 179 states and 223 transitions. [2022-04-07 23:02:08,228 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 223 transitions. [2022-04-07 23:02:08,228 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:08,229 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:08,229 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:02:08,229 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:02:08,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:08,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 197 transitions. [2022-04-07 23:02:08,231 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 197 transitions. Word has length 31 [2022-04-07 23:02:08,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:02:08,231 INFO L478 AbstractCegarLoop]: Abstraction has 153 states and 197 transitions. [2022-04-07 23:02:08,231 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:08,232 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 197 transitions. [2022-04-07 23:02:08,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 23:02:08,232 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:02:08,232 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:02:08,250 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-07 23:02:08,442 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-07 23:02:08,442 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:02:08,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:02:08,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1608168445, now seen corresponding path program 14 times [2022-04-07 23:02:08,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:02:08,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800815862] [2022-04-07 23:02:08,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:02:08,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:02:08,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:09,155 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:02:09,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:09,164 INFO L290 TraceCheckUtils]: 0: Hoare triple {14809#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14786#true} is VALID [2022-04-07 23:02:09,164 INFO L290 TraceCheckUtils]: 1: Hoare triple {14786#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:09,164 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14786#true} {14786#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:09,165 INFO L272 TraceCheckUtils]: 0: Hoare triple {14786#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14809#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:02:09,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {14809#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14786#true} is VALID [2022-04-07 23:02:09,165 INFO L290 TraceCheckUtils]: 2: Hoare triple {14786#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:09,165 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14786#true} {14786#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:09,166 INFO L272 TraceCheckUtils]: 4: Hoare triple {14786#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:09,166 INFO L290 TraceCheckUtils]: 5: Hoare triple {14786#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14791#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:02:09,169 INFO L290 TraceCheckUtils]: 6: Hoare triple {14791#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14792#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:09,183 INFO L290 TraceCheckUtils]: 7: Hoare triple {14792#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14793#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 23:02:09,195 INFO L290 TraceCheckUtils]: 8: Hoare triple {14793#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14794#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:09,200 INFO L290 TraceCheckUtils]: 9: Hoare triple {14794#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14795#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-07 23:02:09,205 INFO L290 TraceCheckUtils]: 10: Hoare triple {14795#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14796#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~y~0 5) (<= main_~x~0 (+ 4294967290 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:09,210 INFO L290 TraceCheckUtils]: 11: Hoare triple {14796#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~y~0 5) (<= main_~x~0 (+ 4294967290 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14797#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 6) main_~n~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:09,212 INFO L290 TraceCheckUtils]: 12: Hoare triple {14797#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 6) main_~n~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14798#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:09,212 INFO L290 TraceCheckUtils]: 13: Hoare triple {14798#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 6) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {14799#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:09,213 INFO L290 TraceCheckUtils]: 14: Hoare triple {14799#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14800#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:09,214 INFO L290 TraceCheckUtils]: 15: Hoare triple {14800#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14801#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} is VALID [2022-04-07 23:02:09,215 INFO L290 TraceCheckUtils]: 16: Hoare triple {14801#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14802#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 23:02:09,216 INFO L290 TraceCheckUtils]: 17: Hoare triple {14802#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14803#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 23:02:09,217 INFO L290 TraceCheckUtils]: 18: Hoare triple {14803#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14804#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} is VALID [2022-04-07 23:02:09,219 INFO L290 TraceCheckUtils]: 19: Hoare triple {14804#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14805#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:09,219 INFO L290 TraceCheckUtils]: 20: Hoare triple {14805#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14805#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:09,220 INFO L290 TraceCheckUtils]: 21: Hoare triple {14805#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14804#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} is VALID [2022-04-07 23:02:09,221 INFO L290 TraceCheckUtils]: 22: Hoare triple {14804#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14803#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 23:02:09,222 INFO L290 TraceCheckUtils]: 23: Hoare triple {14803#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14802#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 23:02:09,223 INFO L290 TraceCheckUtils]: 24: Hoare triple {14802#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14801#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} is VALID [2022-04-07 23:02:09,224 INFO L290 TraceCheckUtils]: 25: Hoare triple {14801#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14800#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:09,225 INFO L290 TraceCheckUtils]: 26: Hoare triple {14800#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:09,226 INFO L290 TraceCheckUtils]: 27: Hoare triple {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:09,227 INFO L272 TraceCheckUtils]: 28: Hoare triple {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {14807#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 23:02:09,227 INFO L290 TraceCheckUtils]: 29: Hoare triple {14807#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14808#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 23:02:09,227 INFO L290 TraceCheckUtils]: 30: Hoare triple {14808#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14787#false} is VALID [2022-04-07 23:02:09,227 INFO L290 TraceCheckUtils]: 31: Hoare triple {14787#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14787#false} is VALID [2022-04-07 23:02:09,228 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:02:09,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:02:09,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800815862] [2022-04-07 23:02:09,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1800815862] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:02:09,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1034398282] [2022-04-07 23:02:09,228 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 23:02:09,228 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:09,228 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:02:09,229 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:02:09,231 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-07 23:02:09,406 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 23:02:09,406 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:02:09,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 59 conjunts are in the unsatisfiable core [2022-04-07 23:02:09,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:09,420 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:02:35,026 INFO L272 TraceCheckUtils]: 0: Hoare triple {14786#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:35,027 INFO L290 TraceCheckUtils]: 1: Hoare triple {14786#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14786#true} is VALID [2022-04-07 23:02:35,027 INFO L290 TraceCheckUtils]: 2: Hoare triple {14786#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:35,027 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14786#true} {14786#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:35,027 INFO L272 TraceCheckUtils]: 4: Hoare triple {14786#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:35,027 INFO L290 TraceCheckUtils]: 5: Hoare triple {14786#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14791#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:02:35,028 INFO L290 TraceCheckUtils]: 6: Hoare triple {14791#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14831#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= main_~y~0 1))} is VALID [2022-04-07 23:02:35,029 INFO L290 TraceCheckUtils]: 7: Hoare triple {14831#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14835#(and (= main_~y~0 2) (= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0))} is VALID [2022-04-07 23:02:35,030 INFO L290 TraceCheckUtils]: 8: Hoare triple {14835#(and (= main_~y~0 2) (= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14839#(and (= 2 (+ (- 1) main_~y~0)) (= (+ (- 2) main_~n~0) (+ main_~x~0 1)))} is VALID [2022-04-07 23:02:35,030 INFO L290 TraceCheckUtils]: 9: Hoare triple {14839#(and (= 2 (+ (- 1) main_~y~0)) (= (+ (- 2) main_~n~0) (+ main_~x~0 1)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14843#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 2)) (= main_~y~0 4))} is VALID [2022-04-07 23:02:35,031 INFO L290 TraceCheckUtils]: 10: Hoare triple {14843#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 2)) (= main_~y~0 4))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14847#(and (= (+ main_~x~0 1) (+ main_~n~0 (- 4))) (= (+ (- 1) main_~y~0) 4))} is VALID [2022-04-07 23:02:35,032 INFO L290 TraceCheckUtils]: 11: Hoare triple {14847#(and (= (+ main_~x~0 1) (+ main_~n~0 (- 4))) (= (+ (- 1) main_~y~0) 4))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14851#(and (= (+ main_~x~0 1) (+ main_~n~0 (- 5))) (< 0 (mod (+ 4294967291 main_~n~0) 4294967296)) (= (+ (- 2) main_~y~0) 4))} is VALID [2022-04-07 23:02:35,033 INFO L290 TraceCheckUtils]: 12: Hoare triple {14851#(and (= (+ main_~x~0 1) (+ main_~n~0 (- 5))) (< 0 (mod (+ 4294967291 main_~n~0) 4294967296)) (= (+ (- 2) main_~y~0) 4))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14798#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,034 INFO L290 TraceCheckUtils]: 13: Hoare triple {14798#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 6) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {14799#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,035 INFO L290 TraceCheckUtils]: 14: Hoare triple {14799#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14800#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,037 INFO L290 TraceCheckUtils]: 15: Hoare triple {14800#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14801#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,038 INFO L290 TraceCheckUtils]: 16: Hoare triple {14801#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14802#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 23:02:35,039 INFO L290 TraceCheckUtils]: 17: Hoare triple {14802#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14803#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 23:02:35,041 INFO L290 TraceCheckUtils]: 18: Hoare triple {14803#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14804#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} is VALID [2022-04-07 23:02:35,042 INFO L290 TraceCheckUtils]: 19: Hoare triple {14804#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14805#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,043 INFO L290 TraceCheckUtils]: 20: Hoare triple {14805#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14805#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,044 INFO L290 TraceCheckUtils]: 21: Hoare triple {14805#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14804#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} is VALID [2022-04-07 23:02:35,045 INFO L290 TraceCheckUtils]: 22: Hoare triple {14804#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14803#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 23:02:35,046 INFO L290 TraceCheckUtils]: 23: Hoare triple {14803#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14802#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-07 23:02:35,047 INFO L290 TraceCheckUtils]: 24: Hoare triple {14802#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14801#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,048 INFO L290 TraceCheckUtils]: 25: Hoare triple {14801#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14800#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,050 INFO L290 TraceCheckUtils]: 26: Hoare triple {14800#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14799#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,050 INFO L290 TraceCheckUtils]: 27: Hoare triple {14799#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14799#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-07 23:02:35,052 INFO L272 TraceCheckUtils]: 28: Hoare triple {14799#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {14903#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:02:35,053 INFO L290 TraceCheckUtils]: 29: Hoare triple {14903#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14907#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:02:35,053 INFO L290 TraceCheckUtils]: 30: Hoare triple {14907#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14787#false} is VALID [2022-04-07 23:02:35,053 INFO L290 TraceCheckUtils]: 31: Hoare triple {14787#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14787#false} is VALID [2022-04-07 23:02:35,053 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:02:35,053 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:02:37,436 INFO L290 TraceCheckUtils]: 31: Hoare triple {14787#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14787#false} is VALID [2022-04-07 23:02:37,437 INFO L290 TraceCheckUtils]: 30: Hoare triple {14907#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14787#false} is VALID [2022-04-07 23:02:37,437 INFO L290 TraceCheckUtils]: 29: Hoare triple {14903#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14907#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:02:37,438 INFO L272 TraceCheckUtils]: 28: Hoare triple {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {14903#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:02:37,438 INFO L290 TraceCheckUtils]: 27: Hoare triple {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,439 INFO L290 TraceCheckUtils]: 26: Hoare triple {14929#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,440 INFO L290 TraceCheckUtils]: 25: Hoare triple {14933#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14929#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,441 INFO L290 TraceCheckUtils]: 24: Hoare triple {14937#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14933#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:02:37,442 INFO L290 TraceCheckUtils]: 23: Hoare triple {14941#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14937#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,443 INFO L290 TraceCheckUtils]: 22: Hoare triple {14945#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14941#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:02:37,444 INFO L290 TraceCheckUtils]: 21: Hoare triple {14949#(and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0) (+ 7 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14945#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,444 INFO L290 TraceCheckUtils]: 20: Hoare triple {14949#(and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0) (+ 7 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14949#(and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0) (+ 7 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:02:37,445 INFO L290 TraceCheckUtils]: 19: Hoare triple {14945#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14949#(and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0) (+ 7 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:02:37,446 INFO L290 TraceCheckUtils]: 18: Hoare triple {14941#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14945#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,447 INFO L290 TraceCheckUtils]: 17: Hoare triple {14937#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14941#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:02:37,448 INFO L290 TraceCheckUtils]: 16: Hoare triple {14933#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14937#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,449 INFO L290 TraceCheckUtils]: 15: Hoare triple {14929#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14933#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:02:37,450 INFO L290 TraceCheckUtils]: 14: Hoare triple {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14929#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,451 INFO L290 TraceCheckUtils]: 13: Hoare triple {14974#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {14806#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:37,451 INFO L290 TraceCheckUtils]: 12: Hoare triple {14978#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14974#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:02:37,453 INFO L290 TraceCheckUtils]: 11: Hoare triple {14982#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14978#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 23:02:37,454 INFO L290 TraceCheckUtils]: 10: Hoare triple {14986#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14982#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 23:02:37,455 INFO L290 TraceCheckUtils]: 9: Hoare triple {14990#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14986#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:02:37,457 INFO L290 TraceCheckUtils]: 8: Hoare triple {14994#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14990#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:02:37,460 INFO L290 TraceCheckUtils]: 7: Hoare triple {14998#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14994#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:37,462 INFO L290 TraceCheckUtils]: 6: Hoare triple {15002#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14998#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 23:02:37,463 INFO L290 TraceCheckUtils]: 5: Hoare triple {14786#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15002#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:37,464 INFO L272 TraceCheckUtils]: 4: Hoare triple {14786#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:37,464 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14786#true} {14786#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:37,464 INFO L290 TraceCheckUtils]: 2: Hoare triple {14786#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:37,464 INFO L290 TraceCheckUtils]: 1: Hoare triple {14786#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14786#true} is VALID [2022-04-07 23:02:37,464 INFO L272 TraceCheckUtils]: 0: Hoare triple {14786#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14786#true} is VALID [2022-04-07 23:02:37,464 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:02:37,465 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1034398282] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:02:37,465 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:02:37,465 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 19] total 43 [2022-04-07 23:02:37,465 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187902397] [2022-04-07 23:02:37,465 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:02:37,466 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:02:37,466 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:02:37,466 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:37,758 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:37,758 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-04-07 23:02:37,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:02:37,759 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-04-07 23:02:37,759 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=1620, Unknown=0, NotChecked=0, Total=1806 [2022-04-07 23:02:37,759 INFO L87 Difference]: Start difference. First operand 153 states and 197 transitions. Second operand has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:20,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:20,019 INFO L93 Difference]: Finished difference Result 246 states and 296 transitions. [2022-04-07 23:03:20,019 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2022-04-07 23:03:20,019 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:03:20,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:03:20,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:20,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 91 transitions. [2022-04-07 23:03:20,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:20,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 91 transitions. [2022-04-07 23:03:20,022 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 51 states and 91 transitions. [2022-04-07 23:03:20,657 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 91 edges. 91 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:03:20,659 INFO L225 Difference]: With dead ends: 246 [2022-04-07 23:03:20,659 INFO L226 Difference]: Without dead ends: 210 [2022-04-07 23:03:20,660 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 45 SyntacticMatches, 4 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1528 ImplicationChecksByTransitivity, 36.8s TimeCoverageRelationStatistics Valid=777, Invalid=7410, Unknown=3, NotChecked=0, Total=8190 [2022-04-07 23:03:20,660 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 97 mSDsluCounter, 122 mSDsCounter, 0 mSdLazyCounter, 806 mSolverCounterSat, 142 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 97 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 948 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 142 IncrementalHoareTripleChecker+Valid, 806 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.6s IncrementalHoareTripleChecker+Time [2022-04-07 23:03:20,660 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [97 Valid, 134 Invalid, 948 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [142 Valid, 806 Invalid, 0 Unknown, 0 Unchecked, 3.6s Time] [2022-04-07 23:03:20,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2022-04-07 23:03:21,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 139. [2022-04-07 23:03:21,790 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:03:21,790 INFO L82 GeneralOperation]: Start isEquivalent. First operand 210 states. Second operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:21,791 INFO L74 IsIncluded]: Start isIncluded. First operand 210 states. Second operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:21,791 INFO L87 Difference]: Start difference. First operand 210 states. Second operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:21,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:21,793 INFO L93 Difference]: Finished difference Result 210 states and 258 transitions. [2022-04-07 23:03:21,794 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 258 transitions. [2022-04-07 23:03:21,794 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:03:21,794 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:03:21,794 INFO L74 IsIncluded]: Start isIncluded. First operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 210 states. [2022-04-07 23:03:21,795 INFO L87 Difference]: Start difference. First operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 210 states. [2022-04-07 23:03:21,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:21,800 INFO L93 Difference]: Finished difference Result 210 states and 258 transitions. [2022-04-07 23:03:21,800 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 258 transitions. [2022-04-07 23:03:21,801 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:03:21,801 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:03:21,801 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:03:21,801 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:03:21,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:21,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 180 transitions. [2022-04-07 23:03:21,804 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 180 transitions. Word has length 32 [2022-04-07 23:03:21,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:03:21,804 INFO L478 AbstractCegarLoop]: Abstraction has 139 states and 180 transitions. [2022-04-07 23:03:21,804 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:21,804 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 180 transitions. [2022-04-07 23:03:21,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 23:03:21,805 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:03:21,805 INFO L499 BasicCegarLoop]: trace histogram [15, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:03:21,821 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-07 23:03:22,007 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:03:22,008 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:03:22,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:03:22,008 INFO L85 PathProgramCache]: Analyzing trace with hash -894600297, now seen corresponding path program 15 times [2022-04-07 23:03:22,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:03:22,008 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073087666] [2022-04-07 23:03:22,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:03:22,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:03:22,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:22,366 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:03:22,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:22,376 INFO L290 TraceCheckUtils]: 0: Hoare triple {16179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16155#true} is VALID [2022-04-07 23:03:22,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {16155#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:22,376 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16155#true} {16155#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:22,376 INFO L272 TraceCheckUtils]: 0: Hoare triple {16155#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:03:22,376 INFO L290 TraceCheckUtils]: 1: Hoare triple {16179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16155#true} is VALID [2022-04-07 23:03:22,376 INFO L290 TraceCheckUtils]: 2: Hoare triple {16155#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:22,377 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16155#true} {16155#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:22,377 INFO L272 TraceCheckUtils]: 4: Hoare triple {16155#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:22,377 INFO L290 TraceCheckUtils]: 5: Hoare triple {16155#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16160#(= main_~y~0 0)} is VALID [2022-04-07 23:03:22,377 INFO L290 TraceCheckUtils]: 6: Hoare triple {16160#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16161#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:22,378 INFO L290 TraceCheckUtils]: 7: Hoare triple {16161#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:22,378 INFO L290 TraceCheckUtils]: 8: Hoare triple {16162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16163#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:22,379 INFO L290 TraceCheckUtils]: 9: Hoare triple {16163#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16164#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:22,380 INFO L290 TraceCheckUtils]: 10: Hoare triple {16164#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16165#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:03:22,380 INFO L290 TraceCheckUtils]: 11: Hoare triple {16165#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16166#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:03:22,391 INFO L290 TraceCheckUtils]: 12: Hoare triple {16166#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16167#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:03:22,392 INFO L290 TraceCheckUtils]: 13: Hoare triple {16167#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16168#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:03:22,393 INFO L290 TraceCheckUtils]: 14: Hoare triple {16168#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16169#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:03:22,394 INFO L290 TraceCheckUtils]: 15: Hoare triple {16169#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16170#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:03:22,394 INFO L290 TraceCheckUtils]: 16: Hoare triple {16170#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16171#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:03:22,395 INFO L290 TraceCheckUtils]: 17: Hoare triple {16171#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16172#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:03:22,396 INFO L290 TraceCheckUtils]: 18: Hoare triple {16172#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16173#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:03:22,397 INFO L290 TraceCheckUtils]: 19: Hoare triple {16173#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16174#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:03:22,397 INFO L290 TraceCheckUtils]: 20: Hoare triple {16174#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16175#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-07 23:03:22,398 INFO L290 TraceCheckUtils]: 21: Hoare triple {16175#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16175#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-07 23:03:22,398 INFO L290 TraceCheckUtils]: 22: Hoare triple {16175#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16176#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-07 23:03:22,399 INFO L290 TraceCheckUtils]: 23: Hoare triple {16176#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16177#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 23:03:22,400 INFO L290 TraceCheckUtils]: 24: Hoare triple {16177#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16178#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:03:22,400 INFO L290 TraceCheckUtils]: 25: Hoare triple {16178#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:22,400 INFO L290 TraceCheckUtils]: 26: Hoare triple {16156#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16156#false} is VALID [2022-04-07 23:03:22,400 INFO L290 TraceCheckUtils]: 27: Hoare triple {16156#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16156#false} is VALID [2022-04-07 23:03:22,401 INFO L290 TraceCheckUtils]: 28: Hoare triple {16156#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:22,401 INFO L272 TraceCheckUtils]: 29: Hoare triple {16156#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16156#false} is VALID [2022-04-07 23:03:22,401 INFO L290 TraceCheckUtils]: 30: Hoare triple {16156#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16156#false} is VALID [2022-04-07 23:03:22,401 INFO L290 TraceCheckUtils]: 31: Hoare triple {16156#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:22,401 INFO L290 TraceCheckUtils]: 32: Hoare triple {16156#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:22,401 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 23:03:22,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:03:22,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073087666] [2022-04-07 23:03:22,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1073087666] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:03:22,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2050314515] [2022-04-07 23:03:22,401 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:03:22,402 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:03:22,402 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:03:22,402 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:03:22,404 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-07 23:03:22,781 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-07 23:03:22,781 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:03:22,782 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-07 23:03:22,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:22,793 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:03:23,105 INFO L272 TraceCheckUtils]: 0: Hoare triple {16155#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:23,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {16155#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16155#true} is VALID [2022-04-07 23:03:23,106 INFO L290 TraceCheckUtils]: 2: Hoare triple {16155#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:23,106 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16155#true} {16155#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:23,106 INFO L272 TraceCheckUtils]: 4: Hoare triple {16155#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:23,106 INFO L290 TraceCheckUtils]: 5: Hoare triple {16155#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16160#(= main_~y~0 0)} is VALID [2022-04-07 23:03:23,107 INFO L290 TraceCheckUtils]: 6: Hoare triple {16160#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16161#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:23,108 INFO L290 TraceCheckUtils]: 7: Hoare triple {16161#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:23,108 INFO L290 TraceCheckUtils]: 8: Hoare triple {16162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16163#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:23,109 INFO L290 TraceCheckUtils]: 9: Hoare triple {16163#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16164#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:23,110 INFO L290 TraceCheckUtils]: 10: Hoare triple {16164#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16165#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:03:23,111 INFO L290 TraceCheckUtils]: 11: Hoare triple {16165#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16166#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:03:23,111 INFO L290 TraceCheckUtils]: 12: Hoare triple {16166#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16167#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:03:23,112 INFO L290 TraceCheckUtils]: 13: Hoare triple {16167#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16168#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:03:23,113 INFO L290 TraceCheckUtils]: 14: Hoare triple {16168#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16169#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:03:23,114 INFO L290 TraceCheckUtils]: 15: Hoare triple {16169#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16170#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:03:23,114 INFO L290 TraceCheckUtils]: 16: Hoare triple {16170#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16171#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:03:23,115 INFO L290 TraceCheckUtils]: 17: Hoare triple {16171#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16172#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:03:23,116 INFO L290 TraceCheckUtils]: 18: Hoare triple {16172#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16173#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:03:23,117 INFO L290 TraceCheckUtils]: 19: Hoare triple {16173#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16174#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:03:23,117 INFO L290 TraceCheckUtils]: 20: Hoare triple {16174#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16175#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-07 23:03:23,118 INFO L290 TraceCheckUtils]: 21: Hoare triple {16175#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16175#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-07 23:03:23,118 INFO L290 TraceCheckUtils]: 22: Hoare triple {16175#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16176#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-07 23:03:23,119 INFO L290 TraceCheckUtils]: 23: Hoare triple {16176#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16177#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 23:03:23,120 INFO L290 TraceCheckUtils]: 24: Hoare triple {16177#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16255#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 23:03:23,120 INFO L290 TraceCheckUtils]: 25: Hoare triple {16255#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:23,120 INFO L290 TraceCheckUtils]: 26: Hoare triple {16156#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16156#false} is VALID [2022-04-07 23:03:23,120 INFO L290 TraceCheckUtils]: 27: Hoare triple {16156#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16156#false} is VALID [2022-04-07 23:03:23,121 INFO L290 TraceCheckUtils]: 28: Hoare triple {16156#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:23,121 INFO L272 TraceCheckUtils]: 29: Hoare triple {16156#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16156#false} is VALID [2022-04-07 23:03:23,121 INFO L290 TraceCheckUtils]: 30: Hoare triple {16156#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16156#false} is VALID [2022-04-07 23:03:23,121 INFO L290 TraceCheckUtils]: 31: Hoare triple {16156#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:23,121 INFO L290 TraceCheckUtils]: 32: Hoare triple {16156#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:23,121 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 23:03:23,121 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:03:23,767 INFO L290 TraceCheckUtils]: 32: Hoare triple {16156#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:23,767 INFO L290 TraceCheckUtils]: 31: Hoare triple {16156#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:23,767 INFO L290 TraceCheckUtils]: 30: Hoare triple {16156#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16156#false} is VALID [2022-04-07 23:03:23,767 INFO L272 TraceCheckUtils]: 29: Hoare triple {16156#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16156#false} is VALID [2022-04-07 23:03:23,767 INFO L290 TraceCheckUtils]: 28: Hoare triple {16156#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:23,767 INFO L290 TraceCheckUtils]: 27: Hoare triple {16156#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16156#false} is VALID [2022-04-07 23:03:23,767 INFO L290 TraceCheckUtils]: 26: Hoare triple {16156#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16156#false} is VALID [2022-04-07 23:03:23,768 INFO L290 TraceCheckUtils]: 25: Hoare triple {16301#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16156#false} is VALID [2022-04-07 23:03:23,769 INFO L290 TraceCheckUtils]: 24: Hoare triple {16305#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16301#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 23:03:23,770 INFO L290 TraceCheckUtils]: 23: Hoare triple {16309#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16305#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 23:03:23,770 INFO L290 TraceCheckUtils]: 22: Hoare triple {16313#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16309#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-07 23:03:23,770 INFO L290 TraceCheckUtils]: 21: Hoare triple {16313#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16313#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:03:23,771 INFO L290 TraceCheckUtils]: 20: Hoare triple {16320#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16313#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:03:23,772 INFO L290 TraceCheckUtils]: 19: Hoare triple {16324#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16320#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:03:23,773 INFO L290 TraceCheckUtils]: 18: Hoare triple {16328#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16324#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:03:23,773 INFO L290 TraceCheckUtils]: 17: Hoare triple {16332#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16328#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:03:23,774 INFO L290 TraceCheckUtils]: 16: Hoare triple {16336#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16332#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:03:23,775 INFO L290 TraceCheckUtils]: 15: Hoare triple {16340#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16336#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:03:23,775 INFO L290 TraceCheckUtils]: 14: Hoare triple {16344#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16340#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:03:23,776 INFO L290 TraceCheckUtils]: 13: Hoare triple {16348#(< 0 (mod (+ main_~y~0 6) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16344#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 23:03:23,777 INFO L290 TraceCheckUtils]: 12: Hoare triple {16352#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16348#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 23:03:23,778 INFO L290 TraceCheckUtils]: 11: Hoare triple {16356#(< 0 (mod (+ main_~y~0 8) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16352#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 23:03:23,778 INFO L290 TraceCheckUtils]: 10: Hoare triple {16360#(< 0 (mod (+ main_~y~0 9) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16356#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 23:03:23,779 INFO L290 TraceCheckUtils]: 9: Hoare triple {16364#(< 0 (mod (+ main_~y~0 10) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16360#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 23:03:23,780 INFO L290 TraceCheckUtils]: 8: Hoare triple {16368#(< 0 (mod (+ main_~y~0 11) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16364#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 23:03:23,780 INFO L290 TraceCheckUtils]: 7: Hoare triple {16372#(< 0 (mod (+ main_~y~0 12) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16368#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 23:03:23,781 INFO L290 TraceCheckUtils]: 6: Hoare triple {16376#(< 0 (mod (+ main_~y~0 13) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16372#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-07 23:03:23,781 INFO L290 TraceCheckUtils]: 5: Hoare triple {16155#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16376#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-07 23:03:23,782 INFO L272 TraceCheckUtils]: 4: Hoare triple {16155#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:23,782 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16155#true} {16155#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:23,782 INFO L290 TraceCheckUtils]: 2: Hoare triple {16155#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:23,782 INFO L290 TraceCheckUtils]: 1: Hoare triple {16155#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16155#true} is VALID [2022-04-07 23:03:23,782 INFO L272 TraceCheckUtils]: 0: Hoare triple {16155#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16155#true} is VALID [2022-04-07 23:03:23,782 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 23:03:23,782 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2050314515] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:03:23,782 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:03:23,782 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-07 23:03:23,782 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694761051] [2022-04-07 23:03:23,783 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:03:23,783 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:03:23,783 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:03:23,783 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:23,821 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:03:23,821 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-07 23:03:23,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:03:23,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-07 23:03:23,822 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1373, Unknown=0, NotChecked=0, Total=1722 [2022-04-07 23:03:23,822 INFO L87 Difference]: Start difference. First operand 139 states and 180 transitions. Second operand has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:45,905 WARN L232 SmtUtils]: Spent 9.82s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:04:02,727 WARN L232 SmtUtils]: Spent 10.34s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:04:29,995 WARN L232 SmtUtils]: Spent 17.81s on a formula simplification that was a NOOP. DAG size: 81 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:04:40,656 WARN L232 SmtUtils]: Spent 5.13s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:04:56,822 WARN L232 SmtUtils]: Spent 11.48s on a formula simplification that was a NOOP. DAG size: 78 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:05:21,490 WARN L232 SmtUtils]: Spent 13.82s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:05:33,851 WARN L232 SmtUtils]: Spent 5.88s on a formula simplification that was a NOOP. DAG size: 60 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:05:52,027 WARN L232 SmtUtils]: Spent 11.75s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:06:07,413 WARN L232 SmtUtils]: Spent 9.35s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:06:28,004 WARN L232 SmtUtils]: Spent 11.62s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:06:45,782 WARN L232 SmtUtils]: Spent 6.09s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:06:59,323 WARN L232 SmtUtils]: Spent 5.59s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)