/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de41.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 22:57:27,728 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 22:57:27,730 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 22:57:27,754 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 22:57:27,755 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 22:57:27,755 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 22:57:27,756 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 22:57:27,757 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 22:57:27,759 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 22:57:27,761 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 22:57:27,762 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 22:57:27,763 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 22:57:27,763 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 22:57:27,763 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 22:57:27,764 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 22:57:27,765 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 22:57:27,765 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 22:57:27,766 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 22:57:27,767 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 22:57:27,768 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 22:57:27,769 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 22:57:27,770 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 22:57:27,771 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 22:57:27,772 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 22:57:27,772 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 22:57:27,774 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 22:57:27,779 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 22:57:27,780 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 22:57:27,785 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 22:57:27,786 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-07 22:57:27,801 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 22:57:27,801 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 22:57:27,802 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-07 22:57:27,802 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-07 22:57:27,802 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-07 22:57:27,802 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-07 22:57:27,802 INFO L138 SettingsManager]: * Use SBE=true [2022-04-07 22:57:27,803 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 22:57:27,803 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 22:57:27,803 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 22:57:27,807 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 22:57:27,807 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 22:57:27,807 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 22:57:27,807 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 22:57:27,807 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 22:57:27,807 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 22:57:27,808 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:57:27,808 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-07 22:57:27,808 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-07 22:57:27,809 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-07 22:57:27,809 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 22:57:27,809 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 22:57:27,974 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 22:57:27,994 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 22:57:27,996 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 22:57:27,997 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 22:57:27,997 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 22:57:27,998 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de41.c [2022-04-07 22:57:28,036 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/52112c741/3dea759ef775498ca873d148e54ca0a5/FLAG780ccaa14 [2022-04-07 22:57:28,360 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 22:57:28,360 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c [2022-04-07 22:57:28,363 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/52112c741/3dea759ef775498ca873d148e54ca0a5/FLAG780ccaa14 [2022-04-07 22:57:28,788 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/52112c741/3dea759ef775498ca873d148e54ca0a5 [2022-04-07 22:57:28,792 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 22:57:28,792 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 22:57:28,794 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 22:57:28,794 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 22:57:28,796 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 22:57:28,797 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,798 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@354d3627 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28, skipping insertion in model container [2022-04-07 22:57:28,798 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,802 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 22:57:28,813 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 22:57:28,922 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c[368,381] [2022-04-07 22:57:28,949 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:57:28,955 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 22:57:28,961 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c[368,381] [2022-04-07 22:57:28,964 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:57:28,972 INFO L208 MainTranslator]: Completed translation [2022-04-07 22:57:28,972 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28 WrapperNode [2022-04-07 22:57:28,972 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 22:57:28,977 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 22:57:28,977 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 22:57:28,977 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 22:57:28,984 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,984 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,987 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,988 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,991 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,994 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,995 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:28,996 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 22:57:28,996 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 22:57:28,996 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 22:57:28,996 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 22:57:28,998 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (1/1) ... [2022-04-07 22:57:29,008 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:57:29,015 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:29,024 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 22:57:29,027 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 22:57:29,049 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 22:57:29,049 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 22:57:29,050 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 22:57:29,050 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 22:57:29,050 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 22:57:29,050 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 22:57:29,050 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 22:57:29,050 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 22:57:29,050 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 22:57:29,050 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 22:57:29,050 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 22:57:29,050 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 22:57:29,050 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 22:57:29,051 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 22:57:29,051 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 22:57:29,051 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 22:57:29,051 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 22:57:29,051 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 22:57:29,101 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 22:57:29,102 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 22:57:29,261 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 22:57:29,265 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 22:57:29,266 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-04-07 22:57:29,267 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:57:29 BoogieIcfgContainer [2022-04-07 22:57:29,267 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 22:57:29,267 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 22:57:29,267 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 22:57:29,268 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 22:57:29,273 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:57:29" (1/1) ... [2022-04-07 22:57:29,274 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-07 22:57:29,299 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:57:29 BasicIcfg [2022-04-07 22:57:29,300 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 22:57:29,301 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 22:57:29,301 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 22:57:29,307 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 22:57:29,307 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 10:57:28" (1/4) ... [2022-04-07 22:57:29,308 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6527bd97 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:57:29, skipping insertion in model container [2022-04-07 22:57:29,308 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:57:28" (2/4) ... [2022-04-07 22:57:29,308 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6527bd97 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:57:29, skipping insertion in model container [2022-04-07 22:57:29,308 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:57:29" (3/4) ... [2022-04-07 22:57:29,308 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6527bd97 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 10:57:29, skipping insertion in model container [2022-04-07 22:57:29,308 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:57:29" (4/4) ... [2022-04-07 22:57:29,309 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de41.cqvasr [2022-04-07 22:57:29,313 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-07 22:57:29,313 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 22:57:29,341 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 22:57:29,345 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 22:57:29,345 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 22:57:29,366 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:57:29,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 22:57:29,369 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:29,370 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:29,370 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:29,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:29,373 INFO L85 PathProgramCache]: Analyzing trace with hash -2015447748, now seen corresponding path program 1 times [2022-04-07 22:57:29,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:29,380 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322918701] [2022-04-07 22:57:29,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:29,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:29,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:29,482 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:29,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:29,515 INFO L290 TraceCheckUtils]: 0: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-07 22:57:29,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:57:29,516 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:57:29,518 INFO L272 TraceCheckUtils]: 0: Hoare triple {26#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:29,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-07 22:57:29,520 INFO L290 TraceCheckUtils]: 2: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:57:29,520 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:57:29,521 INFO L272 TraceCheckUtils]: 4: Hoare triple {26#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:57:29,521 INFO L290 TraceCheckUtils]: 5: Hoare triple {26#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26#true} is VALID [2022-04-07 22:57:29,523 INFO L290 TraceCheckUtils]: 6: Hoare triple {26#true} [81] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:57:29,523 INFO L290 TraceCheckUtils]: 7: Hoare triple {27#false} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {27#false} is VALID [2022-04-07 22:57:29,524 INFO L290 TraceCheckUtils]: 8: Hoare triple {27#false} [85] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:57:29,524 INFO L290 TraceCheckUtils]: 9: Hoare triple {27#false} [88] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:57:29,524 INFO L290 TraceCheckUtils]: 10: Hoare triple {27#false} [91] L35-1-->L35-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:57:29,524 INFO L272 TraceCheckUtils]: 11: Hoare triple {27#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {27#false} is VALID [2022-04-07 22:57:29,524 INFO L290 TraceCheckUtils]: 12: Hoare triple {27#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {27#false} is VALID [2022-04-07 22:57:29,525 INFO L290 TraceCheckUtils]: 13: Hoare triple {27#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:57:29,525 INFO L290 TraceCheckUtils]: 14: Hoare triple {27#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:57:29,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:29,525 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:29,526 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [322918701] [2022-04-07 22:57:29,526 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [322918701] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:57:29,526 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:57:29,526 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 22:57:29,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876268140] [2022-04-07 22:57:29,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:57:29,531 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:57:29,533 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:29,535 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,560 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:29,560 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 22:57:29,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:29,579 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 22:57:29,579 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:57:29,581 INFO L87 Difference]: Start difference. First operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:29,660 INFO L93 Difference]: Finished difference Result 39 states and 54 transitions. [2022-04-07 22:57:29,660 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 22:57:29,660 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:57:29,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:29,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 54 transitions. [2022-04-07 22:57:29,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 54 transitions. [2022-04-07 22:57:29,682 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 54 transitions. [2022-04-07 22:57:29,741 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:29,748 INFO L225 Difference]: With dead ends: 39 [2022-04-07 22:57:29,748 INFO L226 Difference]: Without dead ends: 16 [2022-04-07 22:57:29,751 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:57:29,754 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 17 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:29,755 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 28 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:57:29,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-07 22:57:29,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-07 22:57:29,779 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:29,780 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,780 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,781 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:29,783 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-07 22:57:29,784 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 22:57:29,784 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:29,784 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:29,785 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-07 22:57:29,785 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-07 22:57:29,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:29,788 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-07 22:57:29,788 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 22:57:29,788 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:29,788 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:29,788 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:29,789 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:29,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2022-04-07 22:57:29,794 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 19 transitions. Word has length 15 [2022-04-07 22:57:29,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:29,798 INFO L478 AbstractCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-04-07 22:57:29,799 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:29,799 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 22:57:29,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 22:57:29,799 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:29,799 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:29,800 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 22:57:29,800 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:29,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:29,803 INFO L85 PathProgramCache]: Analyzing trace with hash 1389121438, now seen corresponding path program 1 times [2022-04-07 22:57:29,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:29,803 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1815539052] [2022-04-07 22:57:29,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:29,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:29,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:30,124 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:30,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:30,135 INFO L290 TraceCheckUtils]: 0: Hoare triple {150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {140#true} is VALID [2022-04-07 22:57:30,136 INFO L290 TraceCheckUtils]: 1: Hoare triple {140#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:57:30,136 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {140#true} {140#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:57:30,136 INFO L272 TraceCheckUtils]: 0: Hoare triple {140#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:30,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {140#true} is VALID [2022-04-07 22:57:30,137 INFO L290 TraceCheckUtils]: 2: Hoare triple {140#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:57:30,137 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {140#true} {140#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:57:30,137 INFO L272 TraceCheckUtils]: 4: Hoare triple {140#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:57:30,138 INFO L290 TraceCheckUtils]: 5: Hoare triple {140#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {145#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:30,138 INFO L290 TraceCheckUtils]: 6: Hoare triple {145#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:30,139 INFO L290 TraceCheckUtils]: 7: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:30,139 INFO L290 TraceCheckUtils]: 8: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:30,140 INFO L290 TraceCheckUtils]: 9: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:30,141 INFO L290 TraceCheckUtils]: 10: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {147#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} is VALID [2022-04-07 22:57:30,141 INFO L272 TraceCheckUtils]: 11: Hoare triple {147#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {148#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:57:30,142 INFO L290 TraceCheckUtils]: 12: Hoare triple {148#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {149#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:57:30,142 INFO L290 TraceCheckUtils]: 13: Hoare triple {149#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {141#false} is VALID [2022-04-07 22:57:30,142 INFO L290 TraceCheckUtils]: 14: Hoare triple {141#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#false} is VALID [2022-04-07 22:57:30,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:30,143 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:30,143 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1815539052] [2022-04-07 22:57:30,143 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1815539052] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:57:30,143 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:57:30,143 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-07 22:57:30,143 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315260796] [2022-04-07 22:57:30,143 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:57:30,144 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:57:30,144 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:30,145 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,160 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:30,160 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-07 22:57:30,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:30,161 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-07 22:57:30,161 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-04-07 22:57:30,161 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. Second operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:30,390 INFO L93 Difference]: Finished difference Result 35 states and 46 transitions. [2022-04-07 22:57:30,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 22:57:30,391 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:57:30,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:30,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 46 transitions. [2022-04-07 22:57:30,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 46 transitions. [2022-04-07 22:57:30,397 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 46 transitions. [2022-04-07 22:57:30,434 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:30,435 INFO L225 Difference]: With dead ends: 35 [2022-04-07 22:57:30,435 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 22:57:30,436 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-07 22:57:30,436 INFO L913 BasicCegarLoop]: 11 mSDtfsCounter, 36 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:30,437 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [36 Valid, 38 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:57:30,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 22:57:30,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-07 22:57:30,441 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:30,441 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,442 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,442 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:30,443 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 22:57:30,443 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 22:57:30,444 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:30,444 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:30,444 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-07 22:57:30,445 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-07 22:57:30,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:30,446 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 22:57:30,447 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 22:57:30,447 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:30,465 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:30,465 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:30,465 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:30,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2022-04-07 22:57:30,466 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 27 transitions. Word has length 15 [2022-04-07 22:57:30,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:30,466 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 27 transitions. [2022-04-07 22:57:30,466 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:30,467 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 22:57:30,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 22:57:30,467 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:30,467 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:30,467 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 22:57:30,467 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:30,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:30,468 INFO L85 PathProgramCache]: Analyzing trace with hash 1590526661, now seen corresponding path program 1 times [2022-04-07 22:57:30,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:30,468 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051699029] [2022-04-07 22:57:30,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:30,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:30,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:30,566 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:30,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:30,584 INFO L290 TraceCheckUtils]: 0: Hoare triple {299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-07 22:57:30,584 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,585 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,585 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:30,586 INFO L290 TraceCheckUtils]: 1: Hoare triple {299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-07 22:57:30,586 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,586 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,586 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,587 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {296#(= main_~y~0 0)} is VALID [2022-04-07 22:57:30,588 INFO L290 TraceCheckUtils]: 6: Hoare triple {296#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:30,588 INFO L290 TraceCheckUtils]: 7: Hoare triple {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:30,589 INFO L290 TraceCheckUtils]: 8: Hoare triple {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {298#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:57:30,589 INFO L290 TraceCheckUtils]: 9: Hoare triple {298#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,592 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,592 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,594 INFO L272 TraceCheckUtils]: 12: Hoare triple {292#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {292#false} is VALID [2022-04-07 22:57:30,594 INFO L290 TraceCheckUtils]: 13: Hoare triple {292#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-07 22:57:30,594 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,594 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,595 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:30,595 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:30,595 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051699029] [2022-04-07 22:57:30,595 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2051699029] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:30,595 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [196924632] [2022-04-07 22:57:30,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:30,595 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:30,595 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:30,598 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:30,599 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 22:57:30,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:30,632 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 22:57:30,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:30,649 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:30,900 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,901 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-07 22:57:30,901 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,901 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,901 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,902 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {296#(= main_~y~0 0)} is VALID [2022-04-07 22:57:30,903 INFO L290 TraceCheckUtils]: 6: Hoare triple {296#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:30,903 INFO L290 TraceCheckUtils]: 7: Hoare triple {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:30,904 INFO L290 TraceCheckUtils]: 8: Hoare triple {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {327#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:57:30,904 INFO L290 TraceCheckUtils]: 9: Hoare triple {327#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,904 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,904 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,905 INFO L272 TraceCheckUtils]: 12: Hoare triple {292#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {292#false} is VALID [2022-04-07 22:57:30,905 INFO L290 TraceCheckUtils]: 13: Hoare triple {292#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-07 22:57:30,905 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,905 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,905 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:30,905 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:30,984 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,984 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,984 INFO L290 TraceCheckUtils]: 13: Hoare triple {292#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-07 22:57:30,985 INFO L272 TraceCheckUtils]: 12: Hoare triple {292#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {292#false} is VALID [2022-04-07 22:57:30,985 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,985 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,985 INFO L290 TraceCheckUtils]: 9: Hoare triple {367#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:57:30,986 INFO L290 TraceCheckUtils]: 8: Hoare triple {371#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {367#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:57:30,986 INFO L290 TraceCheckUtils]: 7: Hoare triple {371#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {371#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:57:30,987 INFO L290 TraceCheckUtils]: 6: Hoare triple {378#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {371#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:57:30,987 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {378#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:57:30,987 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,987 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,987 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,988 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-07 22:57:30,988 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:57:30,988 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:30,988 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [196924632] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:30,988 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:30,988 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-07 22:57:30,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441320434] [2022-04-07 22:57:30,988 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:30,989 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:57:30,989 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:30,989 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,003 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:31,004 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 22:57:31,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:31,004 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 22:57:31,004 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-07 22:57:31,005 INFO L87 Difference]: Start difference. First operand 22 states and 27 transitions. Second operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:31,404 INFO L93 Difference]: Finished difference Result 56 states and 81 transitions. [2022-04-07 22:57:31,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 22:57:31,404 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:57:31,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:31,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 78 transitions. [2022-04-07 22:57:31,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 78 transitions. [2022-04-07 22:57:31,408 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 78 transitions. [2022-04-07 22:57:31,470 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:31,471 INFO L225 Difference]: With dead ends: 56 [2022-04-07 22:57:31,471 INFO L226 Difference]: Without dead ends: 49 [2022-04-07 22:57:31,472 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2022-04-07 22:57:31,472 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 68 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 156 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:31,473 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [68 Valid, 45 Invalid, 156 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 111 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:57:31,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-07 22:57:31,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 34. [2022-04-07 22:57:31,491 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:31,492 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,493 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,494 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:31,500 INFO L93 Difference]: Finished difference Result 49 states and 66 transitions. [2022-04-07 22:57:31,500 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 66 transitions. [2022-04-07 22:57:31,500 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:31,500 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:31,501 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-07 22:57:31,501 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-07 22:57:31,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:31,505 INFO L93 Difference]: Finished difference Result 49 states and 66 transitions. [2022-04-07 22:57:31,505 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 66 transitions. [2022-04-07 22:57:31,510 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:31,510 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:31,510 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:31,510 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:31,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 44 transitions. [2022-04-07 22:57:31,511 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 44 transitions. Word has length 16 [2022-04-07 22:57:31,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:31,512 INFO L478 AbstractCegarLoop]: Abstraction has 34 states and 44 transitions. [2022-04-07 22:57:31,513 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,513 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 44 transitions. [2022-04-07 22:57:31,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 22:57:31,514 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:31,514 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:31,543 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:31,727 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:31,727 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:31,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:31,728 INFO L85 PathProgramCache]: Analyzing trace with hash -1930032162, now seen corresponding path program 1 times [2022-04-07 22:57:31,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:31,728 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1003253375] [2022-04-07 22:57:31,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:31,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:31,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:31,757 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:31,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:31,766 INFO L290 TraceCheckUtils]: 0: Hoare triple {655#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {648#true} is VALID [2022-04-07 22:57:31,766 INFO L290 TraceCheckUtils]: 1: Hoare triple {648#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-07 22:57:31,766 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {648#true} {648#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-07 22:57:31,767 INFO L272 TraceCheckUtils]: 0: Hoare triple {648#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {655#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:31,767 INFO L290 TraceCheckUtils]: 1: Hoare triple {655#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {648#true} is VALID [2022-04-07 22:57:31,767 INFO L290 TraceCheckUtils]: 2: Hoare triple {648#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-07 22:57:31,767 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {648#true} {648#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-07 22:57:31,767 INFO L272 TraceCheckUtils]: 4: Hoare triple {648#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-07 22:57:31,768 INFO L290 TraceCheckUtils]: 5: Hoare triple {648#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {653#(= main_~y~0 0)} is VALID [2022-04-07 22:57:31,768 INFO L290 TraceCheckUtils]: 6: Hoare triple {653#(= main_~y~0 0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {653#(= main_~y~0 0)} is VALID [2022-04-07 22:57:31,768 INFO L290 TraceCheckUtils]: 7: Hoare triple {653#(= main_~y~0 0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {654#(= main_~z~0 0)} is VALID [2022-04-07 22:57:31,769 INFO L290 TraceCheckUtils]: 8: Hoare triple {654#(= main_~z~0 0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {649#false} is VALID [2022-04-07 22:57:31,769 INFO L290 TraceCheckUtils]: 9: Hoare triple {649#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-07 22:57:31,769 INFO L290 TraceCheckUtils]: 10: Hoare triple {649#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-07 22:57:31,769 INFO L290 TraceCheckUtils]: 11: Hoare triple {649#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {649#false} is VALID [2022-04-07 22:57:31,769 INFO L290 TraceCheckUtils]: 12: Hoare triple {649#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-07 22:57:31,769 INFO L272 TraceCheckUtils]: 13: Hoare triple {649#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {649#false} is VALID [2022-04-07 22:57:31,770 INFO L290 TraceCheckUtils]: 14: Hoare triple {649#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {649#false} is VALID [2022-04-07 22:57:31,770 INFO L290 TraceCheckUtils]: 15: Hoare triple {649#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-07 22:57:31,770 INFO L290 TraceCheckUtils]: 16: Hoare triple {649#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-07 22:57:31,770 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:31,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:31,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1003253375] [2022-04-07 22:57:31,770 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1003253375] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:57:31,770 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:57:31,770 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 22:57:31,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1925603365] [2022-04-07 22:57:31,771 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:57:31,771 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 22:57:31,771 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:31,771 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,781 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:31,781 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 22:57:31,781 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:31,782 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 22:57:31,782 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:57:31,782 INFO L87 Difference]: Start difference. First operand 34 states and 44 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:31,856 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2022-04-07 22:57:31,856 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 22:57:31,857 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 22:57:31,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:31,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 32 transitions. [2022-04-07 22:57:31,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 32 transitions. [2022-04-07 22:57:31,859 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 32 transitions. [2022-04-07 22:57:31,882 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:31,883 INFO L225 Difference]: With dead ends: 40 [2022-04-07 22:57:31,883 INFO L226 Difference]: Without dead ends: 29 [2022-04-07 22:57:31,883 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-07 22:57:31,884 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 16 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:31,884 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 29 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:57:31,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-07 22:57:31,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2022-04-07 22:57:31,896 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:31,896 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,896 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,896 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:31,898 INFO L93 Difference]: Finished difference Result 29 states and 37 transitions. [2022-04-07 22:57:31,898 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-07 22:57:31,898 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:31,898 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:31,898 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-07 22:57:31,898 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-07 22:57:31,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:31,899 INFO L93 Difference]: Finished difference Result 29 states and 37 transitions. [2022-04-07 22:57:31,899 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-07 22:57:31,899 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:31,899 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:31,899 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:31,899 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:31,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2022-04-07 22:57:31,900 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 37 transitions. Word has length 17 [2022-04-07 22:57:31,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:31,900 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 37 transitions. [2022-04-07 22:57:31,900 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:31,900 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-07 22:57:31,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 22:57:31,901 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:31,901 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:31,901 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-07 22:57:31,901 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:31,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:31,901 INFO L85 PathProgramCache]: Analyzing trace with hash -880154102, now seen corresponding path program 1 times [2022-04-07 22:57:31,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:31,901 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752404719] [2022-04-07 22:57:31,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:31,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:31,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:31,955 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:31,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:31,959 INFO L290 TraceCheckUtils]: 0: Hoare triple {832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {825#true} is VALID [2022-04-07 22:57:31,960 INFO L290 TraceCheckUtils]: 1: Hoare triple {825#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:31,960 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {825#true} {825#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:31,960 INFO L272 TraceCheckUtils]: 0: Hoare triple {825#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:31,960 INFO L290 TraceCheckUtils]: 1: Hoare triple {832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {825#true} is VALID [2022-04-07 22:57:31,961 INFO L290 TraceCheckUtils]: 2: Hoare triple {825#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:31,961 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {825#true} {825#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:31,961 INFO L272 TraceCheckUtils]: 4: Hoare triple {825#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:31,961 INFO L290 TraceCheckUtils]: 5: Hoare triple {825#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {825#true} is VALID [2022-04-07 22:57:31,962 INFO L290 TraceCheckUtils]: 6: Hoare triple {825#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:31,962 INFO L290 TraceCheckUtils]: 7: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:31,962 INFO L290 TraceCheckUtils]: 8: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:31,963 INFO L290 TraceCheckUtils]: 9: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:31,964 INFO L290 TraceCheckUtils]: 10: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:31,964 INFO L290 TraceCheckUtils]: 11: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:31,964 INFO L290 TraceCheckUtils]: 12: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:31,965 INFO L290 TraceCheckUtils]: 13: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:31,965 INFO L272 TraceCheckUtils]: 14: Hoare triple {826#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {826#false} is VALID [2022-04-07 22:57:31,965 INFO L290 TraceCheckUtils]: 15: Hoare triple {826#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {826#false} is VALID [2022-04-07 22:57:31,965 INFO L290 TraceCheckUtils]: 16: Hoare triple {826#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:31,965 INFO L290 TraceCheckUtils]: 17: Hoare triple {826#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:31,965 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:31,965 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:31,965 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1752404719] [2022-04-07 22:57:31,966 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1752404719] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:31,966 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [989944302] [2022-04-07 22:57:31,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:31,966 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:31,966 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:31,967 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:31,968 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 22:57:31,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:31,996 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 22:57:32,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:32,002 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:32,274 INFO L272 TraceCheckUtils]: 0: Hoare triple {825#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:32,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {825#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {825#true} is VALID [2022-04-07 22:57:32,275 INFO L290 TraceCheckUtils]: 2: Hoare triple {825#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:32,275 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {825#true} {825#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:32,275 INFO L272 TraceCheckUtils]: 4: Hoare triple {825#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:32,275 INFO L290 TraceCheckUtils]: 5: Hoare triple {825#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {825#true} is VALID [2022-04-07 22:57:32,285 INFO L290 TraceCheckUtils]: 6: Hoare triple {825#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:32,285 INFO L290 TraceCheckUtils]: 7: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:32,285 INFO L290 TraceCheckUtils]: 8: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:32,286 INFO L290 TraceCheckUtils]: 9: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:32,287 INFO L290 TraceCheckUtils]: 10: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:32,287 INFO L290 TraceCheckUtils]: 11: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:32,288 INFO L290 TraceCheckUtils]: 12: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:32,288 INFO L290 TraceCheckUtils]: 13: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:32,288 INFO L272 TraceCheckUtils]: 14: Hoare triple {826#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {826#false} is VALID [2022-04-07 22:57:32,288 INFO L290 TraceCheckUtils]: 15: Hoare triple {826#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {826#false} is VALID [2022-04-07 22:57:32,288 INFO L290 TraceCheckUtils]: 16: Hoare triple {826#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:32,296 INFO L290 TraceCheckUtils]: 17: Hoare triple {826#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:32,296 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:32,296 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:32,375 INFO L290 TraceCheckUtils]: 17: Hoare triple {826#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:32,375 INFO L290 TraceCheckUtils]: 16: Hoare triple {826#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:32,375 INFO L290 TraceCheckUtils]: 15: Hoare triple {826#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {826#false} is VALID [2022-04-07 22:57:32,375 INFO L272 TraceCheckUtils]: 14: Hoare triple {826#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {826#false} is VALID [2022-04-07 22:57:32,376 INFO L290 TraceCheckUtils]: 13: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-07 22:57:32,376 INFO L290 TraceCheckUtils]: 12: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:32,377 INFO L290 TraceCheckUtils]: 11: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:32,377 INFO L290 TraceCheckUtils]: 10: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:32,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:57:32,378 INFO L290 TraceCheckUtils]: 8: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:32,378 INFO L290 TraceCheckUtils]: 7: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:32,379 INFO L290 TraceCheckUtils]: 6: Hoare triple {825#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:32,379 INFO L290 TraceCheckUtils]: 5: Hoare triple {825#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {825#true} is VALID [2022-04-07 22:57:32,379 INFO L272 TraceCheckUtils]: 4: Hoare triple {825#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:32,379 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {825#true} {825#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:32,380 INFO L290 TraceCheckUtils]: 2: Hoare triple {825#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:32,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {825#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {825#true} is VALID [2022-04-07 22:57:32,380 INFO L272 TraceCheckUtils]: 0: Hoare triple {825#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-07 22:57:32,380 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:32,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [989944302] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:32,380 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:32,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-07 22:57:32,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1455287260] [2022-04-07 22:57:32,380 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:32,381 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 22:57:32,381 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:32,381 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,394 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:32,394 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 22:57:32,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:32,394 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 22:57:32,394 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:57:32,394 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:32,514 INFO L93 Difference]: Finished difference Result 45 states and 60 transitions. [2022-04-07 22:57:32,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 22:57:32,514 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 22:57:32,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:32,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-07 22:57:32,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-07 22:57:32,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 36 transitions. [2022-04-07 22:57:32,546 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:32,546 INFO L225 Difference]: With dead ends: 45 [2022-04-07 22:57:32,546 INFO L226 Difference]: Without dead ends: 40 [2022-04-07 22:57:32,547 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 34 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-07 22:57:32,547 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:32,547 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 30 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:57:32,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-07 22:57:32,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 38. [2022-04-07 22:57:32,572 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:32,572 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,573 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,573 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:32,574 INFO L93 Difference]: Finished difference Result 40 states and 55 transitions. [2022-04-07 22:57:32,574 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 55 transitions. [2022-04-07 22:57:32,574 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:32,574 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:32,574 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40 states. [2022-04-07 22:57:32,574 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40 states. [2022-04-07 22:57:32,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:32,575 INFO L93 Difference]: Finished difference Result 40 states and 55 transitions. [2022-04-07 22:57:32,575 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 55 transitions. [2022-04-07 22:57:32,575 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:32,575 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:32,575 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:32,575 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:32,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 51 transitions. [2022-04-07 22:57:32,576 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 51 transitions. Word has length 18 [2022-04-07 22:57:32,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:32,576 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 51 transitions. [2022-04-07 22:57:32,577 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:32,577 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 51 transitions. [2022-04-07 22:57:32,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:57:32,577 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:32,577 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:32,593 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:32,787 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:32,787 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:32,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:32,788 INFO L85 PathProgramCache]: Analyzing trace with hash -1488252743, now seen corresponding path program 1 times [2022-04-07 22:57:32,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:32,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [20656698] [2022-04-07 22:57:32,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:32,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:32,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:32,987 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:32,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:32,996 INFO L290 TraceCheckUtils]: 0: Hoare triple {1161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1149#true} is VALID [2022-04-07 22:57:32,996 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:32,996 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1149#true} {1149#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:32,997 INFO L272 TraceCheckUtils]: 0: Hoare triple {1149#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:32,997 INFO L290 TraceCheckUtils]: 1: Hoare triple {1161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1149#true} is VALID [2022-04-07 22:57:32,997 INFO L290 TraceCheckUtils]: 2: Hoare triple {1149#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:32,997 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1149#true} {1149#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:32,997 INFO L272 TraceCheckUtils]: 4: Hoare triple {1149#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:32,998 INFO L290 TraceCheckUtils]: 5: Hoare triple {1149#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1154#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:33,002 INFO L290 TraceCheckUtils]: 6: Hoare triple {1154#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1155#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~y~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-07 22:57:33,004 INFO L290 TraceCheckUtils]: 7: Hoare triple {1155#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~y~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-07 22:57:33,004 INFO L290 TraceCheckUtils]: 8: Hoare triple {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-07 22:57:33,005 INFO L290 TraceCheckUtils]: 9: Hoare triple {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-07 22:57:33,005 INFO L290 TraceCheckUtils]: 10: Hoare triple {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-07 22:57:33,009 INFO L290 TraceCheckUtils]: 11: Hoare triple {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1157#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) main_~y~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ (* (div (+ (- 1) main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-07 22:57:33,010 INFO L290 TraceCheckUtils]: 12: Hoare triple {1157#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) main_~y~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ (* (div (+ (- 1) main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1157#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) main_~y~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ (* (div (+ (- 1) main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-07 22:57:33,012 INFO L290 TraceCheckUtils]: 13: Hoare triple {1157#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) main_~y~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ (* (div (+ (- 1) main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:33,012 INFO L290 TraceCheckUtils]: 14: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:33,013 INFO L272 TraceCheckUtils]: 15: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1159#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:57:33,013 INFO L290 TraceCheckUtils]: 16: Hoare triple {1159#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1160#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:57:33,014 INFO L290 TraceCheckUtils]: 17: Hoare triple {1160#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-07 22:57:33,014 INFO L290 TraceCheckUtils]: 18: Hoare triple {1150#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-07 22:57:33,014 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:33,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:33,014 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [20656698] [2022-04-07 22:57:33,014 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [20656698] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:33,014 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2078604763] [2022-04-07 22:57:33,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:33,015 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:33,015 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:33,015 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:33,051 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 22:57:33,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:33,068 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-07 22:57:33,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:33,074 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:33,433 INFO L272 TraceCheckUtils]: 0: Hoare triple {1149#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:33,433 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1149#true} is VALID [2022-04-07 22:57:33,433 INFO L290 TraceCheckUtils]: 2: Hoare triple {1149#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:33,433 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1149#true} {1149#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:33,433 INFO L272 TraceCheckUtils]: 4: Hoare triple {1149#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:33,436 INFO L290 TraceCheckUtils]: 5: Hoare triple {1149#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1154#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:33,437 INFO L290 TraceCheckUtils]: 6: Hoare triple {1154#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1183#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} is VALID [2022-04-07 22:57:33,437 INFO L290 TraceCheckUtils]: 7: Hoare triple {1183#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1187#(and (= (+ main_~x~0 1) main_~n~0) (= main_~y~0 1) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-07 22:57:33,437 INFO L290 TraceCheckUtils]: 8: Hoare triple {1187#(and (= (+ main_~x~0 1) main_~n~0) (= main_~y~0 1) (<= (mod main_~x~0 4294967296) 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1191#(and (= (+ main_~x~0 1) main_~n~0) (= main_~z~0 main_~y~0) (= main_~y~0 1) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-07 22:57:33,438 INFO L290 TraceCheckUtils]: 9: Hoare triple {1191#(and (= (+ main_~x~0 1) main_~n~0) (= main_~z~0 main_~y~0) (= main_~y~0 1) (<= (mod main_~x~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:57:33,438 INFO L290 TraceCheckUtils]: 10: Hoare triple {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:57:33,439 INFO L290 TraceCheckUtils]: 11: Hoare triple {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1202#(and (= (+ main_~y~0 1) 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:57:33,439 INFO L290 TraceCheckUtils]: 12: Hoare triple {1202#(and (= (+ main_~y~0 1) 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1202#(and (= (+ main_~y~0 1) 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:57:33,440 INFO L290 TraceCheckUtils]: 13: Hoare triple {1202#(and (= (+ main_~y~0 1) 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:57:33,440 INFO L290 TraceCheckUtils]: 14: Hoare triple {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:57:33,443 INFO L272 TraceCheckUtils]: 15: Hoare triple {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1215#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:57:33,443 INFO L290 TraceCheckUtils]: 16: Hoare triple {1215#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1219#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:57:33,444 INFO L290 TraceCheckUtils]: 17: Hoare triple {1219#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-07 22:57:33,444 INFO L290 TraceCheckUtils]: 18: Hoare triple {1150#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-07 22:57:33,444 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:33,444 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:33,907 INFO L290 TraceCheckUtils]: 18: Hoare triple {1150#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-07 22:57:33,907 INFO L290 TraceCheckUtils]: 17: Hoare triple {1219#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-07 22:57:33,908 INFO L290 TraceCheckUtils]: 16: Hoare triple {1215#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1219#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:57:33,909 INFO L272 TraceCheckUtils]: 15: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1215#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:57:33,909 INFO L290 TraceCheckUtils]: 14: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:33,910 INFO L290 TraceCheckUtils]: 13: Hoare triple {1241#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:33,911 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1241#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:33,912 INFO L290 TraceCheckUtils]: 11: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1241#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:33,912 INFO L290 TraceCheckUtils]: 10: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:33,913 INFO L290 TraceCheckUtils]: 9: Hoare triple {1254#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (mod main_~z~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:33,913 INFO L290 TraceCheckUtils]: 8: Hoare triple {1258#(or (<= (mod main_~y~0 4294967296) 0) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1254#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:57:33,914 INFO L290 TraceCheckUtils]: 7: Hoare triple {1262#(or (<= (mod main_~y~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1258#(or (<= (mod main_~y~0 4294967296) 0) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:57:33,915 INFO L290 TraceCheckUtils]: 6: Hoare triple {1266#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1262#(or (<= (mod main_~y~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:57:33,916 INFO L290 TraceCheckUtils]: 5: Hoare triple {1149#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1266#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:57:33,916 INFO L272 TraceCheckUtils]: 4: Hoare triple {1149#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:33,916 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1149#true} {1149#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:33,916 INFO L290 TraceCheckUtils]: 2: Hoare triple {1149#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:33,917 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1149#true} is VALID [2022-04-07 22:57:33,917 INFO L272 TraceCheckUtils]: 0: Hoare triple {1149#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-07 22:57:33,917 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:33,917 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2078604763] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:33,917 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:33,917 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 22 [2022-04-07 22:57:33,917 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1120018889] [2022-04-07 22:57:33,917 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:33,918 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:57:33,918 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:33,918 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:33,968 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:33,969 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-07 22:57:33,970 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:33,970 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-07 22:57:33,970 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=370, Unknown=0, NotChecked=0, Total=462 [2022-04-07 22:57:33,971 INFO L87 Difference]: Start difference. First operand 38 states and 51 transitions. Second operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:35,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:35,501 INFO L93 Difference]: Finished difference Result 70 states and 97 transitions. [2022-04-07 22:57:35,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-07 22:57:35,501 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:57:35,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:35,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:35,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 75 transitions. [2022-04-07 22:57:35,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:35,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 75 transitions. [2022-04-07 22:57:35,504 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 75 transitions. [2022-04-07 22:57:35,683 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:35,684 INFO L225 Difference]: With dead ends: 70 [2022-04-07 22:57:35,684 INFO L226 Difference]: Without dead ends: 64 [2022-04-07 22:57:35,685 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 528 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=370, Invalid=1610, Unknown=0, NotChecked=0, Total=1980 [2022-04-07 22:57:35,685 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 107 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 190 mSolverCounterSat, 68 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 107 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 258 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 68 IncrementalHoareTripleChecker+Valid, 190 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:35,686 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [107 Valid, 46 Invalid, 258 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [68 Valid, 190 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 22:57:35,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-04-07 22:57:35,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 42. [2022-04-07 22:57:35,736 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:35,736 INFO L82 GeneralOperation]: Start isEquivalent. First operand 64 states. Second operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:35,736 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:35,736 INFO L87 Difference]: Start difference. First operand 64 states. Second operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:35,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:35,738 INFO L93 Difference]: Finished difference Result 64 states and 90 transitions. [2022-04-07 22:57:35,738 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 90 transitions. [2022-04-07 22:57:35,738 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:35,738 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:35,738 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-07 22:57:35,738 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-07 22:57:35,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:35,740 INFO L93 Difference]: Finished difference Result 64 states and 90 transitions. [2022-04-07 22:57:35,740 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 90 transitions. [2022-04-07 22:57:35,740 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:35,740 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:35,740 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:35,740 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:35,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:35,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 58 transitions. [2022-04-07 22:57:35,742 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 58 transitions. Word has length 19 [2022-04-07 22:57:35,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:35,742 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 58 transitions. [2022-04-07 22:57:35,742 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:35,742 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 58 transitions. [2022-04-07 22:57:35,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:57:35,742 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:35,742 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:35,761 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:35,961 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:35,961 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:35,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:35,961 INFO L85 PathProgramCache]: Analyzing trace with hash -904026877, now seen corresponding path program 2 times [2022-04-07 22:57:35,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:35,962 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349024643] [2022-04-07 22:57:35,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:35,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:35,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:36,025 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:36,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:36,033 INFO L290 TraceCheckUtils]: 0: Hoare triple {1632#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-07 22:57:36,033 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,033 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1623#true} {1623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,034 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1632#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:36,034 INFO L290 TraceCheckUtils]: 1: Hoare triple {1632#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-07 22:57:36,034 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,034 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,035 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,035 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1628#(= main_~y~0 0)} is VALID [2022-04-07 22:57:36,035 INFO L290 TraceCheckUtils]: 6: Hoare triple {1628#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:36,036 INFO L290 TraceCheckUtils]: 7: Hoare triple {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:36,036 INFO L290 TraceCheckUtils]: 8: Hoare triple {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1630#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:57:36,037 INFO L290 TraceCheckUtils]: 9: Hoare triple {1630#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1631#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 22:57:36,037 INFO L290 TraceCheckUtils]: 10: Hoare triple {1631#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1624#false} is VALID [2022-04-07 22:57:36,038 INFO L290 TraceCheckUtils]: 11: Hoare triple {1624#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,038 INFO L290 TraceCheckUtils]: 12: Hoare triple {1624#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1624#false} is VALID [2022-04-07 22:57:36,038 INFO L290 TraceCheckUtils]: 13: Hoare triple {1624#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,038 INFO L290 TraceCheckUtils]: 14: Hoare triple {1624#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,038 INFO L272 TraceCheckUtils]: 15: Hoare triple {1624#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1624#false} is VALID [2022-04-07 22:57:36,038 INFO L290 TraceCheckUtils]: 16: Hoare triple {1624#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#false} is VALID [2022-04-07 22:57:36,038 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,038 INFO L290 TraceCheckUtils]: 18: Hoare triple {1624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,039 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:36,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:36,039 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349024643] [2022-04-07 22:57:36,039 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1349024643] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:36,039 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1491887307] [2022-04-07 22:57:36,039 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:57:36,039 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:36,039 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:36,040 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:36,041 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 22:57:36,076 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:57:36,076 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:57:36,076 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 22:57:36,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:36,086 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:36,158 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-07 22:57:36,159 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,162 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,163 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,168 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1628#(= main_~y~0 0)} is VALID [2022-04-07 22:57:36,170 INFO L290 TraceCheckUtils]: 6: Hoare triple {1628#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:36,170 INFO L290 TraceCheckUtils]: 7: Hoare triple {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:36,171 INFO L290 TraceCheckUtils]: 8: Hoare triple {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1660#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:36,173 INFO L290 TraceCheckUtils]: 9: Hoare triple {1660#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1664#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:36,175 INFO L290 TraceCheckUtils]: 10: Hoare triple {1664#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1624#false} is VALID [2022-04-07 22:57:36,175 INFO L290 TraceCheckUtils]: 11: Hoare triple {1624#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,175 INFO L290 TraceCheckUtils]: 12: Hoare triple {1624#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1624#false} is VALID [2022-04-07 22:57:36,175 INFO L290 TraceCheckUtils]: 13: Hoare triple {1624#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,175 INFO L290 TraceCheckUtils]: 14: Hoare triple {1624#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,176 INFO L272 TraceCheckUtils]: 15: Hoare triple {1624#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1624#false} is VALID [2022-04-07 22:57:36,176 INFO L290 TraceCheckUtils]: 16: Hoare triple {1624#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#false} is VALID [2022-04-07 22:57:36,176 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,176 INFO L290 TraceCheckUtils]: 18: Hoare triple {1624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,176 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:36,176 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:36,265 INFO L290 TraceCheckUtils]: 18: Hoare triple {1624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,265 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,265 INFO L290 TraceCheckUtils]: 16: Hoare triple {1624#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#false} is VALID [2022-04-07 22:57:36,265 INFO L272 TraceCheckUtils]: 15: Hoare triple {1624#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1624#false} is VALID [2022-04-07 22:57:36,265 INFO L290 TraceCheckUtils]: 14: Hoare triple {1624#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,266 INFO L290 TraceCheckUtils]: 13: Hoare triple {1707#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-07 22:57:36,267 INFO L290 TraceCheckUtils]: 12: Hoare triple {1711#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1707#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:57:36,267 INFO L290 TraceCheckUtils]: 11: Hoare triple {1711#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1711#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:57:36,267 INFO L290 TraceCheckUtils]: 10: Hoare triple {1718#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1711#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:57:36,268 INFO L290 TraceCheckUtils]: 9: Hoare triple {1722#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1718#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 22:57:36,269 INFO L290 TraceCheckUtils]: 8: Hoare triple {1623#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1722#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:57:36,269 INFO L290 TraceCheckUtils]: 7: Hoare triple {1623#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,269 INFO L290 TraceCheckUtils]: 6: Hoare triple {1623#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1623#true} is VALID [2022-04-07 22:57:36,269 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1623#true} is VALID [2022-04-07 22:57:36,269 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,269 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,269 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-07 22:57:36,269 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-07 22:57:36,270 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:57:36,270 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1491887307] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:36,270 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:36,270 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 13 [2022-04-07 22:57:36,270 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317088792] [2022-04-07 22:57:36,270 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:36,270 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:57:36,271 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:36,271 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,292 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:36,292 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-07 22:57:36,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:36,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-07 22:57:36,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2022-04-07 22:57:36,293 INFO L87 Difference]: Start difference. First operand 42 states and 58 transitions. Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:36,852 INFO L93 Difference]: Finished difference Result 68 states and 93 transitions. [2022-04-07 22:57:36,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-07 22:57:36,852 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:57:36,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:36,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-07 22:57:36,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-07 22:57:36,855 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 71 transitions. [2022-04-07 22:57:36,918 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:36,919 INFO L225 Difference]: With dead ends: 68 [2022-04-07 22:57:36,919 INFO L226 Difference]: Without dead ends: 56 [2022-04-07 22:57:36,919 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=495, Unknown=0, NotChecked=0, Total=650 [2022-04-07 22:57:36,920 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 71 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 168 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:36,920 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [71 Valid, 39 Invalid, 168 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:57:36,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-04-07 22:57:36,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 39. [2022-04-07 22:57:36,967 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:36,967 INFO L82 GeneralOperation]: Start isEquivalent. First operand 56 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,967 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,968 INFO L87 Difference]: Start difference. First operand 56 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:36,969 INFO L93 Difference]: Finished difference Result 56 states and 75 transitions. [2022-04-07 22:57:36,969 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 75 transitions. [2022-04-07 22:57:36,969 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:36,969 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:36,969 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-07 22:57:36,969 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-07 22:57:36,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:36,971 INFO L93 Difference]: Finished difference Result 56 states and 75 transitions. [2022-04-07 22:57:36,971 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 75 transitions. [2022-04-07 22:57:36,971 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:36,971 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:36,971 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:36,971 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:36,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 51 transitions. [2022-04-07 22:57:36,972 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 51 transitions. Word has length 19 [2022-04-07 22:57:36,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:36,972 INFO L478 AbstractCegarLoop]: Abstraction has 39 states and 51 transitions. [2022-04-07 22:57:36,972 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:36,972 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2022-04-07 22:57:36,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:57:36,972 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:36,972 INFO L499 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:36,999 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:37,188 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:37,188 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:37,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:37,189 INFO L85 PathProgramCache]: Analyzing trace with hash -485269154, now seen corresponding path program 2 times [2022-04-07 22:57:37,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:37,189 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217407027] [2022-04-07 22:57:37,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:37,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:37,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:37,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:37,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:37,280 INFO L290 TraceCheckUtils]: 0: Hoare triple {2058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2047#true} is VALID [2022-04-07 22:57:37,281 INFO L290 TraceCheckUtils]: 1: Hoare triple {2047#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,281 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2047#true} {2047#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,281 INFO L272 TraceCheckUtils]: 0: Hoare triple {2047#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:37,281 INFO L290 TraceCheckUtils]: 1: Hoare triple {2058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2047#true} is VALID [2022-04-07 22:57:37,281 INFO L290 TraceCheckUtils]: 2: Hoare triple {2047#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,281 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2047#true} {2047#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,281 INFO L272 TraceCheckUtils]: 4: Hoare triple {2047#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,282 INFO L290 TraceCheckUtils]: 5: Hoare triple {2047#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2052#(= main_~y~0 0)} is VALID [2022-04-07 22:57:37,282 INFO L290 TraceCheckUtils]: 6: Hoare triple {2052#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2053#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:37,283 INFO L290 TraceCheckUtils]: 7: Hoare triple {2053#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2054#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:37,283 INFO L290 TraceCheckUtils]: 8: Hoare triple {2054#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2055#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:57:37,283 INFO L290 TraceCheckUtils]: 9: Hoare triple {2055#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:57:37,284 INFO L290 TraceCheckUtils]: 10: Hoare triple {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:57:37,284 INFO L290 TraceCheckUtils]: 11: Hoare triple {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2057#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:57:37,285 INFO L290 TraceCheckUtils]: 12: Hoare triple {2057#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,285 INFO L290 TraceCheckUtils]: 13: Hoare triple {2048#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,285 INFO L290 TraceCheckUtils]: 14: Hoare triple {2048#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,285 INFO L272 TraceCheckUtils]: 15: Hoare triple {2048#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2048#false} is VALID [2022-04-07 22:57:37,285 INFO L290 TraceCheckUtils]: 16: Hoare triple {2048#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2048#false} is VALID [2022-04-07 22:57:37,286 INFO L290 TraceCheckUtils]: 17: Hoare triple {2048#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,286 INFO L290 TraceCheckUtils]: 18: Hoare triple {2048#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,286 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:37,286 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:37,286 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [217407027] [2022-04-07 22:57:37,287 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [217407027] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:37,287 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1498490080] [2022-04-07 22:57:37,287 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:57:37,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:37,287 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:37,288 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:37,289 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 22:57:37,318 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:57:37,319 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:57:37,319 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 22:57:37,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:37,324 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:37,485 INFO L272 TraceCheckUtils]: 0: Hoare triple {2047#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,486 INFO L290 TraceCheckUtils]: 1: Hoare triple {2047#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2047#true} is VALID [2022-04-07 22:57:37,486 INFO L290 TraceCheckUtils]: 2: Hoare triple {2047#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,486 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2047#true} {2047#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,486 INFO L272 TraceCheckUtils]: 4: Hoare triple {2047#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,487 INFO L290 TraceCheckUtils]: 5: Hoare triple {2047#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2052#(= main_~y~0 0)} is VALID [2022-04-07 22:57:37,487 INFO L290 TraceCheckUtils]: 6: Hoare triple {2052#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2053#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:37,488 INFO L290 TraceCheckUtils]: 7: Hoare triple {2053#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2054#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:37,488 INFO L290 TraceCheckUtils]: 8: Hoare triple {2054#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2055#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:57:37,489 INFO L290 TraceCheckUtils]: 9: Hoare triple {2055#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:57:37,489 INFO L290 TraceCheckUtils]: 10: Hoare triple {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:57:37,489 INFO L290 TraceCheckUtils]: 11: Hoare triple {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2095#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:57:37,490 INFO L290 TraceCheckUtils]: 12: Hoare triple {2095#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,490 INFO L290 TraceCheckUtils]: 13: Hoare triple {2048#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,490 INFO L290 TraceCheckUtils]: 14: Hoare triple {2048#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,490 INFO L272 TraceCheckUtils]: 15: Hoare triple {2048#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2048#false} is VALID [2022-04-07 22:57:37,490 INFO L290 TraceCheckUtils]: 16: Hoare triple {2048#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2048#false} is VALID [2022-04-07 22:57:37,490 INFO L290 TraceCheckUtils]: 17: Hoare triple {2048#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,490 INFO L290 TraceCheckUtils]: 18: Hoare triple {2048#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,490 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:37,490 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:37,607 INFO L290 TraceCheckUtils]: 18: Hoare triple {2048#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,607 INFO L290 TraceCheckUtils]: 17: Hoare triple {2048#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,607 INFO L290 TraceCheckUtils]: 16: Hoare triple {2048#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2048#false} is VALID [2022-04-07 22:57:37,607 INFO L272 TraceCheckUtils]: 15: Hoare triple {2048#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2048#false} is VALID [2022-04-07 22:57:37,607 INFO L290 TraceCheckUtils]: 14: Hoare triple {2048#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,608 INFO L290 TraceCheckUtils]: 13: Hoare triple {2048#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,608 INFO L290 TraceCheckUtils]: 12: Hoare triple {2135#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-07 22:57:37,608 INFO L290 TraceCheckUtils]: 11: Hoare triple {2139#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2135#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:57:37,608 INFO L290 TraceCheckUtils]: 10: Hoare triple {2139#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2139#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:57:37,609 INFO L290 TraceCheckUtils]: 9: Hoare triple {2146#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2139#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:57:37,610 INFO L290 TraceCheckUtils]: 8: Hoare triple {2150#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2146#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:57:37,610 INFO L290 TraceCheckUtils]: 7: Hoare triple {2154#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2150#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:57:37,611 INFO L290 TraceCheckUtils]: 6: Hoare triple {2158#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2154#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:57:37,611 INFO L290 TraceCheckUtils]: 5: Hoare triple {2047#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2158#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:57:37,612 INFO L272 TraceCheckUtils]: 4: Hoare triple {2047#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2047#true} {2047#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {2047#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {2047#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2047#true} is VALID [2022-04-07 22:57:37,612 INFO L272 TraceCheckUtils]: 0: Hoare triple {2047#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-07 22:57:37,612 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:37,612 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1498490080] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:37,612 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:37,612 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-07 22:57:37,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [829047073] [2022-04-07 22:57:37,612 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:37,613 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:57:37,613 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:37,613 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:37,632 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:37,632 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 22:57:37,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:37,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 22:57:37,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2022-04-07 22:57:37,632 INFO L87 Difference]: Start difference. First operand 39 states and 51 transitions. Second operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:39,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:39,354 INFO L93 Difference]: Finished difference Result 139 states and 213 transitions. [2022-04-07 22:57:39,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-07 22:57:39,354 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:57:39,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:39,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:39,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 149 transitions. [2022-04-07 22:57:39,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:39,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 149 transitions. [2022-04-07 22:57:39,359 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 149 transitions. [2022-04-07 22:57:39,492 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 149 edges. 149 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:39,494 INFO L225 Difference]: With dead ends: 139 [2022-04-07 22:57:39,494 INFO L226 Difference]: Without dead ends: 128 [2022-04-07 22:57:39,495 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 359 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=416, Invalid=1144, Unknown=0, NotChecked=0, Total=1560 [2022-04-07 22:57:39,495 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 219 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 335 mSolverCounterSat, 183 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 219 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 518 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 183 IncrementalHoareTripleChecker+Valid, 335 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:39,495 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [219 Valid, 64 Invalid, 518 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [183 Valid, 335 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 22:57:39,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2022-04-07 22:57:39,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 65. [2022-04-07 22:57:39,598 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:39,598 INFO L82 GeneralOperation]: Start isEquivalent. First operand 128 states. Second operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:39,598 INFO L74 IsIncluded]: Start isIncluded. First operand 128 states. Second operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:39,598 INFO L87 Difference]: Start difference. First operand 128 states. Second operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:39,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:39,618 INFO L93 Difference]: Finished difference Result 128 states and 176 transitions. [2022-04-07 22:57:39,618 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 176 transitions. [2022-04-07 22:57:39,618 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:39,618 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:39,619 INFO L74 IsIncluded]: Start isIncluded. First operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 128 states. [2022-04-07 22:57:39,619 INFO L87 Difference]: Start difference. First operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 128 states. [2022-04-07 22:57:39,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:39,622 INFO L93 Difference]: Finished difference Result 128 states and 176 transitions. [2022-04-07 22:57:39,622 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 176 transitions. [2022-04-07 22:57:39,623 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:39,623 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:39,623 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:39,623 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:39,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:39,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 88 transitions. [2022-04-07 22:57:39,625 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 88 transitions. Word has length 19 [2022-04-07 22:57:39,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:39,626 INFO L478 AbstractCegarLoop]: Abstraction has 65 states and 88 transitions. [2022-04-07 22:57:39,626 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:39,626 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 88 transitions. [2022-04-07 22:57:39,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-07 22:57:39,626 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:39,626 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:39,642 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:39,831 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:39,831 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:39,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:39,832 INFO L85 PathProgramCache]: Analyzing trace with hash 1135525866, now seen corresponding path program 2 times [2022-04-07 22:57:39,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:39,832 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991478304] [2022-04-07 22:57:39,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:39,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:39,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:39,871 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:39,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:39,874 INFO L290 TraceCheckUtils]: 0: Hoare triple {2787#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2780#true} is VALID [2022-04-07 22:57:39,875 INFO L290 TraceCheckUtils]: 1: Hoare triple {2780#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:39,875 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2780#true} {2780#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:39,875 INFO L272 TraceCheckUtils]: 0: Hoare triple {2780#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2787#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:39,875 INFO L290 TraceCheckUtils]: 1: Hoare triple {2787#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2780#true} is VALID [2022-04-07 22:57:39,875 INFO L290 TraceCheckUtils]: 2: Hoare triple {2780#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:39,875 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2780#true} {2780#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:39,875 INFO L272 TraceCheckUtils]: 4: Hoare triple {2780#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:39,875 INFO L290 TraceCheckUtils]: 5: Hoare triple {2780#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2780#true} is VALID [2022-04-07 22:57:39,875 INFO L290 TraceCheckUtils]: 6: Hoare triple {2780#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2780#true} is VALID [2022-04-07 22:57:39,876 INFO L290 TraceCheckUtils]: 7: Hoare triple {2780#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:39,877 INFO L290 TraceCheckUtils]: 8: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:39,878 INFO L290 TraceCheckUtils]: 9: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:39,878 INFO L290 TraceCheckUtils]: 10: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:39,878 INFO L290 TraceCheckUtils]: 11: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:39,879 INFO L290 TraceCheckUtils]: 12: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:39,879 INFO L290 TraceCheckUtils]: 13: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:39,880 INFO L290 TraceCheckUtils]: 14: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2781#false} is VALID [2022-04-07 22:57:39,880 INFO L290 TraceCheckUtils]: 15: Hoare triple {2781#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:39,880 INFO L272 TraceCheckUtils]: 16: Hoare triple {2781#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2781#false} is VALID [2022-04-07 22:57:39,880 INFO L290 TraceCheckUtils]: 17: Hoare triple {2781#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2781#false} is VALID [2022-04-07 22:57:39,880 INFO L290 TraceCheckUtils]: 18: Hoare triple {2781#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:39,880 INFO L290 TraceCheckUtils]: 19: Hoare triple {2781#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:39,880 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:57:39,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:39,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991478304] [2022-04-07 22:57:39,881 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1991478304] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:39,881 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1694958961] [2022-04-07 22:57:39,881 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:57:39,881 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:39,881 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:39,882 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:39,883 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 22:57:39,914 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:57:39,914 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:57:39,915 INFO L263 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 22:57:39,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:39,926 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:40,096 INFO L272 TraceCheckUtils]: 0: Hoare triple {2780#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:40,097 INFO L290 TraceCheckUtils]: 1: Hoare triple {2780#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2780#true} is VALID [2022-04-07 22:57:40,097 INFO L290 TraceCheckUtils]: 2: Hoare triple {2780#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:40,097 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2780#true} {2780#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:40,097 INFO L272 TraceCheckUtils]: 4: Hoare triple {2780#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:40,097 INFO L290 TraceCheckUtils]: 5: Hoare triple {2780#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2780#true} is VALID [2022-04-07 22:57:40,097 INFO L290 TraceCheckUtils]: 6: Hoare triple {2780#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2780#true} is VALID [2022-04-07 22:57:40,098 INFO L290 TraceCheckUtils]: 7: Hoare triple {2780#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:40,098 INFO L290 TraceCheckUtils]: 8: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:40,101 INFO L290 TraceCheckUtils]: 9: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:40,102 INFO L290 TraceCheckUtils]: 10: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:40,103 INFO L290 TraceCheckUtils]: 11: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:40,103 INFO L290 TraceCheckUtils]: 12: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:40,104 INFO L290 TraceCheckUtils]: 13: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:40,105 INFO L290 TraceCheckUtils]: 14: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2781#false} is VALID [2022-04-07 22:57:40,105 INFO L290 TraceCheckUtils]: 15: Hoare triple {2781#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:40,105 INFO L272 TraceCheckUtils]: 16: Hoare triple {2781#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2781#false} is VALID [2022-04-07 22:57:40,105 INFO L290 TraceCheckUtils]: 17: Hoare triple {2781#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2781#false} is VALID [2022-04-07 22:57:40,105 INFO L290 TraceCheckUtils]: 18: Hoare triple {2781#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:40,105 INFO L290 TraceCheckUtils]: 19: Hoare triple {2781#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:40,105 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:57:40,105 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:40,269 INFO L290 TraceCheckUtils]: 19: Hoare triple {2781#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:40,269 INFO L290 TraceCheckUtils]: 18: Hoare triple {2781#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:40,269 INFO L290 TraceCheckUtils]: 17: Hoare triple {2781#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2781#false} is VALID [2022-04-07 22:57:40,269 INFO L272 TraceCheckUtils]: 16: Hoare triple {2781#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2781#false} is VALID [2022-04-07 22:57:40,269 INFO L290 TraceCheckUtils]: 15: Hoare triple {2781#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-07 22:57:40,271 INFO L290 TraceCheckUtils]: 14: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2781#false} is VALID [2022-04-07 22:57:40,272 INFO L290 TraceCheckUtils]: 13: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:40,272 INFO L290 TraceCheckUtils]: 12: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:40,272 INFO L290 TraceCheckUtils]: 11: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:40,273 INFO L290 TraceCheckUtils]: 10: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:40,273 INFO L290 TraceCheckUtils]: 9: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:57:40,274 INFO L290 TraceCheckUtils]: 8: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:40,278 INFO L290 TraceCheckUtils]: 7: Hoare triple {2780#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:40,278 INFO L290 TraceCheckUtils]: 6: Hoare triple {2780#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2780#true} is VALID [2022-04-07 22:57:40,278 INFO L290 TraceCheckUtils]: 5: Hoare triple {2780#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2780#true} is VALID [2022-04-07 22:57:40,278 INFO L272 TraceCheckUtils]: 4: Hoare triple {2780#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:40,278 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2780#true} {2780#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:40,278 INFO L290 TraceCheckUtils]: 2: Hoare triple {2780#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:40,278 INFO L290 TraceCheckUtils]: 1: Hoare triple {2780#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2780#true} is VALID [2022-04-07 22:57:40,278 INFO L272 TraceCheckUtils]: 0: Hoare triple {2780#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-07 22:57:40,278 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:57:40,279 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1694958961] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:40,279 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:40,279 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-07 22:57:40,279 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1345785886] [2022-04-07 22:57:40,279 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:40,279 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 22:57:40,279 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:40,279 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,295 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:40,296 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 22:57:40,296 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:40,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 22:57:40,296 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:57:40,296 INFO L87 Difference]: Start difference. First operand 65 states and 88 transitions. Second operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:40,497 INFO L93 Difference]: Finished difference Result 76 states and 102 transitions. [2022-04-07 22:57:40,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 22:57:40,498 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 22:57:40,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:40,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-07 22:57:40,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-07 22:57:40,500 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 36 transitions. [2022-04-07 22:57:40,529 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:40,530 INFO L225 Difference]: With dead ends: 76 [2022-04-07 22:57:40,530 INFO L226 Difference]: Without dead ends: 63 [2022-04-07 22:57:40,531 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-07 22:57:40,531 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:40,531 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 31 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:57:40,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2022-04-07 22:57:40,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2022-04-07 22:57:40,637 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:40,639 INFO L82 GeneralOperation]: Start isEquivalent. First operand 63 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,639 INFO L74 IsIncluded]: Start isIncluded. First operand 63 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,639 INFO L87 Difference]: Start difference. First operand 63 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:40,640 INFO L93 Difference]: Finished difference Result 63 states and 87 transitions. [2022-04-07 22:57:40,640 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 87 transitions. [2022-04-07 22:57:40,641 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:40,641 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:40,641 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 63 states. [2022-04-07 22:57:40,641 INFO L87 Difference]: Start difference. First operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 63 states. [2022-04-07 22:57:40,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:40,642 INFO L93 Difference]: Finished difference Result 63 states and 87 transitions. [2022-04-07 22:57:40,642 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 87 transitions. [2022-04-07 22:57:40,642 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:40,642 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:40,642 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:40,642 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:40,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 87 transitions. [2022-04-07 22:57:40,645 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 87 transitions. Word has length 20 [2022-04-07 22:57:40,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:40,645 INFO L478 AbstractCegarLoop]: Abstraction has 63 states and 87 transitions. [2022-04-07 22:57:40,645 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:40,645 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 87 transitions. [2022-04-07 22:57:40,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-07 22:57:40,646 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:40,646 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:40,664 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:40,864 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:40,865 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:40,865 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:40,865 INFO L85 PathProgramCache]: Analyzing trace with hash 1850387710, now seen corresponding path program 3 times [2022-04-07 22:57:40,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:40,865 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [83502016] [2022-04-07 22:57:40,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:40,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:40,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:40,936 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:40,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:40,941 INFO L290 TraceCheckUtils]: 0: Hoare triple {3254#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3244#true} is VALID [2022-04-07 22:57:40,941 INFO L290 TraceCheckUtils]: 1: Hoare triple {3244#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:40,941 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3244#true} {3244#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:40,942 INFO L272 TraceCheckUtils]: 0: Hoare triple {3244#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3254#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:40,942 INFO L290 TraceCheckUtils]: 1: Hoare triple {3254#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3244#true} is VALID [2022-04-07 22:57:40,942 INFO L290 TraceCheckUtils]: 2: Hoare triple {3244#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:40,942 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3244#true} {3244#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:40,942 INFO L272 TraceCheckUtils]: 4: Hoare triple {3244#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:40,942 INFO L290 TraceCheckUtils]: 5: Hoare triple {3244#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3249#(= main_~y~0 0)} is VALID [2022-04-07 22:57:40,943 INFO L290 TraceCheckUtils]: 6: Hoare triple {3249#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3250#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:40,943 INFO L290 TraceCheckUtils]: 7: Hoare triple {3250#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:40,944 INFO L290 TraceCheckUtils]: 8: Hoare triple {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:40,944 INFO L290 TraceCheckUtils]: 9: Hoare triple {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3252#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:57:40,945 INFO L290 TraceCheckUtils]: 10: Hoare triple {3252#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3253#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:57:40,945 INFO L290 TraceCheckUtils]: 11: Hoare triple {3253#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:40,945 INFO L290 TraceCheckUtils]: 12: Hoare triple {3245#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-07 22:57:40,945 INFO L290 TraceCheckUtils]: 13: Hoare triple {3245#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-07 22:57:40,945 INFO L290 TraceCheckUtils]: 14: Hoare triple {3245#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:40,945 INFO L290 TraceCheckUtils]: 15: Hoare triple {3245#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3245#false} is VALID [2022-04-07 22:57:40,945 INFO L290 TraceCheckUtils]: 16: Hoare triple {3245#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:40,945 INFO L272 TraceCheckUtils]: 17: Hoare triple {3245#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3245#false} is VALID [2022-04-07 22:57:40,945 INFO L290 TraceCheckUtils]: 18: Hoare triple {3245#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3245#false} is VALID [2022-04-07 22:57:40,946 INFO L290 TraceCheckUtils]: 19: Hoare triple {3245#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:40,946 INFO L290 TraceCheckUtils]: 20: Hoare triple {3245#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:40,946 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:57:40,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:40,946 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [83502016] [2022-04-07 22:57:40,946 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [83502016] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:40,946 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [628482972] [2022-04-07 22:57:40,946 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:57:40,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:40,946 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:40,947 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:40,952 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 22:57:40,979 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-07 22:57:40,980 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:57:40,980 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 22:57:40,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:40,985 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:41,078 INFO L272 TraceCheckUtils]: 0: Hoare triple {3244#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,078 INFO L290 TraceCheckUtils]: 1: Hoare triple {3244#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3244#true} is VALID [2022-04-07 22:57:41,078 INFO L290 TraceCheckUtils]: 2: Hoare triple {3244#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,078 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3244#true} {3244#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,078 INFO L272 TraceCheckUtils]: 4: Hoare triple {3244#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,079 INFO L290 TraceCheckUtils]: 5: Hoare triple {3244#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3249#(= main_~y~0 0)} is VALID [2022-04-07 22:57:41,079 INFO L290 TraceCheckUtils]: 6: Hoare triple {3249#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3250#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:41,080 INFO L290 TraceCheckUtils]: 7: Hoare triple {3250#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:41,080 INFO L290 TraceCheckUtils]: 8: Hoare triple {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:41,081 INFO L290 TraceCheckUtils]: 9: Hoare triple {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3285#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:41,081 INFO L290 TraceCheckUtils]: 10: Hoare triple {3285#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3289#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:57:41,081 INFO L290 TraceCheckUtils]: 11: Hoare triple {3289#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,081 INFO L290 TraceCheckUtils]: 12: Hoare triple {3245#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L290 TraceCheckUtils]: 13: Hoare triple {3245#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L290 TraceCheckUtils]: 14: Hoare triple {3245#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L290 TraceCheckUtils]: 15: Hoare triple {3245#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L290 TraceCheckUtils]: 16: Hoare triple {3245#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L272 TraceCheckUtils]: 17: Hoare triple {3245#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L290 TraceCheckUtils]: 18: Hoare triple {3245#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L290 TraceCheckUtils]: 19: Hoare triple {3245#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L290 TraceCheckUtils]: 20: Hoare triple {3245#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,082 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:57:41,082 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:41,178 INFO L290 TraceCheckUtils]: 20: Hoare triple {3245#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,178 INFO L290 TraceCheckUtils]: 19: Hoare triple {3245#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,178 INFO L290 TraceCheckUtils]: 18: Hoare triple {3245#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3245#false} is VALID [2022-04-07 22:57:41,178 INFO L272 TraceCheckUtils]: 17: Hoare triple {3245#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3245#false} is VALID [2022-04-07 22:57:41,178 INFO L290 TraceCheckUtils]: 16: Hoare triple {3245#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,178 INFO L290 TraceCheckUtils]: 15: Hoare triple {3245#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3245#false} is VALID [2022-04-07 22:57:41,178 INFO L290 TraceCheckUtils]: 14: Hoare triple {3245#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-07 22:57:41,179 INFO L290 TraceCheckUtils]: 13: Hoare triple {3341#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-07 22:57:41,180 INFO L290 TraceCheckUtils]: 12: Hoare triple {3345#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3341#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:57:41,180 INFO L290 TraceCheckUtils]: 11: Hoare triple {3349#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3345#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:57:41,181 INFO L290 TraceCheckUtils]: 10: Hoare triple {3353#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3349#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:57:41,181 INFO L290 TraceCheckUtils]: 9: Hoare triple {3244#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3353#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:57:41,181 INFO L290 TraceCheckUtils]: 8: Hoare triple {3244#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,181 INFO L290 TraceCheckUtils]: 7: Hoare triple {3244#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3244#true} is VALID [2022-04-07 22:57:41,181 INFO L290 TraceCheckUtils]: 6: Hoare triple {3244#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3244#true} is VALID [2022-04-07 22:57:41,182 INFO L290 TraceCheckUtils]: 5: Hoare triple {3244#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3244#true} is VALID [2022-04-07 22:57:41,182 INFO L272 TraceCheckUtils]: 4: Hoare triple {3244#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,182 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3244#true} {3244#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,182 INFO L290 TraceCheckUtils]: 2: Hoare triple {3244#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,182 INFO L290 TraceCheckUtils]: 1: Hoare triple {3244#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3244#true} is VALID [2022-04-07 22:57:41,182 INFO L272 TraceCheckUtils]: 0: Hoare triple {3244#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-07 22:57:41,182 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:57:41,182 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [628482972] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:41,182 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:41,182 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2022-04-07 22:57:41,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1958922577] [2022-04-07 22:57:41,182 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:41,183 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:57:41,183 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:41,183 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:41,205 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:41,206 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 22:57:41,206 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:41,206 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 22:57:41,206 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-07 22:57:41,206 INFO L87 Difference]: Start difference. First operand 63 states and 87 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:41,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:41,906 INFO L93 Difference]: Finished difference Result 97 states and 131 transitions. [2022-04-07 22:57:41,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 22:57:41,906 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:57:41,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:41,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:41,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 72 transitions. [2022-04-07 22:57:41,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:41,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 72 transitions. [2022-04-07 22:57:41,908 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 72 transitions. [2022-04-07 22:57:41,976 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:41,977 INFO L225 Difference]: With dead ends: 97 [2022-04-07 22:57:41,977 INFO L226 Difference]: Without dead ends: 80 [2022-04-07 22:57:41,978 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=128, Invalid=522, Unknown=0, NotChecked=0, Total=650 [2022-04-07 22:57:41,978 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 44 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 169 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 215 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 169 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:41,978 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [44 Valid, 45 Invalid, 215 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 169 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 22:57:41,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-04-07 22:57:42,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 61. [2022-04-07 22:57:42,120 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:42,123 INFO L82 GeneralOperation]: Start isEquivalent. First operand 80 states. Second operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:42,123 INFO L74 IsIncluded]: Start isIncluded. First operand 80 states. Second operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:42,123 INFO L87 Difference]: Start difference. First operand 80 states. Second operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:42,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:42,126 INFO L93 Difference]: Finished difference Result 80 states and 108 transitions. [2022-04-07 22:57:42,126 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 108 transitions. [2022-04-07 22:57:42,126 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:42,126 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:42,126 INFO L74 IsIncluded]: Start isIncluded. First operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 80 states. [2022-04-07 22:57:42,126 INFO L87 Difference]: Start difference. First operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 80 states. [2022-04-07 22:57:42,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:42,128 INFO L93 Difference]: Finished difference Result 80 states and 108 transitions. [2022-04-07 22:57:42,128 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 108 transitions. [2022-04-07 22:57:42,128 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:42,128 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:42,128 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:42,128 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:42,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:42,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 83 transitions. [2022-04-07 22:57:42,130 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 83 transitions. Word has length 21 [2022-04-07 22:57:42,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:42,130 INFO L478 AbstractCegarLoop]: Abstraction has 61 states and 83 transitions. [2022-04-07 22:57:42,130 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:42,130 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 83 transitions. [2022-04-07 22:57:42,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-07 22:57:42,132 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:42,132 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:42,159 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:42,347 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:42,347 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:42,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:42,348 INFO L85 PathProgramCache]: Analyzing trace with hash 1066744542, now seen corresponding path program 3 times [2022-04-07 22:57:42,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:42,348 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280659321] [2022-04-07 22:57:42,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:42,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:42,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:42,401 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:42,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:42,407 INFO L290 TraceCheckUtils]: 0: Hoare triple {3816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3807#true} is VALID [2022-04-07 22:57:42,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {3807#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,407 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3807#true} {3807#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,407 INFO L272 TraceCheckUtils]: 0: Hoare triple {3807#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:42,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {3816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3807#true} is VALID [2022-04-07 22:57:42,408 INFO L290 TraceCheckUtils]: 2: Hoare triple {3807#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,408 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3807#true} {3807#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,408 INFO L272 TraceCheckUtils]: 4: Hoare triple {3807#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,408 INFO L290 TraceCheckUtils]: 5: Hoare triple {3807#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3807#true} is VALID [2022-04-07 22:57:42,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {3807#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:57:42,409 INFO L290 TraceCheckUtils]: 7: Hoare triple {3812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:57:42,410 INFO L290 TraceCheckUtils]: 8: Hoare triple {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:57:42,410 INFO L290 TraceCheckUtils]: 9: Hoare triple {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:57:42,411 INFO L290 TraceCheckUtils]: 10: Hoare triple {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3814#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 22:57:42,411 INFO L290 TraceCheckUtils]: 11: Hoare triple {3814#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:57:42,411 INFO L290 TraceCheckUtils]: 12: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:57:42,412 INFO L290 TraceCheckUtils]: 13: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:57:42,412 INFO L290 TraceCheckUtils]: 14: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:57:42,412 INFO L290 TraceCheckUtils]: 15: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:57:42,413 INFO L290 TraceCheckUtils]: 16: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-07 22:57:42,413 INFO L272 TraceCheckUtils]: 17: Hoare triple {3808#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3808#false} is VALID [2022-04-07 22:57:42,413 INFO L290 TraceCheckUtils]: 18: Hoare triple {3808#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3808#false} is VALID [2022-04-07 22:57:42,413 INFO L290 TraceCheckUtils]: 19: Hoare triple {3808#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-07 22:57:42,413 INFO L290 TraceCheckUtils]: 20: Hoare triple {3808#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-07 22:57:42,413 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:57:42,413 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:42,413 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280659321] [2022-04-07 22:57:42,413 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1280659321] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:42,414 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1553019392] [2022-04-07 22:57:42,414 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:57:42,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:42,414 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:42,414 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:42,415 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 22:57:42,446 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-07 22:57:42,446 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:57:42,446 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-07 22:57:42,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:42,452 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:42,963 INFO L272 TraceCheckUtils]: 0: Hoare triple {3807#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,964 INFO L290 TraceCheckUtils]: 1: Hoare triple {3807#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3807#true} is VALID [2022-04-07 22:57:42,964 INFO L290 TraceCheckUtils]: 2: Hoare triple {3807#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,964 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3807#true} {3807#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,964 INFO L272 TraceCheckUtils]: 4: Hoare triple {3807#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:42,964 INFO L290 TraceCheckUtils]: 5: Hoare triple {3807#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 22:57:42,964 INFO L290 TraceCheckUtils]: 6: Hoare triple {3835#(= main_~n~0 main_~x~0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3839#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-07 22:57:42,965 INFO L290 TraceCheckUtils]: 7: Hoare triple {3839#(= (+ main_~x~0 1) main_~n~0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3843#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-07 22:57:42,965 INFO L290 TraceCheckUtils]: 8: Hoare triple {3843#(= main_~n~0 (+ main_~x~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3843#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-07 22:57:42,966 INFO L290 TraceCheckUtils]: 9: Hoare triple {3843#(= main_~n~0 (+ main_~x~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3843#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-07 22:57:42,966 INFO L290 TraceCheckUtils]: 10: Hoare triple {3843#(= main_~n~0 (+ main_~x~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3839#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-07 22:57:42,972 INFO L290 TraceCheckUtils]: 11: Hoare triple {3839#(= (+ main_~x~0 1) main_~n~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 22:57:42,973 INFO L290 TraceCheckUtils]: 12: Hoare triple {3835#(= main_~n~0 main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 22:57:42,973 INFO L290 TraceCheckUtils]: 13: Hoare triple {3835#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 22:57:42,973 INFO L290 TraceCheckUtils]: 14: Hoare triple {3835#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 22:57:42,974 INFO L290 TraceCheckUtils]: 15: Hoare triple {3835#(= main_~n~0 main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3868#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))))} is VALID [2022-04-07 22:57:42,974 INFO L290 TraceCheckUtils]: 16: Hoare triple {3868#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3872#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 22:57:42,975 INFO L272 TraceCheckUtils]: 17: Hoare triple {3872#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3876#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:57:42,975 INFO L290 TraceCheckUtils]: 18: Hoare triple {3876#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3880#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:57:42,975 INFO L290 TraceCheckUtils]: 19: Hoare triple {3880#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-07 22:57:42,975 INFO L290 TraceCheckUtils]: 20: Hoare triple {3808#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-07 22:57:42,975 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:57:42,976 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:43,375 INFO L290 TraceCheckUtils]: 20: Hoare triple {3808#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-07 22:57:43,376 INFO L290 TraceCheckUtils]: 19: Hoare triple {3880#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-07 22:57:43,376 INFO L290 TraceCheckUtils]: 18: Hoare triple {3876#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3880#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:57:43,377 INFO L272 TraceCheckUtils]: 17: Hoare triple {3896#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3876#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:57:43,377 INFO L290 TraceCheckUtils]: 16: Hoare triple {3900#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3896#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:57:43,377 INFO L290 TraceCheckUtils]: 15: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3900#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:57:43,378 INFO L290 TraceCheckUtils]: 14: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:43,378 INFO L290 TraceCheckUtils]: 13: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:43,378 INFO L290 TraceCheckUtils]: 12: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:43,379 INFO L290 TraceCheckUtils]: 11: Hoare triple {3917#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:43,379 INFO L290 TraceCheckUtils]: 10: Hoare triple {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3917#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 22:57:43,380 INFO L290 TraceCheckUtils]: 9: Hoare triple {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-07 22:57:43,380 INFO L290 TraceCheckUtils]: 8: Hoare triple {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-07 22:57:43,381 INFO L290 TraceCheckUtils]: 7: Hoare triple {3917#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-07 22:57:43,381 INFO L290 TraceCheckUtils]: 6: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3917#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 22:57:43,382 INFO L290 TraceCheckUtils]: 5: Hoare triple {3807#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:57:43,382 INFO L272 TraceCheckUtils]: 4: Hoare triple {3807#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:43,382 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3807#true} {3807#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:43,382 INFO L290 TraceCheckUtils]: 2: Hoare triple {3807#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:43,382 INFO L290 TraceCheckUtils]: 1: Hoare triple {3807#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3807#true} is VALID [2022-04-07 22:57:43,382 INFO L272 TraceCheckUtils]: 0: Hoare triple {3807#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-07 22:57:43,382 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:57:43,382 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1553019392] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:43,382 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:43,382 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9, 9] total 19 [2022-04-07 22:57:43,383 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255366612] [2022-04-07 22:57:43,383 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:43,383 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:57:43,383 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:43,383 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:43,417 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:43,417 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 22:57:43,417 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:43,418 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 22:57:43,418 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=285, Unknown=0, NotChecked=0, Total=342 [2022-04-07 22:57:43,418 INFO L87 Difference]: Start difference. First operand 61 states and 83 transitions. Second operand has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:44,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:44,246 INFO L93 Difference]: Finished difference Result 90 states and 124 transitions. [2022-04-07 22:57:44,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 22:57:44,246 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:57:44,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:57:44,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:44,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 61 transitions. [2022-04-07 22:57:44,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:44,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 61 transitions. [2022-04-07 22:57:44,249 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 61 transitions. [2022-04-07 22:57:44,308 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:44,309 INFO L225 Difference]: With dead ends: 90 [2022-04-07 22:57:44,309 INFO L226 Difference]: Without dead ends: 85 [2022-04-07 22:57:44,310 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 30 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=141, Invalid=671, Unknown=0, NotChecked=0, Total=812 [2022-04-07 22:57:44,310 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 65 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 218 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 279 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 218 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:57:44,310 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [65 Valid, 62 Invalid, 279 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 218 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 22:57:44,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-07 22:57:44,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 76. [2022-04-07 22:57:44,464 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:57:44,464 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:44,464 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:44,465 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:44,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:44,466 INFO L93 Difference]: Finished difference Result 85 states and 116 transitions. [2022-04-07 22:57:44,466 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 116 transitions. [2022-04-07 22:57:44,466 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:44,466 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:44,466 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-07 22:57:44,466 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-07 22:57:44,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:57:44,468 INFO L93 Difference]: Finished difference Result 85 states and 116 transitions. [2022-04-07 22:57:44,468 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 116 transitions. [2022-04-07 22:57:44,468 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:57:44,468 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:57:44,468 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:57:44,468 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:57:44,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:44,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 104 transitions. [2022-04-07 22:57:44,469 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 104 transitions. Word has length 21 [2022-04-07 22:57:44,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:57:44,469 INFO L478 AbstractCegarLoop]: Abstraction has 76 states and 104 transitions. [2022-04-07 22:57:44,469 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:44,469 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 104 transitions. [2022-04-07 22:57:44,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 22:57:44,470 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:57:44,470 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:57:44,488 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 22:57:44,683 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-07 22:57:44,683 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:57:44,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:57:44,684 INFO L85 PathProgramCache]: Analyzing trace with hash -500618306, now seen corresponding path program 4 times [2022-04-07 22:57:44,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:57:44,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711636577] [2022-04-07 22:57:44,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:57:44,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:57:44,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:44,936 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:57:44,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:44,948 INFO L290 TraceCheckUtils]: 0: Hoare triple {4403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4389#true} is VALID [2022-04-07 22:57:44,948 INFO L290 TraceCheckUtils]: 1: Hoare triple {4389#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:44,948 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4389#true} {4389#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:44,949 INFO L272 TraceCheckUtils]: 0: Hoare triple {4389#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:57:44,949 INFO L290 TraceCheckUtils]: 1: Hoare triple {4403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4389#true} is VALID [2022-04-07 22:57:44,949 INFO L290 TraceCheckUtils]: 2: Hoare triple {4389#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:44,949 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4389#true} {4389#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:44,949 INFO L272 TraceCheckUtils]: 4: Hoare triple {4389#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:44,949 INFO L290 TraceCheckUtils]: 5: Hoare triple {4389#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4394#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:44,951 INFO L290 TraceCheckUtils]: 6: Hoare triple {4394#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4395#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:44,963 INFO L290 TraceCheckUtils]: 7: Hoare triple {4395#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4396#(and (<= 2 main_~y~0) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 22:57:44,964 INFO L290 TraceCheckUtils]: 8: Hoare triple {4396#(and (<= 2 main_~y~0) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:44,964 INFO L290 TraceCheckUtils]: 9: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:44,964 INFO L290 TraceCheckUtils]: 10: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:44,965 INFO L290 TraceCheckUtils]: 11: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:44,965 INFO L290 TraceCheckUtils]: 12: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:44,966 INFO L290 TraceCheckUtils]: 13: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4398#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) 2) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:44,967 INFO L290 TraceCheckUtils]: 14: Hoare triple {4398#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) 2) main_~n~0) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4399#(and (<= (+ 2 (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~y~0) 4294967293) 4294967296))) main_~n~0) (<= main_~y~0 0))} is VALID [2022-04-07 22:57:44,967 INFO L290 TraceCheckUtils]: 15: Hoare triple {4399#(and (<= (+ 2 (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~y~0) 4294967293) 4294967296))) main_~n~0) (<= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4399#(and (<= (+ 2 (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~y~0) 4294967293) 4294967296))) main_~n~0) (<= main_~y~0 0))} is VALID [2022-04-07 22:57:44,968 INFO L290 TraceCheckUtils]: 16: Hoare triple {4399#(and (<= (+ 2 (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~y~0) 4294967293) 4294967296))) main_~n~0) (<= main_~y~0 0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4398#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) 2) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:44,970 INFO L290 TraceCheckUtils]: 17: Hoare triple {4398#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) 2) main_~n~0) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:44,970 INFO L290 TraceCheckUtils]: 18: Hoare triple {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:44,971 INFO L272 TraceCheckUtils]: 19: Hoare triple {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {4401#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:57:44,971 INFO L290 TraceCheckUtils]: 20: Hoare triple {4401#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4402#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:57:44,971 INFO L290 TraceCheckUtils]: 21: Hoare triple {4402#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-07 22:57:44,972 INFO L290 TraceCheckUtils]: 22: Hoare triple {4390#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-07 22:57:44,972 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:57:44,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:57:44,972 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711636577] [2022-04-07 22:57:44,972 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [711636577] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:57:44,972 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [233003566] [2022-04-07 22:57:44,972 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:57:44,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:57:44,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:57:44,973 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:57:44,974 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 22:57:45,026 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:57:45,026 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:57:45,027 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-07 22:57:45,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:57:45,036 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:57:56,643 INFO L272 TraceCheckUtils]: 0: Hoare triple {4389#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:56,643 INFO L290 TraceCheckUtils]: 1: Hoare triple {4389#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4389#true} is VALID [2022-04-07 22:57:56,643 INFO L290 TraceCheckUtils]: 2: Hoare triple {4389#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:56,643 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4389#true} {4389#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:56,644 INFO L272 TraceCheckUtils]: 4: Hoare triple {4389#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:56,644 INFO L290 TraceCheckUtils]: 5: Hoare triple {4389#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4394#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:57:56,646 INFO L290 TraceCheckUtils]: 6: Hoare triple {4394#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4395#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:56,649 INFO L290 TraceCheckUtils]: 7: Hoare triple {4395#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 22:57:56,663 INFO L290 TraceCheckUtils]: 8: Hoare triple {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 22:57:56,664 INFO L290 TraceCheckUtils]: 9: Hoare triple {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4435#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 22:57:56,667 INFO L290 TraceCheckUtils]: 10: Hoare triple {4435#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4439#(and (<= main_~x~0 (+ 4294967294 (* (div (+ (- 1) main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod main_~x~0 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 1)))} is VALID [2022-04-07 22:57:56,672 INFO L290 TraceCheckUtils]: 11: Hoare triple {4439#(and (<= main_~x~0 (+ 4294967294 (* (div (+ (- 1) main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod main_~x~0 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4443#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 2)) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:56,673 INFO L290 TraceCheckUtils]: 12: Hoare triple {4443#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 2)) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4443#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 2)) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:57:56,675 INFO L290 TraceCheckUtils]: 13: Hoare triple {4443#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 2)) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4450#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 1)) (<= 1 main_~y~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:56,678 INFO L290 TraceCheckUtils]: 14: Hoare triple {4450#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 1)) (<= 1 main_~y~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4454#(and (<= 0 main_~y~0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= main_~y~0 0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 22:57:56,678 INFO L290 TraceCheckUtils]: 15: Hoare triple {4454#(and (<= 0 main_~y~0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= main_~y~0 0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4454#(and (<= 0 main_~y~0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= main_~y~0 0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 22:57:56,682 INFO L290 TraceCheckUtils]: 16: Hoare triple {4454#(and (<= 0 main_~y~0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= main_~y~0 0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4461#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (< 0 (mod main_~x~0 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:57:56,684 INFO L290 TraceCheckUtils]: 17: Hoare triple {4461#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (< 0 (mod main_~x~0 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 22:57:56,686 INFO L290 TraceCheckUtils]: 18: Hoare triple {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:57:56,688 INFO L272 TraceCheckUtils]: 19: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {4471#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:57:56,689 INFO L290 TraceCheckUtils]: 20: Hoare triple {4471#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4475#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:57:56,689 INFO L290 TraceCheckUtils]: 21: Hoare triple {4475#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-07 22:57:56,689 INFO L290 TraceCheckUtils]: 22: Hoare triple {4390#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-07 22:57:56,690 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:56,690 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:57:57,712 INFO L290 TraceCheckUtils]: 22: Hoare triple {4390#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-07 22:57:57,712 INFO L290 TraceCheckUtils]: 21: Hoare triple {4475#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-07 22:57:57,713 INFO L290 TraceCheckUtils]: 20: Hoare triple {4471#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4475#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:57:57,714 INFO L272 TraceCheckUtils]: 19: Hoare triple {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {4471#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:57:57,714 INFO L290 TraceCheckUtils]: 18: Hoare triple {4494#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:57:57,716 INFO L290 TraceCheckUtils]: 17: Hoare triple {4498#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4494#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:57:57,717 INFO L290 TraceCheckUtils]: 16: Hoare triple {4502#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4498#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:57:57,718 INFO L290 TraceCheckUtils]: 15: Hoare triple {4502#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4502#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:57:57,719 INFO L290 TraceCheckUtils]: 14: Hoare triple {4509#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4502#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:57:57,720 INFO L290 TraceCheckUtils]: 13: Hoare triple {4513#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4509#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:57:57,721 INFO L290 TraceCheckUtils]: 12: Hoare triple {4513#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4513#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:57:57,722 INFO L290 TraceCheckUtils]: 11: Hoare triple {4520#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4513#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:57:57,723 INFO L290 TraceCheckUtils]: 10: Hoare triple {4524#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4520#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:57:57,724 INFO L290 TraceCheckUtils]: 9: Hoare triple {4528#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4524#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:57:57,725 INFO L290 TraceCheckUtils]: 8: Hoare triple {4528#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4528#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:57:57,729 INFO L290 TraceCheckUtils]: 7: Hoare triple {4535#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4528#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 22:57:57,731 INFO L290 TraceCheckUtils]: 6: Hoare triple {4539#(or (<= (mod (+ main_~y~0 2) 4294967296) 0) (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4535#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:57:57,739 INFO L290 TraceCheckUtils]: 5: Hoare triple {4389#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4539#(or (<= (mod (+ main_~y~0 2) 4294967296) 0) (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:57:57,739 INFO L272 TraceCheckUtils]: 4: Hoare triple {4389#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:57,739 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4389#true} {4389#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:57,739 INFO L290 TraceCheckUtils]: 2: Hoare triple {4389#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:57,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {4389#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4389#true} is VALID [2022-04-07 22:57:57,739 INFO L272 TraceCheckUtils]: 0: Hoare triple {4389#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-07 22:57:57,740 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:57:57,740 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [233003566] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:57:57,740 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:57:57,740 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14, 15] total 31 [2022-04-07 22:57:57,740 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148475] [2022-04-07 22:57:57,740 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:57:57,740 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:57:57,741 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:57:57,741 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:57:57,843 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:57:57,843 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-07 22:57:57,843 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:57:57,844 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-07 22:57:57,844 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=775, Unknown=0, NotChecked=0, Total=930 [2022-04-07 22:57:57,844 INFO L87 Difference]: Start difference. First operand 76 states and 104 transitions. Second operand has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:00,305 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.59s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 22:58:09,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:09,133 INFO L93 Difference]: Finished difference Result 140 states and 185 transitions. [2022-04-07 22:58:09,133 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-04-07 22:58:09,133 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:58:09,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:09,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:09,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 117 transitions. [2022-04-07 22:58:09,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:09,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 117 transitions. [2022-04-07 22:58:09,136 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 49 states and 117 transitions. [2022-04-07 22:58:09,647 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 117 edges. 117 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:09,649 INFO L225 Difference]: With dead ends: 140 [2022-04-07 22:58:09,649 INFO L226 Difference]: Without dead ends: 119 [2022-04-07 22:58:09,650 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 25 SyntacticMatches, 5 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1696 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=972, Invalid=4880, Unknown=0, NotChecked=0, Total=5852 [2022-04-07 22:58:09,651 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 138 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 527 mSolverCounterSat, 178 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 705 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 178 IncrementalHoareTripleChecker+Valid, 527 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.7s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:09,651 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [138 Valid, 91 Invalid, 705 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [178 Valid, 527 Invalid, 0 Unknown, 0 Unchecked, 3.7s Time] [2022-04-07 22:58:09,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2022-04-07 22:58:09,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 93. [2022-04-07 22:58:09,837 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:09,837 INFO L82 GeneralOperation]: Start isEquivalent. First operand 119 states. Second operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:09,837 INFO L74 IsIncluded]: Start isIncluded. First operand 119 states. Second operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:09,838 INFO L87 Difference]: Start difference. First operand 119 states. Second operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:09,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:09,839 INFO L93 Difference]: Finished difference Result 119 states and 159 transitions. [2022-04-07 22:58:09,839 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 159 transitions. [2022-04-07 22:58:09,839 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:09,840 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:09,840 INFO L74 IsIncluded]: Start isIncluded. First operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 119 states. [2022-04-07 22:58:09,840 INFO L87 Difference]: Start difference. First operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 119 states. [2022-04-07 22:58:09,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:09,841 INFO L93 Difference]: Finished difference Result 119 states and 159 transitions. [2022-04-07 22:58:09,841 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 159 transitions. [2022-04-07 22:58:09,842 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:09,842 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:09,842 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:09,842 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:09,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:09,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 126 transitions. [2022-04-07 22:58:09,843 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 126 transitions. Word has length 23 [2022-04-07 22:58:09,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:09,843 INFO L478 AbstractCegarLoop]: Abstraction has 93 states and 126 transitions. [2022-04-07 22:58:09,843 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:09,843 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 126 transitions. [2022-04-07 22:58:09,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 22:58:09,844 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:09,844 INFO L499 BasicCegarLoop]: trace histogram [4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:09,868 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-04-07 22:58:10,063 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:10,064 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:10,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:10,064 INFO L85 PathProgramCache]: Analyzing trace with hash 192604094, now seen corresponding path program 4 times [2022-04-07 22:58:10,064 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:10,064 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089363086] [2022-04-07 22:58:10,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:10,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:10,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:10,170 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:10,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:10,174 INFO L290 TraceCheckUtils]: 0: Hoare triple {5229#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-07 22:58:10,174 INFO L290 TraceCheckUtils]: 1: Hoare triple {5218#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,174 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5218#true} {5218#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,174 INFO L272 TraceCheckUtils]: 0: Hoare triple {5218#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5229#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:10,174 INFO L290 TraceCheckUtils]: 1: Hoare triple {5229#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-07 22:58:10,175 INFO L290 TraceCheckUtils]: 2: Hoare triple {5218#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,175 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5218#true} {5218#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,175 INFO L272 TraceCheckUtils]: 4: Hoare triple {5218#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,175 INFO L290 TraceCheckUtils]: 5: Hoare triple {5218#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5223#(= main_~y~0 0)} is VALID [2022-04-07 22:58:10,175 INFO L290 TraceCheckUtils]: 6: Hoare triple {5223#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5224#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:10,176 INFO L290 TraceCheckUtils]: 7: Hoare triple {5224#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:10,176 INFO L290 TraceCheckUtils]: 8: Hoare triple {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:10,177 INFO L290 TraceCheckUtils]: 9: Hoare triple {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5226#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:58:10,177 INFO L290 TraceCheckUtils]: 10: Hoare triple {5226#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5227#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:10,178 INFO L290 TraceCheckUtils]: 11: Hoare triple {5227#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5228#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 12: Hoare triple {5228#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 13: Hoare triple {5219#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 14: Hoare triple {5219#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 15: Hoare triple {5219#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 16: Hoare triple {5219#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 17: Hoare triple {5219#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 18: Hoare triple {5219#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L272 TraceCheckUtils]: 19: Hoare triple {5219#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 20: Hoare triple {5219#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 21: Hoare triple {5219#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L290 TraceCheckUtils]: 22: Hoare triple {5219#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,179 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:58:10,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:10,180 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089363086] [2022-04-07 22:58:10,180 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089363086] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:10,180 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [650326773] [2022-04-07 22:58:10,180 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:58:10,180 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:10,180 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:10,181 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:10,202 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-07 22:58:10,218 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:58:10,218 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:10,219 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 22:58:10,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:10,236 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:10,348 INFO L272 TraceCheckUtils]: 0: Hoare triple {5218#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,348 INFO L290 TraceCheckUtils]: 1: Hoare triple {5218#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-07 22:58:10,348 INFO L290 TraceCheckUtils]: 2: Hoare triple {5218#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,348 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5218#true} {5218#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,348 INFO L272 TraceCheckUtils]: 4: Hoare triple {5218#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,349 INFO L290 TraceCheckUtils]: 5: Hoare triple {5218#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5223#(= main_~y~0 0)} is VALID [2022-04-07 22:58:10,349 INFO L290 TraceCheckUtils]: 6: Hoare triple {5223#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5224#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:10,350 INFO L290 TraceCheckUtils]: 7: Hoare triple {5224#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:10,350 INFO L290 TraceCheckUtils]: 8: Hoare triple {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:10,351 INFO L290 TraceCheckUtils]: 9: Hoare triple {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5260#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:10,351 INFO L290 TraceCheckUtils]: 10: Hoare triple {5260#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5264#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:58:10,352 INFO L290 TraceCheckUtils]: 11: Hoare triple {5264#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5268#(and (= main_~y~0 (+ main_~z~0 2)) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:10,352 INFO L290 TraceCheckUtils]: 12: Hoare triple {5268#(and (= main_~y~0 (+ main_~z~0 2)) (<= 2 main_~y~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5219#false} is VALID [2022-04-07 22:58:10,352 INFO L290 TraceCheckUtils]: 13: Hoare triple {5219#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5219#false} is VALID [2022-04-07 22:58:10,352 INFO L290 TraceCheckUtils]: 14: Hoare triple {5219#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L290 TraceCheckUtils]: 15: Hoare triple {5219#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L290 TraceCheckUtils]: 16: Hoare triple {5219#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L290 TraceCheckUtils]: 17: Hoare triple {5219#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L290 TraceCheckUtils]: 18: Hoare triple {5219#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L272 TraceCheckUtils]: 19: Hoare triple {5219#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L290 TraceCheckUtils]: 20: Hoare triple {5219#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L290 TraceCheckUtils]: 21: Hoare triple {5219#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L290 TraceCheckUtils]: 22: Hoare triple {5219#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,353 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:58:10,353 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:10,500 INFO L290 TraceCheckUtils]: 22: Hoare triple {5219#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,501 INFO L290 TraceCheckUtils]: 21: Hoare triple {5219#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,501 INFO L290 TraceCheckUtils]: 20: Hoare triple {5219#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5219#false} is VALID [2022-04-07 22:58:10,501 INFO L272 TraceCheckUtils]: 19: Hoare triple {5219#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5219#false} is VALID [2022-04-07 22:58:10,501 INFO L290 TraceCheckUtils]: 18: Hoare triple {5219#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,501 INFO L290 TraceCheckUtils]: 17: Hoare triple {5317#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-07 22:58:10,502 INFO L290 TraceCheckUtils]: 16: Hoare triple {5321#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5317#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:58:10,503 INFO L290 TraceCheckUtils]: 15: Hoare triple {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5321#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:58:10,503 INFO L290 TraceCheckUtils]: 14: Hoare triple {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:58:10,504 INFO L290 TraceCheckUtils]: 13: Hoare triple {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:58:10,506 INFO L290 TraceCheckUtils]: 12: Hoare triple {5335#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:58:10,507 INFO L290 TraceCheckUtils]: 11: Hoare triple {5339#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5335#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 22:58:10,508 INFO L290 TraceCheckUtils]: 10: Hoare triple {5343#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5339#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:58:10,509 INFO L290 TraceCheckUtils]: 9: Hoare triple {5218#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5343#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:58:10,509 INFO L290 TraceCheckUtils]: 8: Hoare triple {5218#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,509 INFO L290 TraceCheckUtils]: 7: Hoare triple {5218#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5218#true} is VALID [2022-04-07 22:58:10,509 INFO L290 TraceCheckUtils]: 6: Hoare triple {5218#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5218#true} is VALID [2022-04-07 22:58:10,509 INFO L290 TraceCheckUtils]: 5: Hoare triple {5218#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5218#true} is VALID [2022-04-07 22:58:10,509 INFO L272 TraceCheckUtils]: 4: Hoare triple {5218#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,509 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5218#true} {5218#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,509 INFO L290 TraceCheckUtils]: 2: Hoare triple {5218#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {5218#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-07 22:58:10,509 INFO L272 TraceCheckUtils]: 0: Hoare triple {5218#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-07 22:58:10,510 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:58:10,510 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [650326773] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:10,510 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:10,510 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 18 [2022-04-07 22:58:10,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326570697] [2022-04-07 22:58:10,510 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:10,510 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:58:10,510 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:10,511 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:10,536 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:10,536 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-07 22:58:10,537 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:10,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-07 22:58:10,537 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-07 22:58:10,537 INFO L87 Difference]: Start difference. First operand 93 states and 126 transitions. Second operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:11,461 INFO L93 Difference]: Finished difference Result 115 states and 152 transitions. [2022-04-07 22:58:11,461 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-07 22:58:11,461 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:58:11,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:11,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 73 transitions. [2022-04-07 22:58:11,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 73 transitions. [2022-04-07 22:58:11,463 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 73 transitions. [2022-04-07 22:58:11,539 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:11,540 INFO L225 Difference]: With dead ends: 115 [2022-04-07 22:58:11,540 INFO L226 Difference]: Without dead ends: 94 [2022-04-07 22:58:11,540 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=213, Invalid=843, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 22:58:11,541 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 91 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 185 mSolverCounterSat, 73 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 258 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 73 IncrementalHoareTripleChecker+Valid, 185 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:11,541 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [91 Valid, 53 Invalid, 258 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [73 Valid, 185 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 22:58:11,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-07 22:58:11,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 77. [2022-04-07 22:58:11,692 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:11,693 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,693 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,693 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:11,694 INFO L93 Difference]: Finished difference Result 94 states and 123 transitions. [2022-04-07 22:58:11,694 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 123 transitions. [2022-04-07 22:58:11,695 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:11,695 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:11,695 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-07 22:58:11,695 INFO L87 Difference]: Start difference. First operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-07 22:58:11,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:11,696 INFO L93 Difference]: Finished difference Result 94 states and 123 transitions. [2022-04-07 22:58:11,696 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 123 transitions. [2022-04-07 22:58:11,696 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:11,696 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:11,696 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:11,696 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:11,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 103 transitions. [2022-04-07 22:58:11,697 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 103 transitions. Word has length 23 [2022-04-07 22:58:11,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:11,697 INFO L478 AbstractCegarLoop]: Abstraction has 77 states and 103 transitions. [2022-04-07 22:58:11,698 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,698 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 103 transitions. [2022-04-07 22:58:11,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 22:58:11,698 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:11,698 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:11,715 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:11,904 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-07 22:58:11,905 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:11,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:11,905 INFO L85 PathProgramCache]: Analyzing trace with hash 466505418, now seen corresponding path program 5 times [2022-04-07 22:58:11,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:11,905 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114326571] [2022-04-07 22:58:11,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:11,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:11,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:11,987 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:11,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:12,001 INFO L290 TraceCheckUtils]: 0: Hoare triple {5882#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5871#true} is VALID [2022-04-07 22:58:12,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {5871#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,001 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5871#true} {5871#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,001 INFO L272 TraceCheckUtils]: 0: Hoare triple {5871#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5882#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:12,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {5882#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5871#true} is VALID [2022-04-07 22:58:12,001 INFO L290 TraceCheckUtils]: 2: Hoare triple {5871#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,001 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5871#true} {5871#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,002 INFO L272 TraceCheckUtils]: 4: Hoare triple {5871#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,002 INFO L290 TraceCheckUtils]: 5: Hoare triple {5871#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5871#true} is VALID [2022-04-07 22:58:12,003 INFO L290 TraceCheckUtils]: 6: Hoare triple {5871#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:12,003 INFO L290 TraceCheckUtils]: 7: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5877#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 22:58:12,006 INFO L290 TraceCheckUtils]: 8: Hoare triple {5877#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:58:12,006 INFO L290 TraceCheckUtils]: 9: Hoare triple {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:58:12,006 INFO L290 TraceCheckUtils]: 10: Hoare triple {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:58:12,007 INFO L290 TraceCheckUtils]: 11: Hoare triple {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5879#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 22:58:12,008 INFO L290 TraceCheckUtils]: 12: Hoare triple {5879#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5880#(<= (+ 2 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:58:12,008 INFO L290 TraceCheckUtils]: 13: Hoare triple {5880#(<= (+ 2 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:12,009 INFO L290 TraceCheckUtils]: 14: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:12,009 INFO L290 TraceCheckUtils]: 15: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:12,010 INFO L290 TraceCheckUtils]: 16: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:12,010 INFO L290 TraceCheckUtils]: 17: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:12,010 INFO L290 TraceCheckUtils]: 18: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:12,011 INFO L290 TraceCheckUtils]: 19: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,011 INFO L272 TraceCheckUtils]: 20: Hoare triple {5872#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5872#false} is VALID [2022-04-07 22:58:12,011 INFO L290 TraceCheckUtils]: 21: Hoare triple {5872#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5872#false} is VALID [2022-04-07 22:58:12,011 INFO L290 TraceCheckUtils]: 22: Hoare triple {5872#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,011 INFO L290 TraceCheckUtils]: 23: Hoare triple {5872#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,011 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:58:12,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:12,011 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114326571] [2022-04-07 22:58:12,011 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1114326571] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:12,011 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [233342877] [2022-04-07 22:58:12,011 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:58:12,011 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:12,012 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:12,012 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:12,013 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-07 22:58:12,053 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-07 22:58:12,053 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:12,054 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-07 22:58:12,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:12,062 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:12,310 INFO L272 TraceCheckUtils]: 0: Hoare triple {5871#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {5871#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5871#true} is VALID [2022-04-07 22:58:12,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {5871#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,310 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5871#true} {5871#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,310 INFO L272 TraceCheckUtils]: 4: Hoare triple {5871#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,311 INFO L290 TraceCheckUtils]: 5: Hoare triple {5871#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5871#true} is VALID [2022-04-07 22:58:12,311 INFO L290 TraceCheckUtils]: 6: Hoare triple {5871#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:12,312 INFO L290 TraceCheckUtils]: 7: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:12,313 INFO L290 TraceCheckUtils]: 8: Hoare triple {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,313 INFO L290 TraceCheckUtils]: 9: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,314 INFO L290 TraceCheckUtils]: 10: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,314 INFO L290 TraceCheckUtils]: 11: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:12,315 INFO L290 TraceCheckUtils]: 12: Hoare triple {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:12,316 INFO L290 TraceCheckUtils]: 13: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,316 INFO L290 TraceCheckUtils]: 14: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,316 INFO L290 TraceCheckUtils]: 15: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,317 INFO L290 TraceCheckUtils]: 16: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,317 INFO L290 TraceCheckUtils]: 17: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,317 INFO L290 TraceCheckUtils]: 18: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,318 INFO L290 TraceCheckUtils]: 19: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,318 INFO L272 TraceCheckUtils]: 20: Hoare triple {5872#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5872#false} is VALID [2022-04-07 22:58:12,318 INFO L290 TraceCheckUtils]: 21: Hoare triple {5872#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5872#false} is VALID [2022-04-07 22:58:12,318 INFO L290 TraceCheckUtils]: 22: Hoare triple {5872#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,318 INFO L290 TraceCheckUtils]: 23: Hoare triple {5872#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,318 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:58:12,318 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:12,410 INFO L290 TraceCheckUtils]: 23: Hoare triple {5872#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,410 INFO L290 TraceCheckUtils]: 22: Hoare triple {5872#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,411 INFO L290 TraceCheckUtils]: 21: Hoare triple {5872#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5872#false} is VALID [2022-04-07 22:58:12,411 INFO L272 TraceCheckUtils]: 20: Hoare triple {5872#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5872#false} is VALID [2022-04-07 22:58:12,411 INFO L290 TraceCheckUtils]: 19: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-07 22:58:12,412 INFO L290 TraceCheckUtils]: 18: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,412 INFO L290 TraceCheckUtils]: 17: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,412 INFO L290 TraceCheckUtils]: 16: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,412 INFO L290 TraceCheckUtils]: 15: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,413 INFO L290 TraceCheckUtils]: 14: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,413 INFO L290 TraceCheckUtils]: 13: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,414 INFO L290 TraceCheckUtils]: 12: Hoare triple {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:12,415 INFO L290 TraceCheckUtils]: 11: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:12,415 INFO L290 TraceCheckUtils]: 10: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,416 INFO L290 TraceCheckUtils]: 9: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,416 INFO L290 TraceCheckUtils]: 8: Hoare triple {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:12,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:12,418 INFO L290 TraceCheckUtils]: 6: Hoare triple {5871#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:12,418 INFO L290 TraceCheckUtils]: 5: Hoare triple {5871#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5871#true} is VALID [2022-04-07 22:58:12,418 INFO L272 TraceCheckUtils]: 4: Hoare triple {5871#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,418 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5871#true} {5871#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,418 INFO L290 TraceCheckUtils]: 2: Hoare triple {5871#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,418 INFO L290 TraceCheckUtils]: 1: Hoare triple {5871#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5871#true} is VALID [2022-04-07 22:58:12,418 INFO L272 TraceCheckUtils]: 0: Hoare triple {5871#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-07 22:58:12,419 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:58:12,419 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [233342877] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:12,419 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:12,419 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6, 6] total 12 [2022-04-07 22:58:12,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1850540166] [2022-04-07 22:58:12,419 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:12,419 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 22:58:12,419 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:12,420 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:12,446 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:12,446 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-07 22:58:12,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:12,447 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-07 22:58:12,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-04-07 22:58:12,447 INFO L87 Difference]: Start difference. First operand 77 states and 103 transitions. Second operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:13,030 INFO L93 Difference]: Finished difference Result 102 states and 139 transitions. [2022-04-07 22:58:13,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 22:58:13,031 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 22:58:13,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:13,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 54 transitions. [2022-04-07 22:58:13,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 54 transitions. [2022-04-07 22:58:13,032 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 54 transitions. [2022-04-07 22:58:13,107 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:13,108 INFO L225 Difference]: With dead ends: 102 [2022-04-07 22:58:13,108 INFO L226 Difference]: Without dead ends: 97 [2022-04-07 22:58:13,108 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=229, Unknown=0, NotChecked=0, Total=306 [2022-04-07 22:58:13,109 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 62 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:13,109 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [62 Valid, 51 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 22:58:13,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-07 22:58:13,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 92. [2022-04-07 22:58:13,297 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:13,297 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,297 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,297 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:13,299 INFO L93 Difference]: Finished difference Result 97 states and 132 transitions. [2022-04-07 22:58:13,299 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 132 transitions. [2022-04-07 22:58:13,299 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:13,299 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:13,299 INFO L74 IsIncluded]: Start isIncluded. First operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-07 22:58:13,299 INFO L87 Difference]: Start difference. First operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-07 22:58:13,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:13,301 INFO L93 Difference]: Finished difference Result 97 states and 132 transitions. [2022-04-07 22:58:13,301 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 132 transitions. [2022-04-07 22:58:13,301 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:13,301 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:13,301 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:13,301 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:13,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 124 transitions. [2022-04-07 22:58:13,302 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 124 transitions. Word has length 24 [2022-04-07 22:58:13,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:13,302 INFO L478 AbstractCegarLoop]: Abstraction has 92 states and 124 transitions. [2022-04-07 22:58:13,302 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,303 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 124 transitions. [2022-04-07 22:58:13,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 22:58:13,307 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:13,307 INFO L499 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:13,326 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:13,515 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-07 22:58:13,515 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:13,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:13,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1774083744, now seen corresponding path program 5 times [2022-04-07 22:58:13,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:13,516 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833200156] [2022-04-07 22:58:13,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:13,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:13,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:13,664 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:13,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:13,668 INFO L290 TraceCheckUtils]: 0: Hoare triple {6525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6511#true} is VALID [2022-04-07 22:58:13,668 INFO L290 TraceCheckUtils]: 1: Hoare triple {6511#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,669 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6511#true} {6511#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,669 INFO L272 TraceCheckUtils]: 0: Hoare triple {6511#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:13,669 INFO L290 TraceCheckUtils]: 1: Hoare triple {6525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6511#true} is VALID [2022-04-07 22:58:13,669 INFO L290 TraceCheckUtils]: 2: Hoare triple {6511#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,669 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6511#true} {6511#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,669 INFO L272 TraceCheckUtils]: 4: Hoare triple {6511#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,670 INFO L290 TraceCheckUtils]: 5: Hoare triple {6511#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6516#(= main_~y~0 0)} is VALID [2022-04-07 22:58:13,670 INFO L290 TraceCheckUtils]: 6: Hoare triple {6516#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6517#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:13,671 INFO L290 TraceCheckUtils]: 7: Hoare triple {6517#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6518#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:13,671 INFO L290 TraceCheckUtils]: 8: Hoare triple {6518#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6519#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:13,672 INFO L290 TraceCheckUtils]: 9: Hoare triple {6519#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6520#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:58:13,673 INFO L290 TraceCheckUtils]: 10: Hoare triple {6520#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6521#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:58:13,673 INFO L290 TraceCheckUtils]: 11: Hoare triple {6521#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:58:13,674 INFO L290 TraceCheckUtils]: 12: Hoare triple {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:58:13,674 INFO L290 TraceCheckUtils]: 13: Hoare triple {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6523#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 22:58:13,675 INFO L290 TraceCheckUtils]: 14: Hoare triple {6523#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6524#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:58:13,675 INFO L290 TraceCheckUtils]: 15: Hoare triple {6524#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,675 INFO L290 TraceCheckUtils]: 16: Hoare triple {6512#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6512#false} is VALID [2022-04-07 22:58:13,675 INFO L290 TraceCheckUtils]: 17: Hoare triple {6512#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,675 INFO L290 TraceCheckUtils]: 18: Hoare triple {6512#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6512#false} is VALID [2022-04-07 22:58:13,675 INFO L290 TraceCheckUtils]: 19: Hoare triple {6512#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,676 INFO L272 TraceCheckUtils]: 20: Hoare triple {6512#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {6512#false} is VALID [2022-04-07 22:58:13,676 INFO L290 TraceCheckUtils]: 21: Hoare triple {6512#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6512#false} is VALID [2022-04-07 22:58:13,676 INFO L290 TraceCheckUtils]: 22: Hoare triple {6512#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,676 INFO L290 TraceCheckUtils]: 23: Hoare triple {6512#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,676 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:58:13,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:13,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [833200156] [2022-04-07 22:58:13,676 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [833200156] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:13,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [511716883] [2022-04-07 22:58:13,676 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:58:13,676 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:13,676 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:13,677 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:13,678 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-07 22:58:13,720 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 22:58:13,720 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:13,720 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 19 conjunts are in the unsatisfiable core [2022-04-07 22:58:13,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:13,727 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:13,921 INFO L272 TraceCheckUtils]: 0: Hoare triple {6511#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,921 INFO L290 TraceCheckUtils]: 1: Hoare triple {6511#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6511#true} is VALID [2022-04-07 22:58:13,921 INFO L290 TraceCheckUtils]: 2: Hoare triple {6511#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,921 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6511#true} {6511#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,921 INFO L272 TraceCheckUtils]: 4: Hoare triple {6511#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:13,921 INFO L290 TraceCheckUtils]: 5: Hoare triple {6511#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6516#(= main_~y~0 0)} is VALID [2022-04-07 22:58:13,922 INFO L290 TraceCheckUtils]: 6: Hoare triple {6516#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6517#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:13,922 INFO L290 TraceCheckUtils]: 7: Hoare triple {6517#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6518#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:13,923 INFO L290 TraceCheckUtils]: 8: Hoare triple {6518#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6519#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:13,923 INFO L290 TraceCheckUtils]: 9: Hoare triple {6519#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6520#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:58:13,924 INFO L290 TraceCheckUtils]: 10: Hoare triple {6520#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6521#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:58:13,925 INFO L290 TraceCheckUtils]: 11: Hoare triple {6521#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:58:13,925 INFO L290 TraceCheckUtils]: 12: Hoare triple {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:58:13,925 INFO L290 TraceCheckUtils]: 13: Hoare triple {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6523#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 22:58:13,926 INFO L290 TraceCheckUtils]: 14: Hoare triple {6523#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6571#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 22:58:13,926 INFO L290 TraceCheckUtils]: 15: Hoare triple {6571#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L290 TraceCheckUtils]: 16: Hoare triple {6512#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L290 TraceCheckUtils]: 17: Hoare triple {6512#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L290 TraceCheckUtils]: 18: Hoare triple {6512#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L290 TraceCheckUtils]: 19: Hoare triple {6512#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L272 TraceCheckUtils]: 20: Hoare triple {6512#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L290 TraceCheckUtils]: 21: Hoare triple {6512#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L290 TraceCheckUtils]: 22: Hoare triple {6512#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L290 TraceCheckUtils]: 23: Hoare triple {6512#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:13,927 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:58:13,927 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:14,118 INFO L290 TraceCheckUtils]: 23: Hoare triple {6512#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:14,118 INFO L290 TraceCheckUtils]: 22: Hoare triple {6512#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:14,118 INFO L290 TraceCheckUtils]: 21: Hoare triple {6512#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6512#false} is VALID [2022-04-07 22:58:14,118 INFO L272 TraceCheckUtils]: 20: Hoare triple {6512#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {6512#false} is VALID [2022-04-07 22:58:14,118 INFO L290 TraceCheckUtils]: 19: Hoare triple {6512#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:14,118 INFO L290 TraceCheckUtils]: 18: Hoare triple {6512#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6512#false} is VALID [2022-04-07 22:58:14,118 INFO L290 TraceCheckUtils]: 17: Hoare triple {6512#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:14,118 INFO L290 TraceCheckUtils]: 16: Hoare triple {6512#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6512#false} is VALID [2022-04-07 22:58:14,118 INFO L290 TraceCheckUtils]: 15: Hoare triple {6623#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-07 22:58:14,120 INFO L290 TraceCheckUtils]: 14: Hoare triple {6627#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6623#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:58:14,120 INFO L290 TraceCheckUtils]: 13: Hoare triple {6631#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6627#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 22:58:14,120 INFO L290 TraceCheckUtils]: 12: Hoare triple {6631#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6631#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:58:14,121 INFO L290 TraceCheckUtils]: 11: Hoare triple {6638#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6631#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:58:14,122 INFO L290 TraceCheckUtils]: 10: Hoare triple {6642#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6638#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:58:14,123 INFO L290 TraceCheckUtils]: 9: Hoare triple {6646#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6642#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:58:14,123 INFO L290 TraceCheckUtils]: 8: Hoare triple {6650#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6646#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:58:14,124 INFO L290 TraceCheckUtils]: 7: Hoare triple {6654#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6650#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:58:14,125 INFO L290 TraceCheckUtils]: 6: Hoare triple {6658#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6654#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:58:14,125 INFO L290 TraceCheckUtils]: 5: Hoare triple {6511#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6658#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 22:58:14,125 INFO L272 TraceCheckUtils]: 4: Hoare triple {6511#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:14,125 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6511#true} {6511#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:14,125 INFO L290 TraceCheckUtils]: 2: Hoare triple {6511#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:14,125 INFO L290 TraceCheckUtils]: 1: Hoare triple {6511#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6511#true} is VALID [2022-04-07 22:58:14,126 INFO L272 TraceCheckUtils]: 0: Hoare triple {6511#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-07 22:58:14,126 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:58:14,126 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [511716883] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:14,126 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:14,126 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 22 [2022-04-07 22:58:14,126 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [595321724] [2022-04-07 22:58:14,126 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:14,126 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 22:58:14,127 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:14,127 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,157 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:14,157 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-07 22:58:14,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:14,157 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-07 22:58:14,157 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2022-04-07 22:58:14,158 INFO L87 Difference]: Start difference. First operand 92 states and 124 transitions. Second operand has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:21,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:21,937 INFO L93 Difference]: Finished difference Result 296 states and 424 transitions. [2022-04-07 22:58:21,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2022-04-07 22:58:21,938 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 22:58:21,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:21,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:21,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 237 transitions. [2022-04-07 22:58:21,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:21,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 237 transitions. [2022-04-07 22:58:21,949 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 66 states and 237 transitions. [2022-04-07 22:58:22,790 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 237 edges. 237 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:22,793 INFO L225 Difference]: With dead ends: 296 [2022-04-07 22:58:22,793 INFO L226 Difference]: Without dead ends: 270 [2022-04-07 22:58:22,795 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2412 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=1734, Invalid=5406, Unknown=0, NotChecked=0, Total=7140 [2022-04-07 22:58:22,795 INFO L913 BasicCegarLoop]: 37 mSDtfsCounter, 349 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 643 mSolverCounterSat, 411 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 349 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 1054 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 411 IncrementalHoareTripleChecker+Valid, 643 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:22,795 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [349 Valid, 84 Invalid, 1054 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [411 Valid, 643 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-07 22:58:22,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states. [2022-04-07 22:58:23,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 109. [2022-04-07 22:58:23,045 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:23,046 INFO L82 GeneralOperation]: Start isEquivalent. First operand 270 states. Second operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:23,046 INFO L74 IsIncluded]: Start isIncluded. First operand 270 states. Second operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:23,046 INFO L87 Difference]: Start difference. First operand 270 states. Second operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:23,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:23,051 INFO L93 Difference]: Finished difference Result 270 states and 363 transitions. [2022-04-07 22:58:23,051 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 363 transitions. [2022-04-07 22:58:23,052 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:23,052 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:23,052 INFO L74 IsIncluded]: Start isIncluded. First operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 270 states. [2022-04-07 22:58:23,053 INFO L87 Difference]: Start difference. First operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 270 states. [2022-04-07 22:58:23,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:23,057 INFO L93 Difference]: Finished difference Result 270 states and 363 transitions. [2022-04-07 22:58:23,057 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 363 transitions. [2022-04-07 22:58:23,057 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:23,057 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:23,057 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:23,057 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:23,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:23,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 147 transitions. [2022-04-07 22:58:23,059 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 147 transitions. Word has length 24 [2022-04-07 22:58:23,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:23,059 INFO L478 AbstractCegarLoop]: Abstraction has 109 states and 147 transitions. [2022-04-07 22:58:23,059 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:23,060 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 147 transitions. [2022-04-07 22:58:23,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 22:58:23,061 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:23,061 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:23,079 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:23,279 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-07 22:58:23,279 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:23,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:23,280 INFO L85 PathProgramCache]: Analyzing trace with hash 388770243, now seen corresponding path program 6 times [2022-04-07 22:58:23,280 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:23,280 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493449004] [2022-04-07 22:58:23,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:23,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:23,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:23,376 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:23,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:23,379 INFO L290 TraceCheckUtils]: 0: Hoare triple {7922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7910#true} is VALID [2022-04-07 22:58:23,379 INFO L290 TraceCheckUtils]: 1: Hoare triple {7910#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,379 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7910#true} {7910#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,379 INFO L272 TraceCheckUtils]: 0: Hoare triple {7910#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:23,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {7922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7910#true} is VALID [2022-04-07 22:58:23,380 INFO L290 TraceCheckUtils]: 2: Hoare triple {7910#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,380 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7910#true} {7910#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,380 INFO L272 TraceCheckUtils]: 4: Hoare triple {7910#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,380 INFO L290 TraceCheckUtils]: 5: Hoare triple {7910#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7915#(= main_~y~0 0)} is VALID [2022-04-07 22:58:23,387 INFO L290 TraceCheckUtils]: 6: Hoare triple {7915#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7916#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:23,388 INFO L290 TraceCheckUtils]: 7: Hoare triple {7916#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7917#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:23,389 INFO L290 TraceCheckUtils]: 8: Hoare triple {7917#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:23,389 INFO L290 TraceCheckUtils]: 9: Hoare triple {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:23,389 INFO L290 TraceCheckUtils]: 10: Hoare triple {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7919#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 22:58:23,390 INFO L290 TraceCheckUtils]: 11: Hoare triple {7919#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7920#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:58:23,390 INFO L290 TraceCheckUtils]: 12: Hoare triple {7920#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7921#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:23,391 INFO L290 TraceCheckUtils]: 13: Hoare triple {7921#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,391 INFO L290 TraceCheckUtils]: 14: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-07 22:58:23,391 INFO L290 TraceCheckUtils]: 15: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-07 22:58:23,391 INFO L290 TraceCheckUtils]: 16: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-07 22:58:23,391 INFO L290 TraceCheckUtils]: 17: Hoare triple {7911#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,391 INFO L290 TraceCheckUtils]: 18: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-07 22:58:23,391 INFO L290 TraceCheckUtils]: 19: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-07 22:58:23,391 INFO L290 TraceCheckUtils]: 20: Hoare triple {7911#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,392 INFO L272 TraceCheckUtils]: 21: Hoare triple {7911#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {7911#false} is VALID [2022-04-07 22:58:23,392 INFO L290 TraceCheckUtils]: 22: Hoare triple {7911#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7911#false} is VALID [2022-04-07 22:58:23,392 INFO L290 TraceCheckUtils]: 23: Hoare triple {7911#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,392 INFO L290 TraceCheckUtils]: 24: Hoare triple {7911#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,392 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:58:23,392 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:23,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1493449004] [2022-04-07 22:58:23,392 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1493449004] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:23,392 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [441714517] [2022-04-07 22:58:23,392 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 22:58:23,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:23,392 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:23,393 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:23,419 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-07 22:58:23,437 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-07 22:58:23,437 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:23,438 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-07 22:58:23,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:23,444 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:23,569 INFO L272 TraceCheckUtils]: 0: Hoare triple {7910#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {7910#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7910#true} is VALID [2022-04-07 22:58:23,569 INFO L290 TraceCheckUtils]: 2: Hoare triple {7910#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,570 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7910#true} {7910#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,570 INFO L272 TraceCheckUtils]: 4: Hoare triple {7910#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,570 INFO L290 TraceCheckUtils]: 5: Hoare triple {7910#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7915#(= main_~y~0 0)} is VALID [2022-04-07 22:58:23,570 INFO L290 TraceCheckUtils]: 6: Hoare triple {7915#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7916#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:23,571 INFO L290 TraceCheckUtils]: 7: Hoare triple {7916#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7917#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:23,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {7917#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:23,572 INFO L290 TraceCheckUtils]: 9: Hoare triple {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:23,573 INFO L290 TraceCheckUtils]: 10: Hoare triple {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7956#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:23,573 INFO L290 TraceCheckUtils]: 11: Hoare triple {7956#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7960#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:58:23,574 INFO L290 TraceCheckUtils]: 12: Hoare triple {7960#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7964#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 13: Hoare triple {7964#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 14: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 15: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 16: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 17: Hoare triple {7911#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 18: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 19: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 20: Hoare triple {7911#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L272 TraceCheckUtils]: 21: Hoare triple {7911#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 22: Hoare triple {7911#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7911#false} is VALID [2022-04-07 22:58:23,575 INFO L290 TraceCheckUtils]: 23: Hoare triple {7911#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,576 INFO L290 TraceCheckUtils]: 24: Hoare triple {7911#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,576 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:58:23,576 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:23,748 INFO L290 TraceCheckUtils]: 24: Hoare triple {7911#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,749 INFO L290 TraceCheckUtils]: 23: Hoare triple {7911#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,749 INFO L290 TraceCheckUtils]: 22: Hoare triple {7911#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7911#false} is VALID [2022-04-07 22:58:23,749 INFO L272 TraceCheckUtils]: 21: Hoare triple {7911#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {7911#false} is VALID [2022-04-07 22:58:23,749 INFO L290 TraceCheckUtils]: 20: Hoare triple {7911#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,749 INFO L290 TraceCheckUtils]: 19: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-07 22:58:23,749 INFO L290 TraceCheckUtils]: 18: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-07 22:58:23,749 INFO L290 TraceCheckUtils]: 17: Hoare triple {7911#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-07 22:58:23,750 INFO L290 TraceCheckUtils]: 16: Hoare triple {8025#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-07 22:58:23,751 INFO L290 TraceCheckUtils]: 15: Hoare triple {8029#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8025#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:23,752 INFO L290 TraceCheckUtils]: 14: Hoare triple {8033#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8029#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:58:23,752 INFO L290 TraceCheckUtils]: 13: Hoare triple {8037#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8033#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:58:23,753 INFO L290 TraceCheckUtils]: 12: Hoare triple {8041#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8037#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:58:23,754 INFO L290 TraceCheckUtils]: 11: Hoare triple {8045#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8041#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:58:23,754 INFO L290 TraceCheckUtils]: 10: Hoare triple {7910#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8045#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:58:23,754 INFO L290 TraceCheckUtils]: 9: Hoare triple {7910#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,754 INFO L290 TraceCheckUtils]: 8: Hoare triple {7910#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L290 TraceCheckUtils]: 7: Hoare triple {7910#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {7910#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L290 TraceCheckUtils]: 5: Hoare triple {7910#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L272 TraceCheckUtils]: 4: Hoare triple {7910#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7910#true} {7910#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L290 TraceCheckUtils]: 2: Hoare triple {7910#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L290 TraceCheckUtils]: 1: Hoare triple {7910#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L272 TraceCheckUtils]: 0: Hoare triple {7910#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-07 22:58:23,755 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:58:23,755 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [441714517] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:23,755 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:23,755 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 8] total 19 [2022-04-07 22:58:23,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56721398] [2022-04-07 22:58:23,756 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:23,756 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 22:58:23,756 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:23,756 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:23,782 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:23,783 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 22:58:23,783 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:23,783 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 22:58:23,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-04-07 22:58:23,783 INFO L87 Difference]: Start difference. First operand 109 states and 147 transitions. Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:25,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:25,536 INFO L93 Difference]: Finished difference Result 164 states and 214 transitions. [2022-04-07 22:58:25,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-07 22:58:25,536 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 22:58:25,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:25,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:25,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 89 transitions. [2022-04-07 22:58:25,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:25,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 89 transitions. [2022-04-07 22:58:25,540 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 89 transitions. [2022-04-07 22:58:25,620 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:25,622 INFO L225 Difference]: With dead ends: 164 [2022-04-07 22:58:25,622 INFO L226 Difference]: Without dead ends: 144 [2022-04-07 22:58:25,622 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=225, Invalid=1181, Unknown=0, NotChecked=0, Total=1406 [2022-04-07 22:58:25,624 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 46 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 379 mSolverCounterSat, 72 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 451 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 379 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:25,624 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 71 Invalid, 451 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 379 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 22:58:25,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2022-04-07 22:58:25,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 105. [2022-04-07 22:58:25,900 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:25,900 INFO L82 GeneralOperation]: Start isEquivalent. First operand 144 states. Second operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:25,901 INFO L74 IsIncluded]: Start isIncluded. First operand 144 states. Second operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:25,901 INFO L87 Difference]: Start difference. First operand 144 states. Second operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:25,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:25,904 INFO L93 Difference]: Finished difference Result 144 states and 187 transitions. [2022-04-07 22:58:25,904 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 187 transitions. [2022-04-07 22:58:25,904 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:25,904 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:25,905 INFO L74 IsIncluded]: Start isIncluded. First operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-07 22:58:25,905 INFO L87 Difference]: Start difference. First operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-07 22:58:25,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:25,906 INFO L93 Difference]: Finished difference Result 144 states and 187 transitions. [2022-04-07 22:58:25,906 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 187 transitions. [2022-04-07 22:58:25,907 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:25,907 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:25,907 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:25,907 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:25,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:25,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 139 transitions. [2022-04-07 22:58:25,912 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 139 transitions. Word has length 25 [2022-04-07 22:58:25,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:25,912 INFO L478 AbstractCegarLoop]: Abstraction has 105 states and 139 transitions. [2022-04-07 22:58:25,912 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:25,912 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 139 transitions. [2022-04-07 22:58:25,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 22:58:25,913 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:25,913 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:25,938 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2022-04-07 22:58:26,129 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-07 22:58:26,129 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:26,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:26,130 INFO L85 PathProgramCache]: Analyzing trace with hash -87467495, now seen corresponding path program 7 times [2022-04-07 22:58:26,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:26,130 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1043717974] [2022-04-07 22:58:26,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:26,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:26,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:26,471 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:26,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:26,478 INFO L290 TraceCheckUtils]: 0: Hoare triple {8818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8801#true} is VALID [2022-04-07 22:58:26,478 INFO L290 TraceCheckUtils]: 1: Hoare triple {8801#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:26,478 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8801#true} {8801#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:26,478 INFO L272 TraceCheckUtils]: 0: Hoare triple {8801#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:26,478 INFO L290 TraceCheckUtils]: 1: Hoare triple {8818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8801#true} is VALID [2022-04-07 22:58:26,478 INFO L290 TraceCheckUtils]: 2: Hoare triple {8801#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:26,478 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8801#true} {8801#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:26,478 INFO L272 TraceCheckUtils]: 4: Hoare triple {8801#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:26,479 INFO L290 TraceCheckUtils]: 5: Hoare triple {8801#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8806#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:58:26,480 INFO L290 TraceCheckUtils]: 6: Hoare triple {8806#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8807#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:26,484 INFO L290 TraceCheckUtils]: 7: Hoare triple {8807#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8808#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 22:58:26,486 INFO L290 TraceCheckUtils]: 8: Hoare triple {8808#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8809#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)))} is VALID [2022-04-07 22:58:26,486 INFO L290 TraceCheckUtils]: 9: Hoare triple {8809#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8810#(and (<= main_~y~0 3) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} is VALID [2022-04-07 22:58:26,487 INFO L290 TraceCheckUtils]: 10: Hoare triple {8810#(and (<= main_~y~0 3) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8810#(and (<= main_~y~0 3) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} is VALID [2022-04-07 22:58:26,487 INFO L290 TraceCheckUtils]: 11: Hoare triple {8810#(and (<= main_~y~0 3) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-07 22:58:26,488 INFO L290 TraceCheckUtils]: 12: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-07 22:58:26,488 INFO L290 TraceCheckUtils]: 13: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-07 22:58:26,489 INFO L290 TraceCheckUtils]: 14: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-07 22:58:26,489 INFO L290 TraceCheckUtils]: 15: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8812#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296) 1)) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:26,490 INFO L290 TraceCheckUtils]: 16: Hoare triple {8812#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296) 1)) (<= main_~y~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8813#(and (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:26,491 INFO L290 TraceCheckUtils]: 17: Hoare triple {8813#(and (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8814#(and (<= main_~y~0 0) (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:26,491 INFO L290 TraceCheckUtils]: 18: Hoare triple {8814#(and (<= main_~y~0 0) (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8814#(and (<= main_~y~0 0) (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:26,492 INFO L290 TraceCheckUtils]: 19: Hoare triple {8814#(and (<= main_~y~0 0) (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8813#(and (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:26,492 INFO L290 TraceCheckUtils]: 20: Hoare triple {8813#(and (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8812#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296) 1)) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:26,495 INFO L290 TraceCheckUtils]: 21: Hoare triple {8812#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296) 1)) (<= main_~y~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8815#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:58:26,495 INFO L290 TraceCheckUtils]: 22: Hoare triple {8815#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8815#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 22:58:26,496 INFO L272 TraceCheckUtils]: 23: Hoare triple {8815#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {8816#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:58:26,496 INFO L290 TraceCheckUtils]: 24: Hoare triple {8816#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8817#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:58:26,497 INFO L290 TraceCheckUtils]: 25: Hoare triple {8817#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-07 22:58:26,497 INFO L290 TraceCheckUtils]: 26: Hoare triple {8802#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-07 22:58:26,497 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:58:26,497 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:26,497 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1043717974] [2022-04-07 22:58:26,497 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1043717974] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:26,497 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [669494253] [2022-04-07 22:58:26,497 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 22:58:26,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:26,497 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:26,498 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:26,499 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-07 22:58:26,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:26,574 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 49 conjunts are in the unsatisfiable core [2022-04-07 22:58:26,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:26,586 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:33,325 INFO L272 TraceCheckUtils]: 0: Hoare triple {8801#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:33,325 INFO L290 TraceCheckUtils]: 1: Hoare triple {8801#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8801#true} is VALID [2022-04-07 22:58:33,325 INFO L290 TraceCheckUtils]: 2: Hoare triple {8801#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:33,325 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8801#true} {8801#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:33,325 INFO L272 TraceCheckUtils]: 4: Hoare triple {8801#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:33,326 INFO L290 TraceCheckUtils]: 5: Hoare triple {8801#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8806#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:58:33,327 INFO L290 TraceCheckUtils]: 6: Hoare triple {8806#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8807#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:33,331 INFO L290 TraceCheckUtils]: 7: Hoare triple {8807#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8843#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 22:58:33,333 INFO L290 TraceCheckUtils]: 8: Hoare triple {8843#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8847#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:33,334 INFO L290 TraceCheckUtils]: 9: Hoare triple {8847#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8851#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:33,334 INFO L290 TraceCheckUtils]: 10: Hoare triple {8851#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8855#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:33,338 INFO L290 TraceCheckUtils]: 11: Hoare triple {8855#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8859#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= main_~y~0 3) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 22:58:33,340 INFO L290 TraceCheckUtils]: 12: Hoare triple {8859#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= main_~y~0 3) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8863#(and (<= main_~x~0 (+ 4294967294 (* (div (+ (- 2) main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 3) (<= (mod (+ main_~x~0 4294967294) 4294967296) 0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-07 22:58:33,343 INFO L290 TraceCheckUtils]: 13: Hoare triple {8863#(and (<= main_~x~0 (+ 4294967294 (* (div (+ (- 2) main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 3) (<= (mod (+ main_~x~0 4294967294) 4294967296) 0) (<= (+ main_~x~0 1) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8867#(and (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 22:58:33,344 INFO L290 TraceCheckUtils]: 14: Hoare triple {8867#(and (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8867#(and (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 22:58:33,346 INFO L290 TraceCheckUtils]: 15: Hoare triple {8867#(and (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8874#(and (<= main_~y~0 2) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:33,348 INFO L290 TraceCheckUtils]: 16: Hoare triple {8874#(and (<= main_~y~0 2) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8878#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:33,354 INFO L290 TraceCheckUtils]: 17: Hoare triple {8878#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8882#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 22:58:33,354 INFO L290 TraceCheckUtils]: 18: Hoare triple {8882#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8882#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 22:58:33,359 INFO L290 TraceCheckUtils]: 19: Hoare triple {8882#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8889#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (mod (+ main_~x~0 4294967294) 4294967296) 0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:33,363 INFO L290 TraceCheckUtils]: 20: Hoare triple {8889#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (mod (+ main_~x~0 4294967294) 4294967296) 0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8893#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 22:58:33,369 INFO L290 TraceCheckUtils]: 21: Hoare triple {8893#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8851#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:33,371 INFO L290 TraceCheckUtils]: 22: Hoare triple {8851#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-07 22:58:33,373 INFO L272 TraceCheckUtils]: 23: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {8903#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:58:33,374 INFO L290 TraceCheckUtils]: 24: Hoare triple {8903#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8907#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:58:33,374 INFO L290 TraceCheckUtils]: 25: Hoare triple {8907#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-07 22:58:33,374 INFO L290 TraceCheckUtils]: 26: Hoare triple {8802#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-07 22:58:33,375 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:33,375 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:35,466 INFO L290 TraceCheckUtils]: 26: Hoare triple {8802#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-07 22:58:35,467 INFO L290 TraceCheckUtils]: 25: Hoare triple {8907#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-07 22:58:35,467 INFO L290 TraceCheckUtils]: 24: Hoare triple {8903#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8907#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:58:35,468 INFO L272 TraceCheckUtils]: 23: Hoare triple {8923#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {8903#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:58:35,468 INFO L290 TraceCheckUtils]: 22: Hoare triple {8927#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8923#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:58:35,470 INFO L290 TraceCheckUtils]: 21: Hoare triple {8931#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8927#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:35,471 INFO L290 TraceCheckUtils]: 20: Hoare triple {8935#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8931#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-07 22:58:35,473 INFO L290 TraceCheckUtils]: 19: Hoare triple {8939#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8935#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-07 22:58:35,473 INFO L290 TraceCheckUtils]: 18: Hoare triple {8939#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8939#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:58:35,476 INFO L290 TraceCheckUtils]: 17: Hoare triple {8946#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8939#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:58:35,477 INFO L290 TraceCheckUtils]: 16: Hoare triple {8950#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8946#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-07 22:58:35,478 INFO L290 TraceCheckUtils]: 15: Hoare triple {8954#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8950#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-07 22:58:35,479 INFO L290 TraceCheckUtils]: 14: Hoare triple {8954#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8954#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:35,480 INFO L290 TraceCheckUtils]: 13: Hoare triple {8961#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8954#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:35,481 INFO L290 TraceCheckUtils]: 12: Hoare triple {8965#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8961#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:35,482 INFO L290 TraceCheckUtils]: 11: Hoare triple {8969#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8965#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:35,483 INFO L290 TraceCheckUtils]: 10: Hoare triple {8973#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8969#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:35,483 INFO L290 TraceCheckUtils]: 9: Hoare triple {8973#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8973#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:35,485 INFO L290 TraceCheckUtils]: 8: Hoare triple {8980#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 1) 4294967296))) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8973#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:35,486 INFO L290 TraceCheckUtils]: 7: Hoare triple {8984#(or (not (< 0 (mod (+ main_~y~0 2) 4294967296))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8980#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 1) 4294967296))) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-07 22:58:35,489 INFO L290 TraceCheckUtils]: 6: Hoare triple {8988#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (<= (mod (+ main_~y~0 3) 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8984#(or (not (< 0 (mod (+ main_~y~0 2) 4294967296))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-07 22:58:35,490 INFO L290 TraceCheckUtils]: 5: Hoare triple {8801#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8988#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (<= (mod (+ main_~y~0 3) 4294967296) 0))} is VALID [2022-04-07 22:58:35,490 INFO L272 TraceCheckUtils]: 4: Hoare triple {8801#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:35,490 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8801#true} {8801#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:35,490 INFO L290 TraceCheckUtils]: 2: Hoare triple {8801#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:35,490 INFO L290 TraceCheckUtils]: 1: Hoare triple {8801#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8801#true} is VALID [2022-04-07 22:58:35,491 INFO L272 TraceCheckUtils]: 0: Hoare triple {8801#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-07 22:58:35,491 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:35,491 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [669494253] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:35,491 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:35,491 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 19, 19] total 44 [2022-04-07 22:58:35,491 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [839011509] [2022-04-07 22:58:35,491 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:35,492 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:58:35,492 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:35,492 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:35,654 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:35,655 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 44 states [2022-04-07 22:58:35,655 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:35,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-04-07 22:58:35,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=340, Invalid=1552, Unknown=0, NotChecked=0, Total=1892 [2022-04-07 22:58:35,656 INFO L87 Difference]: Start difference. First operand 105 states and 139 transitions. Second operand has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:49,453 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.81s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 22:58:52,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:52,989 INFO L93 Difference]: Finished difference Result 188 states and 243 transitions. [2022-04-07 22:58:52,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2022-04-07 22:58:52,989 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:58:52,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:52,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:52,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 142 transitions. [2022-04-07 22:58:52,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:52,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 142 transitions. [2022-04-07 22:58:52,992 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 66 states and 142 transitions. [2022-04-07 22:58:54,320 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:54,332 INFO L225 Difference]: With dead ends: 188 [2022-04-07 22:58:54,332 INFO L226 Difference]: Without dead ends: 169 [2022-04-07 22:58:54,337 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 24 SyntacticMatches, 5 SemanticMatches, 105 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3393 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=1743, Invalid=9599, Unknown=0, NotChecked=0, Total=11342 [2022-04-07 22:58:54,337 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 182 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 645 mSolverCounterSat, 320 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 965 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 320 IncrementalHoareTripleChecker+Valid, 645 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:54,337 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [182 Valid, 88 Invalid, 965 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [320 Valid, 645 Invalid, 0 Unknown, 0 Unchecked, 4.6s Time] [2022-04-07 22:58:54,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2022-04-07 22:58:54,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 129. [2022-04-07 22:58:54,667 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:54,667 INFO L82 GeneralOperation]: Start isEquivalent. First operand 169 states. Second operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:54,667 INFO L74 IsIncluded]: Start isIncluded. First operand 169 states. Second operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:54,667 INFO L87 Difference]: Start difference. First operand 169 states. Second operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:54,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:54,670 INFO L93 Difference]: Finished difference Result 169 states and 220 transitions. [2022-04-07 22:58:54,670 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 220 transitions. [2022-04-07 22:58:54,672 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:54,672 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:54,672 INFO L74 IsIncluded]: Start isIncluded. First operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 169 states. [2022-04-07 22:58:54,673 INFO L87 Difference]: Start difference. First operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 169 states. [2022-04-07 22:58:54,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:54,681 INFO L93 Difference]: Finished difference Result 169 states and 220 transitions. [2022-04-07 22:58:54,681 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 220 transitions. [2022-04-07 22:58:54,681 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:54,681 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:54,681 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:54,681 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:54,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:54,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 170 transitions. [2022-04-07 22:58:54,683 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 170 transitions. Word has length 27 [2022-04-07 22:58:54,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:54,683 INFO L478 AbstractCegarLoop]: Abstraction has 129 states and 170 transitions. [2022-04-07 22:58:54,683 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:54,683 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 170 transitions. [2022-04-07 22:58:54,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 22:58:54,684 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:54,684 INFO L499 BasicCegarLoop]: trace histogram [6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:54,739 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:54,884 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:54,884 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:54,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:54,885 INFO L85 PathProgramCache]: Analyzing trace with hash -109156381, now seen corresponding path program 6 times [2022-04-07 22:58:54,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:54,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995145582] [2022-04-07 22:58:54,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:54,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:54,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:55,008 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:55,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:55,012 INFO L290 TraceCheckUtils]: 0: Hoare triple {9935#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9922#true} is VALID [2022-04-07 22:58:55,012 INFO L290 TraceCheckUtils]: 1: Hoare triple {9922#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,012 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9922#true} {9922#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,013 INFO L272 TraceCheckUtils]: 0: Hoare triple {9922#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9935#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:55,013 INFO L290 TraceCheckUtils]: 1: Hoare triple {9935#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9922#true} is VALID [2022-04-07 22:58:55,013 INFO L290 TraceCheckUtils]: 2: Hoare triple {9922#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,013 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9922#true} {9922#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,013 INFO L272 TraceCheckUtils]: 4: Hoare triple {9922#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,013 INFO L290 TraceCheckUtils]: 5: Hoare triple {9922#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9927#(= main_~y~0 0)} is VALID [2022-04-07 22:58:55,014 INFO L290 TraceCheckUtils]: 6: Hoare triple {9927#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9928#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:55,014 INFO L290 TraceCheckUtils]: 7: Hoare triple {9928#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9929#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:55,015 INFO L290 TraceCheckUtils]: 8: Hoare triple {9929#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:55,015 INFO L290 TraceCheckUtils]: 9: Hoare triple {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:55,016 INFO L290 TraceCheckUtils]: 10: Hoare triple {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9931#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 22:58:55,016 INFO L290 TraceCheckUtils]: 11: Hoare triple {9931#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9932#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:58:55,017 INFO L290 TraceCheckUtils]: 12: Hoare triple {9932#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9933#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:55,017 INFO L290 TraceCheckUtils]: 13: Hoare triple {9933#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9934#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 22:58:55,018 INFO L290 TraceCheckUtils]: 14: Hoare triple {9934#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-07 22:58:55,018 INFO L290 TraceCheckUtils]: 15: Hoare triple {9923#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-07 22:58:55,018 INFO L290 TraceCheckUtils]: 16: Hoare triple {9923#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-07 22:58:55,018 INFO L290 TraceCheckUtils]: 17: Hoare triple {9923#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,018 INFO L290 TraceCheckUtils]: 18: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-07 22:58:55,018 INFO L290 TraceCheckUtils]: 19: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-07 22:58:55,018 INFO L290 TraceCheckUtils]: 20: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-07 22:58:55,018 INFO L290 TraceCheckUtils]: 21: Hoare triple {9923#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,019 INFO L290 TraceCheckUtils]: 22: Hoare triple {9923#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,019 INFO L272 TraceCheckUtils]: 23: Hoare triple {9923#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {9923#false} is VALID [2022-04-07 22:58:55,019 INFO L290 TraceCheckUtils]: 24: Hoare triple {9923#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9923#false} is VALID [2022-04-07 22:58:55,019 INFO L290 TraceCheckUtils]: 25: Hoare triple {9923#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,019 INFO L290 TraceCheckUtils]: 26: Hoare triple {9923#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,019 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:58:55,019 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:55,019 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995145582] [2022-04-07 22:58:55,019 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995145582] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:55,019 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [443231201] [2022-04-07 22:58:55,019 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 22:58:55,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:55,020 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:55,020 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:55,022 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-07 22:58:55,075 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-07 22:58:55,075 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:55,076 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-07 22:58:55,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:55,081 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:55,223 INFO L272 TraceCheckUtils]: 0: Hoare triple {9922#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,223 INFO L290 TraceCheckUtils]: 1: Hoare triple {9922#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9922#true} is VALID [2022-04-07 22:58:55,223 INFO L290 TraceCheckUtils]: 2: Hoare triple {9922#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,223 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9922#true} {9922#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,223 INFO L272 TraceCheckUtils]: 4: Hoare triple {9922#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,223 INFO L290 TraceCheckUtils]: 5: Hoare triple {9922#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9927#(= main_~y~0 0)} is VALID [2022-04-07 22:58:55,224 INFO L290 TraceCheckUtils]: 6: Hoare triple {9927#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9928#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:55,224 INFO L290 TraceCheckUtils]: 7: Hoare triple {9928#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9929#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:55,225 INFO L290 TraceCheckUtils]: 8: Hoare triple {9929#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:55,225 INFO L290 TraceCheckUtils]: 9: Hoare triple {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:55,226 INFO L290 TraceCheckUtils]: 10: Hoare triple {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9969#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:55,226 INFO L290 TraceCheckUtils]: 11: Hoare triple {9969#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9973#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:58:55,227 INFO L290 TraceCheckUtils]: 12: Hoare triple {9973#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9977#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:55,227 INFO L290 TraceCheckUtils]: 13: Hoare triple {9977#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9981#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 14: Hoare triple {9981#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 15: Hoare triple {9923#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 16: Hoare triple {9923#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 17: Hoare triple {9923#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 18: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 19: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 20: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 21: Hoare triple {9923#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,228 INFO L290 TraceCheckUtils]: 22: Hoare triple {9923#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,229 INFO L272 TraceCheckUtils]: 23: Hoare triple {9923#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {9923#false} is VALID [2022-04-07 22:58:55,229 INFO L290 TraceCheckUtils]: 24: Hoare triple {9923#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9923#false} is VALID [2022-04-07 22:58:55,229 INFO L290 TraceCheckUtils]: 25: Hoare triple {9923#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,229 INFO L290 TraceCheckUtils]: 26: Hoare triple {9923#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,229 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:58:55,229 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:55,436 INFO L290 TraceCheckUtils]: 26: Hoare triple {9923#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,437 INFO L290 TraceCheckUtils]: 25: Hoare triple {9923#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,437 INFO L290 TraceCheckUtils]: 24: Hoare triple {9923#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9923#false} is VALID [2022-04-07 22:58:55,437 INFO L272 TraceCheckUtils]: 23: Hoare triple {9923#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {9923#false} is VALID [2022-04-07 22:58:55,437 INFO L290 TraceCheckUtils]: 22: Hoare triple {9923#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,437 INFO L290 TraceCheckUtils]: 21: Hoare triple {10036#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-07 22:58:55,438 INFO L290 TraceCheckUtils]: 20: Hoare triple {10040#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10036#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:58:55,446 INFO L290 TraceCheckUtils]: 19: Hoare triple {10044#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10040#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:58:55,447 INFO L290 TraceCheckUtils]: 18: Hoare triple {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10044#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:58:55,447 INFO L290 TraceCheckUtils]: 17: Hoare triple {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 22:58:55,447 INFO L290 TraceCheckUtils]: 16: Hoare triple {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 22:58:55,448 INFO L290 TraceCheckUtils]: 15: Hoare triple {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 22:58:55,448 INFO L290 TraceCheckUtils]: 14: Hoare triple {10061#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 22:58:55,449 INFO L290 TraceCheckUtils]: 13: Hoare triple {10065#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10061#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:58:55,450 INFO L290 TraceCheckUtils]: 12: Hoare triple {10069#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10065#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:58:55,451 INFO L290 TraceCheckUtils]: 11: Hoare triple {10073#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10069#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:58:55,452 INFO L290 TraceCheckUtils]: 10: Hoare triple {9922#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10073#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 22:58:55,452 INFO L290 TraceCheckUtils]: 9: Hoare triple {9922#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L290 TraceCheckUtils]: 8: Hoare triple {9922#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L290 TraceCheckUtils]: 7: Hoare triple {9922#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L290 TraceCheckUtils]: 6: Hoare triple {9922#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L290 TraceCheckUtils]: 5: Hoare triple {9922#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L272 TraceCheckUtils]: 4: Hoare triple {9922#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9922#true} {9922#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L290 TraceCheckUtils]: 2: Hoare triple {9922#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L290 TraceCheckUtils]: 1: Hoare triple {9922#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L272 TraceCheckUtils]: 0: Hoare triple {9922#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-07 22:58:55,452 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:58:55,452 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [443231201] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:55,453 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:55,453 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 23 [2022-04-07 22:58:55,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [299770801] [2022-04-07 22:58:55,453 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:55,453 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:58:55,453 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:55,453 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:55,483 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:55,484 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-07 22:58:55,484 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:55,484 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-07 22:58:55,484 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=407, Unknown=0, NotChecked=0, Total=506 [2022-04-07 22:58:55,484 INFO L87 Difference]: Start difference. First operand 129 states and 170 transitions. Second operand has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:57,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:57,006 INFO L93 Difference]: Finished difference Result 162 states and 209 transitions. [2022-04-07 22:58:57,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-07 22:58:57,006 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:58:57,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:57,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:57,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 90 transitions. [2022-04-07 22:58:57,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:57,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 90 transitions. [2022-04-07 22:58:57,008 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 90 transitions. [2022-04-07 22:58:57,133 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:57,135 INFO L225 Difference]: With dead ends: 162 [2022-04-07 22:58:57,135 INFO L226 Difference]: Without dead ends: 136 [2022-04-07 22:58:57,136 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 412 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=366, Invalid=1614, Unknown=0, NotChecked=0, Total=1980 [2022-04-07 22:58:57,136 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 94 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 252 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 252 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:57,136 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [94 Valid, 68 Invalid, 321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 252 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 22:58:57,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2022-04-07 22:58:57,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 108. [2022-04-07 22:58:57,409 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:57,409 INFO L82 GeneralOperation]: Start isEquivalent. First operand 136 states. Second operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:57,409 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:57,410 INFO L87 Difference]: Start difference. First operand 136 states. Second operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:57,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:57,411 INFO L93 Difference]: Finished difference Result 136 states and 174 transitions. [2022-04-07 22:58:57,411 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 174 transitions. [2022-04-07 22:58:57,411 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:57,411 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:57,411 INFO L74 IsIncluded]: Start isIncluded. First operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 136 states. [2022-04-07 22:58:57,412 INFO L87 Difference]: Start difference. First operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 136 states. [2022-04-07 22:58:57,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:57,413 INFO L93 Difference]: Finished difference Result 136 states and 174 transitions. [2022-04-07 22:58:57,413 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 174 transitions. [2022-04-07 22:58:57,413 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:57,413 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:57,413 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:57,413 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:57,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:57,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 142 transitions. [2022-04-07 22:58:57,415 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 142 transitions. Word has length 27 [2022-04-07 22:58:57,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:57,415 INFO L478 AbstractCegarLoop]: Abstraction has 108 states and 142 transitions. [2022-04-07 22:58:57,415 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:57,415 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 142 transitions. [2022-04-07 22:58:57,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 22:58:57,417 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:57,417 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:57,435 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:57,636 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-07 22:58:57,636 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:57,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:57,636 INFO L85 PathProgramCache]: Analyzing trace with hash -1270348258, now seen corresponding path program 7 times [2022-04-07 22:58:57,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:57,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373350865] [2022-04-07 22:58:57,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:57,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:57,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:57,785 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:57,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:57,791 INFO L290 TraceCheckUtils]: 0: Hoare triple {10829#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10816#true} is VALID [2022-04-07 22:58:57,792 INFO L290 TraceCheckUtils]: 1: Hoare triple {10816#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:57,792 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10816#true} {10816#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:57,792 INFO L272 TraceCheckUtils]: 0: Hoare triple {10816#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10829#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:57,792 INFO L290 TraceCheckUtils]: 1: Hoare triple {10829#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10816#true} is VALID [2022-04-07 22:58:57,792 INFO L290 TraceCheckUtils]: 2: Hoare triple {10816#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:57,792 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10816#true} {10816#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:57,792 INFO L272 TraceCheckUtils]: 4: Hoare triple {10816#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:57,792 INFO L290 TraceCheckUtils]: 5: Hoare triple {10816#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10816#true} is VALID [2022-04-07 22:58:57,793 INFO L290 TraceCheckUtils]: 6: Hoare triple {10816#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:57,794 INFO L290 TraceCheckUtils]: 7: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10822#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 22:58:57,795 INFO L290 TraceCheckUtils]: 8: Hoare triple {10822#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10823#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:57,796 INFO L290 TraceCheckUtils]: 9: Hoare triple {10823#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:58:57,797 INFO L290 TraceCheckUtils]: 10: Hoare triple {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:58:57,797 INFO L290 TraceCheckUtils]: 11: Hoare triple {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:58:57,798 INFO L290 TraceCheckUtils]: 12: Hoare triple {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10825#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:57,798 INFO L290 TraceCheckUtils]: 13: Hoare triple {10825#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10826#(<= (+ 2 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:58:57,799 INFO L290 TraceCheckUtils]: 14: Hoare triple {10826#(<= (+ 2 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10827#(<= (+ 3 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:58:57,800 INFO L290 TraceCheckUtils]: 15: Hoare triple {10827#(<= (+ 3 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:57,800 INFO L290 TraceCheckUtils]: 16: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:57,801 INFO L290 TraceCheckUtils]: 17: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:57,801 INFO L290 TraceCheckUtils]: 18: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:57,801 INFO L290 TraceCheckUtils]: 19: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:57,802 INFO L290 TraceCheckUtils]: 20: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:57,802 INFO L290 TraceCheckUtils]: 21: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:57,803 INFO L290 TraceCheckUtils]: 22: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:57,803 INFO L272 TraceCheckUtils]: 23: Hoare triple {10817#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {10817#false} is VALID [2022-04-07 22:58:57,803 INFO L290 TraceCheckUtils]: 24: Hoare triple {10817#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10817#false} is VALID [2022-04-07 22:58:57,803 INFO L290 TraceCheckUtils]: 25: Hoare triple {10817#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:57,803 INFO L290 TraceCheckUtils]: 26: Hoare triple {10817#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:57,803 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 10 proven. 10 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:58:57,803 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:57,803 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373350865] [2022-04-07 22:58:57,803 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373350865] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:57,803 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1395459364] [2022-04-07 22:58:57,803 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 22:58:57,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:57,804 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:57,804 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:57,805 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-07 22:58:57,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:57,840 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-07 22:58:57,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:57,847 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:58,108 INFO L272 TraceCheckUtils]: 0: Hoare triple {10816#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:58,108 INFO L290 TraceCheckUtils]: 1: Hoare triple {10816#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10816#true} is VALID [2022-04-07 22:58:58,109 INFO L290 TraceCheckUtils]: 2: Hoare triple {10816#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:58,109 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10816#true} {10816#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:58,109 INFO L272 TraceCheckUtils]: 4: Hoare triple {10816#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:58,109 INFO L290 TraceCheckUtils]: 5: Hoare triple {10816#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10816#true} is VALID [2022-04-07 22:58:58,110 INFO L290 TraceCheckUtils]: 6: Hoare triple {10816#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:58,110 INFO L290 TraceCheckUtils]: 7: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:58,111 INFO L290 TraceCheckUtils]: 8: Hoare triple {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,112 INFO L290 TraceCheckUtils]: 9: Hoare triple {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 22:58:58,112 INFO L290 TraceCheckUtils]: 10: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 22:58:58,113 INFO L290 TraceCheckUtils]: 11: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 22:58:58,113 INFO L290 TraceCheckUtils]: 12: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,114 INFO L290 TraceCheckUtils]: 13: Hoare triple {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:58,115 INFO L290 TraceCheckUtils]: 14: Hoare triple {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:58,116 INFO L290 TraceCheckUtils]: 15: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,116 INFO L290 TraceCheckUtils]: 16: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,116 INFO L290 TraceCheckUtils]: 17: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,116 INFO L290 TraceCheckUtils]: 18: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,117 INFO L290 TraceCheckUtils]: 19: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,117 INFO L290 TraceCheckUtils]: 20: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,117 INFO L290 TraceCheckUtils]: 21: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,118 INFO L290 TraceCheckUtils]: 22: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:58,118 INFO L272 TraceCheckUtils]: 23: Hoare triple {10817#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {10817#false} is VALID [2022-04-07 22:58:58,118 INFO L290 TraceCheckUtils]: 24: Hoare triple {10817#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10817#false} is VALID [2022-04-07 22:58:58,118 INFO L290 TraceCheckUtils]: 25: Hoare triple {10817#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:58,118 INFO L290 TraceCheckUtils]: 26: Hoare triple {10817#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:58,118 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:58:58,118 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:58,229 INFO L290 TraceCheckUtils]: 26: Hoare triple {10817#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:58,229 INFO L290 TraceCheckUtils]: 25: Hoare triple {10817#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:58,229 INFO L290 TraceCheckUtils]: 24: Hoare triple {10817#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10817#false} is VALID [2022-04-07 22:58:58,229 INFO L272 TraceCheckUtils]: 23: Hoare triple {10817#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {10817#false} is VALID [2022-04-07 22:58:58,230 INFO L290 TraceCheckUtils]: 22: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-07 22:58:58,230 INFO L290 TraceCheckUtils]: 21: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,230 INFO L290 TraceCheckUtils]: 20: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,231 INFO L290 TraceCheckUtils]: 19: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,231 INFO L290 TraceCheckUtils]: 18: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,231 INFO L290 TraceCheckUtils]: 17: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,231 INFO L290 TraceCheckUtils]: 16: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,233 INFO L290 TraceCheckUtils]: 15: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,233 INFO L290 TraceCheckUtils]: 14: Hoare triple {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:58,234 INFO L290 TraceCheckUtils]: 13: Hoare triple {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:58,235 INFO L290 TraceCheckUtils]: 12: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,235 INFO L290 TraceCheckUtils]: 11: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 22:58:58,236 INFO L290 TraceCheckUtils]: 10: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 22:58:58,236 INFO L290 TraceCheckUtils]: 9: Hoare triple {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 22:58:58,237 INFO L290 TraceCheckUtils]: 8: Hoare triple {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:58,238 INFO L290 TraceCheckUtils]: 7: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:58,239 INFO L290 TraceCheckUtils]: 6: Hoare triple {10816#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:58,239 INFO L290 TraceCheckUtils]: 5: Hoare triple {10816#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10816#true} is VALID [2022-04-07 22:58:58,239 INFO L272 TraceCheckUtils]: 4: Hoare triple {10816#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:58,239 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10816#true} {10816#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:58,239 INFO L290 TraceCheckUtils]: 2: Hoare triple {10816#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:58,239 INFO L290 TraceCheckUtils]: 1: Hoare triple {10816#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10816#true} is VALID [2022-04-07 22:58:58,239 INFO L272 TraceCheckUtils]: 0: Hoare triple {10816#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-07 22:58:58,239 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:58:58,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1395459364] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:58,239 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:58,239 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7] total 15 [2022-04-07 22:58:58,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1887330737] [2022-04-07 22:58:58,240 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:58,240 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:58:58,240 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:58,240 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:58,273 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:58,274 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-07 22:58:58,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:58,274 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-07 22:58:58,274 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2022-04-07 22:58:58,274 INFO L87 Difference]: Start difference. First operand 108 states and 142 transitions. Second operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:59,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:59,272 INFO L93 Difference]: Finished difference Result 140 states and 188 transitions. [2022-04-07 22:58:59,272 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 22:58:59,272 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:58:59,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:59,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:59,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 63 transitions. [2022-04-07 22:58:59,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:59,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 63 transitions. [2022-04-07 22:58:59,273 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 63 transitions. [2022-04-07 22:58:59,339 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:59,340 INFO L225 Difference]: With dead ends: 140 [2022-04-07 22:58:59,341 INFO L226 Difference]: Without dead ends: 135 [2022-04-07 22:58:59,341 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 50 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=121, Invalid=385, Unknown=0, NotChecked=0, Total=506 [2022-04-07 22:58:59,341 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 37 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 261 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 261 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:59,341 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 75 Invalid, 286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 261 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 22:58:59,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2022-04-07 22:58:59,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 127. [2022-04-07 22:58:59,664 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:59,664 INFO L82 GeneralOperation]: Start isEquivalent. First operand 135 states. Second operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:59,664 INFO L74 IsIncluded]: Start isIncluded. First operand 135 states. Second operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:59,665 INFO L87 Difference]: Start difference. First operand 135 states. Second operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:59,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:59,666 INFO L93 Difference]: Finished difference Result 135 states and 180 transitions. [2022-04-07 22:58:59,666 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 180 transitions. [2022-04-07 22:58:59,666 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:59,666 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:59,666 INFO L74 IsIncluded]: Start isIncluded. First operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 135 states. [2022-04-07 22:58:59,667 INFO L87 Difference]: Start difference. First operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 135 states. [2022-04-07 22:58:59,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:59,670 INFO L93 Difference]: Finished difference Result 135 states and 180 transitions. [2022-04-07 22:58:59,670 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 180 transitions. [2022-04-07 22:58:59,671 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:59,671 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:59,671 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:59,671 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:59,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:59,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 168 transitions. [2022-04-07 22:58:59,672 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 168 transitions. Word has length 27 [2022-04-07 22:58:59,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:59,672 INFO L478 AbstractCegarLoop]: Abstraction has 127 states and 168 transitions. [2022-04-07 22:58:59,672 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:59,673 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 168 transitions. [2022-04-07 22:58:59,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 22:58:59,673 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:59,673 INFO L499 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:59,691 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:59,878 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:59,878 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:59,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:59,879 INFO L85 PathProgramCache]: Analyzing trace with hash -1199429051, now seen corresponding path program 8 times [2022-04-07 22:58:59,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:59,879 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339089298] [2022-04-07 22:58:59,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:59,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:59,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:00,010 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:00,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:00,013 INFO L290 TraceCheckUtils]: 0: Hoare triple {11679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11664#true} is VALID [2022-04-07 22:59:00,013 INFO L290 TraceCheckUtils]: 1: Hoare triple {11664#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,013 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11664#true} {11664#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,014 INFO L272 TraceCheckUtils]: 0: Hoare triple {11664#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:00,014 INFO L290 TraceCheckUtils]: 1: Hoare triple {11679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11664#true} is VALID [2022-04-07 22:59:00,014 INFO L290 TraceCheckUtils]: 2: Hoare triple {11664#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,014 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11664#true} {11664#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,014 INFO L272 TraceCheckUtils]: 4: Hoare triple {11664#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,014 INFO L290 TraceCheckUtils]: 5: Hoare triple {11664#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11669#(= main_~y~0 0)} is VALID [2022-04-07 22:59:00,015 INFO L290 TraceCheckUtils]: 6: Hoare triple {11669#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11670#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:00,015 INFO L290 TraceCheckUtils]: 7: Hoare triple {11670#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11671#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:00,016 INFO L290 TraceCheckUtils]: 8: Hoare triple {11671#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11672#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:00,017 INFO L290 TraceCheckUtils]: 9: Hoare triple {11672#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:00,017 INFO L290 TraceCheckUtils]: 10: Hoare triple {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:00,017 INFO L290 TraceCheckUtils]: 11: Hoare triple {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11674#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:59:00,018 INFO L290 TraceCheckUtils]: 12: Hoare triple {11674#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11675#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 22:59:00,019 INFO L290 TraceCheckUtils]: 13: Hoare triple {11675#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11676#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:00,019 INFO L290 TraceCheckUtils]: 14: Hoare triple {11676#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11677#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:00,020 INFO L290 TraceCheckUtils]: 15: Hoare triple {11677#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11678#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 22:59:00,020 INFO L290 TraceCheckUtils]: 16: Hoare triple {11678#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11665#false} is VALID [2022-04-07 22:59:00,020 INFO L290 TraceCheckUtils]: 17: Hoare triple {11665#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,020 INFO L290 TraceCheckUtils]: 18: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L290 TraceCheckUtils]: 19: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L290 TraceCheckUtils]: 20: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L290 TraceCheckUtils]: 21: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L290 TraceCheckUtils]: 22: Hoare triple {11665#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L290 TraceCheckUtils]: 23: Hoare triple {11665#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L272 TraceCheckUtils]: 24: Hoare triple {11665#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L290 TraceCheckUtils]: 25: Hoare triple {11665#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L290 TraceCheckUtils]: 26: Hoare triple {11665#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L290 TraceCheckUtils]: 27: Hoare triple {11665#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,021 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:59:00,021 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:00,021 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339089298] [2022-04-07 22:59:00,021 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1339089298] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:00,021 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1509766932] [2022-04-07 22:59:00,021 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:59:00,022 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:00,022 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:00,022 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:00,023 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-07 22:59:00,057 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:59:00,058 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:00,058 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 30 conjunts are in the unsatisfiable core [2022-04-07 22:59:00,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:00,065 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:00,247 INFO L272 TraceCheckUtils]: 0: Hoare triple {11664#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,247 INFO L290 TraceCheckUtils]: 1: Hoare triple {11664#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11664#true} is VALID [2022-04-07 22:59:00,247 INFO L290 TraceCheckUtils]: 2: Hoare triple {11664#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,247 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11664#true} {11664#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,247 INFO L272 TraceCheckUtils]: 4: Hoare triple {11664#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,248 INFO L290 TraceCheckUtils]: 5: Hoare triple {11664#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11669#(= main_~y~0 0)} is VALID [2022-04-07 22:59:00,248 INFO L290 TraceCheckUtils]: 6: Hoare triple {11669#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11670#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:00,249 INFO L290 TraceCheckUtils]: 7: Hoare triple {11670#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11671#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:00,249 INFO L290 TraceCheckUtils]: 8: Hoare triple {11671#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11672#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:00,250 INFO L290 TraceCheckUtils]: 9: Hoare triple {11672#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:00,250 INFO L290 TraceCheckUtils]: 10: Hoare triple {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:00,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11716#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:00,251 INFO L290 TraceCheckUtils]: 12: Hoare triple {11716#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11720#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:59:00,251 INFO L290 TraceCheckUtils]: 13: Hoare triple {11720#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11724#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:00,252 INFO L290 TraceCheckUtils]: 14: Hoare triple {11724#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11728#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} is VALID [2022-04-07 22:59:00,253 INFO L290 TraceCheckUtils]: 15: Hoare triple {11728#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11732#(and (<= main_~y~0 4) (= main_~y~0 (+ main_~z~0 4)) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:00,253 INFO L290 TraceCheckUtils]: 16: Hoare triple {11732#(and (<= main_~y~0 4) (= main_~y~0 (+ main_~z~0 4)) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11665#false} is VALID [2022-04-07 22:59:00,253 INFO L290 TraceCheckUtils]: 17: Hoare triple {11665#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,253 INFO L290 TraceCheckUtils]: 18: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-07 22:59:00,253 INFO L290 TraceCheckUtils]: 19: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-07 22:59:00,253 INFO L290 TraceCheckUtils]: 20: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-07 22:59:00,254 INFO L290 TraceCheckUtils]: 21: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-07 22:59:00,254 INFO L290 TraceCheckUtils]: 22: Hoare triple {11665#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,254 INFO L290 TraceCheckUtils]: 23: Hoare triple {11665#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,254 INFO L272 TraceCheckUtils]: 24: Hoare triple {11665#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {11665#false} is VALID [2022-04-07 22:59:00,254 INFO L290 TraceCheckUtils]: 25: Hoare triple {11665#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11665#false} is VALID [2022-04-07 22:59:00,254 INFO L290 TraceCheckUtils]: 26: Hoare triple {11665#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,254 INFO L290 TraceCheckUtils]: 27: Hoare triple {11665#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,254 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:59:00,254 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:00,558 INFO L290 TraceCheckUtils]: 27: Hoare triple {11665#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,558 INFO L290 TraceCheckUtils]: 26: Hoare triple {11665#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,558 INFO L290 TraceCheckUtils]: 25: Hoare triple {11665#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11665#false} is VALID [2022-04-07 22:59:00,558 INFO L272 TraceCheckUtils]: 24: Hoare triple {11665#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {11665#false} is VALID [2022-04-07 22:59:00,558 INFO L290 TraceCheckUtils]: 23: Hoare triple {11665#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,559 INFO L290 TraceCheckUtils]: 22: Hoare triple {11784#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-07 22:59:00,561 INFO L290 TraceCheckUtils]: 21: Hoare triple {11788#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11784#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:59:00,562 INFO L290 TraceCheckUtils]: 20: Hoare triple {11792#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11788#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:59:00,563 INFO L290 TraceCheckUtils]: 19: Hoare triple {11796#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11792#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 22:59:00,563 INFO L290 TraceCheckUtils]: 18: Hoare triple {11800#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11796#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 22:59:00,564 INFO L290 TraceCheckUtils]: 17: Hoare triple {11800#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11800#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-07 22:59:00,564 INFO L290 TraceCheckUtils]: 16: Hoare triple {11807#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11800#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-07 22:59:00,565 INFO L290 TraceCheckUtils]: 15: Hoare triple {11811#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11807#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 22:59:00,566 INFO L290 TraceCheckUtils]: 14: Hoare triple {11815#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11811#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 22:59:00,566 INFO L290 TraceCheckUtils]: 13: Hoare triple {11819#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11815#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 22:59:00,567 INFO L290 TraceCheckUtils]: 12: Hoare triple {11823#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11819#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 11: Hoare triple {11664#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11823#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 10: Hoare triple {11664#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 9: Hoare triple {11664#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 8: Hoare triple {11664#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 7: Hoare triple {11664#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 6: Hoare triple {11664#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 5: Hoare triple {11664#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L272 TraceCheckUtils]: 4: Hoare triple {11664#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11664#true} {11664#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 2: Hoare triple {11664#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {11664#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11664#true} is VALID [2022-04-07 22:59:00,568 INFO L272 TraceCheckUtils]: 0: Hoare triple {11664#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-07 22:59:00,569 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 22:59:00,569 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1509766932] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:00,569 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:00,569 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 28 [2022-04-07 22:59:00,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [885247774] [2022-04-07 22:59:00,569 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:00,569 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 22:59:00,569 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:00,570 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:00,600 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:00,601 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-07 22:59:00,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:00,601 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-07 22:59:00,601 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=618, Unknown=0, NotChecked=0, Total=756 [2022-04-07 22:59:00,602 INFO L87 Difference]: Start difference. First operand 127 states and 168 transitions. Second operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:04,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:04,238 INFO L93 Difference]: Finished difference Result 247 states and 315 transitions. [2022-04-07 22:59:04,238 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-04-07 22:59:04,238 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 22:59:04,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:04,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:04,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 143 transitions. [2022-04-07 22:59:04,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:04,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 143 transitions. [2022-04-07 22:59:04,241 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 143 transitions. [2022-04-07 22:59:04,471 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 143 edges. 143 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:04,474 INFO L225 Difference]: With dead ends: 247 [2022-04-07 22:59:04,474 INFO L226 Difference]: Without dead ends: 219 [2022-04-07 22:59:04,475 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1303 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=924, Invalid=4046, Unknown=0, NotChecked=0, Total=4970 [2022-04-07 22:59:04,475 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 168 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 449 mSolverCounterSat, 188 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 168 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 637 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 188 IncrementalHoareTripleChecker+Valid, 449 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:04,476 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [168 Valid, 81 Invalid, 637 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [188 Valid, 449 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-07 22:59:04,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2022-04-07 22:59:04,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 144. [2022-04-07 22:59:04,880 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:04,880 INFO L82 GeneralOperation]: Start isEquivalent. First operand 219 states. Second operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:04,880 INFO L74 IsIncluded]: Start isIncluded. First operand 219 states. Second operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:04,881 INFO L87 Difference]: Start difference. First operand 219 states. Second operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:04,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:04,883 INFO L93 Difference]: Finished difference Result 219 states and 277 transitions. [2022-04-07 22:59:04,883 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 277 transitions. [2022-04-07 22:59:04,884 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:04,884 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:04,884 INFO L74 IsIncluded]: Start isIncluded. First operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 219 states. [2022-04-07 22:59:04,884 INFO L87 Difference]: Start difference. First operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 219 states. [2022-04-07 22:59:04,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:04,886 INFO L93 Difference]: Finished difference Result 219 states and 277 transitions. [2022-04-07 22:59:04,887 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 277 transitions. [2022-04-07 22:59:04,887 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:04,887 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:04,887 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:04,887 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:04,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:04,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 186 transitions. [2022-04-07 22:59:04,889 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 186 transitions. Word has length 28 [2022-04-07 22:59:04,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:04,889 INFO L478 AbstractCegarLoop]: Abstraction has 144 states and 186 transitions. [2022-04-07 22:59:04,889 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:04,889 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2022-04-07 22:59:04,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 22:59:04,889 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:04,889 INFO L499 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:04,907 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:05,103 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:05,104 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:05,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:05,104 INFO L85 PathProgramCache]: Analyzing trace with hash -1934125691, now seen corresponding path program 3 times [2022-04-07 22:59:05,104 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:05,104 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561273075] [2022-04-07 22:59:05,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:05,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:05,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:05,370 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:05,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:05,373 INFO L290 TraceCheckUtils]: 0: Hoare triple {12949#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12929#true} is VALID [2022-04-07 22:59:05,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {12929#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,373 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12929#true} {12929#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,374 INFO L272 TraceCheckUtils]: 0: Hoare triple {12929#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12949#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:05,374 INFO L290 TraceCheckUtils]: 1: Hoare triple {12949#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12929#true} is VALID [2022-04-07 22:59:05,374 INFO L290 TraceCheckUtils]: 2: Hoare triple {12929#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,374 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12929#true} {12929#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,374 INFO L272 TraceCheckUtils]: 4: Hoare triple {12929#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,375 INFO L290 TraceCheckUtils]: 5: Hoare triple {12929#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12934#(= main_~y~0 0)} is VALID [2022-04-07 22:59:05,375 INFO L290 TraceCheckUtils]: 6: Hoare triple {12934#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12935#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:05,376 INFO L290 TraceCheckUtils]: 7: Hoare triple {12935#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12936#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:05,377 INFO L290 TraceCheckUtils]: 8: Hoare triple {12936#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12937#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:05,377 INFO L290 TraceCheckUtils]: 9: Hoare triple {12937#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12938#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:05,378 INFO L290 TraceCheckUtils]: 10: Hoare triple {12938#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12939#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:59:05,378 INFO L290 TraceCheckUtils]: 11: Hoare triple {12939#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12940#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:59:05,379 INFO L290 TraceCheckUtils]: 12: Hoare triple {12940#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12941#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:59:05,379 INFO L290 TraceCheckUtils]: 13: Hoare triple {12941#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12942#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 22:59:05,380 INFO L290 TraceCheckUtils]: 14: Hoare triple {12942#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12943#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 22:59:05,380 INFO L290 TraceCheckUtils]: 15: Hoare triple {12943#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12944#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 22:59:05,381 INFO L290 TraceCheckUtils]: 16: Hoare triple {12944#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12945#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:59:05,381 INFO L290 TraceCheckUtils]: 17: Hoare triple {12945#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12946#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 22:59:05,382 INFO L290 TraceCheckUtils]: 18: Hoare triple {12946#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:59:05,382 INFO L290 TraceCheckUtils]: 19: Hoare triple {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:59:05,383 INFO L290 TraceCheckUtils]: 20: Hoare triple {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12948#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:59:05,383 INFO L290 TraceCheckUtils]: 21: Hoare triple {12948#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,383 INFO L290 TraceCheckUtils]: 22: Hoare triple {12930#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,383 INFO L290 TraceCheckUtils]: 23: Hoare triple {12930#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,383 INFO L272 TraceCheckUtils]: 24: Hoare triple {12930#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {12930#false} is VALID [2022-04-07 22:59:05,383 INFO L290 TraceCheckUtils]: 25: Hoare triple {12930#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12930#false} is VALID [2022-04-07 22:59:05,383 INFO L290 TraceCheckUtils]: 26: Hoare triple {12930#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,383 INFO L290 TraceCheckUtils]: 27: Hoare triple {12930#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,384 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:05,384 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:05,384 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561273075] [2022-04-07 22:59:05,384 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1561273075] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:05,384 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2099536417] [2022-04-07 22:59:05,384 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:59:05,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:05,384 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:05,385 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:05,385 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-07 22:59:05,548 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-04-07 22:59:05,548 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:05,549 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-07 22:59:05,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:05,558 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:05,805 INFO L272 TraceCheckUtils]: 0: Hoare triple {12929#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,805 INFO L290 TraceCheckUtils]: 1: Hoare triple {12929#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12929#true} is VALID [2022-04-07 22:59:05,805 INFO L290 TraceCheckUtils]: 2: Hoare triple {12929#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,805 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12929#true} {12929#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,806 INFO L272 TraceCheckUtils]: 4: Hoare triple {12929#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:05,806 INFO L290 TraceCheckUtils]: 5: Hoare triple {12929#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12934#(= main_~y~0 0)} is VALID [2022-04-07 22:59:05,806 INFO L290 TraceCheckUtils]: 6: Hoare triple {12934#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12935#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:05,807 INFO L290 TraceCheckUtils]: 7: Hoare triple {12935#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12936#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:05,807 INFO L290 TraceCheckUtils]: 8: Hoare triple {12936#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12937#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:05,808 INFO L290 TraceCheckUtils]: 9: Hoare triple {12937#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12938#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:05,809 INFO L290 TraceCheckUtils]: 10: Hoare triple {12938#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12939#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:59:05,809 INFO L290 TraceCheckUtils]: 11: Hoare triple {12939#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12940#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:59:05,810 INFO L290 TraceCheckUtils]: 12: Hoare triple {12940#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12941#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:59:05,810 INFO L290 TraceCheckUtils]: 13: Hoare triple {12941#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12942#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 22:59:05,811 INFO L290 TraceCheckUtils]: 14: Hoare triple {12942#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12943#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 22:59:05,811 INFO L290 TraceCheckUtils]: 15: Hoare triple {12943#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12944#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 22:59:05,812 INFO L290 TraceCheckUtils]: 16: Hoare triple {12944#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12945#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:59:05,812 INFO L290 TraceCheckUtils]: 17: Hoare triple {12945#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12946#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 22:59:05,813 INFO L290 TraceCheckUtils]: 18: Hoare triple {12946#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:59:05,813 INFO L290 TraceCheckUtils]: 19: Hoare triple {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 22:59:05,814 INFO L290 TraceCheckUtils]: 20: Hoare triple {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13013#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 22:59:05,814 INFO L290 TraceCheckUtils]: 21: Hoare triple {13013#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,814 INFO L290 TraceCheckUtils]: 22: Hoare triple {12930#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,814 INFO L290 TraceCheckUtils]: 23: Hoare triple {12930#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,814 INFO L272 TraceCheckUtils]: 24: Hoare triple {12930#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {12930#false} is VALID [2022-04-07 22:59:05,814 INFO L290 TraceCheckUtils]: 25: Hoare triple {12930#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12930#false} is VALID [2022-04-07 22:59:05,815 INFO L290 TraceCheckUtils]: 26: Hoare triple {12930#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,815 INFO L290 TraceCheckUtils]: 27: Hoare triple {12930#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:05,815 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:05,815 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:06,241 INFO L290 TraceCheckUtils]: 27: Hoare triple {12930#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:06,241 INFO L290 TraceCheckUtils]: 26: Hoare triple {12930#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:06,241 INFO L290 TraceCheckUtils]: 25: Hoare triple {12930#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12930#false} is VALID [2022-04-07 22:59:06,241 INFO L272 TraceCheckUtils]: 24: Hoare triple {12930#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {12930#false} is VALID [2022-04-07 22:59:06,241 INFO L290 TraceCheckUtils]: 23: Hoare triple {12930#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:06,241 INFO L290 TraceCheckUtils]: 22: Hoare triple {12930#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:06,241 INFO L290 TraceCheckUtils]: 21: Hoare triple {13053#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-07 22:59:06,242 INFO L290 TraceCheckUtils]: 20: Hoare triple {13057#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13053#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:59:06,242 INFO L290 TraceCheckUtils]: 19: Hoare triple {13057#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13057#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:59:06,243 INFO L290 TraceCheckUtils]: 18: Hoare triple {13064#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13057#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:59:06,243 INFO L290 TraceCheckUtils]: 17: Hoare triple {13068#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13064#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:59:06,244 INFO L290 TraceCheckUtils]: 16: Hoare triple {13072#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13068#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:59:06,245 INFO L290 TraceCheckUtils]: 15: Hoare triple {13076#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13072#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:59:06,245 INFO L290 TraceCheckUtils]: 14: Hoare triple {13080#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13076#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:59:06,246 INFO L290 TraceCheckUtils]: 13: Hoare triple {13084#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13080#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 22:59:06,247 INFO L290 TraceCheckUtils]: 12: Hoare triple {13088#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13084#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 22:59:06,247 INFO L290 TraceCheckUtils]: 11: Hoare triple {13092#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13088#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 22:59:06,248 INFO L290 TraceCheckUtils]: 10: Hoare triple {13096#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13092#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 22:59:06,249 INFO L290 TraceCheckUtils]: 9: Hoare triple {13100#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13096#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 22:59:06,250 INFO L290 TraceCheckUtils]: 8: Hoare triple {13104#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13100#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 22:59:06,250 INFO L290 TraceCheckUtils]: 7: Hoare triple {13108#(< 0 (mod (+ main_~y~0 12) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13104#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 22:59:06,251 INFO L290 TraceCheckUtils]: 6: Hoare triple {13112#(< 0 (mod (+ main_~y~0 13) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13108#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-07 22:59:06,251 INFO L290 TraceCheckUtils]: 5: Hoare triple {12929#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13112#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-07 22:59:06,251 INFO L272 TraceCheckUtils]: 4: Hoare triple {12929#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:06,251 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12929#true} {12929#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:06,251 INFO L290 TraceCheckUtils]: 2: Hoare triple {12929#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:06,251 INFO L290 TraceCheckUtils]: 1: Hoare triple {12929#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12929#true} is VALID [2022-04-07 22:59:06,252 INFO L272 TraceCheckUtils]: 0: Hoare triple {12929#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-07 22:59:06,252 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:06,252 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2099536417] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:06,252 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:06,252 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 34 [2022-04-07 22:59:06,252 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354450326] [2022-04-07 22:59:06,252 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:06,252 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 22:59:06,253 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:06,253 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:06,286 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:06,286 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-07 22:59:06,286 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:06,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-07 22:59:06,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=859, Unknown=0, NotChecked=0, Total=1122 [2022-04-07 22:59:06,287 INFO L87 Difference]: Start difference. First operand 144 states and 186 transitions. Second operand has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:28,745 WARN L232 SmtUtils]: Spent 7.59s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:00:20,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:20,947 INFO L93 Difference]: Finished difference Result 766 states and 1080 transitions. [2022-04-07 23:00:20,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-04-07 23:00:20,948 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 23:00:20,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:20,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:20,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 359 transitions. [2022-04-07 23:00:20,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:20,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 359 transitions. [2022-04-07 23:00:20,954 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 69 states and 359 transitions. [2022-04-07 23:00:23,039 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 359 edges. 359 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:23,058 INFO L225 Difference]: With dead ends: 766 [2022-04-07 23:00:23,058 INFO L226 Difference]: Without dead ends: 725 [2022-04-07 23:00:23,060 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 98 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2678 ImplicationChecksByTransitivity, 63.8s TimeCoverageRelationStatistics Valid=2537, Invalid=7363, Unknown=0, NotChecked=0, Total=9900 [2022-04-07 23:00:23,060 INFO L913 BasicCegarLoop]: 57 mSDtfsCounter, 988 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 1900 mSolverCounterSat, 833 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 988 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 2733 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 833 IncrementalHoareTripleChecker+Valid, 1900 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:23,060 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [988 Valid, 144 Invalid, 2733 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [833 Valid, 1900 Invalid, 0 Unknown, 0 Unchecked, 4.6s Time] [2022-04-07 23:00:23,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 725 states. [2022-04-07 23:00:23,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 725 to 206. [2022-04-07 23:00:23,887 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:23,887 INFO L82 GeneralOperation]: Start isEquivalent. First operand 725 states. Second operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:23,888 INFO L74 IsIncluded]: Start isIncluded. First operand 725 states. Second operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:23,888 INFO L87 Difference]: Start difference. First operand 725 states. Second operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:23,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:23,905 INFO L93 Difference]: Finished difference Result 725 states and 934 transitions. [2022-04-07 23:00:23,905 INFO L276 IsEmpty]: Start isEmpty. Operand 725 states and 934 transitions. [2022-04-07 23:00:23,906 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:23,906 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:23,907 INFO L74 IsIncluded]: Start isIncluded. First operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 725 states. [2022-04-07 23:00:23,907 INFO L87 Difference]: Start difference. First operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 725 states. [2022-04-07 23:00:23,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:23,925 INFO L93 Difference]: Finished difference Result 725 states and 934 transitions. [2022-04-07 23:00:23,926 INFO L276 IsEmpty]: Start isEmpty. Operand 725 states and 934 transitions. [2022-04-07 23:00:23,927 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:23,927 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:23,927 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:23,927 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:23,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:23,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 278 transitions. [2022-04-07 23:00:23,931 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 278 transitions. Word has length 28 [2022-04-07 23:00:23,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:23,931 INFO L478 AbstractCegarLoop]: Abstraction has 206 states and 278 transitions. [2022-04-07 23:00:23,931 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:23,931 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 278 transitions. [2022-04-07 23:00:23,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 23:00:23,932 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:23,932 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:23,937 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:24,136 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:24,137 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:24,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:24,137 INFO L85 PathProgramCache]: Analyzing trace with hash 1682363274, now seen corresponding path program 9 times [2022-04-07 23:00:24,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:24,137 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552833998] [2022-04-07 23:00:24,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:24,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:24,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:24,329 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:24,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:24,333 INFO L290 TraceCheckUtils]: 0: Hoare triple {16023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16008#true} is VALID [2022-04-07 23:00:24,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {16008#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:24,333 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16008#true} {16008#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:24,333 INFO L272 TraceCheckUtils]: 0: Hoare triple {16008#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:24,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {16023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16008#true} is VALID [2022-04-07 23:00:24,334 INFO L290 TraceCheckUtils]: 2: Hoare triple {16008#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:24,334 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16008#true} {16008#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:24,334 INFO L272 TraceCheckUtils]: 4: Hoare triple {16008#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:24,334 INFO L290 TraceCheckUtils]: 5: Hoare triple {16008#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16008#true} is VALID [2022-04-07 23:00:24,335 INFO L290 TraceCheckUtils]: 6: Hoare triple {16008#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16013#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:24,336 INFO L290 TraceCheckUtils]: 7: Hoare triple {16013#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16014#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 23:00:24,336 INFO L290 TraceCheckUtils]: 8: Hoare triple {16014#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16015#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:24,337 INFO L290 TraceCheckUtils]: 9: Hoare triple {16015#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16016#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:24,339 INFO L290 TraceCheckUtils]: 10: Hoare triple {16016#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:24,339 INFO L290 TraceCheckUtils]: 11: Hoare triple {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:24,339 INFO L290 TraceCheckUtils]: 12: Hoare triple {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:24,340 INFO L290 TraceCheckUtils]: 13: Hoare triple {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16018#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 23:00:24,341 INFO L290 TraceCheckUtils]: 14: Hoare triple {16018#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16019#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 2) main_~x~0)} is VALID [2022-04-07 23:00:24,342 INFO L290 TraceCheckUtils]: 15: Hoare triple {16019#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 2) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16020#(<= (+ 3 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:00:24,343 INFO L290 TraceCheckUtils]: 16: Hoare triple {16020#(<= (+ 3 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16021#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:00:24,344 INFO L290 TraceCheckUtils]: 17: Hoare triple {16021#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:24,344 INFO L290 TraceCheckUtils]: 18: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:24,344 INFO L290 TraceCheckUtils]: 19: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:24,345 INFO L290 TraceCheckUtils]: 20: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:24,345 INFO L290 TraceCheckUtils]: 21: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:24,345 INFO L290 TraceCheckUtils]: 22: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:24,346 INFO L290 TraceCheckUtils]: 23: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:24,346 INFO L290 TraceCheckUtils]: 24: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:24,347 INFO L290 TraceCheckUtils]: 25: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-07 23:00:24,347 INFO L272 TraceCheckUtils]: 26: Hoare triple {16009#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {16009#false} is VALID [2022-04-07 23:00:24,347 INFO L290 TraceCheckUtils]: 27: Hoare triple {16009#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16009#false} is VALID [2022-04-07 23:00:24,347 INFO L290 TraceCheckUtils]: 28: Hoare triple {16009#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-07 23:00:24,347 INFO L290 TraceCheckUtils]: 29: Hoare triple {16009#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-07 23:00:24,347 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 15 proven. 15 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:24,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:24,347 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552833998] [2022-04-07 23:00:24,347 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [552833998] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:24,347 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1164586702] [2022-04-07 23:00:24,348 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:00:24,348 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:24,348 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:24,348 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:24,352 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-07 23:00:24,416 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-07 23:00:24,416 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:24,417 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-07 23:00:24,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:24,427 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:25,068 INFO L272 TraceCheckUtils]: 0: Hoare triple {16008#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:25,068 INFO L290 TraceCheckUtils]: 1: Hoare triple {16008#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16008#true} is VALID [2022-04-07 23:00:25,068 INFO L290 TraceCheckUtils]: 2: Hoare triple {16008#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:25,069 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16008#true} {16008#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:25,069 INFO L272 TraceCheckUtils]: 4: Hoare triple {16008#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:25,069 INFO L290 TraceCheckUtils]: 5: Hoare triple {16008#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 23:00:25,069 INFO L290 TraceCheckUtils]: 6: Hoare triple {16042#(= main_~n~0 main_~x~0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16046#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-07 23:00:25,070 INFO L290 TraceCheckUtils]: 7: Hoare triple {16046#(= (+ main_~x~0 1) main_~n~0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16050#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-07 23:00:25,070 INFO L290 TraceCheckUtils]: 8: Hoare triple {16050#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16054#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-07 23:00:25,071 INFO L290 TraceCheckUtils]: 9: Hoare triple {16054#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16058#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-07 23:00:25,072 INFO L290 TraceCheckUtils]: 10: Hoare triple {16058#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-07 23:00:25,072 INFO L290 TraceCheckUtils]: 11: Hoare triple {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-07 23:00:25,072 INFO L290 TraceCheckUtils]: 12: Hoare triple {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-07 23:00:25,073 INFO L290 TraceCheckUtils]: 13: Hoare triple {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16058#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-07 23:00:25,073 INFO L290 TraceCheckUtils]: 14: Hoare triple {16058#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16054#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-07 23:00:25,074 INFO L290 TraceCheckUtils]: 15: Hoare triple {16054#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16050#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-07 23:00:25,074 INFO L290 TraceCheckUtils]: 16: Hoare triple {16050#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16046#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-07 23:00:25,075 INFO L290 TraceCheckUtils]: 17: Hoare triple {16046#(= (+ main_~x~0 1) main_~n~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 23:00:25,075 INFO L290 TraceCheckUtils]: 18: Hoare triple {16042#(= main_~n~0 main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 23:00:25,075 INFO L290 TraceCheckUtils]: 19: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 23:00:25,076 INFO L290 TraceCheckUtils]: 20: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 23:00:25,076 INFO L290 TraceCheckUtils]: 21: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 23:00:25,076 INFO L290 TraceCheckUtils]: 22: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 23:00:25,077 INFO L290 TraceCheckUtils]: 23: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-07 23:00:25,077 INFO L290 TraceCheckUtils]: 24: Hoare triple {16042#(= main_~n~0 main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16105#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))))} is VALID [2022-04-07 23:00:25,077 INFO L290 TraceCheckUtils]: 25: Hoare triple {16105#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16109#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-07 23:00:25,078 INFO L272 TraceCheckUtils]: 26: Hoare triple {16109#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {16113#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:00:25,078 INFO L290 TraceCheckUtils]: 27: Hoare triple {16113#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16117#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:00:25,078 INFO L290 TraceCheckUtils]: 28: Hoare triple {16117#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-07 23:00:25,079 INFO L290 TraceCheckUtils]: 29: Hoare triple {16009#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-07 23:00:25,079 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:25,079 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:25,709 INFO L290 TraceCheckUtils]: 29: Hoare triple {16009#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-07 23:00:25,710 INFO L290 TraceCheckUtils]: 28: Hoare triple {16117#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-07 23:00:25,710 INFO L290 TraceCheckUtils]: 27: Hoare triple {16113#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16117#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:00:25,711 INFO L272 TraceCheckUtils]: 26: Hoare triple {16133#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {16113#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:00:25,711 INFO L290 TraceCheckUtils]: 25: Hoare triple {16137#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16133#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:00:25,712 INFO L290 TraceCheckUtils]: 24: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16137#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:25,712 INFO L290 TraceCheckUtils]: 23: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:25,712 INFO L290 TraceCheckUtils]: 22: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:25,712 INFO L290 TraceCheckUtils]: 21: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:25,713 INFO L290 TraceCheckUtils]: 20: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:25,713 INFO L290 TraceCheckUtils]: 19: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:25,713 INFO L290 TraceCheckUtils]: 18: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:25,714 INFO L290 TraceCheckUtils]: 17: Hoare triple {16163#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:25,715 INFO L290 TraceCheckUtils]: 16: Hoare triple {16167#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16163#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,716 INFO L290 TraceCheckUtils]: 15: Hoare triple {16171#(or (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16167#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-07 23:00:25,717 INFO L290 TraceCheckUtils]: 14: Hoare triple {16175#(or (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16171#(or (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,718 INFO L290 TraceCheckUtils]: 13: Hoare triple {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16175#(or (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,718 INFO L290 TraceCheckUtils]: 12: Hoare triple {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,719 INFO L290 TraceCheckUtils]: 11: Hoare triple {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,720 INFO L290 TraceCheckUtils]: 10: Hoare triple {16175#(or (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {16171#(or (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16175#(or (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,722 INFO L290 TraceCheckUtils]: 8: Hoare triple {16167#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16171#(or (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,723 INFO L290 TraceCheckUtils]: 7: Hoare triple {16163#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16167#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-07 23:00:25,724 INFO L290 TraceCheckUtils]: 6: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16163#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-07 23:00:25,724 INFO L290 TraceCheckUtils]: 5: Hoare triple {16008#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:25,724 INFO L272 TraceCheckUtils]: 4: Hoare triple {16008#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:25,724 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16008#true} {16008#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:25,724 INFO L290 TraceCheckUtils]: 2: Hoare triple {16008#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:25,724 INFO L290 TraceCheckUtils]: 1: Hoare triple {16008#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16008#true} is VALID [2022-04-07 23:00:25,724 INFO L272 TraceCheckUtils]: 0: Hoare triple {16008#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-07 23:00:25,724 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:25,725 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1164586702] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:25,725 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:25,725 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 31 [2022-04-07 23:00:25,725 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1617561425] [2022-04-07 23:00:25,725 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:25,725 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:00:25,729 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:25,729 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:25,781 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:25,781 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-07 23:00:25,781 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:25,781 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-07 23:00:25,782 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=798, Unknown=0, NotChecked=0, Total=930 [2022-04-07 23:00:25,782 INFO L87 Difference]: Start difference. First operand 206 states and 278 transitions. Second operand has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:29,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:29,509 INFO L93 Difference]: Finished difference Result 294 states and 395 transitions. [2022-04-07 23:00:29,509 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-07 23:00:29,510 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:00:29,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:29,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:29,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 119 transitions. [2022-04-07 23:00:29,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:29,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 119 transitions. [2022-04-07 23:00:29,512 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 119 transitions. [2022-04-07 23:00:29,641 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:29,646 INFO L225 Difference]: With dead ends: 294 [2022-04-07 23:00:29,646 INFO L226 Difference]: Without dead ends: 289 [2022-04-07 23:00:29,647 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 39 SyntacticMatches, 5 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 768 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=504, Invalid=2918, Unknown=0, NotChecked=0, Total=3422 [2022-04-07 23:00:29,648 INFO L913 BasicCegarLoop]: 34 mSDtfsCounter, 183 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 786 mSolverCounterSat, 196 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 982 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 196 IncrementalHoareTripleChecker+Valid, 786 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:29,648 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [183 Valid, 106 Invalid, 982 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [196 Valid, 786 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-04-07 23:00:29,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2022-04-07 23:00:30,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 239. [2022-04-07 23:00:30,515 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:30,516 INFO L82 GeneralOperation]: Start isEquivalent. First operand 289 states. Second operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:30,516 INFO L74 IsIncluded]: Start isIncluded. First operand 289 states. Second operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:30,516 INFO L87 Difference]: Start difference. First operand 289 states. Second operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:30,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:30,519 INFO L93 Difference]: Finished difference Result 289 states and 381 transitions. [2022-04-07 23:00:30,520 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 381 transitions. [2022-04-07 23:00:30,520 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:30,520 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:30,520 INFO L74 IsIncluded]: Start isIncluded. First operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 289 states. [2022-04-07 23:00:30,520 INFO L87 Difference]: Start difference. First operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 289 states. [2022-04-07 23:00:30,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:30,524 INFO L93 Difference]: Finished difference Result 289 states and 381 transitions. [2022-04-07 23:00:30,524 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 381 transitions. [2022-04-07 23:00:30,524 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:30,524 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:30,524 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:30,524 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:30,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:30,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 324 transitions. [2022-04-07 23:00:30,527 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 324 transitions. Word has length 30 [2022-04-07 23:00:30,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:30,527 INFO L478 AbstractCegarLoop]: Abstraction has 239 states and 324 transitions. [2022-04-07 23:00:30,528 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:30,528 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 324 transitions. [2022-04-07 23:00:30,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 23:00:30,528 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:30,528 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:30,551 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:30,751 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:30,751 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:30,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:30,752 INFO L85 PathProgramCache]: Analyzing trace with hash 727683038, now seen corresponding path program 8 times [2022-04-07 23:00:30,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:30,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2002999266] [2022-04-07 23:00:30,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:30,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:30,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:31,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:31,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:31,174 INFO L290 TraceCheckUtils]: 0: Hoare triple {17645#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17626#true} is VALID [2022-04-07 23:00:31,174 INFO L290 TraceCheckUtils]: 1: Hoare triple {17626#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:31,174 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17626#true} {17626#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:31,175 INFO L272 TraceCheckUtils]: 0: Hoare triple {17626#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17645#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:31,175 INFO L290 TraceCheckUtils]: 1: Hoare triple {17645#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17626#true} is VALID [2022-04-07 23:00:31,175 INFO L290 TraceCheckUtils]: 2: Hoare triple {17626#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:31,175 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17626#true} {17626#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:31,175 INFO L272 TraceCheckUtils]: 4: Hoare triple {17626#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:31,175 INFO L290 TraceCheckUtils]: 5: Hoare triple {17626#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17631#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:00:31,177 INFO L290 TraceCheckUtils]: 6: Hoare triple {17631#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17632#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:31,192 INFO L290 TraceCheckUtils]: 7: Hoare triple {17632#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17633#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 23:00:31,199 INFO L290 TraceCheckUtils]: 8: Hoare triple {17633#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17634#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:00:31,200 INFO L290 TraceCheckUtils]: 9: Hoare triple {17634#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17635#(and (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)))} is VALID [2022-04-07 23:00:31,201 INFO L290 TraceCheckUtils]: 10: Hoare triple {17635#(and (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {17636#(and (<= main_~y~0 4) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} is VALID [2022-04-07 23:00:31,201 INFO L290 TraceCheckUtils]: 11: Hoare triple {17636#(and (<= main_~y~0 4) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {17636#(and (<= main_~y~0 4) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} is VALID [2022-04-07 23:00:31,202 INFO L290 TraceCheckUtils]: 12: Hoare triple {17636#(and (<= main_~y~0 4) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-07 23:00:31,202 INFO L290 TraceCheckUtils]: 13: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-07 23:00:31,203 INFO L290 TraceCheckUtils]: 14: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-07 23:00:31,207 INFO L290 TraceCheckUtils]: 15: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-07 23:00:31,208 INFO L290 TraceCheckUtils]: 16: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-07 23:00:31,208 INFO L290 TraceCheckUtils]: 17: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17638#(and (<= main_~n~0 (+ main_~y~0 1 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-07 23:00:31,209 INFO L290 TraceCheckUtils]: 18: Hoare triple {17638#(and (<= main_~n~0 (+ main_~y~0 1 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 3))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17639#(and (<= main_~y~0 2) (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:00:31,210 INFO L290 TraceCheckUtils]: 19: Hoare triple {17639#(and (<= main_~y~0 2) (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17640#(and (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:31,211 INFO L290 TraceCheckUtils]: 20: Hoare triple {17640#(and (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17641#(and (<= main_~n~0 (+ main_~y~0 4 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 0))} is VALID [2022-04-07 23:00:31,211 INFO L290 TraceCheckUtils]: 21: Hoare triple {17641#(and (<= main_~n~0 (+ main_~y~0 4 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17641#(and (<= main_~n~0 (+ main_~y~0 4 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 0))} is VALID [2022-04-07 23:00:31,212 INFO L290 TraceCheckUtils]: 22: Hoare triple {17641#(and (<= main_~n~0 (+ main_~y~0 4 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17640#(and (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:31,212 INFO L290 TraceCheckUtils]: 23: Hoare triple {17640#(and (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17639#(and (<= main_~y~0 2) (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:00:31,213 INFO L290 TraceCheckUtils]: 24: Hoare triple {17639#(and (<= main_~y~0 2) (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17638#(and (<= main_~n~0 (+ main_~y~0 1 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-07 23:00:31,214 INFO L290 TraceCheckUtils]: 25: Hoare triple {17638#(and (<= main_~n~0 (+ main_~y~0 1 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 3))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17642#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:00:31,215 INFO L290 TraceCheckUtils]: 26: Hoare triple {17642#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17642#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:00:31,216 INFO L272 TraceCheckUtils]: 27: Hoare triple {17642#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {17643#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 23:00:31,216 INFO L290 TraceCheckUtils]: 28: Hoare triple {17643#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17644#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 23:00:31,216 INFO L290 TraceCheckUtils]: 29: Hoare triple {17644#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-07 23:00:31,216 INFO L290 TraceCheckUtils]: 30: Hoare triple {17627#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-07 23:00:31,217 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:00:31,217 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:31,217 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2002999266] [2022-04-07 23:00:31,217 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2002999266] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:31,217 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [914592977] [2022-04-07 23:00:31,217 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 23:00:31,217 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:31,217 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:31,218 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:31,219 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-07 23:00:31,340 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 23:00:31,340 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:31,341 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 58 conjunts are in the unsatisfiable core [2022-04-07 23:00:31,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:31,352 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:34,909 INFO L272 TraceCheckUtils]: 0: Hoare triple {17626#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:34,910 INFO L290 TraceCheckUtils]: 1: Hoare triple {17626#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17626#true} is VALID [2022-04-07 23:00:34,910 INFO L290 TraceCheckUtils]: 2: Hoare triple {17626#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:34,910 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17626#true} {17626#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:34,910 INFO L272 TraceCheckUtils]: 4: Hoare triple {17626#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:34,910 INFO L290 TraceCheckUtils]: 5: Hoare triple {17626#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17631#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:00:34,912 INFO L290 TraceCheckUtils]: 6: Hoare triple {17631#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17632#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:34,917 INFO L290 TraceCheckUtils]: 7: Hoare triple {17632#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17670#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 23:00:34,922 INFO L290 TraceCheckUtils]: 8: Hoare triple {17670#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17674#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:00:34,924 INFO L290 TraceCheckUtils]: 9: Hoare triple {17674#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17678#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-07 23:00:34,924 INFO L290 TraceCheckUtils]: 10: Hoare triple {17678#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-07 23:00:34,925 INFO L290 TraceCheckUtils]: 11: Hoare triple {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-07 23:00:34,927 INFO L290 TraceCheckUtils]: 12: Hoare triple {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17689#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~y~0 4) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967292)))} is VALID [2022-04-07 23:00:34,929 INFO L290 TraceCheckUtils]: 13: Hoare triple {17689#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~y~0 4) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967292)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17693#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-07 23:00:34,930 INFO L290 TraceCheckUtils]: 14: Hoare triple {17693#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~y~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17697#(and (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967294)))} is VALID [2022-04-07 23:00:34,932 INFO L290 TraceCheckUtils]: 15: Hoare triple {17697#(and (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967294)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17701#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 4) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 4) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 23:00:34,933 INFO L290 TraceCheckUtils]: 16: Hoare triple {17701#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 4) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 4) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {17701#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 4) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 4) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 23:00:34,935 INFO L290 TraceCheckUtils]: 17: Hoare triple {17701#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 4) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 4) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17708#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 23:00:34,936 INFO L290 TraceCheckUtils]: 18: Hoare triple {17708#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17712#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 2) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:00:34,938 INFO L290 TraceCheckUtils]: 19: Hoare triple {17712#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 2) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17716#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:34,940 INFO L290 TraceCheckUtils]: 20: Hoare triple {17716#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17720#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 23:00:34,940 INFO L290 TraceCheckUtils]: 21: Hoare triple {17720#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17720#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-07 23:00:34,945 INFO L290 TraceCheckUtils]: 22: Hoare triple {17720#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17727#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:34,950 INFO L290 TraceCheckUtils]: 23: Hoare triple {17727#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17731#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 23:00:34,952 INFO L290 TraceCheckUtils]: 24: Hoare triple {17731#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17735#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:00:34,956 INFO L290 TraceCheckUtils]: 25: Hoare triple {17735#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-07 23:00:34,959 INFO L290 TraceCheckUtils]: 26: Hoare triple {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-07 23:00:34,960 INFO L272 TraceCheckUtils]: 27: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {17745#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:00:34,961 INFO L290 TraceCheckUtils]: 28: Hoare triple {17745#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17749#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:00:34,961 INFO L290 TraceCheckUtils]: 29: Hoare triple {17749#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-07 23:00:34,961 INFO L290 TraceCheckUtils]: 30: Hoare triple {17627#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-07 23:00:34,961 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:00:34,961 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:36,835 INFO L290 TraceCheckUtils]: 30: Hoare triple {17627#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-07 23:00:36,836 INFO L290 TraceCheckUtils]: 29: Hoare triple {17749#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-07 23:00:36,836 INFO L290 TraceCheckUtils]: 28: Hoare triple {17745#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17749#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:00:36,837 INFO L272 TraceCheckUtils]: 27: Hoare triple {17765#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {17745#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:00:36,837 INFO L290 TraceCheckUtils]: 26: Hoare triple {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17765#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:00:36,839 INFO L290 TraceCheckUtils]: 25: Hoare triple {17773#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:36,840 INFO L290 TraceCheckUtils]: 24: Hoare triple {17777#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17773#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-07 23:00:36,841 INFO L290 TraceCheckUtils]: 23: Hoare triple {17781#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17777#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-07 23:00:36,843 INFO L290 TraceCheckUtils]: 22: Hoare triple {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17781#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:00:36,843 INFO L290 TraceCheckUtils]: 21: Hoare triple {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:00:36,844 INFO L290 TraceCheckUtils]: 20: Hoare triple {17792#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:00:36,845 INFO L290 TraceCheckUtils]: 19: Hoare triple {17796#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17792#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:00:36,846 INFO L290 TraceCheckUtils]: 18: Hoare triple {17800#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17796#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:00:36,847 INFO L290 TraceCheckUtils]: 17: Hoare triple {17804#(or (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17800#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:00:36,848 INFO L290 TraceCheckUtils]: 16: Hoare triple {17804#(or (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {17804#(or (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:00:36,849 INFO L290 TraceCheckUtils]: 15: Hoare triple {17811#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17804#(or (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:00:36,850 INFO L290 TraceCheckUtils]: 14: Hoare triple {17815#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17811#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:36,851 INFO L290 TraceCheckUtils]: 13: Hoare triple {17819#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17815#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:36,867 INFO L290 TraceCheckUtils]: 12: Hoare triple {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17819#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:36,867 INFO L290 TraceCheckUtils]: 11: Hoare triple {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:36,867 INFO L290 TraceCheckUtils]: 10: Hoare triple {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:36,869 INFO L290 TraceCheckUtils]: 9: Hoare triple {17773#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:36,871 INFO L290 TraceCheckUtils]: 8: Hoare triple {17777#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17773#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-07 23:00:36,872 INFO L290 TraceCheckUtils]: 7: Hoare triple {17781#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17777#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-07 23:00:36,873 INFO L290 TraceCheckUtils]: 6: Hoare triple {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17781#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:00:36,874 INFO L290 TraceCheckUtils]: 5: Hoare triple {17626#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:00:36,874 INFO L272 TraceCheckUtils]: 4: Hoare triple {17626#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:36,874 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17626#true} {17626#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:36,875 INFO L290 TraceCheckUtils]: 2: Hoare triple {17626#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:36,875 INFO L290 TraceCheckUtils]: 1: Hoare triple {17626#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17626#true} is VALID [2022-04-07 23:00:36,875 INFO L272 TraceCheckUtils]: 0: Hoare triple {17626#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-07 23:00:36,875 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:00:36,875 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [914592977] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:36,875 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:36,875 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 22, 17] total 47 [2022-04-07 23:00:36,875 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [969466110] [2022-04-07 23:00:36,875 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:36,876 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:00:36,876 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:36,876 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,037 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:37,037 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-04-07 23:00:37,037 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:37,038 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-04-07 23:00:37,038 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=322, Invalid=1840, Unknown=0, NotChecked=0, Total=2162 [2022-04-07 23:00:37,038 INFO L87 Difference]: Start difference. First operand 239 states and 324 transitions. Second operand has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:51,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:51,080 INFO L93 Difference]: Finished difference Result 349 states and 437 transitions. [2022-04-07 23:00:51,080 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-04-07 23:00:51,080 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:00:51,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:51,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:51,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 108 transitions. [2022-04-07 23:00:51,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:51,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 108 transitions. [2022-04-07 23:00:51,082 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 48 states and 108 transitions. [2022-04-07 23:00:53,653 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:53,658 INFO L225 Difference]: With dead ends: 349 [2022-04-07 23:00:53,658 INFO L226 Difference]: Without dead ends: 323 [2022-04-07 23:00:53,659 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 33 SyntacticMatches, 4 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2204 ImplicationChecksByTransitivity, 9.6s TimeCoverageRelationStatistics Valid=1119, Invalid=7253, Unknown=0, NotChecked=0, Total=8372 [2022-04-07 23:00:53,660 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 143 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 782 mSolverCounterSat, 263 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 143 SdHoareTripleChecker+Valid, 110 SdHoareTripleChecker+Invalid, 1045 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 263 IncrementalHoareTripleChecker+Valid, 782 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.5s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:53,660 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [143 Valid, 110 Invalid, 1045 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [263 Valid, 782 Invalid, 0 Unknown, 0 Unchecked, 3.5s Time] [2022-04-07 23:00:53,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2022-04-07 23:00:54,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 237. [2022-04-07 23:00:54,553 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:54,554 INFO L82 GeneralOperation]: Start isEquivalent. First operand 323 states. Second operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:54,554 INFO L74 IsIncluded]: Start isIncluded. First operand 323 states. Second operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:54,554 INFO L87 Difference]: Start difference. First operand 323 states. Second operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:54,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:54,558 INFO L93 Difference]: Finished difference Result 323 states and 408 transitions. [2022-04-07 23:00:54,558 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 408 transitions. [2022-04-07 23:00:54,558 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:54,558 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:54,559 INFO L74 IsIncluded]: Start isIncluded. First operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 323 states. [2022-04-07 23:00:54,559 INFO L87 Difference]: Start difference. First operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 323 states. [2022-04-07 23:00:54,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:54,562 INFO L93 Difference]: Finished difference Result 323 states and 408 transitions. [2022-04-07 23:00:54,562 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 408 transitions. [2022-04-07 23:00:54,563 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:54,563 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:54,563 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:54,563 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:54,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:54,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 322 transitions. [2022-04-07 23:00:54,566 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 322 transitions. Word has length 31 [2022-04-07 23:00:54,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:54,566 INFO L478 AbstractCegarLoop]: Abstraction has 237 states and 322 transitions. [2022-04-07 23:00:54,566 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:54,566 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 322 transitions. [2022-04-07 23:00:54,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 23:00:54,567 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:54,567 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:54,583 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2022-04-07 23:00:54,783 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-07 23:00:54,783 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:54,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:54,784 INFO L85 PathProgramCache]: Analyzing trace with hash -1561499527, now seen corresponding path program 9 times [2022-04-07 23:00:54,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:54,784 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029478661] [2022-04-07 23:00:54,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:54,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:54,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:54,936 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:54,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:54,939 INFO L290 TraceCheckUtils]: 0: Hoare triple {19432#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19417#true} is VALID [2022-04-07 23:00:54,939 INFO L290 TraceCheckUtils]: 1: Hoare triple {19417#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:54,940 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19417#true} {19417#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:54,940 INFO L272 TraceCheckUtils]: 0: Hoare triple {19417#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19432#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:54,940 INFO L290 TraceCheckUtils]: 1: Hoare triple {19432#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19417#true} is VALID [2022-04-07 23:00:54,940 INFO L290 TraceCheckUtils]: 2: Hoare triple {19417#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:54,940 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19417#true} {19417#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:54,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {19417#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:54,940 INFO L290 TraceCheckUtils]: 5: Hoare triple {19417#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19422#(= main_~y~0 0)} is VALID [2022-04-07 23:00:54,941 INFO L290 TraceCheckUtils]: 6: Hoare triple {19422#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19423#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:54,942 INFO L290 TraceCheckUtils]: 7: Hoare triple {19423#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19424#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:54,942 INFO L290 TraceCheckUtils]: 8: Hoare triple {19424#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19425#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:54,943 INFO L290 TraceCheckUtils]: 9: Hoare triple {19425#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19426#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:54,943 INFO L290 TraceCheckUtils]: 10: Hoare triple {19426#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:54,944 INFO L290 TraceCheckUtils]: 11: Hoare triple {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:54,944 INFO L290 TraceCheckUtils]: 12: Hoare triple {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19428#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:54,944 INFO L290 TraceCheckUtils]: 13: Hoare triple {19428#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19429#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:54,945 INFO L290 TraceCheckUtils]: 14: Hoare triple {19429#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19430#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:00:54,946 INFO L290 TraceCheckUtils]: 15: Hoare triple {19430#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19431#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:54,946 INFO L290 TraceCheckUtils]: 16: Hoare triple {19431#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:54,946 INFO L290 TraceCheckUtils]: 17: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:54,946 INFO L290 TraceCheckUtils]: 18: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:54,946 INFO L290 TraceCheckUtils]: 19: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:54,946 INFO L290 TraceCheckUtils]: 20: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:54,946 INFO L290 TraceCheckUtils]: 21: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:54,947 INFO L290 TraceCheckUtils]: 22: Hoare triple {19418#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:54,947 INFO L290 TraceCheckUtils]: 23: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:54,947 INFO L290 TraceCheckUtils]: 24: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:54,947 INFO L290 TraceCheckUtils]: 25: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:54,947 INFO L290 TraceCheckUtils]: 26: Hoare triple {19418#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:54,950 INFO L272 TraceCheckUtils]: 27: Hoare triple {19418#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {19418#false} is VALID [2022-04-07 23:00:54,950 INFO L290 TraceCheckUtils]: 28: Hoare triple {19418#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19418#false} is VALID [2022-04-07 23:00:54,950 INFO L290 TraceCheckUtils]: 29: Hoare triple {19418#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:54,950 INFO L290 TraceCheckUtils]: 30: Hoare triple {19418#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:54,950 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:00:54,950 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:54,950 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1029478661] [2022-04-07 23:00:54,951 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1029478661] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:54,951 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [549056006] [2022-04-07 23:00:54,951 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:00:54,951 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:54,951 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:54,952 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:54,968 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-07 23:00:55,050 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-07 23:00:55,050 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:55,051 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-07 23:00:55,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:55,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:55,243 INFO L272 TraceCheckUtils]: 0: Hoare triple {19417#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,244 INFO L290 TraceCheckUtils]: 1: Hoare triple {19417#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19417#true} is VALID [2022-04-07 23:00:55,244 INFO L290 TraceCheckUtils]: 2: Hoare triple {19417#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,244 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19417#true} {19417#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,244 INFO L272 TraceCheckUtils]: 4: Hoare triple {19417#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,247 INFO L290 TraceCheckUtils]: 5: Hoare triple {19417#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19422#(= main_~y~0 0)} is VALID [2022-04-07 23:00:55,247 INFO L290 TraceCheckUtils]: 6: Hoare triple {19422#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19423#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:55,248 INFO L290 TraceCheckUtils]: 7: Hoare triple {19423#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19424#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:55,248 INFO L290 TraceCheckUtils]: 8: Hoare triple {19424#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19425#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:55,249 INFO L290 TraceCheckUtils]: 9: Hoare triple {19425#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19426#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:55,249 INFO L290 TraceCheckUtils]: 10: Hoare triple {19426#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:55,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:55,250 INFO L290 TraceCheckUtils]: 12: Hoare triple {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19472#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:55,250 INFO L290 TraceCheckUtils]: 13: Hoare triple {19472#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19476#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:00:55,251 INFO L290 TraceCheckUtils]: 14: Hoare triple {19476#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19480#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:55,252 INFO L290 TraceCheckUtils]: 15: Hoare triple {19480#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19484#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:55,252 INFO L290 TraceCheckUtils]: 16: Hoare triple {19484#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= 5 main_~y~0) (<= main_~y~0 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,252 INFO L290 TraceCheckUtils]: 17: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:55,252 INFO L290 TraceCheckUtils]: 18: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:55,252 INFO L290 TraceCheckUtils]: 19: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:55,252 INFO L290 TraceCheckUtils]: 20: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:55,252 INFO L290 TraceCheckUtils]: 21: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L290 TraceCheckUtils]: 22: Hoare triple {19418#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L290 TraceCheckUtils]: 23: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L290 TraceCheckUtils]: 24: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L290 TraceCheckUtils]: 25: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L290 TraceCheckUtils]: 26: Hoare triple {19418#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L272 TraceCheckUtils]: 27: Hoare triple {19418#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L290 TraceCheckUtils]: 28: Hoare triple {19418#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L290 TraceCheckUtils]: 29: Hoare triple {19418#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L290 TraceCheckUtils]: 30: Hoare triple {19418#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,253 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:00:55,253 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 30: Hoare triple {19418#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 29: Hoare triple {19418#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 28: Hoare triple {19418#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L272 TraceCheckUtils]: 27: Hoare triple {19418#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 26: Hoare triple {19418#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 25: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 24: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 23: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 22: Hoare triple {19418#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-07 23:00:55,481 INFO L290 TraceCheckUtils]: 21: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:55,482 INFO L290 TraceCheckUtils]: 20: Hoare triple {19560#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-07 23:00:55,483 INFO L290 TraceCheckUtils]: 19: Hoare triple {19564#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19560#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:00:55,483 INFO L290 TraceCheckUtils]: 18: Hoare triple {19568#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19564#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:00:55,484 INFO L290 TraceCheckUtils]: 17: Hoare triple {19572#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19568#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:00:55,484 INFO L290 TraceCheckUtils]: 16: Hoare triple {19576#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19572#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:00:55,486 INFO L290 TraceCheckUtils]: 15: Hoare triple {19580#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19576#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-07 23:00:55,486 INFO L290 TraceCheckUtils]: 14: Hoare triple {19584#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19580#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:00:55,487 INFO L290 TraceCheckUtils]: 13: Hoare triple {19588#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19584#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 12: Hoare triple {19417#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19588#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 11: Hoare triple {19417#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 10: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 9: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 8: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 7: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 6: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 5: Hoare triple {19417#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L272 TraceCheckUtils]: 4: Hoare triple {19417#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19417#true} {19417#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {19417#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {19417#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L272 TraceCheckUtils]: 0: Hoare triple {19417#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-07 23:00:55,488 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 8 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-07 23:00:55,489 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [549056006] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:55,489 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:55,489 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 10] total 25 [2022-04-07 23:00:55,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1882791387] [2022-04-07 23:00:55,489 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:55,489 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:00:55,489 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:55,489 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:55,519 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:55,519 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-07 23:00:55,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:55,520 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-07 23:00:55,522 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=500, Unknown=0, NotChecked=0, Total=600 [2022-04-07 23:00:55,522 INFO L87 Difference]: Start difference. First operand 237 states and 322 transitions. Second operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:59,519 INFO L93 Difference]: Finished difference Result 365 states and 466 transitions. [2022-04-07 23:00:59,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-07 23:00:59,520 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:00:59,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:59,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 111 transitions. [2022-04-07 23:00:59,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 111 transitions. [2022-04-07 23:00:59,523 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 111 transitions. [2022-04-07 23:00:59,634 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:59,639 INFO L225 Difference]: With dead ends: 365 [2022-04-07 23:00:59,639 INFO L226 Difference]: Without dead ends: 299 [2022-04-07 23:00:59,639 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 523 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=363, Invalid=2393, Unknown=0, NotChecked=0, Total=2756 [2022-04-07 23:00:59,639 INFO L913 BasicCegarLoop]: 30 mSDtfsCounter, 57 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 790 mSolverCounterSat, 93 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 102 SdHoareTripleChecker+Invalid, 883 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 93 IncrementalHoareTripleChecker+Valid, 790 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:59,640 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [57 Valid, 102 Invalid, 883 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [93 Valid, 790 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-07 23:00:59,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states. [2022-04-07 23:01:00,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 222. [2022-04-07 23:01:00,510 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:01:00,510 INFO L82 GeneralOperation]: Start isEquivalent. First operand 299 states. Second operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:00,510 INFO L74 IsIncluded]: Start isIncluded. First operand 299 states. Second operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:00,511 INFO L87 Difference]: Start difference. First operand 299 states. Second operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:00,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:00,514 INFO L93 Difference]: Finished difference Result 299 states and 385 transitions. [2022-04-07 23:01:00,514 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 385 transitions. [2022-04-07 23:01:00,514 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:01:00,514 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:01:00,515 INFO L74 IsIncluded]: Start isIncluded. First operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 299 states. [2022-04-07 23:01:00,515 INFO L87 Difference]: Start difference. First operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 299 states. [2022-04-07 23:01:00,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:00,519 INFO L93 Difference]: Finished difference Result 299 states and 385 transitions. [2022-04-07 23:01:00,519 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 385 transitions. [2022-04-07 23:01:00,519 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:01:00,519 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:01:00,519 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:01:00,519 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:01:00,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:00,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 295 transitions. [2022-04-07 23:01:00,522 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 295 transitions. Word has length 31 [2022-04-07 23:01:00,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:01:00,522 INFO L478 AbstractCegarLoop]: Abstraction has 222 states and 295 transitions. [2022-04-07 23:01:00,522 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:00,522 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 295 transitions. [2022-04-07 23:01:00,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 23:01:00,523 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:01:00,523 INFO L499 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:01:00,539 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-07 23:01:00,727 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-07 23:01:00,728 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:01:00,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:01:00,728 INFO L85 PathProgramCache]: Analyzing trace with hash -859632864, now seen corresponding path program 10 times [2022-04-07 23:01:00,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:01:00,728 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224999292] [2022-04-07 23:01:00,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:01:00,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:01:00,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:01,012 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:01:01,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:01,024 INFO L290 TraceCheckUtils]: 0: Hoare triple {21142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21120#true} is VALID [2022-04-07 23:01:01,024 INFO L290 TraceCheckUtils]: 1: Hoare triple {21120#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,024 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21120#true} {21120#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,025 INFO L272 TraceCheckUtils]: 0: Hoare triple {21120#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:01:01,025 INFO L290 TraceCheckUtils]: 1: Hoare triple {21142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21120#true} is VALID [2022-04-07 23:01:01,025 INFO L290 TraceCheckUtils]: 2: Hoare triple {21120#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,025 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21120#true} {21120#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,025 INFO L272 TraceCheckUtils]: 4: Hoare triple {21120#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,025 INFO L290 TraceCheckUtils]: 5: Hoare triple {21120#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {21125#(= main_~y~0 0)} is VALID [2022-04-07 23:01:01,026 INFO L290 TraceCheckUtils]: 6: Hoare triple {21125#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21126#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:01:01,027 INFO L290 TraceCheckUtils]: 7: Hoare triple {21126#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21127#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:01:01,027 INFO L290 TraceCheckUtils]: 8: Hoare triple {21127#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21128#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:01:01,028 INFO L290 TraceCheckUtils]: 9: Hoare triple {21128#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21129#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:01:01,028 INFO L290 TraceCheckUtils]: 10: Hoare triple {21129#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21130#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:01:01,029 INFO L290 TraceCheckUtils]: 11: Hoare triple {21130#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21131#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:01:01,030 INFO L290 TraceCheckUtils]: 12: Hoare triple {21131#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21132#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:01:01,030 INFO L290 TraceCheckUtils]: 13: Hoare triple {21132#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21133#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:01,031 INFO L290 TraceCheckUtils]: 14: Hoare triple {21133#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21134#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:01:01,032 INFO L290 TraceCheckUtils]: 15: Hoare triple {21134#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21135#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:01:01,032 INFO L290 TraceCheckUtils]: 16: Hoare triple {21135#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21136#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:01:01,033 INFO L290 TraceCheckUtils]: 17: Hoare triple {21136#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21137#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:01:01,033 INFO L290 TraceCheckUtils]: 18: Hoare triple {21137#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21138#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:01:01,034 INFO L290 TraceCheckUtils]: 19: Hoare triple {21138#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:01:01,034 INFO L290 TraceCheckUtils]: 20: Hoare triple {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:01:01,035 INFO L290 TraceCheckUtils]: 21: Hoare triple {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {21140#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 23:01:01,035 INFO L290 TraceCheckUtils]: 22: Hoare triple {21140#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {21141#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:01:01,036 INFO L290 TraceCheckUtils]: 23: Hoare triple {21141#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,036 INFO L290 TraceCheckUtils]: 24: Hoare triple {21121#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {21121#false} is VALID [2022-04-07 23:01:01,036 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,036 INFO L290 TraceCheckUtils]: 26: Hoare triple {21121#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {21121#false} is VALID [2022-04-07 23:01:01,036 INFO L290 TraceCheckUtils]: 27: Hoare triple {21121#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,036 INFO L272 TraceCheckUtils]: 28: Hoare triple {21121#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {21121#false} is VALID [2022-04-07 23:01:01,036 INFO L290 TraceCheckUtils]: 29: Hoare triple {21121#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {21121#false} is VALID [2022-04-07 23:01:01,036 INFO L290 TraceCheckUtils]: 30: Hoare triple {21121#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,037 INFO L290 TraceCheckUtils]: 31: Hoare triple {21121#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,037 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 23:01:01,037 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:01:01,037 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224999292] [2022-04-07 23:01:01,037 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [224999292] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:01:01,037 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [349270791] [2022-04-07 23:01:01,037 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:01:01,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:01:01,037 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:01:01,038 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:01:01,039 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-07 23:01:01,081 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:01:01,081 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:01:01,082 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-07 23:01:01,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:01,090 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:01:01,361 INFO L272 TraceCheckUtils]: 0: Hoare triple {21120#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,362 INFO L290 TraceCheckUtils]: 1: Hoare triple {21120#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21120#true} is VALID [2022-04-07 23:01:01,362 INFO L290 TraceCheckUtils]: 2: Hoare triple {21120#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,362 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21120#true} {21120#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,362 INFO L272 TraceCheckUtils]: 4: Hoare triple {21120#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,362 INFO L290 TraceCheckUtils]: 5: Hoare triple {21120#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {21125#(= main_~y~0 0)} is VALID [2022-04-07 23:01:01,363 INFO L290 TraceCheckUtils]: 6: Hoare triple {21125#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21126#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:01:01,363 INFO L290 TraceCheckUtils]: 7: Hoare triple {21126#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21127#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:01:01,364 INFO L290 TraceCheckUtils]: 8: Hoare triple {21127#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21128#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:01:01,364 INFO L290 TraceCheckUtils]: 9: Hoare triple {21128#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21129#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:01:01,365 INFO L290 TraceCheckUtils]: 10: Hoare triple {21129#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21130#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:01:01,365 INFO L290 TraceCheckUtils]: 11: Hoare triple {21130#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21131#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:01:01,366 INFO L290 TraceCheckUtils]: 12: Hoare triple {21131#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21132#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:01:01,366 INFO L290 TraceCheckUtils]: 13: Hoare triple {21132#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21133#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:01,367 INFO L290 TraceCheckUtils]: 14: Hoare triple {21133#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21134#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:01:01,367 INFO L290 TraceCheckUtils]: 15: Hoare triple {21134#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21135#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:01:01,368 INFO L290 TraceCheckUtils]: 16: Hoare triple {21135#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21136#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:01:01,369 INFO L290 TraceCheckUtils]: 17: Hoare triple {21136#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21137#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:01:01,369 INFO L290 TraceCheckUtils]: 18: Hoare triple {21137#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21138#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:01:01,370 INFO L290 TraceCheckUtils]: 19: Hoare triple {21138#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:01:01,370 INFO L290 TraceCheckUtils]: 20: Hoare triple {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:01:01,370 INFO L290 TraceCheckUtils]: 21: Hoare triple {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {21140#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 23:01:01,371 INFO L290 TraceCheckUtils]: 22: Hoare triple {21140#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {21212#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 23:01:01,371 INFO L290 TraceCheckUtils]: 23: Hoare triple {21212#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,371 INFO L290 TraceCheckUtils]: 24: Hoare triple {21121#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {21121#false} is VALID [2022-04-07 23:01:01,371 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,372 INFO L290 TraceCheckUtils]: 26: Hoare triple {21121#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {21121#false} is VALID [2022-04-07 23:01:01,372 INFO L290 TraceCheckUtils]: 27: Hoare triple {21121#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,372 INFO L272 TraceCheckUtils]: 28: Hoare triple {21121#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {21121#false} is VALID [2022-04-07 23:01:01,372 INFO L290 TraceCheckUtils]: 29: Hoare triple {21121#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {21121#false} is VALID [2022-04-07 23:01:01,372 INFO L290 TraceCheckUtils]: 30: Hoare triple {21121#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,372 INFO L290 TraceCheckUtils]: 31: Hoare triple {21121#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,372 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 23:01:01,372 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:01:01,904 INFO L290 TraceCheckUtils]: 31: Hoare triple {21121#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,905 INFO L290 TraceCheckUtils]: 30: Hoare triple {21121#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,905 INFO L290 TraceCheckUtils]: 29: Hoare triple {21121#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {21121#false} is VALID [2022-04-07 23:01:01,905 INFO L272 TraceCheckUtils]: 28: Hoare triple {21121#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {21121#false} is VALID [2022-04-07 23:01:01,905 INFO L290 TraceCheckUtils]: 27: Hoare triple {21121#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,905 INFO L290 TraceCheckUtils]: 26: Hoare triple {21121#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {21121#false} is VALID [2022-04-07 23:01:01,905 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,905 INFO L290 TraceCheckUtils]: 24: Hoare triple {21121#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {21121#false} is VALID [2022-04-07 23:01:01,905 INFO L290 TraceCheckUtils]: 23: Hoare triple {21264#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-07 23:01:01,906 INFO L290 TraceCheckUtils]: 22: Hoare triple {21268#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {21264#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 23:01:01,906 INFO L290 TraceCheckUtils]: 21: Hoare triple {21272#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {21268#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:01,907 INFO L290 TraceCheckUtils]: 20: Hoare triple {21272#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {21272#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:01,908 INFO L290 TraceCheckUtils]: 19: Hoare triple {21279#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21272#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:01,908 INFO L290 TraceCheckUtils]: 18: Hoare triple {21283#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21279#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:01:01,909 INFO L290 TraceCheckUtils]: 17: Hoare triple {21287#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21283#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:01:01,910 INFO L290 TraceCheckUtils]: 16: Hoare triple {21291#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21287#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:01:01,910 INFO L290 TraceCheckUtils]: 15: Hoare triple {21295#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21291#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:01:01,911 INFO L290 TraceCheckUtils]: 14: Hoare triple {21299#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21295#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:01:01,912 INFO L290 TraceCheckUtils]: 13: Hoare triple {21303#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21299#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 23:01:01,913 INFO L290 TraceCheckUtils]: 12: Hoare triple {21307#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21303#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 23:01:01,913 INFO L290 TraceCheckUtils]: 11: Hoare triple {21311#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21307#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 23:01:01,914 INFO L290 TraceCheckUtils]: 10: Hoare triple {21315#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21311#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 23:01:01,915 INFO L290 TraceCheckUtils]: 9: Hoare triple {21319#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21315#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 23:01:01,915 INFO L290 TraceCheckUtils]: 8: Hoare triple {21323#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21319#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 23:01:01,916 INFO L290 TraceCheckUtils]: 7: Hoare triple {21327#(< 0 (mod (+ main_~y~0 12) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21323#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 23:01:01,917 INFO L290 TraceCheckUtils]: 6: Hoare triple {21331#(< 0 (mod (+ main_~y~0 13) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21327#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-07 23:01:01,917 INFO L290 TraceCheckUtils]: 5: Hoare triple {21120#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {21331#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-07 23:01:01,917 INFO L272 TraceCheckUtils]: 4: Hoare triple {21120#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,917 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21120#true} {21120#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,917 INFO L290 TraceCheckUtils]: 2: Hoare triple {21120#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,917 INFO L290 TraceCheckUtils]: 1: Hoare triple {21120#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21120#true} is VALID [2022-04-07 23:01:01,917 INFO L272 TraceCheckUtils]: 0: Hoare triple {21120#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-07 23:01:01,917 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 23:01:01,918 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [349270791] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:01:01,918 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:01:01,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 38 [2022-04-07 23:01:01,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [380336702] [2022-04-07 23:01:01,918 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:01:01,918 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:01:01,918 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:01:01,919 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:01,956 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:01:01,957 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-07 23:01:01,957 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:01:01,957 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-07 23:01:01,957 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=1102, Unknown=0, NotChecked=0, Total=1406 [2022-04-07 23:01:01,957 INFO L87 Difference]: Start difference. First operand 222 states and 295 transitions. Second operand has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:16,227 WARN L232 SmtUtils]: Spent 7.14s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:01:28,489 WARN L232 SmtUtils]: Spent 6.65s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:01:51,851 WARN L232 SmtUtils]: Spent 18.03s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:02:10,677 WARN L232 SmtUtils]: Spent 9.57s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:02:20,350 WARN L232 SmtUtils]: Spent 5.68s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:02:35,407 WARN L232 SmtUtils]: Spent 6.52s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:02:57,529 WARN L232 SmtUtils]: Spent 5.50s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:03:10,997 WARN L232 SmtUtils]: Spent 5.65s on a formula simplification that was a NOOP. DAG size: 62 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:03:27,503 WARN L232 SmtUtils]: Spent 7.46s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:05:16,261 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.44s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:05:19,626 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.30s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:05:47,719 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.20s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:05:50,545 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.56s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:05:59,051 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.14s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:06:00,297 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.05s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:06:02,589 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:06:16,837 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.86s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:06:23,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:06:23,039 INFO L93 Difference]: Finished difference Result 855 states and 1148 transitions. [2022-04-07 23:06:23,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 140 states. [2022-04-07 23:06:23,039 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:06:23,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:06:23,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:23,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 465 transitions. [2022-04-07 23:06:23,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:23,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 465 transitions. [2022-04-07 23:06:23,051 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 140 states and 465 transitions. [2022-04-07 23:06:36,393 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 465 edges. 462 inductive. 0 not inductive. 3 times theorem prover too weak to decide inductivity. [2022-04-07 23:06:36,428 INFO L225 Difference]: With dead ends: 855 [2022-04-07 23:06:36,428 INFO L226 Difference]: Without dead ends: 817 [2022-04-07 23:06:36,431 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 222 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 173 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11649 ImplicationChecksByTransitivity, 243.4s TimeCoverageRelationStatistics Valid=7358, Invalid=23092, Unknown=0, NotChecked=0, Total=30450 [2022-04-07 23:06:36,431 INFO L913 BasicCegarLoop]: 67 mSDtfsCounter, 1121 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 2457 mSolverCounterSat, 1408 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 40.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1121 SdHoareTripleChecker+Valid, 179 SdHoareTripleChecker+Invalid, 3866 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1408 IncrementalHoareTripleChecker+Valid, 2457 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 40.2s IncrementalHoareTripleChecker+Time [2022-04-07 23:06:36,431 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1121 Valid, 179 Invalid, 3866 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1408 Valid, 2457 Invalid, 1 Unknown, 0 Unchecked, 40.2s Time] [2022-04-07 23:06:36,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 817 states. [2022-04-07 23:06:37,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 817 to 238. [2022-04-07 23:06:37,411 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:06:37,412 INFO L82 GeneralOperation]: Start isEquivalent. First operand 817 states. Second operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:37,412 INFO L74 IsIncluded]: Start isIncluded. First operand 817 states. Second operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:37,412 INFO L87 Difference]: Start difference. First operand 817 states. Second operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:37,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:06:37,430 INFO L93 Difference]: Finished difference Result 817 states and 1050 transitions. [2022-04-07 23:06:37,431 INFO L276 IsEmpty]: Start isEmpty. Operand 817 states and 1050 transitions. [2022-04-07 23:06:37,431 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:06:37,431 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:06:37,432 INFO L74 IsIncluded]: Start isIncluded. First operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 817 states. [2022-04-07 23:06:37,432 INFO L87 Difference]: Start difference. First operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 817 states. [2022-04-07 23:06:37,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:06:37,452 INFO L93 Difference]: Finished difference Result 817 states and 1050 transitions. [2022-04-07 23:06:37,452 INFO L276 IsEmpty]: Start isEmpty. Operand 817 states and 1050 transitions. [2022-04-07 23:06:37,453 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:06:37,453 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:06:37,453 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:06:37,453 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:06:37,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:37,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 316 transitions. [2022-04-07 23:06:37,457 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 316 transitions. Word has length 32 [2022-04-07 23:06:37,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:06:37,457 INFO L478 AbstractCegarLoop]: Abstraction has 238 states and 316 transitions. [2022-04-07 23:06:37,457 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:37,457 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 316 transitions. [2022-04-07 23:06:37,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 23:06:37,457 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:06:37,457 INFO L499 BasicCegarLoop]: trace histogram [8, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:06:37,479 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-07 23:06:37,679 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:06:37,680 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:06:37,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:06:37,680 INFO L85 PathProgramCache]: Analyzing trace with hash -55126557, now seen corresponding path program 10 times [2022-04-07 23:06:37,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:06:37,680 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857134673] [2022-04-07 23:06:37,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:06:37,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:06:37,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:06:37,868 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:06:37,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:06:37,871 INFO L290 TraceCheckUtils]: 0: Hoare triple {24766#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24749#true} is VALID [2022-04-07 23:06:37,871 INFO L290 TraceCheckUtils]: 1: Hoare triple {24749#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:37,872 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24749#true} {24749#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:37,872 INFO L272 TraceCheckUtils]: 0: Hoare triple {24749#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24766#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:06:37,872 INFO L290 TraceCheckUtils]: 1: Hoare triple {24766#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24749#true} is VALID [2022-04-07 23:06:37,872 INFO L290 TraceCheckUtils]: 2: Hoare triple {24749#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:37,872 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24749#true} {24749#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:37,872 INFO L272 TraceCheckUtils]: 4: Hoare triple {24749#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:37,872 INFO L290 TraceCheckUtils]: 5: Hoare triple {24749#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24754#(= main_~y~0 0)} is VALID [2022-04-07 23:06:37,873 INFO L290 TraceCheckUtils]: 6: Hoare triple {24754#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24755#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:06:37,873 INFO L290 TraceCheckUtils]: 7: Hoare triple {24755#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24756#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:06:37,874 INFO L290 TraceCheckUtils]: 8: Hoare triple {24756#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24757#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:06:37,875 INFO L290 TraceCheckUtils]: 9: Hoare triple {24757#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24758#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:06:37,875 INFO L290 TraceCheckUtils]: 10: Hoare triple {24758#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24759#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:37,875 INFO L290 TraceCheckUtils]: 11: Hoare triple {24759#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24759#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:37,876 INFO L290 TraceCheckUtils]: 12: Hoare triple {24759#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24760#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:06:37,876 INFO L290 TraceCheckUtils]: 13: Hoare triple {24760#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24761#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:06:37,877 INFO L290 TraceCheckUtils]: 14: Hoare triple {24761#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24762#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:06:37,877 INFO L290 TraceCheckUtils]: 15: Hoare triple {24762#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24763#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:06:37,878 INFO L290 TraceCheckUtils]: 16: Hoare triple {24763#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24764#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:06:37,878 INFO L290 TraceCheckUtils]: 17: Hoare triple {24764#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24765#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:06:37,879 INFO L290 TraceCheckUtils]: 18: Hoare triple {24765#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24750#false} is VALID [2022-04-07 23:06:37,879 INFO L290 TraceCheckUtils]: 19: Hoare triple {24750#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24750#false} is VALID [2022-04-07 23:06:37,879 INFO L290 TraceCheckUtils]: 20: Hoare triple {24750#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24750#false} is VALID [2022-04-07 23:06:37,879 INFO L290 TraceCheckUtils]: 21: Hoare triple {24750#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:37,879 INFO L290 TraceCheckUtils]: 22: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:37,879 INFO L290 TraceCheckUtils]: 23: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:37,879 INFO L290 TraceCheckUtils]: 24: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L290 TraceCheckUtils]: 25: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L290 TraceCheckUtils]: 26: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L290 TraceCheckUtils]: 27: Hoare triple {24750#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L290 TraceCheckUtils]: 28: Hoare triple {24750#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L272 TraceCheckUtils]: 29: Hoare triple {24750#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L290 TraceCheckUtils]: 30: Hoare triple {24750#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L290 TraceCheckUtils]: 31: Hoare triple {24750#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L290 TraceCheckUtils]: 32: Hoare triple {24750#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:37,880 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-07 23:06:37,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:06:37,880 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857134673] [2022-04-07 23:06:37,880 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1857134673] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:06:37,880 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [290153911] [2022-04-07 23:06:37,881 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:06:37,881 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:06:37,881 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:06:37,881 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:06:37,882 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-07 23:06:37,937 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:06:37,937 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:06:37,938 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-07 23:06:37,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:06:37,945 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:06:38,185 INFO L272 TraceCheckUtils]: 0: Hoare triple {24749#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,186 INFO L290 TraceCheckUtils]: 1: Hoare triple {24749#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24749#true} is VALID [2022-04-07 23:06:38,186 INFO L290 TraceCheckUtils]: 2: Hoare triple {24749#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,186 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24749#true} {24749#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,186 INFO L272 TraceCheckUtils]: 4: Hoare triple {24749#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,186 INFO L290 TraceCheckUtils]: 5: Hoare triple {24749#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24754#(= main_~y~0 0)} is VALID [2022-04-07 23:06:38,187 INFO L290 TraceCheckUtils]: 6: Hoare triple {24754#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24755#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:06:38,187 INFO L290 TraceCheckUtils]: 7: Hoare triple {24755#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24756#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:06:38,188 INFO L290 TraceCheckUtils]: 8: Hoare triple {24756#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24757#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:06:38,189 INFO L290 TraceCheckUtils]: 9: Hoare triple {24757#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24758#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:06:38,189 INFO L290 TraceCheckUtils]: 10: Hoare triple {24758#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24759#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:38,190 INFO L290 TraceCheckUtils]: 11: Hoare triple {24759#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24759#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:38,190 INFO L290 TraceCheckUtils]: 12: Hoare triple {24759#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24806#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:38,190 INFO L290 TraceCheckUtils]: 13: Hoare triple {24806#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24810#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:06:38,191 INFO L290 TraceCheckUtils]: 14: Hoare triple {24810#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24814#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:38,192 INFO L290 TraceCheckUtils]: 15: Hoare triple {24814#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24818#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:38,193 INFO L290 TraceCheckUtils]: 16: Hoare triple {24818#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24822#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:38,193 INFO L290 TraceCheckUtils]: 17: Hoare triple {24822#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24826#(and (<= 5 main_~y~0) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= main_~y~0 5))} is VALID [2022-04-07 23:06:38,194 INFO L290 TraceCheckUtils]: 18: Hoare triple {24826#(and (<= 5 main_~y~0) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24750#false} is VALID [2022-04-07 23:06:38,194 INFO L290 TraceCheckUtils]: 19: Hoare triple {24750#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24750#false} is VALID [2022-04-07 23:06:38,194 INFO L290 TraceCheckUtils]: 20: Hoare triple {24750#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24750#false} is VALID [2022-04-07 23:06:38,194 INFO L290 TraceCheckUtils]: 21: Hoare triple {24750#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,194 INFO L290 TraceCheckUtils]: 22: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:38,194 INFO L290 TraceCheckUtils]: 23: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:38,194 INFO L290 TraceCheckUtils]: 24: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L290 TraceCheckUtils]: 25: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L290 TraceCheckUtils]: 26: Hoare triple {24750#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L290 TraceCheckUtils]: 27: Hoare triple {24750#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L290 TraceCheckUtils]: 28: Hoare triple {24750#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L272 TraceCheckUtils]: 29: Hoare triple {24750#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L290 TraceCheckUtils]: 30: Hoare triple {24750#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L290 TraceCheckUtils]: 31: Hoare triple {24750#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L290 TraceCheckUtils]: 32: Hoare triple {24750#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,195 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-07 23:06:38,195 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:06:38,579 INFO L290 TraceCheckUtils]: 32: Hoare triple {24750#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,579 INFO L290 TraceCheckUtils]: 31: Hoare triple {24750#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,580 INFO L290 TraceCheckUtils]: 30: Hoare triple {24750#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24750#false} is VALID [2022-04-07 23:06:38,580 INFO L272 TraceCheckUtils]: 29: Hoare triple {24750#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {24750#false} is VALID [2022-04-07 23:06:38,580 INFO L290 TraceCheckUtils]: 28: Hoare triple {24750#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,580 INFO L290 TraceCheckUtils]: 27: Hoare triple {24887#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24750#false} is VALID [2022-04-07 23:06:38,581 INFO L290 TraceCheckUtils]: 26: Hoare triple {24891#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24887#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:06:38,582 INFO L290 TraceCheckUtils]: 25: Hoare triple {24895#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24891#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:06:38,584 INFO L290 TraceCheckUtils]: 24: Hoare triple {24899#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24895#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:06:38,584 INFO L290 TraceCheckUtils]: 23: Hoare triple {24903#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24899#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:06:38,585 INFO L290 TraceCheckUtils]: 22: Hoare triple {24907#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24903#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-07 23:06:38,586 INFO L290 TraceCheckUtils]: 21: Hoare triple {24907#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24907#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-07 23:06:38,586 INFO L290 TraceCheckUtils]: 20: Hoare triple {24907#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24907#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-07 23:06:38,586 INFO L290 TraceCheckUtils]: 19: Hoare triple {24907#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24907#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-07 23:06:38,587 INFO L290 TraceCheckUtils]: 18: Hoare triple {24920#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24907#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-07 23:06:38,588 INFO L290 TraceCheckUtils]: 17: Hoare triple {24924#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24920#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 23:06:38,589 INFO L290 TraceCheckUtils]: 16: Hoare triple {24928#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24924#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:06:38,590 INFO L290 TraceCheckUtils]: 15: Hoare triple {24932#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24928#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-07 23:06:38,592 INFO L290 TraceCheckUtils]: 14: Hoare triple {24936#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24932#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:06:38,593 INFO L290 TraceCheckUtils]: 13: Hoare triple {24940#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24936#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} is VALID [2022-04-07 23:06:38,593 INFO L290 TraceCheckUtils]: 12: Hoare triple {24749#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24940#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-07 23:06:38,593 INFO L290 TraceCheckUtils]: 11: Hoare triple {24749#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,593 INFO L290 TraceCheckUtils]: 10: Hoare triple {24749#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24749#true} is VALID [2022-04-07 23:06:38,593 INFO L290 TraceCheckUtils]: 9: Hoare triple {24749#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24749#true} is VALID [2022-04-07 23:06:38,593 INFO L290 TraceCheckUtils]: 8: Hoare triple {24749#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24749#true} is VALID [2022-04-07 23:06:38,593 INFO L290 TraceCheckUtils]: 7: Hoare triple {24749#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24749#true} is VALID [2022-04-07 23:06:38,593 INFO L290 TraceCheckUtils]: 6: Hoare triple {24749#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24749#true} is VALID [2022-04-07 23:06:38,594 INFO L290 TraceCheckUtils]: 5: Hoare triple {24749#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24749#true} is VALID [2022-04-07 23:06:38,594 INFO L272 TraceCheckUtils]: 4: Hoare triple {24749#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,594 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24749#true} {24749#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,594 INFO L290 TraceCheckUtils]: 2: Hoare triple {24749#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {24749#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24749#true} is VALID [2022-04-07 23:06:38,594 INFO L272 TraceCheckUtils]: 0: Hoare triple {24749#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24749#true} is VALID [2022-04-07 23:06:38,594 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-07 23:06:38,594 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [290153911] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:06:38,594 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:06:38,595 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 33 [2022-04-07 23:06:38,595 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1980408802] [2022-04-07 23:06:38,595 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:06:38,595 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:06:38,595 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:06:38,596 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:38,639 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:06:38,639 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-07 23:06:38,639 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:06:38,639 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-07 23:06:38,640 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=873, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 23:06:38,640 INFO L87 Difference]: Start difference. First operand 238 states and 316 transitions. Second operand has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:44,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:06:44,928 INFO L93 Difference]: Finished difference Result 435 states and 530 transitions. [2022-04-07 23:06:44,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2022-04-07 23:06:44,928 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:06:44,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:06:44,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:44,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 163 transitions. [2022-04-07 23:06:44,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:44,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 163 transitions. [2022-04-07 23:06:44,931 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 58 states and 163 transitions. [2022-04-07 23:06:45,229 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:06:45,236 INFO L225 Difference]: With dead ends: 435 [2022-04-07 23:06:45,236 INFO L226 Difference]: Without dead ends: 415 [2022-04-07 23:06:45,237 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2122 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1384, Invalid=6272, Unknown=0, NotChecked=0, Total=7656 [2022-04-07 23:06:45,237 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 295 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 488 mSolverCounterSat, 365 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 295 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 853 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 365 IncrementalHoareTripleChecker+Valid, 488 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-07 23:06:45,237 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [295 Valid, 81 Invalid, 853 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [365 Valid, 488 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-07 23:06:45,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 415 states. [2022-04-07 23:06:46,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 415 to 239. [2022-04-07 23:06:46,253 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:06:46,253 INFO L82 GeneralOperation]: Start isEquivalent. First operand 415 states. Second operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:46,254 INFO L74 IsIncluded]: Start isIncluded. First operand 415 states. Second operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:46,254 INFO L87 Difference]: Start difference. First operand 415 states. Second operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:46,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:06:46,259 INFO L93 Difference]: Finished difference Result 415 states and 505 transitions. [2022-04-07 23:06:46,259 INFO L276 IsEmpty]: Start isEmpty. Operand 415 states and 505 transitions. [2022-04-07 23:06:46,260 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:06:46,260 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:06:46,260 INFO L74 IsIncluded]: Start isIncluded. First operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 415 states. [2022-04-07 23:06:46,260 INFO L87 Difference]: Start difference. First operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 415 states. [2022-04-07 23:06:46,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:06:46,266 INFO L93 Difference]: Finished difference Result 415 states and 505 transitions. [2022-04-07 23:06:46,266 INFO L276 IsEmpty]: Start isEmpty. Operand 415 states and 505 transitions. [2022-04-07 23:06:46,267 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:06:46,267 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:06:46,267 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:06:46,267 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:06:46,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:46,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 316 transitions. [2022-04-07 23:06:46,270 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 316 transitions. Word has length 33 [2022-04-07 23:06:46,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:06:46,270 INFO L478 AbstractCegarLoop]: Abstraction has 239 states and 316 transitions. [2022-04-07 23:06:46,270 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:46,270 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 316 transitions. [2022-04-07 23:06:46,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 23:06:46,271 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:06:46,271 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:06:46,293 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-07 23:06:46,483 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:06:46,483 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:06:46,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:06:46,484 INFO L85 PathProgramCache]: Analyzing trace with hash -479678114, now seen corresponding path program 11 times [2022-04-07 23:06:46,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:06:46,484 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429852961] [2022-04-07 23:06:46,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:06:46,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:06:46,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:06:46,658 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:06:46,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:06:46,661 INFO L290 TraceCheckUtils]: 0: Hoare triple {26881#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26864#true} is VALID [2022-04-07 23:06:46,661 INFO L290 TraceCheckUtils]: 1: Hoare triple {26864#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:46,661 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26864#true} {26864#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:46,664 INFO L272 TraceCheckUtils]: 0: Hoare triple {26864#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26881#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:06:46,664 INFO L290 TraceCheckUtils]: 1: Hoare triple {26881#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26864#true} is VALID [2022-04-07 23:06:46,664 INFO L290 TraceCheckUtils]: 2: Hoare triple {26864#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:46,664 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26864#true} {26864#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:46,664 INFO L272 TraceCheckUtils]: 4: Hoare triple {26864#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:46,664 INFO L290 TraceCheckUtils]: 5: Hoare triple {26864#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26864#true} is VALID [2022-04-07 23:06:46,665 INFO L290 TraceCheckUtils]: 6: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26869#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:06:46,666 INFO L290 TraceCheckUtils]: 7: Hoare triple {26869#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26870#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 23:06:46,668 INFO L290 TraceCheckUtils]: 8: Hoare triple {26870#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26871#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:06:46,669 INFO L290 TraceCheckUtils]: 9: Hoare triple {26871#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26872#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:06:46,670 INFO L290 TraceCheckUtils]: 10: Hoare triple {26872#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26873#(<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:06:46,671 INFO L290 TraceCheckUtils]: 11: Hoare triple {26873#(<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26874#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:06:46,672 INFO L290 TraceCheckUtils]: 12: Hoare triple {26874#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26874#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:06:46,672 INFO L290 TraceCheckUtils]: 13: Hoare triple {26874#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26874#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:06:46,673 INFO L290 TraceCheckUtils]: 14: Hoare triple {26874#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26875#(<= (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 23:06:46,674 INFO L290 TraceCheckUtils]: 15: Hoare triple {26875#(<= (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26876#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 2) main_~x~0)} is VALID [2022-04-07 23:06:46,674 INFO L290 TraceCheckUtils]: 16: Hoare triple {26876#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 2) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26877#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 3) main_~x~0)} is VALID [2022-04-07 23:06:46,675 INFO L290 TraceCheckUtils]: 17: Hoare triple {26877#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 3) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26878#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:06:46,676 INFO L290 TraceCheckUtils]: 18: Hoare triple {26878#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 4) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26879#(<= (+ 5 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:06:46,677 INFO L290 TraceCheckUtils]: 19: Hoare triple {26879#(<= (+ 5 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,677 INFO L290 TraceCheckUtils]: 20: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,677 INFO L290 TraceCheckUtils]: 21: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,678 INFO L290 TraceCheckUtils]: 22: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,678 INFO L290 TraceCheckUtils]: 23: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,679 INFO L290 TraceCheckUtils]: 24: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,679 INFO L290 TraceCheckUtils]: 25: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,679 INFO L290 TraceCheckUtils]: 26: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,680 INFO L290 TraceCheckUtils]: 27: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:06:46,680 INFO L290 TraceCheckUtils]: 28: Hoare triple {26880#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:46,680 INFO L272 TraceCheckUtils]: 29: Hoare triple {26865#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {26865#false} is VALID [2022-04-07 23:06:46,680 INFO L290 TraceCheckUtils]: 30: Hoare triple {26865#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26865#false} is VALID [2022-04-07 23:06:46,680 INFO L290 TraceCheckUtils]: 31: Hoare triple {26865#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:46,680 INFO L290 TraceCheckUtils]: 32: Hoare triple {26865#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:46,680 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:06:46,681 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:06:46,681 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429852961] [2022-04-07 23:06:46,681 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [429852961] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:06:46,681 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [385669609] [2022-04-07 23:06:46,681 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 23:06:46,681 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:06:46,681 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:06:46,682 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:06:46,698 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-07 23:06:46,981 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 23:06:46,981 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:06:46,982 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 23:06:46,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:06:46,990 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:06:47,361 INFO L272 TraceCheckUtils]: 0: Hoare triple {26864#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:47,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {26864#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26864#true} is VALID [2022-04-07 23:06:47,361 INFO L290 TraceCheckUtils]: 2: Hoare triple {26864#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:47,361 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26864#true} {26864#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:47,361 INFO L272 TraceCheckUtils]: 4: Hoare triple {26864#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 5: Hoare triple {26864#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26864#true} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 6: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 7: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 8: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 9: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 10: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 11: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 12: Hoare triple {26864#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26921#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:06:47,362 INFO L290 TraceCheckUtils]: 13: Hoare triple {26921#(not (< 0 (mod main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26921#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:06:47,363 INFO L290 TraceCheckUtils]: 14: Hoare triple {26921#(not (< 0 (mod main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26928#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:06:47,364 INFO L290 TraceCheckUtils]: 15: Hoare triple {26928#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26932#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:06:47,365 INFO L290 TraceCheckUtils]: 16: Hoare triple {26932#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26936#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:06:47,366 INFO L290 TraceCheckUtils]: 17: Hoare triple {26936#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26940#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,366 INFO L290 TraceCheckUtils]: 18: Hoare triple {26940#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26944#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,367 INFO L290 TraceCheckUtils]: 19: Hoare triple {26944#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,367 INFO L290 TraceCheckUtils]: 20: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,368 INFO L290 TraceCheckUtils]: 21: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,368 INFO L290 TraceCheckUtils]: 22: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,368 INFO L290 TraceCheckUtils]: 23: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,368 INFO L290 TraceCheckUtils]: 24: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,369 INFO L290 TraceCheckUtils]: 25: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,369 INFO L290 TraceCheckUtils]: 26: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,369 INFO L290 TraceCheckUtils]: 27: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:06:47,370 INFO L290 TraceCheckUtils]: 28: Hoare triple {26948#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:47,370 INFO L272 TraceCheckUtils]: 29: Hoare triple {26865#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {26865#false} is VALID [2022-04-07 23:06:47,370 INFO L290 TraceCheckUtils]: 30: Hoare triple {26865#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26865#false} is VALID [2022-04-07 23:06:47,370 INFO L290 TraceCheckUtils]: 31: Hoare triple {26865#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:47,370 INFO L290 TraceCheckUtils]: 32: Hoare triple {26865#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:47,370 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-04-07 23:06:47,370 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:06:47,538 INFO L290 TraceCheckUtils]: 32: Hoare triple {26865#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:47,538 INFO L290 TraceCheckUtils]: 31: Hoare triple {26865#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:47,538 INFO L290 TraceCheckUtils]: 30: Hoare triple {26865#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26865#false} is VALID [2022-04-07 23:06:47,538 INFO L272 TraceCheckUtils]: 29: Hoare triple {26865#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {26865#false} is VALID [2022-04-07 23:06:47,538 INFO L290 TraceCheckUtils]: 28: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26865#false} is VALID [2022-04-07 23:06:47,539 INFO L290 TraceCheckUtils]: 27: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,539 INFO L290 TraceCheckUtils]: 26: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,539 INFO L290 TraceCheckUtils]: 25: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,539 INFO L290 TraceCheckUtils]: 24: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,540 INFO L290 TraceCheckUtils]: 23: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,540 INFO L290 TraceCheckUtils]: 22: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,540 INFO L290 TraceCheckUtils]: 21: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,540 INFO L290 TraceCheckUtils]: 20: Hoare triple {27000#(< 0 (mod main_~x~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,541 INFO L290 TraceCheckUtils]: 19: Hoare triple {26869#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27000#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:06:47,542 INFO L290 TraceCheckUtils]: 18: Hoare triple {27031#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26869#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:06:47,543 INFO L290 TraceCheckUtils]: 17: Hoare triple {27035#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27031#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:06:47,544 INFO L290 TraceCheckUtils]: 16: Hoare triple {27039#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27035#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:06:47,544 INFO L290 TraceCheckUtils]: 15: Hoare triple {27043#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27039#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:06:47,545 INFO L290 TraceCheckUtils]: 14: Hoare triple {27047#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27043#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:06:47,545 INFO L290 TraceCheckUtils]: 13: Hoare triple {27047#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {27047#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:06:47,546 INFO L290 TraceCheckUtils]: 12: Hoare triple {26864#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {27047#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:06:47,546 INFO L290 TraceCheckUtils]: 11: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,546 INFO L290 TraceCheckUtils]: 10: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,546 INFO L290 TraceCheckUtils]: 9: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,546 INFO L290 TraceCheckUtils]: 8: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,546 INFO L290 TraceCheckUtils]: 7: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,546 INFO L290 TraceCheckUtils]: 6: Hoare triple {26864#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#true} is VALID [2022-04-07 23:06:47,546 INFO L290 TraceCheckUtils]: 5: Hoare triple {26864#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26864#true} is VALID [2022-04-07 23:06:47,547 INFO L272 TraceCheckUtils]: 4: Hoare triple {26864#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:47,547 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26864#true} {26864#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:47,547 INFO L290 TraceCheckUtils]: 2: Hoare triple {26864#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:47,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {26864#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26864#true} is VALID [2022-04-07 23:06:47,547 INFO L272 TraceCheckUtils]: 0: Hoare triple {26864#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26864#true} is VALID [2022-04-07 23:06:47,547 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-04-07 23:06:47,547 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [385669609] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:06:47,547 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:06:47,547 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 9, 9] total 28 [2022-04-07 23:06:47,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2129244492] [2022-04-07 23:06:47,547 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:06:47,548 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:06:47,549 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:06:47,550 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:06:47,591 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:06:47,591 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-07 23:06:47,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:06:47,591 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-07 23:06:47,591 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=538, Unknown=0, NotChecked=0, Total=756 [2022-04-07 23:06:47,591 INFO L87 Difference]: Start difference. First operand 239 states and 316 transitions. Second operand has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:11,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:11,991 INFO L93 Difference]: Finished difference Result 559 states and 780 transitions. [2022-04-07 23:07:11,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-04-07 23:07:11,991 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:07:11,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:07:11,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:11,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 168 transitions. [2022-04-07 23:07:11,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:11,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 168 transitions. [2022-04-07 23:07:11,993 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 168 transitions. [2022-04-07 23:07:12,311 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 168 edges. 168 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:07:12,324 INFO L225 Difference]: With dead ends: 559 [2022-04-07 23:07:12,324 INFO L226 Difference]: Without dead ends: 551 [2022-04-07 23:07:12,324 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 60 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1167 ImplicationChecksByTransitivity, 11.8s TimeCoverageRelationStatistics Valid=1190, Invalid=3365, Unknown=1, NotChecked=0, Total=4556 [2022-04-07 23:07:12,325 INFO L913 BasicCegarLoop]: 33 mSDtfsCounter, 233 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 417 mSolverCounterSat, 240 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 233 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 657 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 240 IncrementalHoareTripleChecker+Valid, 417 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2022-04-07 23:07:12,325 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [233 Valid, 90 Invalid, 657 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [240 Valid, 417 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2022-04-07 23:07:12,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2022-04-07 23:07:14,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 372. [2022-04-07 23:07:14,038 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:07:14,039 INFO L82 GeneralOperation]: Start isEquivalent. First operand 551 states. Second operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:14,039 INFO L74 IsIncluded]: Start isIncluded. First operand 551 states. Second operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:14,039 INFO L87 Difference]: Start difference. First operand 551 states. Second operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:14,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:14,048 INFO L93 Difference]: Finished difference Result 551 states and 736 transitions. [2022-04-07 23:07:14,048 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 736 transitions. [2022-04-07 23:07:14,049 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:07:14,049 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:07:14,049 INFO L74 IsIncluded]: Start isIncluded. First operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 551 states. [2022-04-07 23:07:14,049 INFO L87 Difference]: Start difference. First operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 551 states. [2022-04-07 23:07:14,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:14,058 INFO L93 Difference]: Finished difference Result 551 states and 736 transitions. [2022-04-07 23:07:14,058 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 736 transitions. [2022-04-07 23:07:14,059 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:07:14,059 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:07:14,059 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:07:14,059 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:07:14,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:14,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 539 transitions. [2022-04-07 23:07:14,065 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 539 transitions. Word has length 33 [2022-04-07 23:07:14,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:07:14,065 INFO L478 AbstractCegarLoop]: Abstraction has 372 states and 539 transitions. [2022-04-07 23:07:14,065 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:14,065 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 539 transitions. [2022-04-07 23:07:14,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-07 23:07:14,066 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:07:14,066 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:07:14,083 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-07 23:07:14,270 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-07 23:07:14,270 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:07:14,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:07:14,270 INFO L85 PathProgramCache]: Analyzing trace with hash 1789844345, now seen corresponding path program 11 times [2022-04-07 23:07:14,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:07:14,270 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702135737] [2022-04-07 23:07:14,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:07:14,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:07:14,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:14,828 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:07:14,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:14,838 INFO L290 TraceCheckUtils]: 0: Hoare triple {29654#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {29633#true} is VALID [2022-04-07 23:07:14,838 INFO L290 TraceCheckUtils]: 1: Hoare triple {29633#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:14,838 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {29633#true} {29633#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:14,838 INFO L272 TraceCheckUtils]: 0: Hoare triple {29633#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29654#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:07:14,839 INFO L290 TraceCheckUtils]: 1: Hoare triple {29654#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {29633#true} is VALID [2022-04-07 23:07:14,839 INFO L290 TraceCheckUtils]: 2: Hoare triple {29633#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:14,839 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29633#true} {29633#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:14,839 INFO L272 TraceCheckUtils]: 4: Hoare triple {29633#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:14,839 INFO L290 TraceCheckUtils]: 5: Hoare triple {29633#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {29638#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:07:14,841 INFO L290 TraceCheckUtils]: 6: Hoare triple {29638#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29639#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:14,869 INFO L290 TraceCheckUtils]: 7: Hoare triple {29639#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29640#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-07 23:07:14,872 INFO L290 TraceCheckUtils]: 8: Hoare triple {29640#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29641#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-07 23:07:14,886 INFO L290 TraceCheckUtils]: 9: Hoare triple {29641#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29642#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-07 23:07:14,887 INFO L290 TraceCheckUtils]: 10: Hoare triple {29642#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29643#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,888 INFO L290 TraceCheckUtils]: 11: Hoare triple {29643#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {29644#(and (<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,888 INFO L290 TraceCheckUtils]: 12: Hoare triple {29644#(and (<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {29644#(and (<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,889 INFO L290 TraceCheckUtils]: 13: Hoare triple {29644#(and (<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,890 INFO L290 TraceCheckUtils]: 14: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,890 INFO L290 TraceCheckUtils]: 15: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,891 INFO L290 TraceCheckUtils]: 16: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,891 INFO L290 TraceCheckUtils]: 17: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,892 INFO L290 TraceCheckUtils]: 18: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:14,892 INFO L290 TraceCheckUtils]: 19: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29646#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} is VALID [2022-04-07 23:07:14,893 INFO L290 TraceCheckUtils]: 20: Hoare triple {29646#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29647#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} is VALID [2022-04-07 23:07:14,894 INFO L290 TraceCheckUtils]: 21: Hoare triple {29647#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29648#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} is VALID [2022-04-07 23:07:14,894 INFO L290 TraceCheckUtils]: 22: Hoare triple {29648#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29649#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:14,895 INFO L290 TraceCheckUtils]: 23: Hoare triple {29649#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29650#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-07 23:07:14,896 INFO L290 TraceCheckUtils]: 24: Hoare triple {29650#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {29650#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-07 23:07:14,896 INFO L290 TraceCheckUtils]: 25: Hoare triple {29650#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29649#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:14,897 INFO L290 TraceCheckUtils]: 26: Hoare triple {29649#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29648#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} is VALID [2022-04-07 23:07:14,897 INFO L290 TraceCheckUtils]: 27: Hoare triple {29648#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29647#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} is VALID [2022-04-07 23:07:14,898 INFO L290 TraceCheckUtils]: 28: Hoare triple {29647#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29646#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} is VALID [2022-04-07 23:07:14,901 INFO L290 TraceCheckUtils]: 29: Hoare triple {29646#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:14,901 INFO L290 TraceCheckUtils]: 30: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:14,902 INFO L272 TraceCheckUtils]: 31: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {29652#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 23:07:14,902 INFO L290 TraceCheckUtils]: 32: Hoare triple {29652#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29653#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 23:07:14,902 INFO L290 TraceCheckUtils]: 33: Hoare triple {29653#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29634#false} is VALID [2022-04-07 23:07:14,903 INFO L290 TraceCheckUtils]: 34: Hoare triple {29634#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29634#false} is VALID [2022-04-07 23:07:14,903 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:07:14,903 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:07:14,903 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1702135737] [2022-04-07 23:07:14,903 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1702135737] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:07:14,903 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [833089568] [2022-04-07 23:07:14,903 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 23:07:14,903 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:07:14,903 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:07:14,904 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:07:14,904 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-07 23:07:15,130 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 23:07:15,130 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:07:15,132 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-07 23:07:15,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:15,147 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:07:15,928 INFO L272 TraceCheckUtils]: 0: Hoare triple {29633#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:15,928 INFO L290 TraceCheckUtils]: 1: Hoare triple {29633#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {29633#true} is VALID [2022-04-07 23:07:15,928 INFO L290 TraceCheckUtils]: 2: Hoare triple {29633#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:15,928 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29633#true} {29633#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:15,928 INFO L272 TraceCheckUtils]: 4: Hoare triple {29633#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:15,928 INFO L290 TraceCheckUtils]: 5: Hoare triple {29633#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {29638#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:07:15,929 INFO L290 TraceCheckUtils]: 6: Hoare triple {29638#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29676#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} is VALID [2022-04-07 23:07:15,930 INFO L290 TraceCheckUtils]: 7: Hoare triple {29676#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29680#(and (= (+ (- 2) main_~y~0) 0) (= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-07 23:07:15,930 INFO L290 TraceCheckUtils]: 8: Hoare triple {29680#(and (= (+ (- 2) main_~y~0) 0) (= main_~n~0 (+ main_~x~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29684#(and (= (+ main_~x~0 3) main_~n~0) (= main_~y~0 3))} is VALID [2022-04-07 23:07:15,931 INFO L290 TraceCheckUtils]: 9: Hoare triple {29684#(and (= (+ main_~x~0 3) main_~n~0) (= main_~y~0 3))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29688#(and (= 3 (+ (- 1) main_~y~0)) (= (+ main_~n~0 (- 3)) (+ main_~x~0 1)))} is VALID [2022-04-07 23:07:15,931 INFO L290 TraceCheckUtils]: 10: Hoare triple {29688#(and (= 3 (+ (- 1) main_~y~0)) (= (+ main_~n~0 (- 3)) (+ main_~x~0 1)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29643#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,932 INFO L290 TraceCheckUtils]: 11: Hoare triple {29643#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,932 INFO L290 TraceCheckUtils]: 12: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,933 INFO L290 TraceCheckUtils]: 13: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,933 INFO L290 TraceCheckUtils]: 14: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,934 INFO L290 TraceCheckUtils]: 15: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,934 INFO L290 TraceCheckUtils]: 16: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,934 INFO L290 TraceCheckUtils]: 17: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,935 INFO L290 TraceCheckUtils]: 18: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,936 INFO L290 TraceCheckUtils]: 19: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29646#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} is VALID [2022-04-07 23:07:15,936 INFO L290 TraceCheckUtils]: 20: Hoare triple {29646#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29647#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} is VALID [2022-04-07 23:07:15,937 INFO L290 TraceCheckUtils]: 21: Hoare triple {29647#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29648#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} is VALID [2022-04-07 23:07:15,938 INFO L290 TraceCheckUtils]: 22: Hoare triple {29648#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29649#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:15,938 INFO L290 TraceCheckUtils]: 23: Hoare triple {29649#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29650#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-07 23:07:15,939 INFO L290 TraceCheckUtils]: 24: Hoare triple {29650#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {29650#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-07 23:07:15,939 INFO L290 TraceCheckUtils]: 25: Hoare triple {29650#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29649#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:15,940 INFO L290 TraceCheckUtils]: 26: Hoare triple {29649#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29648#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} is VALID [2022-04-07 23:07:15,941 INFO L290 TraceCheckUtils]: 27: Hoare triple {29648#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29647#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} is VALID [2022-04-07 23:07:15,941 INFO L290 TraceCheckUtils]: 28: Hoare triple {29647#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29646#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} is VALID [2022-04-07 23:07:15,942 INFO L290 TraceCheckUtils]: 29: Hoare triple {29646#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,942 INFO L290 TraceCheckUtils]: 30: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:15,944 INFO L272 TraceCheckUtils]: 31: Hoare triple {29645#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {29755#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:07:15,945 INFO L290 TraceCheckUtils]: 32: Hoare triple {29755#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29759#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:07:15,945 INFO L290 TraceCheckUtils]: 33: Hoare triple {29759#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29634#false} is VALID [2022-04-07 23:07:15,945 INFO L290 TraceCheckUtils]: 34: Hoare triple {29634#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29634#false} is VALID [2022-04-07 23:07:15,945 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:07:15,945 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:07:19,030 INFO L290 TraceCheckUtils]: 34: Hoare triple {29634#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29634#false} is VALID [2022-04-07 23:07:19,039 INFO L290 TraceCheckUtils]: 33: Hoare triple {29759#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29634#false} is VALID [2022-04-07 23:07:19,040 INFO L290 TraceCheckUtils]: 32: Hoare triple {29755#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29759#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:07:19,041 INFO L272 TraceCheckUtils]: 31: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {29755#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:07:19,041 INFO L290 TraceCheckUtils]: 30: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,042 INFO L290 TraceCheckUtils]: 29: Hoare triple {29781#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,043 INFO L290 TraceCheckUtils]: 28: Hoare triple {29785#(and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29781#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:07:19,044 INFO L290 TraceCheckUtils]: 27: Hoare triple {29789#(and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29785#(and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,045 INFO L290 TraceCheckUtils]: 26: Hoare triple {29793#(and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29789#(and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4)))} is VALID [2022-04-07 23:07:19,046 INFO L290 TraceCheckUtils]: 25: Hoare triple {29797#(and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29793#(and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296)))))} is VALID [2022-04-07 23:07:19,047 INFO L290 TraceCheckUtils]: 24: Hoare triple {29797#(and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {29797#(and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:07:19,047 INFO L290 TraceCheckUtils]: 23: Hoare triple {29793#(and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296)))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29797#(and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:07:19,048 INFO L290 TraceCheckUtils]: 22: Hoare triple {29789#(and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29793#(and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296)))))} is VALID [2022-04-07 23:07:19,049 INFO L290 TraceCheckUtils]: 21: Hoare triple {29785#(and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29789#(and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4)))} is VALID [2022-04-07 23:07:19,051 INFO L290 TraceCheckUtils]: 20: Hoare triple {29781#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29785#(and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,052 INFO L290 TraceCheckUtils]: 19: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29781#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:07:19,052 INFO L290 TraceCheckUtils]: 18: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,053 INFO L290 TraceCheckUtils]: 17: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,053 INFO L290 TraceCheckUtils]: 16: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,054 INFO L290 TraceCheckUtils]: 15: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,054 INFO L290 TraceCheckUtils]: 14: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,054 INFO L290 TraceCheckUtils]: 13: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,055 INFO L290 TraceCheckUtils]: 12: Hoare triple {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,055 INFO L290 TraceCheckUtils]: 11: Hoare triple {29840#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {29651#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-07 23:07:19,057 INFO L290 TraceCheckUtils]: 10: Hoare triple {29844#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29840#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-07 23:07:19,058 INFO L290 TraceCheckUtils]: 9: Hoare triple {29848#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29844#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 23:07:19,059 INFO L290 TraceCheckUtils]: 8: Hoare triple {29852#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29848#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:07:19,060 INFO L290 TraceCheckUtils]: 7: Hoare triple {29856#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29852#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:07:19,062 INFO L290 TraceCheckUtils]: 6: Hoare triple {29860#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29856#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:07:19,063 INFO L290 TraceCheckUtils]: 5: Hoare triple {29633#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {29860#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-07 23:07:19,063 INFO L272 TraceCheckUtils]: 4: Hoare triple {29633#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:19,063 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29633#true} {29633#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:19,063 INFO L290 TraceCheckUtils]: 2: Hoare triple {29633#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:19,063 INFO L290 TraceCheckUtils]: 1: Hoare triple {29633#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {29633#true} is VALID [2022-04-07 23:07:19,063 INFO L272 TraceCheckUtils]: 0: Hoare triple {29633#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29633#true} is VALID [2022-04-07 23:07:19,064 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:07:19,064 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [833089568] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:07:19,064 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:07:19,064 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 16, 16] total 36 [2022-04-07 23:07:19,064 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919972656] [2022-04-07 23:07:19,064 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:07:19,064 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:07:19,065 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:07:19,065 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:19,189 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:07:19,189 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-07 23:07:19,189 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:07:19,190 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-07 23:07:19,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=1104, Unknown=0, NotChecked=0, Total=1260 [2022-04-07 23:07:19,190 INFO L87 Difference]: Start difference. First operand 372 states and 539 transitions. Second operand has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:40,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:40,584 INFO L93 Difference]: Finished difference Result 570 states and 736 transitions. [2022-04-07 23:07:40,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-04-07 23:07:40,584 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:07:40,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:07:40,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:40,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 86 transitions. [2022-04-07 23:07:40,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:40,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 86 transitions. [2022-04-07 23:07:40,586 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 45 states and 86 transitions. [2022-04-07 23:07:40,935 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:07:40,946 INFO L225 Difference]: With dead ends: 570 [2022-04-07 23:07:40,946 INFO L226 Difference]: Without dead ends: 546 [2022-04-07 23:07:40,947 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 54 SyntacticMatches, 5 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1116 ImplicationChecksByTransitivity, 18.4s TimeCoverageRelationStatistics Valid=629, Invalid=5376, Unknown=1, NotChecked=0, Total=6006 [2022-04-07 23:07:40,947 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 94 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 571 mSolverCounterSat, 140 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 711 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 140 IncrementalHoareTripleChecker+Valid, 571 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-07 23:07:40,947 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [94 Valid, 80 Invalid, 711 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [140 Valid, 571 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-07 23:07:40,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2022-04-07 23:07:42,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 365. [2022-04-07 23:07:42,700 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:07:42,701 INFO L82 GeneralOperation]: Start isEquivalent. First operand 546 states. Second operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:42,727 INFO L74 IsIncluded]: Start isIncluded. First operand 546 states. Second operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:42,728 INFO L87 Difference]: Start difference. First operand 546 states. Second operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:42,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:42,737 INFO L93 Difference]: Finished difference Result 546 states and 712 transitions. [2022-04-07 23:07:42,737 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 712 transitions. [2022-04-07 23:07:42,737 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:07:42,737 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:07:42,737 INFO L74 IsIncluded]: Start isIncluded. First operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 546 states. [2022-04-07 23:07:42,738 INFO L87 Difference]: Start difference. First operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 546 states. [2022-04-07 23:07:42,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:42,747 INFO L93 Difference]: Finished difference Result 546 states and 712 transitions. [2022-04-07 23:07:42,747 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 712 transitions. [2022-04-07 23:07:42,747 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:07:42,747 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:07:42,747 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:07:42,747 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:07:42,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:42,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 531 transitions. [2022-04-07 23:07:42,754 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 531 transitions. Word has length 35 [2022-04-07 23:07:42,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:07:42,754 INFO L478 AbstractCegarLoop]: Abstraction has 365 states and 531 transitions. [2022-04-07 23:07:42,754 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:42,754 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 531 transitions. [2022-04-07 23:07:42,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-07 23:07:42,755 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:07:42,755 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:07:42,765 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-04-07 23:07:42,959 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-04-07 23:07:42,959 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:07:42,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:07:42,960 INFO L85 PathProgramCache]: Analyzing trace with hash 41612862, now seen corresponding path program 12 times [2022-04-07 23:07:42,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:07:42,960 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1582189979] [2022-04-07 23:07:42,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:07:42,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:07:42,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:43,139 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:07:43,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:43,142 INFO L290 TraceCheckUtils]: 0: Hoare triple {32425#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32408#true} is VALID [2022-04-07 23:07:43,142 INFO L290 TraceCheckUtils]: 1: Hoare triple {32408#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,142 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {32408#true} {32408#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,142 INFO L272 TraceCheckUtils]: 0: Hoare triple {32408#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32425#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:07:43,143 INFO L290 TraceCheckUtils]: 1: Hoare triple {32425#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32408#true} is VALID [2022-04-07 23:07:43,143 INFO L290 TraceCheckUtils]: 2: Hoare triple {32408#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,143 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32408#true} {32408#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,143 INFO L272 TraceCheckUtils]: 4: Hoare triple {32408#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,143 INFO L290 TraceCheckUtils]: 5: Hoare triple {32408#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32413#(= main_~y~0 0)} is VALID [2022-04-07 23:07:43,143 INFO L290 TraceCheckUtils]: 6: Hoare triple {32413#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32414#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:43,144 INFO L290 TraceCheckUtils]: 7: Hoare triple {32414#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32415#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:07:43,145 INFO L290 TraceCheckUtils]: 8: Hoare triple {32415#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32416#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:07:43,145 INFO L290 TraceCheckUtils]: 9: Hoare triple {32416#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32417#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:07:43,146 INFO L290 TraceCheckUtils]: 10: Hoare triple {32417#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32418#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:43,146 INFO L290 TraceCheckUtils]: 11: Hoare triple {32418#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32419#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:43,147 INFO L290 TraceCheckUtils]: 12: Hoare triple {32419#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32419#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:43,147 INFO L290 TraceCheckUtils]: 13: Hoare triple {32419#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32420#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:07:43,148 INFO L290 TraceCheckUtils]: 14: Hoare triple {32420#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32421#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:07:43,148 INFO L290 TraceCheckUtils]: 15: Hoare triple {32421#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32422#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:07:43,149 INFO L290 TraceCheckUtils]: 16: Hoare triple {32422#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32423#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:07:43,149 INFO L290 TraceCheckUtils]: 17: Hoare triple {32423#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32424#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 18: Hoare triple {32424#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 19: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 20: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 21: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 22: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 23: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 24: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 25: Hoare triple {32409#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 26: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 27: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 28: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 29: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,150 INFO L290 TraceCheckUtils]: 30: Hoare triple {32409#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,151 INFO L272 TraceCheckUtils]: 31: Hoare triple {32409#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {32409#false} is VALID [2022-04-07 23:07:43,151 INFO L290 TraceCheckUtils]: 32: Hoare triple {32409#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32409#false} is VALID [2022-04-07 23:07:43,151 INFO L290 TraceCheckUtils]: 33: Hoare triple {32409#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,151 INFO L290 TraceCheckUtils]: 34: Hoare triple {32409#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,151 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-04-07 23:07:43,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:07:43,151 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1582189979] [2022-04-07 23:07:43,151 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1582189979] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:07:43,151 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1760510585] [2022-04-07 23:07:43,151 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 23:07:43,151 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:07:43,151 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:07:43,152 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:07:43,153 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-04-07 23:07:43,212 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-07 23:07:43,212 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:07:43,213 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-07 23:07:43,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:43,222 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:07:43,472 INFO L272 TraceCheckUtils]: 0: Hoare triple {32408#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,472 INFO L290 TraceCheckUtils]: 1: Hoare triple {32408#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32408#true} is VALID [2022-04-07 23:07:43,472 INFO L290 TraceCheckUtils]: 2: Hoare triple {32408#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,472 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32408#true} {32408#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,473 INFO L272 TraceCheckUtils]: 4: Hoare triple {32408#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,473 INFO L290 TraceCheckUtils]: 5: Hoare triple {32408#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32413#(= main_~y~0 0)} is VALID [2022-04-07 23:07:43,473 INFO L290 TraceCheckUtils]: 6: Hoare triple {32413#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32414#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:43,474 INFO L290 TraceCheckUtils]: 7: Hoare triple {32414#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32415#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:07:43,474 INFO L290 TraceCheckUtils]: 8: Hoare triple {32415#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32416#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:07:43,475 INFO L290 TraceCheckUtils]: 9: Hoare triple {32416#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32417#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:07:43,476 INFO L290 TraceCheckUtils]: 10: Hoare triple {32417#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32418#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:43,476 INFO L290 TraceCheckUtils]: 11: Hoare triple {32418#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32419#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:43,477 INFO L290 TraceCheckUtils]: 12: Hoare triple {32419#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32419#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:43,477 INFO L290 TraceCheckUtils]: 13: Hoare triple {32419#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32468#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:43,477 INFO L290 TraceCheckUtils]: 14: Hoare triple {32468#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32472#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:07:43,478 INFO L290 TraceCheckUtils]: 15: Hoare triple {32472#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32476#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:43,479 INFO L290 TraceCheckUtils]: 16: Hoare triple {32476#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32480#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:43,480 INFO L290 TraceCheckUtils]: 17: Hoare triple {32480#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32484#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:43,480 INFO L290 TraceCheckUtils]: 18: Hoare triple {32484#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,480 INFO L290 TraceCheckUtils]: 19: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,480 INFO L290 TraceCheckUtils]: 20: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,480 INFO L290 TraceCheckUtils]: 21: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,480 INFO L290 TraceCheckUtils]: 22: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,480 INFO L290 TraceCheckUtils]: 23: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,480 INFO L290 TraceCheckUtils]: 24: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 25: Hoare triple {32409#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 26: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 27: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 28: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 29: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 30: Hoare triple {32409#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L272 TraceCheckUtils]: 31: Hoare triple {32409#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 32: Hoare triple {32409#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 33: Hoare triple {32409#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L290 TraceCheckUtils]: 34: Hoare triple {32409#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,481 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-04-07 23:07:43,481 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:07:43,810 INFO L290 TraceCheckUtils]: 34: Hoare triple {32409#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,810 INFO L290 TraceCheckUtils]: 33: Hoare triple {32409#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L290 TraceCheckUtils]: 32: Hoare triple {32409#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L272 TraceCheckUtils]: 31: Hoare triple {32409#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L290 TraceCheckUtils]: 30: Hoare triple {32409#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L290 TraceCheckUtils]: 29: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L290 TraceCheckUtils]: 28: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L290 TraceCheckUtils]: 27: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L290 TraceCheckUtils]: 26: Hoare triple {32409#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L290 TraceCheckUtils]: 25: Hoare triple {32409#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32409#false} is VALID [2022-04-07 23:07:43,811 INFO L290 TraceCheckUtils]: 24: Hoare triple {32409#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,812 INFO L290 TraceCheckUtils]: 23: Hoare triple {32569#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32409#false} is VALID [2022-04-07 23:07:43,815 INFO L290 TraceCheckUtils]: 22: Hoare triple {32573#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32569#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:07:43,815 INFO L290 TraceCheckUtils]: 21: Hoare triple {32577#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32573#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:07:43,816 INFO L290 TraceCheckUtils]: 20: Hoare triple {32581#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32577#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:07:43,817 INFO L290 TraceCheckUtils]: 19: Hoare triple {32585#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32581#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:07:43,817 INFO L290 TraceCheckUtils]: 18: Hoare triple {32589#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32585#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:07:43,818 INFO L290 TraceCheckUtils]: 17: Hoare triple {32593#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32589#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:07:43,819 INFO L290 TraceCheckUtils]: 16: Hoare triple {32597#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32593#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:07:43,820 INFO L290 TraceCheckUtils]: 15: Hoare triple {32601#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32597#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:07:43,821 INFO L290 TraceCheckUtils]: 14: Hoare triple {32605#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32601#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:07:43,821 INFO L290 TraceCheckUtils]: 13: Hoare triple {32408#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32605#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:07:43,821 INFO L290 TraceCheckUtils]: 12: Hoare triple {32408#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 11: Hoare triple {32408#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 10: Hoare triple {32408#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 9: Hoare triple {32408#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 8: Hoare triple {32408#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 7: Hoare triple {32408#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 6: Hoare triple {32408#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 5: Hoare triple {32408#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L272 TraceCheckUtils]: 4: Hoare triple {32408#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32408#true} {32408#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 2: Hoare triple {32408#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L290 TraceCheckUtils]: 1: Hoare triple {32408#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L272 TraceCheckUtils]: 0: Hoare triple {32408#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32408#true} is VALID [2022-04-07 23:07:43,822 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 10 proven. 20 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2022-04-07 23:07:43,822 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1760510585] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:07:43,823 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:07:43,823 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 12] total 30 [2022-04-07 23:07:43,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [120933237] [2022-04-07 23:07:43,823 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:07:43,823 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:07:43,823 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:07:43,823 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:43,857 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:07:43,857 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-07 23:07:43,857 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:07:43,857 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-07 23:07:43,858 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=738, Unknown=0, NotChecked=0, Total=870 [2022-04-07 23:07:43,858 INFO L87 Difference]: Start difference. First operand 365 states and 531 transitions. Second operand has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:50,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:50,786 INFO L93 Difference]: Finished difference Result 559 states and 741 transitions. [2022-04-07 23:07:50,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-04-07 23:07:50,786 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:07:50,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:07:50,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:50,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 128 transitions. [2022-04-07 23:07:50,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:50,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 128 transitions. [2022-04-07 23:07:50,788 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 128 transitions. [2022-04-07 23:07:50,922 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 128 edges. 128 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:07:50,931 INFO L225 Difference]: With dead ends: 559 [2022-04-07 23:07:50,931 INFO L226 Difference]: Without dead ends: 475 [2022-04-07 23:07:50,932 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 64 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 790 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=486, Invalid=3546, Unknown=0, NotChecked=0, Total=4032 [2022-04-07 23:07:50,932 INFO L913 BasicCegarLoop]: 38 mSDtfsCounter, 63 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 1169 mSolverCounterSat, 117 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 120 SdHoareTripleChecker+Invalid, 1286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 117 IncrementalHoareTripleChecker+Valid, 1169 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-07 23:07:50,932 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [63 Valid, 120 Invalid, 1286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [117 Valid, 1169 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-07 23:07:50,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 475 states. [2022-04-07 23:07:52,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 475 to 347. [2022-04-07 23:07:52,668 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:07:52,668 INFO L82 GeneralOperation]: Start isEquivalent. First operand 475 states. Second operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:52,669 INFO L74 IsIncluded]: Start isIncluded. First operand 475 states. Second operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:52,669 INFO L87 Difference]: Start difference. First operand 475 states. Second operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:52,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:52,676 INFO L93 Difference]: Finished difference Result 475 states and 641 transitions. [2022-04-07 23:07:52,676 INFO L276 IsEmpty]: Start isEmpty. Operand 475 states and 641 transitions. [2022-04-07 23:07:52,677 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:07:52,677 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:07:52,677 INFO L74 IsIncluded]: Start isIncluded. First operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 475 states. [2022-04-07 23:07:52,677 INFO L87 Difference]: Start difference. First operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 475 states. [2022-04-07 23:07:52,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:07:52,684 INFO L93 Difference]: Finished difference Result 475 states and 641 transitions. [2022-04-07 23:07:52,685 INFO L276 IsEmpty]: Start isEmpty. Operand 475 states and 641 transitions. [2022-04-07 23:07:52,685 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:07:52,685 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:07:52,685 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:07:52,685 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:07:52,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:52,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 347 states to 347 states and 497 transitions. [2022-04-07 23:07:52,691 INFO L78 Accepts]: Start accepts. Automaton has 347 states and 497 transitions. Word has length 35 [2022-04-07 23:07:52,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:07:52,691 INFO L478 AbstractCegarLoop]: Abstraction has 347 states and 497 transitions. [2022-04-07 23:07:52,691 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:52,691 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 497 transitions. [2022-04-07 23:07:52,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-07 23:07:52,691 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:07:52,691 INFO L499 BasicCegarLoop]: trace histogram [15, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:07:52,715 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-04-07 23:07:52,899 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-07 23:07:52,899 INFO L403 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:07:52,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:07:52,900 INFO L85 PathProgramCache]: Analyzing trace with hash 1019189925, now seen corresponding path program 13 times [2022-04-07 23:07:52,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:07:52,900 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150935819] [2022-04-07 23:07:52,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:07:52,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:07:52,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:53,235 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:07:53,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:53,237 INFO L290 TraceCheckUtils]: 0: Hoare triple {35031#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35007#true} is VALID [2022-04-07 23:07:53,238 INFO L290 TraceCheckUtils]: 1: Hoare triple {35007#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,238 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {35007#true} {35007#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,238 INFO L272 TraceCheckUtils]: 0: Hoare triple {35007#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35031#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:07:53,238 INFO L290 TraceCheckUtils]: 1: Hoare triple {35031#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35007#true} is VALID [2022-04-07 23:07:53,238 INFO L290 TraceCheckUtils]: 2: Hoare triple {35007#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,238 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35007#true} {35007#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,238 INFO L272 TraceCheckUtils]: 4: Hoare triple {35007#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,239 INFO L290 TraceCheckUtils]: 5: Hoare triple {35007#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35012#(= main_~y~0 0)} is VALID [2022-04-07 23:07:53,239 INFO L290 TraceCheckUtils]: 6: Hoare triple {35012#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:53,240 INFO L290 TraceCheckUtils]: 7: Hoare triple {35013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:07:53,240 INFO L290 TraceCheckUtils]: 8: Hoare triple {35014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:07:53,241 INFO L290 TraceCheckUtils]: 9: Hoare triple {35015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:07:53,241 INFO L290 TraceCheckUtils]: 10: Hoare triple {35016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:53,242 INFO L290 TraceCheckUtils]: 11: Hoare triple {35017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:53,243 INFO L290 TraceCheckUtils]: 12: Hoare triple {35018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35019#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:07:53,243 INFO L290 TraceCheckUtils]: 13: Hoare triple {35019#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35020#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:07:53,244 INFO L290 TraceCheckUtils]: 14: Hoare triple {35020#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35021#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:07:53,244 INFO L290 TraceCheckUtils]: 15: Hoare triple {35021#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35022#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:07:53,245 INFO L290 TraceCheckUtils]: 16: Hoare triple {35022#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35023#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:07:53,246 INFO L290 TraceCheckUtils]: 17: Hoare triple {35023#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35024#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:07:53,246 INFO L290 TraceCheckUtils]: 18: Hoare triple {35024#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35025#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:07:53,247 INFO L290 TraceCheckUtils]: 19: Hoare triple {35025#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35026#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:07:53,247 INFO L290 TraceCheckUtils]: 20: Hoare triple {35026#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35027#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-07 23:07:53,248 INFO L290 TraceCheckUtils]: 21: Hoare triple {35027#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35027#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-07 23:07:53,248 INFO L290 TraceCheckUtils]: 22: Hoare triple {35027#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {35028#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-07 23:07:53,249 INFO L290 TraceCheckUtils]: 23: Hoare triple {35028#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35029#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 23:07:53,249 INFO L290 TraceCheckUtils]: 24: Hoare triple {35029#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35030#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 25: Hoare triple {35030#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 26: Hoare triple {35008#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 27: Hoare triple {35008#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 28: Hoare triple {35008#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 29: Hoare triple {35008#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 30: Hoare triple {35008#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 31: Hoare triple {35008#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L272 TraceCheckUtils]: 32: Hoare triple {35008#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 33: Hoare triple {35008#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 34: Hoare triple {35008#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,250 INFO L290 TraceCheckUtils]: 35: Hoare triple {35008#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,251 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:07:53,251 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:07:53,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [150935819] [2022-04-07 23:07:53,251 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [150935819] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:07:53,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [234909285] [2022-04-07 23:07:53,251 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 23:07:53,251 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:07:53,251 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:07:53,253 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:07:53,254 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-04-07 23:07:53,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:53,297 INFO L263 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-07 23:07:53,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:07:53,305 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:07:53,646 INFO L272 TraceCheckUtils]: 0: Hoare triple {35007#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,646 INFO L290 TraceCheckUtils]: 1: Hoare triple {35007#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35007#true} is VALID [2022-04-07 23:07:53,646 INFO L290 TraceCheckUtils]: 2: Hoare triple {35007#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,646 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35007#true} {35007#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,646 INFO L272 TraceCheckUtils]: 4: Hoare triple {35007#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:53,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {35007#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35012#(= main_~y~0 0)} is VALID [2022-04-07 23:07:53,647 INFO L290 TraceCheckUtils]: 6: Hoare triple {35012#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:07:53,648 INFO L290 TraceCheckUtils]: 7: Hoare triple {35013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:07:53,648 INFO L290 TraceCheckUtils]: 8: Hoare triple {35014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:07:53,649 INFO L290 TraceCheckUtils]: 9: Hoare triple {35015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:07:53,650 INFO L290 TraceCheckUtils]: 10: Hoare triple {35016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:07:53,651 INFO L290 TraceCheckUtils]: 11: Hoare triple {35017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:07:53,652 INFO L290 TraceCheckUtils]: 12: Hoare triple {35018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35019#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:07:53,652 INFO L290 TraceCheckUtils]: 13: Hoare triple {35019#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35020#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:07:53,653 INFO L290 TraceCheckUtils]: 14: Hoare triple {35020#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35021#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:07:53,654 INFO L290 TraceCheckUtils]: 15: Hoare triple {35021#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35022#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:07:53,654 INFO L290 TraceCheckUtils]: 16: Hoare triple {35022#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35023#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:07:53,655 INFO L290 TraceCheckUtils]: 17: Hoare triple {35023#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35024#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:07:53,655 INFO L290 TraceCheckUtils]: 18: Hoare triple {35024#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35025#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:07:53,656 INFO L290 TraceCheckUtils]: 19: Hoare triple {35025#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35026#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:07:53,657 INFO L290 TraceCheckUtils]: 20: Hoare triple {35026#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35027#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-07 23:07:53,657 INFO L290 TraceCheckUtils]: 21: Hoare triple {35027#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35027#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-07 23:07:53,657 INFO L290 TraceCheckUtils]: 22: Hoare triple {35027#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {35028#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-07 23:07:53,658 INFO L290 TraceCheckUtils]: 23: Hoare triple {35028#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35029#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 23:07:53,658 INFO L290 TraceCheckUtils]: 24: Hoare triple {35029#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35107#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 23:07:53,659 INFO L290 TraceCheckUtils]: 25: Hoare triple {35107#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,659 INFO L290 TraceCheckUtils]: 26: Hoare triple {35008#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35008#false} is VALID [2022-04-07 23:07:53,659 INFO L290 TraceCheckUtils]: 27: Hoare triple {35008#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35008#false} is VALID [2022-04-07 23:07:53,659 INFO L290 TraceCheckUtils]: 28: Hoare triple {35008#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,659 INFO L290 TraceCheckUtils]: 29: Hoare triple {35008#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {35008#false} is VALID [2022-04-07 23:07:53,659 INFO L290 TraceCheckUtils]: 30: Hoare triple {35008#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {35008#false} is VALID [2022-04-07 23:07:53,659 INFO L290 TraceCheckUtils]: 31: Hoare triple {35008#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,660 INFO L272 TraceCheckUtils]: 32: Hoare triple {35008#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {35008#false} is VALID [2022-04-07 23:07:53,660 INFO L290 TraceCheckUtils]: 33: Hoare triple {35008#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {35008#false} is VALID [2022-04-07 23:07:53,660 INFO L290 TraceCheckUtils]: 34: Hoare triple {35008#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,660 INFO L290 TraceCheckUtils]: 35: Hoare triple {35008#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:53,660 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:07:53,660 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:07:54,366 INFO L290 TraceCheckUtils]: 35: Hoare triple {35008#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 34: Hoare triple {35008#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 33: Hoare triple {35008#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L272 TraceCheckUtils]: 32: Hoare triple {35008#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 31: Hoare triple {35008#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 30: Hoare triple {35008#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 29: Hoare triple {35008#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 28: Hoare triple {35008#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 27: Hoare triple {35008#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 26: Hoare triple {35008#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35008#false} is VALID [2022-04-07 23:07:54,367 INFO L290 TraceCheckUtils]: 25: Hoare triple {35171#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {35008#false} is VALID [2022-04-07 23:07:54,368 INFO L290 TraceCheckUtils]: 24: Hoare triple {35175#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35171#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 23:07:54,369 INFO L290 TraceCheckUtils]: 23: Hoare triple {35179#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35175#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 23:07:54,369 INFO L290 TraceCheckUtils]: 22: Hoare triple {35183#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {35179#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-07 23:07:54,370 INFO L290 TraceCheckUtils]: 21: Hoare triple {35183#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35183#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:07:54,370 INFO L290 TraceCheckUtils]: 20: Hoare triple {35190#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35183#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:07:54,371 INFO L290 TraceCheckUtils]: 19: Hoare triple {35194#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35190#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:07:54,372 INFO L290 TraceCheckUtils]: 18: Hoare triple {35198#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35194#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:07:54,373 INFO L290 TraceCheckUtils]: 17: Hoare triple {35202#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35198#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:07:54,373 INFO L290 TraceCheckUtils]: 16: Hoare triple {35206#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35202#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:07:54,374 INFO L290 TraceCheckUtils]: 15: Hoare triple {35210#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35206#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:07:54,375 INFO L290 TraceCheckUtils]: 14: Hoare triple {35214#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35210#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:07:54,375 INFO L290 TraceCheckUtils]: 13: Hoare triple {35218#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35214#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 23:07:54,376 INFO L290 TraceCheckUtils]: 12: Hoare triple {35222#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35218#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 23:07:54,377 INFO L290 TraceCheckUtils]: 11: Hoare triple {35226#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35222#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 23:07:54,377 INFO L290 TraceCheckUtils]: 10: Hoare triple {35230#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35226#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 23:07:54,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {35234#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35230#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 23:07:54,379 INFO L290 TraceCheckUtils]: 8: Hoare triple {35238#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35234#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 23:07:54,380 INFO L290 TraceCheckUtils]: 7: Hoare triple {35242#(< 0 (mod (+ main_~y~0 12) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35238#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 23:07:54,380 INFO L290 TraceCheckUtils]: 6: Hoare triple {35246#(< 0 (mod (+ main_~y~0 13) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35242#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-07 23:07:54,381 INFO L290 TraceCheckUtils]: 5: Hoare triple {35007#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35246#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-07 23:07:54,381 INFO L272 TraceCheckUtils]: 4: Hoare triple {35007#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:54,381 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35007#true} {35007#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:54,381 INFO L290 TraceCheckUtils]: 2: Hoare triple {35007#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:54,381 INFO L290 TraceCheckUtils]: 1: Hoare triple {35007#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35007#true} is VALID [2022-04-07 23:07:54,381 INFO L272 TraceCheckUtils]: 0: Hoare triple {35007#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35007#true} is VALID [2022-04-07 23:07:54,381 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:07:54,381 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [234909285] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:07:54,381 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:07:54,381 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-07 23:07:54,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [184677512] [2022-04-07 23:07:54,382 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:07:54,383 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-07 23:07:54,384 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:07:54,384 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:07:54,423 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:07:54,423 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-07 23:07:54,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:07:54,423 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-07 23:07:54,424 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1373, Unknown=0, NotChecked=0, Total=1722 [2022-04-07 23:07:54,424 INFO L87 Difference]: Start difference. First operand 347 states and 497 transitions. Second operand has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:08:14,740 WARN L232 SmtUtils]: Spent 6.89s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:08:28,990 WARN L232 SmtUtils]: Spent 8.49s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:08:53,353 WARN L232 SmtUtils]: Spent 16.69s on a formula simplification that was a NOOP. DAG size: 81 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:09:06,984 WARN L232 SmtUtils]: Spent 5.52s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:09:30,843 WARN L232 SmtUtils]: Spent 14.06s on a formula simplification that was a NOOP. DAG size: 78 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:09:51,850 WARN L232 SmtUtils]: Spent 13.57s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:10:15,193 WARN L232 SmtUtils]: Spent 11.78s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:10:27,485 WARN L232 SmtUtils]: Spent 6.04s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:10:42,062 WARN L232 SmtUtils]: Spent 8.68s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:10:59,199 WARN L232 SmtUtils]: Spent 7.53s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:11:09,712 WARN L232 SmtUtils]: Spent 7.00s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:11:23,195 WARN L232 SmtUtils]: Spent 7.96s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)