/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de42.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 22:58:01,736 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 22:58:01,737 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 22:58:01,762 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-07 22:58:01,792 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-07 22:58:01,816 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 22:58:01,816 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 22:58:01,817 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-07 22:58:01,817 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-07 22:58:01,818 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-07 22:58:01,818 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-07 22:58:01,820 INFO L138 SettingsManager]: * Use SBE=true [2022-04-07 22:58:01,820 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 22:58:01,820 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 22:58:01,821 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 22:58:01,821 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 22:58:01,822 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:58:01,822 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 22:58:01,822 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-07 22:58:01,822 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-07 22:58:01,822 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 22:58:01,822 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-07 22:58:01,822 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-07 22:58:01,822 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-07 22:58:01,822 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-07 22:58:01,823 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 22:58:01,823 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 22:58:01,977 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 22:58:01,999 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 22:58:02,000 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 22:58:02,001 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 22:58:02,019 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 22:58:02,020 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de42.c [2022-04-07 22:58:02,070 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/16705e195/1d00fa7681b4423c8adb1fd4ff9075cc/FLAGa4c4d0ffb [2022-04-07 22:58:02,353 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 22:58:02,354 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c [2022-04-07 22:58:02,357 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/16705e195/1d00fa7681b4423c8adb1fd4ff9075cc/FLAGa4c4d0ffb [2022-04-07 22:58:02,792 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/16705e195/1d00fa7681b4423c8adb1fd4ff9075cc [2022-04-07 22:58:02,794 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 22:58:02,795 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 22:58:02,796 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 22:58:02,796 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 22:58:02,802 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 22:58:02,803 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:58:02" (1/1) ... [2022-04-07 22:58:02,803 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@79ebc1d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:02, skipping insertion in model container [2022-04-07 22:58:02,804 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:58:02" (1/1) ... [2022-04-07 22:58:02,808 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 22:58:02,817 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 22:58:02,937 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c[368,381] [2022-04-07 22:58:02,972 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:58:02,979 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 22:58:02,989 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de42.c[368,381] [2022-04-07 22:58:02,997 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:58:03,009 INFO L208 MainTranslator]: Completed translation [2022-04-07 22:58:03,010 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03 WrapperNode [2022-04-07 22:58:03,011 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 22:58:03,012 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 22:58:03,012 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 22:58:03,012 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 22:58:03,020 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,021 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,026 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,026 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,041 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,046 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,050 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,051 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 22:58:03,052 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 22:58:03,052 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 22:58:03,052 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 22:58:03,052 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:58:03,064 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:03,073 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 22:58:03,079 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 22:58:03,101 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 22:58:03,102 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 22:58:03,102 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 22:58:03,102 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 22:58:03,102 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 22:58:03,102 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 22:58:03,102 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 22:58:03,102 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 22:58:03,102 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 22:58:03,102 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 22:58:03,102 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 22:58:03,103 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 22:58:03,103 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 22:58:03,103 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 22:58:03,103 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 22:58:03,103 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 22:58:03,103 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 22:58:03,103 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 22:58:03,146 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 22:58:03,147 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 22:58:03,286 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 22:58:03,291 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 22:58:03,291 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-04-07 22:58:03,293 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:58:03 BoogieIcfgContainer [2022-04-07 22:58:03,293 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 22:58:03,293 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 22:58:03,293 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 22:58:03,307 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 22:58:03,309 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:58:03" (1/1) ... [2022-04-07 22:58:03,311 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-07 22:58:03,344 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:58:03 BasicIcfg [2022-04-07 22:58:03,344 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 22:58:03,346 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 22:58:03,346 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 22:58:03,348 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 22:58:03,348 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 10:58:02" (1/4) ... [2022-04-07 22:58:03,348 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@110534fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:58:03, skipping insertion in model container [2022-04-07 22:58:03,349 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:58:03" (2/4) ... [2022-04-07 22:58:03,349 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@110534fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:58:03, skipping insertion in model container [2022-04-07 22:58:03,349 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:58:03" (3/4) ... [2022-04-07 22:58:03,349 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@110534fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 10:58:03, skipping insertion in model container [2022-04-07 22:58:03,349 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:58:03" (4/4) ... [2022-04-07 22:58:03,350 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de42.cqvasr [2022-04-07 22:58:03,353 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-07 22:58:03,353 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 22:58:03,383 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 22:58:03,388 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 22:58:03,388 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 22:58:03,401 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:58:03,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 22:58:03,405 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:03,405 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:03,405 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:03,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:03,409 INFO L85 PathProgramCache]: Analyzing trace with hash -2015447748, now seen corresponding path program 1 times [2022-04-07 22:58:03,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:03,416 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554702062] [2022-04-07 22:58:03,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:03,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:03,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:03,555 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:03,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:03,587 INFO L290 TraceCheckUtils]: 0: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-07 22:58:03,587 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:58:03,587 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:58:03,593 INFO L272 TraceCheckUtils]: 0: Hoare triple {26#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:03,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-07 22:58:03,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:58:03,595 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:58:03,595 INFO L272 TraceCheckUtils]: 4: Hoare triple {26#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-07 22:58:03,595 INFO L290 TraceCheckUtils]: 5: Hoare triple {26#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26#true} is VALID [2022-04-07 22:58:03,596 INFO L290 TraceCheckUtils]: 6: Hoare triple {26#true} [81] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:58:03,597 INFO L290 TraceCheckUtils]: 7: Hoare triple {27#false} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {27#false} is VALID [2022-04-07 22:58:03,597 INFO L290 TraceCheckUtils]: 8: Hoare triple {27#false} [85] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:58:03,597 INFO L290 TraceCheckUtils]: 9: Hoare triple {27#false} [88] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:58:03,597 INFO L290 TraceCheckUtils]: 10: Hoare triple {27#false} [91] L35-1-->L35-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:58:03,598 INFO L272 TraceCheckUtils]: 11: Hoare triple {27#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {27#false} is VALID [2022-04-07 22:58:03,598 INFO L290 TraceCheckUtils]: 12: Hoare triple {27#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {27#false} is VALID [2022-04-07 22:58:03,598 INFO L290 TraceCheckUtils]: 13: Hoare triple {27#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:58:03,599 INFO L290 TraceCheckUtils]: 14: Hoare triple {27#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-07 22:58:03,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:03,599 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:03,600 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1554702062] [2022-04-07 22:58:03,600 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1554702062] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:58:03,601 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:58:03,601 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 22:58:03,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866597672] [2022-04-07 22:58:03,604 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:58:03,608 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:58:03,609 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:03,612 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,636 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:03,636 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 22:58:03,636 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:03,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 22:58:03,660 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:58:03,662 INFO L87 Difference]: Start difference. First operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:03,739 INFO L93 Difference]: Finished difference Result 39 states and 54 transitions. [2022-04-07 22:58:03,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 22:58:03,740 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:58:03,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:03,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 54 transitions. [2022-04-07 22:58:03,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 54 transitions. [2022-04-07 22:58:03,754 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 54 transitions. [2022-04-07 22:58:03,819 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:03,827 INFO L225 Difference]: With dead ends: 39 [2022-04-07 22:58:03,827 INFO L226 Difference]: Without dead ends: 16 [2022-04-07 22:58:03,830 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:58:03,834 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 17 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:03,835 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 28 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:58:03,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-07 22:58:03,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-07 22:58:03,866 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:03,866 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,867 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,867 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:03,871 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-07 22:58:03,871 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 22:58:03,871 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:03,871 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:03,872 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-07 22:58:03,872 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-07 22:58:03,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:03,874 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-07 22:58:03,874 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 22:58:03,874 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:03,875 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:03,875 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:03,875 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:03,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2022-04-07 22:58:03,881 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 19 transitions. Word has length 15 [2022-04-07 22:58:03,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:03,886 INFO L478 AbstractCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-04-07 22:58:03,886 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:03,886 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-07 22:58:03,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 22:58:03,887 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:03,887 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:03,887 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 22:58:03,887 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:03,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:03,891 INFO L85 PathProgramCache]: Analyzing trace with hash 1389121438, now seen corresponding path program 1 times [2022-04-07 22:58:03,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:03,891 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117291804] [2022-04-07 22:58:03,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:03,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:03,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:04,186 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:04,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:04,193 INFO L290 TraceCheckUtils]: 0: Hoare triple {152#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {140#true} is VALID [2022-04-07 22:58:04,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {140#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:58:04,194 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {140#true} {140#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:58:04,194 INFO L272 TraceCheckUtils]: 0: Hoare triple {140#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {152#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:04,194 INFO L290 TraceCheckUtils]: 1: Hoare triple {152#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {140#true} is VALID [2022-04-07 22:58:04,195 INFO L290 TraceCheckUtils]: 2: Hoare triple {140#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:58:04,195 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {140#true} {140#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:58:04,195 INFO L272 TraceCheckUtils]: 4: Hoare triple {140#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-07 22:58:04,195 INFO L290 TraceCheckUtils]: 5: Hoare triple {140#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {145#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-07 22:58:04,196 INFO L290 TraceCheckUtils]: 6: Hoare triple {145#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:04,202 INFO L290 TraceCheckUtils]: 7: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {147#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} is VALID [2022-04-07 22:58:04,203 INFO L290 TraceCheckUtils]: 8: Hoare triple {147#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {148#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:04,204 INFO L290 TraceCheckUtils]: 9: Hoare triple {148#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {148#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:04,205 INFO L290 TraceCheckUtils]: 10: Hoare triple {148#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {149#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:04,206 INFO L272 TraceCheckUtils]: 11: Hoare triple {149#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {150#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:58:04,207 INFO L290 TraceCheckUtils]: 12: Hoare triple {150#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {151#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:58:04,207 INFO L290 TraceCheckUtils]: 13: Hoare triple {151#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {141#false} is VALID [2022-04-07 22:58:04,208 INFO L290 TraceCheckUtils]: 14: Hoare triple {141#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#false} is VALID [2022-04-07 22:58:04,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:04,208 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:04,208 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117291804] [2022-04-07 22:58:04,208 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [117291804] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:58:04,208 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:58:04,208 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-04-07 22:58:04,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [898769491] [2022-04-07 22:58:04,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:58:04,209 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:58:04,210 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:04,210 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,224 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:04,224 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 22:58:04,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:04,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 22:58:04,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-07 22:58:04,225 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. Second operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:04,639 INFO L93 Difference]: Finished difference Result 33 states and 42 transitions. [2022-04-07 22:58:04,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 22:58:04,639 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 22:58:04,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:04,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-07 22:58:04,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 42 transitions. [2022-04-07 22:58:04,642 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 42 transitions. [2022-04-07 22:58:04,691 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:04,692 INFO L225 Difference]: With dead ends: 33 [2022-04-07 22:58:04,692 INFO L226 Difference]: Without dead ends: 23 [2022-04-07 22:58:04,692 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=156, Unknown=0, NotChecked=0, Total=210 [2022-04-07 22:58:04,693 INFO L913 BasicCegarLoop]: 13 mSDtfsCounter, 32 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 107 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:04,693 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [32 Valid, 45 Invalid, 107 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:58:04,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-07 22:58:04,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-04-07 22:58:04,698 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:04,699 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,699 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,699 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:04,701 INFO L93 Difference]: Finished difference Result 23 states and 29 transitions. [2022-04-07 22:58:04,701 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 29 transitions. [2022-04-07 22:58:04,702 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:04,702 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:04,702 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-07 22:58:04,703 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-07 22:58:04,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:04,705 INFO L93 Difference]: Finished difference Result 23 states and 29 transitions. [2022-04-07 22:58:04,705 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 29 transitions. [2022-04-07 22:58:04,705 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:04,705 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:04,705 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:04,705 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:04,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 28 transitions. [2022-04-07 22:58:04,708 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 28 transitions. Word has length 15 [2022-04-07 22:58:04,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:04,708 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 28 transitions. [2022-04-07 22:58:04,709 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,709 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 28 transitions. [2022-04-07 22:58:04,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 22:58:04,709 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:04,709 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:04,710 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 22:58:04,710 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:04,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:04,710 INFO L85 PathProgramCache]: Analyzing trace with hash 912799338, now seen corresponding path program 1 times [2022-04-07 22:58:04,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:04,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796871157] [2022-04-07 22:58:04,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:04,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:04,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:04,766 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:04,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:04,776 INFO L290 TraceCheckUtils]: 0: Hoare triple {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-07 22:58:04,777 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:58:04,777 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:58:04,777 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:04,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-07 22:58:04,778 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:58:04,778 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:58:04,778 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:58:04,779 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {296#(= main_~y~0 0)} is VALID [2022-04-07 22:58:04,780 INFO L290 TraceCheckUtils]: 6: Hoare triple {296#(= main_~y~0 0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {296#(= main_~y~0 0)} is VALID [2022-04-07 22:58:04,780 INFO L290 TraceCheckUtils]: 7: Hoare triple {296#(= main_~y~0 0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {296#(= main_~y~0 0)} is VALID [2022-04-07 22:58:04,780 INFO L290 TraceCheckUtils]: 8: Hoare triple {296#(= main_~y~0 0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {296#(= main_~y~0 0)} is VALID [2022-04-07 22:58:04,781 INFO L290 TraceCheckUtils]: 9: Hoare triple {296#(= main_~y~0 0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {292#false} is VALID [2022-04-07 22:58:04,784 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:58:04,784 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:58:04,784 INFO L272 TraceCheckUtils]: 12: Hoare triple {292#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {292#false} is VALID [2022-04-07 22:58:04,785 INFO L290 TraceCheckUtils]: 13: Hoare triple {292#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-07 22:58:04,785 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:58:04,785 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:58:04,785 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:04,785 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:04,785 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796871157] [2022-04-07 22:58:04,785 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1796871157] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:58:04,786 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:58:04,786 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 22:58:04,786 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1134861067] [2022-04-07 22:58:04,786 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:58:04,786 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:58:04,786 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:04,786 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,801 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:04,801 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 22:58:04,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:04,802 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 22:58:04,802 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 22:58:04,802 INFO L87 Difference]: Start difference. First operand 22 states and 28 transitions. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:04,858 INFO L93 Difference]: Finished difference Result 33 states and 43 transitions. [2022-04-07 22:58:04,858 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 22:58:04,858 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:58:04,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:04,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 37 transitions. [2022-04-07 22:58:04,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 37 transitions. [2022-04-07 22:58:04,860 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 37 transitions. [2022-04-07 22:58:04,885 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:04,886 INFO L225 Difference]: With dead ends: 33 [2022-04-07 22:58:04,886 INFO L226 Difference]: Without dead ends: 23 [2022-04-07 22:58:04,886 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:58:04,887 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 24 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:04,888 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 23 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:58:04,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-07 22:58:04,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 21. [2022-04-07 22:58:04,896 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:04,896 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,897 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,897 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:04,902 INFO L93 Difference]: Finished difference Result 23 states and 29 transitions. [2022-04-07 22:58:04,902 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 29 transitions. [2022-04-07 22:58:04,903 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:04,903 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:04,903 INFO L74 IsIncluded]: Start isIncluded. First operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-07 22:58:04,903 INFO L87 Difference]: Start difference. First operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-07 22:58:04,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:04,905 INFO L93 Difference]: Finished difference Result 23 states and 29 transitions. [2022-04-07 22:58:04,905 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 29 transitions. [2022-04-07 22:58:04,905 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:04,905 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:04,905 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:04,905 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:04,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 16 states have (on average 1.375) internal successors, (22), 16 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 26 transitions. [2022-04-07 22:58:04,907 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 26 transitions. Word has length 16 [2022-04-07 22:58:04,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:04,907 INFO L478 AbstractCegarLoop]: Abstraction has 21 states and 26 transitions. [2022-04-07 22:58:04,907 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,907 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 26 transitions. [2022-04-07 22:58:04,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 22:58:04,908 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:04,909 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:04,909 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-07 22:58:04,909 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:04,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:04,909 INFO L85 PathProgramCache]: Analyzing trace with hash -894405051, now seen corresponding path program 1 times [2022-04-07 22:58:04,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:04,910 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [618935337] [2022-04-07 22:58:04,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:04,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:04,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:04,950 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:04,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:04,957 INFO L290 TraceCheckUtils]: 0: Hoare triple {434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {427#true} is VALID [2022-04-07 22:58:04,958 INFO L290 TraceCheckUtils]: 1: Hoare triple {427#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {427#true} is VALID [2022-04-07 22:58:04,958 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {427#true} {427#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {427#true} is VALID [2022-04-07 22:58:04,958 INFO L272 TraceCheckUtils]: 0: Hoare triple {427#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:04,959 INFO L290 TraceCheckUtils]: 1: Hoare triple {434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {427#true} is VALID [2022-04-07 22:58:04,959 INFO L290 TraceCheckUtils]: 2: Hoare triple {427#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {427#true} is VALID [2022-04-07 22:58:04,959 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {427#true} {427#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {427#true} is VALID [2022-04-07 22:58:04,959 INFO L272 TraceCheckUtils]: 4: Hoare triple {427#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {427#true} is VALID [2022-04-07 22:58:04,960 INFO L290 TraceCheckUtils]: 5: Hoare triple {427#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {432#(= main_~y~0 0)} is VALID [2022-04-07 22:58:04,965 INFO L290 TraceCheckUtils]: 6: Hoare triple {432#(= main_~y~0 0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {432#(= main_~y~0 0)} is VALID [2022-04-07 22:58:04,966 INFO L290 TraceCheckUtils]: 7: Hoare triple {432#(= main_~y~0 0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {433#(= main_~z~0 0)} is VALID [2022-04-07 22:58:04,966 INFO L290 TraceCheckUtils]: 8: Hoare triple {433#(= main_~z~0 0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {428#false} is VALID [2022-04-07 22:58:04,966 INFO L290 TraceCheckUtils]: 9: Hoare triple {428#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {428#false} is VALID [2022-04-07 22:58:04,966 INFO L290 TraceCheckUtils]: 10: Hoare triple {428#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {428#false} is VALID [2022-04-07 22:58:04,966 INFO L290 TraceCheckUtils]: 11: Hoare triple {428#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {428#false} is VALID [2022-04-07 22:58:04,967 INFO L272 TraceCheckUtils]: 12: Hoare triple {428#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {428#false} is VALID [2022-04-07 22:58:04,967 INFO L290 TraceCheckUtils]: 13: Hoare triple {428#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {428#false} is VALID [2022-04-07 22:58:04,967 INFO L290 TraceCheckUtils]: 14: Hoare triple {428#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {428#false} is VALID [2022-04-07 22:58:04,967 INFO L290 TraceCheckUtils]: 15: Hoare triple {428#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {428#false} is VALID [2022-04-07 22:58:04,967 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:04,967 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:04,968 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [618935337] [2022-04-07 22:58:04,968 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [618935337] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:58:04,968 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:58:04,968 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 22:58:04,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1096035323] [2022-04-07 22:58:04,968 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:58:04,968 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:58:04,968 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:04,968 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:04,977 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:04,977 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 22:58:04,978 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:04,978 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 22:58:04,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:58:04,978 INFO L87 Difference]: Start difference. First operand 21 states and 26 transitions. Second operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:05,059 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions. [2022-04-07 22:58:05,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 22:58:05,060 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:58:05,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:05,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 32 transitions. [2022-04-07 22:58:05,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 32 transitions. [2022-04-07 22:58:05,062 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 32 transitions. [2022-04-07 22:58:05,090 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:05,090 INFO L225 Difference]: With dead ends: 27 [2022-04-07 22:58:05,090 INFO L226 Difference]: Without dead ends: 17 [2022-04-07 22:58:05,091 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-07 22:58:05,091 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 16 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:05,092 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 29 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:58:05,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-07 22:58:05,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-07 22:58:05,097 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:05,098 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,098 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,098 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:05,099 INFO L93 Difference]: Finished difference Result 17 states and 20 transitions. [2022-04-07 22:58:05,099 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-07 22:58:05,099 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:05,099 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:05,099 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 22:58:05,099 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 22:58:05,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:05,100 INFO L93 Difference]: Finished difference Result 17 states and 20 transitions. [2022-04-07 22:58:05,100 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-07 22:58:05,100 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:05,100 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:05,100 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:05,100 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:05,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 20 transitions. [2022-04-07 22:58:05,101 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 20 transitions. Word has length 16 [2022-04-07 22:58:05,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:05,101 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 20 transitions. [2022-04-07 22:58:05,101 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.4) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,101 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-07 22:58:05,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 22:58:05,102 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:05,102 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:05,102 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-07 22:58:05,102 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:05,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:05,102 INFO L85 PathProgramCache]: Analyzing trace with hash 1590526661, now seen corresponding path program 1 times [2022-04-07 22:58:05,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:05,102 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802211210] [2022-04-07 22:58:05,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:05,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:05,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:05,161 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:05,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:05,165 INFO L290 TraceCheckUtils]: 0: Hoare triple {549#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {541#true} is VALID [2022-04-07 22:58:05,166 INFO L290 TraceCheckUtils]: 1: Hoare triple {541#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,166 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {541#true} {541#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,166 INFO L272 TraceCheckUtils]: 0: Hoare triple {541#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:05,167 INFO L290 TraceCheckUtils]: 1: Hoare triple {549#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {541#true} is VALID [2022-04-07 22:58:05,167 INFO L290 TraceCheckUtils]: 2: Hoare triple {541#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,167 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {541#true} {541#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,167 INFO L272 TraceCheckUtils]: 4: Hoare triple {541#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,167 INFO L290 TraceCheckUtils]: 5: Hoare triple {541#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {546#(= main_~y~0 0)} is VALID [2022-04-07 22:58:05,168 INFO L290 TraceCheckUtils]: 6: Hoare triple {546#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {547#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:05,168 INFO L290 TraceCheckUtils]: 7: Hoare triple {547#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {547#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:05,169 INFO L290 TraceCheckUtils]: 8: Hoare triple {547#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {548#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:05,169 INFO L290 TraceCheckUtils]: 9: Hoare triple {548#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,169 INFO L290 TraceCheckUtils]: 10: Hoare triple {542#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,169 INFO L290 TraceCheckUtils]: 11: Hoare triple {542#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,169 INFO L272 TraceCheckUtils]: 12: Hoare triple {542#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {542#false} is VALID [2022-04-07 22:58:05,170 INFO L290 TraceCheckUtils]: 13: Hoare triple {542#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {542#false} is VALID [2022-04-07 22:58:05,170 INFO L290 TraceCheckUtils]: 14: Hoare triple {542#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,170 INFO L290 TraceCheckUtils]: 15: Hoare triple {542#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,170 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:05,170 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:05,170 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802211210] [2022-04-07 22:58:05,170 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [802211210] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:05,170 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2021060356] [2022-04-07 22:58:05,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:05,171 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:05,171 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:05,175 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:05,176 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 22:58:05,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:05,208 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-07 22:58:05,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:05,229 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:05,480 INFO L272 TraceCheckUtils]: 0: Hoare triple {541#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,480 INFO L290 TraceCheckUtils]: 1: Hoare triple {541#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {541#true} is VALID [2022-04-07 22:58:05,480 INFO L290 TraceCheckUtils]: 2: Hoare triple {541#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,481 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {541#true} {541#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,481 INFO L272 TraceCheckUtils]: 4: Hoare triple {541#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,481 INFO L290 TraceCheckUtils]: 5: Hoare triple {541#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {546#(= main_~y~0 0)} is VALID [2022-04-07 22:58:05,482 INFO L290 TraceCheckUtils]: 6: Hoare triple {546#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {547#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:05,482 INFO L290 TraceCheckUtils]: 7: Hoare triple {547#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {547#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:05,484 INFO L290 TraceCheckUtils]: 8: Hoare triple {547#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {577#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:05,485 INFO L290 TraceCheckUtils]: 9: Hoare triple {577#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,488 INFO L290 TraceCheckUtils]: 10: Hoare triple {542#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,488 INFO L290 TraceCheckUtils]: 11: Hoare triple {542#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,488 INFO L272 TraceCheckUtils]: 12: Hoare triple {542#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {542#false} is VALID [2022-04-07 22:58:05,488 INFO L290 TraceCheckUtils]: 13: Hoare triple {542#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {542#false} is VALID [2022-04-07 22:58:05,488 INFO L290 TraceCheckUtils]: 14: Hoare triple {542#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,489 INFO L290 TraceCheckUtils]: 15: Hoare triple {542#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,489 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:05,489 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:05,570 INFO L290 TraceCheckUtils]: 15: Hoare triple {542#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,570 INFO L290 TraceCheckUtils]: 14: Hoare triple {542#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,570 INFO L290 TraceCheckUtils]: 13: Hoare triple {542#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {542#false} is VALID [2022-04-07 22:58:05,570 INFO L272 TraceCheckUtils]: 12: Hoare triple {542#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {542#false} is VALID [2022-04-07 22:58:05,570 INFO L290 TraceCheckUtils]: 11: Hoare triple {542#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,571 INFO L290 TraceCheckUtils]: 10: Hoare triple {542#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,571 INFO L290 TraceCheckUtils]: 9: Hoare triple {617#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {542#false} is VALID [2022-04-07 22:58:05,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {621#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {617#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:58:05,572 INFO L290 TraceCheckUtils]: 7: Hoare triple {621#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {621#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:58:05,573 INFO L290 TraceCheckUtils]: 6: Hoare triple {628#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {621#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:58:05,573 INFO L290 TraceCheckUtils]: 5: Hoare triple {541#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {628#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:58:05,574 INFO L272 TraceCheckUtils]: 4: Hoare triple {541#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,574 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {541#true} {541#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,574 INFO L290 TraceCheckUtils]: 2: Hoare triple {541#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {541#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {541#true} is VALID [2022-04-07 22:58:05,574 INFO L272 TraceCheckUtils]: 0: Hoare triple {541#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {541#true} is VALID [2022-04-07 22:58:05,574 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:05,574 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2021060356] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:05,574 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:05,575 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-07 22:58:05,575 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86506793] [2022-04-07 22:58:05,575 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:05,575 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:58:05,575 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:05,575 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,590 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:05,590 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-07 22:58:05,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:05,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-07 22:58:05,591 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-07 22:58:05,591 INFO L87 Difference]: Start difference. First operand 17 states and 20 transitions. Second operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:05,870 INFO L93 Difference]: Finished difference Result 43 states and 62 transitions. [2022-04-07 22:58:05,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 22:58:05,870 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:58:05,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:05,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 62 transitions. [2022-04-07 22:58:05,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 62 transitions. [2022-04-07 22:58:05,873 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 62 transitions. [2022-04-07 22:58:05,957 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:05,958 INFO L225 Difference]: With dead ends: 43 [2022-04-07 22:58:05,958 INFO L226 Difference]: Without dead ends: 36 [2022-04-07 22:58:05,959 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2022-04-07 22:58:05,959 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 55 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 98 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:05,959 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [55 Valid, 36 Invalid, 98 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:58:05,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2022-04-07 22:58:05,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 29. [2022-04-07 22:58:05,972 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:05,972 INFO L82 GeneralOperation]: Start isEquivalent. First operand 36 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,972 INFO L74 IsIncluded]: Start isIncluded. First operand 36 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,972 INFO L87 Difference]: Start difference. First operand 36 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:05,973 INFO L93 Difference]: Finished difference Result 36 states and 47 transitions. [2022-04-07 22:58:05,973 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 47 transitions. [2022-04-07 22:58:05,973 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:05,974 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:05,974 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 36 states. [2022-04-07 22:58:05,974 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 36 states. [2022-04-07 22:58:05,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:05,975 INFO L93 Difference]: Finished difference Result 36 states and 47 transitions. [2022-04-07 22:58:05,975 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 47 transitions. [2022-04-07 22:58:05,975 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:05,975 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:05,975 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:05,975 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:05,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2022-04-07 22:58:05,976 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 37 transitions. Word has length 16 [2022-04-07 22:58:05,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:05,976 INFO L478 AbstractCegarLoop]: Abstraction has 29 states and 37 transitions. [2022-04-07 22:58:05,976 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:05,976 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-07 22:58:05,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 22:58:05,977 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:05,977 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:05,996 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:06,194 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:06,194 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:06,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:06,194 INFO L85 PathProgramCache]: Analyzing trace with hash -880154102, now seen corresponding path program 1 times [2022-04-07 22:58:06,194 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:06,194 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463594996] [2022-04-07 22:58:06,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:06,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:06,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:06,248 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:06,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:06,257 INFO L290 TraceCheckUtils]: 0: Hoare triple {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {846#true} is VALID [2022-04-07 22:58:06,257 INFO L290 TraceCheckUtils]: 1: Hoare triple {846#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,257 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {846#true} {846#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,264 INFO L272 TraceCheckUtils]: 0: Hoare triple {846#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:06,265 INFO L290 TraceCheckUtils]: 1: Hoare triple {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {846#true} is VALID [2022-04-07 22:58:06,265 INFO L290 TraceCheckUtils]: 2: Hoare triple {846#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,265 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {846#true} {846#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,265 INFO L272 TraceCheckUtils]: 4: Hoare triple {846#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,265 INFO L290 TraceCheckUtils]: 5: Hoare triple {846#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {846#true} is VALID [2022-04-07 22:58:06,266 INFO L290 TraceCheckUtils]: 6: Hoare triple {846#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,266 INFO L290 TraceCheckUtils]: 7: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,267 INFO L290 TraceCheckUtils]: 8: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,267 INFO L290 TraceCheckUtils]: 9: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,268 INFO L290 TraceCheckUtils]: 10: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,268 INFO L290 TraceCheckUtils]: 11: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,269 INFO L290 TraceCheckUtils]: 12: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,269 INFO L290 TraceCheckUtils]: 13: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,269 INFO L272 TraceCheckUtils]: 14: Hoare triple {847#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {847#false} is VALID [2022-04-07 22:58:06,269 INFO L290 TraceCheckUtils]: 15: Hoare triple {847#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {847#false} is VALID [2022-04-07 22:58:06,269 INFO L290 TraceCheckUtils]: 16: Hoare triple {847#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,269 INFO L290 TraceCheckUtils]: 17: Hoare triple {847#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,270 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:58:06,270 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:06,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1463594996] [2022-04-07 22:58:06,270 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1463594996] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:06,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1067309321] [2022-04-07 22:58:06,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:06,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:06,270 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:06,276 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:06,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:06,312 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 22:58:06,313 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-07 22:58:06,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:06,319 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:06,560 INFO L272 TraceCheckUtils]: 0: Hoare triple {846#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,560 INFO L290 TraceCheckUtils]: 1: Hoare triple {846#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {846#true} is VALID [2022-04-07 22:58:06,560 INFO L290 TraceCheckUtils]: 2: Hoare triple {846#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,560 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {846#true} {846#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,560 INFO L272 TraceCheckUtils]: 4: Hoare triple {846#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,560 INFO L290 TraceCheckUtils]: 5: Hoare triple {846#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {846#true} is VALID [2022-04-07 22:58:06,561 INFO L290 TraceCheckUtils]: 6: Hoare triple {846#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,562 INFO L290 TraceCheckUtils]: 7: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,562 INFO L290 TraceCheckUtils]: 8: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,563 INFO L290 TraceCheckUtils]: 9: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,563 INFO L290 TraceCheckUtils]: 10: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,564 INFO L290 TraceCheckUtils]: 11: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,564 INFO L290 TraceCheckUtils]: 12: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,565 INFO L290 TraceCheckUtils]: 13: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,565 INFO L272 TraceCheckUtils]: 14: Hoare triple {847#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {847#false} is VALID [2022-04-07 22:58:06,565 INFO L290 TraceCheckUtils]: 15: Hoare triple {847#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {847#false} is VALID [2022-04-07 22:58:06,565 INFO L290 TraceCheckUtils]: 16: Hoare triple {847#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,565 INFO L290 TraceCheckUtils]: 17: Hoare triple {847#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,565 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:58:06,565 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:06,781 INFO L290 TraceCheckUtils]: 17: Hoare triple {847#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,781 INFO L290 TraceCheckUtils]: 16: Hoare triple {847#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,781 INFO L290 TraceCheckUtils]: 15: Hoare triple {847#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {847#false} is VALID [2022-04-07 22:58:06,781 INFO L272 TraceCheckUtils]: 14: Hoare triple {847#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {847#false} is VALID [2022-04-07 22:58:06,782 INFO L290 TraceCheckUtils]: 13: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {847#false} is VALID [2022-04-07 22:58:06,782 INFO L290 TraceCheckUtils]: 12: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,783 INFO L290 TraceCheckUtils]: 11: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,787 INFO L290 TraceCheckUtils]: 10: Hoare triple {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,789 INFO L290 TraceCheckUtils]: 9: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {852#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:58:06,790 INFO L290 TraceCheckUtils]: 8: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,790 INFO L290 TraceCheckUtils]: 7: Hoare triple {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,791 INFO L290 TraceCheckUtils]: 6: Hoare triple {846#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {851#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:06,791 INFO L290 TraceCheckUtils]: 5: Hoare triple {846#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {846#true} is VALID [2022-04-07 22:58:06,791 INFO L272 TraceCheckUtils]: 4: Hoare triple {846#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,791 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {846#true} {846#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,791 INFO L290 TraceCheckUtils]: 2: Hoare triple {846#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,791 INFO L290 TraceCheckUtils]: 1: Hoare triple {846#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {846#true} is VALID [2022-04-07 22:58:06,791 INFO L272 TraceCheckUtils]: 0: Hoare triple {846#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {846#true} is VALID [2022-04-07 22:58:06,792 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:58:06,792 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1067309321] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:06,792 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:06,792 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-07 22:58:06,792 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479564794] [2022-04-07 22:58:06,792 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:06,792 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 22:58:06,792 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:06,793 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:06,806 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:06,807 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 22:58:06,807 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:06,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 22:58:06,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:58:06,807 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:06,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:06,946 INFO L93 Difference]: Finished difference Result 45 states and 60 transitions. [2022-04-07 22:58:06,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 22:58:06,946 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 22:58:06,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:06,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:06,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-07 22:58:06,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:06,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-07 22:58:06,948 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 36 transitions. [2022-04-07 22:58:06,979 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:06,981 INFO L225 Difference]: With dead ends: 45 [2022-04-07 22:58:06,981 INFO L226 Difference]: Without dead ends: 40 [2022-04-07 22:58:06,981 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 34 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-07 22:58:06,982 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:06,982 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 30 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:58:06,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-07 22:58:07,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 38. [2022-04-07 22:58:07,013 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:07,014 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:07,014 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:07,014 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:07,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:07,016 INFO L93 Difference]: Finished difference Result 40 states and 55 transitions. [2022-04-07 22:58:07,016 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 55 transitions. [2022-04-07 22:58:07,018 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:07,019 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:07,019 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40 states. [2022-04-07 22:58:07,019 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40 states. [2022-04-07 22:58:07,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:07,021 INFO L93 Difference]: Finished difference Result 40 states and 55 transitions. [2022-04-07 22:58:07,021 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 55 transitions. [2022-04-07 22:58:07,022 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:07,022 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:07,022 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:07,022 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:07,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:07,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 51 transitions. [2022-04-07 22:58:07,024 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 51 transitions. Word has length 18 [2022-04-07 22:58:07,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:07,025 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 51 transitions. [2022-04-07 22:58:07,026 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:07,026 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 51 transitions. [2022-04-07 22:58:07,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:58:07,026 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:07,026 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:07,049 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:07,231 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-04-07 22:58:07,232 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:07,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:07,232 INFO L85 PathProgramCache]: Analyzing trace with hash -1488252743, now seen corresponding path program 1 times [2022-04-07 22:58:07,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:07,232 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285669305] [2022-04-07 22:58:07,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:07,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:07,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:07,453 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:07,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:07,468 INFO L290 TraceCheckUtils]: 0: Hoare triple {1184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1170#true} is VALID [2022-04-07 22:58:07,468 INFO L290 TraceCheckUtils]: 1: Hoare triple {1170#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:07,468 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1170#true} {1170#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:07,469 INFO L272 TraceCheckUtils]: 0: Hoare triple {1170#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:07,469 INFO L290 TraceCheckUtils]: 1: Hoare triple {1184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1170#true} is VALID [2022-04-07 22:58:07,469 INFO L290 TraceCheckUtils]: 2: Hoare triple {1170#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:07,469 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1170#true} {1170#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:07,469 INFO L272 TraceCheckUtils]: 4: Hoare triple {1170#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:07,470 INFO L290 TraceCheckUtils]: 5: Hoare triple {1170#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1175#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:58:07,471 INFO L290 TraceCheckUtils]: 6: Hoare triple {1175#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1176#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} is VALID [2022-04-07 22:58:07,471 INFO L290 TraceCheckUtils]: 7: Hoare triple {1176#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1177#(and (<= (+ main_~y~0 (* 8589934592 (div main_~x~0 4294967296)) 1) (* main_~n~0 2)) (<= main_~n~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 1)) (<= 1 main_~y~0))} is VALID [2022-04-07 22:58:07,472 INFO L290 TraceCheckUtils]: 8: Hoare triple {1177#(and (<= (+ main_~y~0 (* 8589934592 (div main_~x~0 4294967296)) 1) (* main_~n~0 2)) (<= main_~n~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 1)) (<= 1 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1178#(and (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296)) 1) (* main_~n~0 2)) (<= 1 main_~z~0) (<= main_~n~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 1)))} is VALID [2022-04-07 22:58:07,475 INFO L290 TraceCheckUtils]: 9: Hoare triple {1178#(and (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296)) 1) (* main_~n~0 2)) (<= 1 main_~z~0) (<= main_~n~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1179#(and (<= main_~n~0 (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 1)) (<= 0 main_~z~0))} is VALID [2022-04-07 22:58:07,475 INFO L290 TraceCheckUtils]: 10: Hoare triple {1179#(and (<= main_~n~0 (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 1)) (<= 0 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1179#(and (<= main_~n~0 (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 1)) (<= 0 main_~z~0))} is VALID [2022-04-07 22:58:07,476 INFO L290 TraceCheckUtils]: 11: Hoare triple {1179#(and (<= main_~n~0 (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 1)) (<= 0 main_~z~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1180#(and (<= main_~n~0 (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 1)) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:07,477 INFO L290 TraceCheckUtils]: 12: Hoare triple {1180#(and (<= main_~n~0 (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 1)) (<= 1 main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1180#(and (<= main_~n~0 (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 1)) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:07,481 INFO L290 TraceCheckUtils]: 13: Hoare triple {1180#(and (<= main_~n~0 (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 1)) (<= 1 main_~z~0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1181#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:07,481 INFO L290 TraceCheckUtils]: 14: Hoare triple {1181#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1181#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:07,483 INFO L272 TraceCheckUtils]: 15: Hoare triple {1181#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1182#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:58:07,483 INFO L290 TraceCheckUtils]: 16: Hoare triple {1182#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1183#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:58:07,484 INFO L290 TraceCheckUtils]: 17: Hoare triple {1183#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1171#false} is VALID [2022-04-07 22:58:07,484 INFO L290 TraceCheckUtils]: 18: Hoare triple {1171#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1171#false} is VALID [2022-04-07 22:58:07,484 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:07,484 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:07,484 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285669305] [2022-04-07 22:58:07,484 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1285669305] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:07,484 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [609168355] [2022-04-07 22:58:07,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:07,485 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:07,485 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:07,485 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:07,488 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 22:58:07,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:07,531 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-07 22:58:07,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:07,542 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:09,044 INFO L272 TraceCheckUtils]: 0: Hoare triple {1170#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:09,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {1170#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1170#true} is VALID [2022-04-07 22:58:09,044 INFO L290 TraceCheckUtils]: 2: Hoare triple {1170#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:09,044 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1170#true} {1170#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:09,044 INFO L272 TraceCheckUtils]: 4: Hoare triple {1170#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:09,045 INFO L290 TraceCheckUtils]: 5: Hoare triple {1170#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1175#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:58:09,045 INFO L290 TraceCheckUtils]: 6: Hoare triple {1175#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1176#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} is VALID [2022-04-07 22:58:09,046 INFO L290 TraceCheckUtils]: 7: Hoare triple {1176#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1209#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} is VALID [2022-04-07 22:58:09,046 INFO L290 TraceCheckUtils]: 8: Hoare triple {1209#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1213#(and (<= (+ (* main_~x~0 2) main_~z~0 1) (* main_~n~0 2)) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:09,049 INFO L290 TraceCheckUtils]: 9: Hoare triple {1213#(and (<= (+ (* main_~x~0 2) main_~z~0 1) (* main_~n~0 2)) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1217#(and (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~n~0 main_~x~0) (<= 0 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} is VALID [2022-04-07 22:58:09,049 INFO L290 TraceCheckUtils]: 10: Hoare triple {1217#(and (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~n~0 main_~x~0) (<= 0 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1217#(and (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~n~0 main_~x~0) (<= 0 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} is VALID [2022-04-07 22:58:09,050 INFO L290 TraceCheckUtils]: 11: Hoare triple {1217#(and (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~n~0 main_~x~0) (<= 0 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1224#(and (<= (+ (* main_~x~0 2) main_~z~0) (+ (* main_~n~0 2) 1)) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~n~0 main_~x~0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:09,050 INFO L290 TraceCheckUtils]: 12: Hoare triple {1224#(and (<= (+ (* main_~x~0 2) main_~z~0) (+ (* main_~n~0 2) 1)) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~n~0 main_~x~0) (<= 1 main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1224#(and (<= (+ (* main_~x~0 2) main_~z~0) (+ (* main_~n~0 2) 1)) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~n~0 main_~x~0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:09,051 INFO L290 TraceCheckUtils]: 13: Hoare triple {1224#(and (<= (+ (* main_~x~0 2) main_~z~0) (+ (* main_~n~0 2) 1)) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~n~0 main_~x~0) (<= 1 main_~z~0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1231#(and (<= (mod main_~x~0 4294967296) 0) (<= main_~n~0 (+ main_~x~0 1)) (<= 2 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} is VALID [2022-04-07 22:58:09,053 INFO L290 TraceCheckUtils]: 14: Hoare triple {1231#(and (<= (mod main_~x~0 4294967296) 0) (<= main_~n~0 (+ main_~x~0 1)) (<= 2 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1235#(and (<= (div (+ (* (- 1) main_~n~0) 1) (- 4294967296)) (div (+ (div (* (- 1) main_~z~0) 2) main_~n~0) 4294967296)) (<= 2 main_~z~0))} is VALID [2022-04-07 22:58:09,148 INFO L272 TraceCheckUtils]: 15: Hoare triple {1235#(and (<= (div (+ (* (- 1) main_~n~0) 1) (- 4294967296)) (div (+ (div (* (- 1) main_~z~0) 2) main_~n~0) 4294967296)) (<= 2 main_~z~0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1239#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:58:09,149 INFO L290 TraceCheckUtils]: 16: Hoare triple {1239#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1243#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:58:09,149 INFO L290 TraceCheckUtils]: 17: Hoare triple {1243#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1171#false} is VALID [2022-04-07 22:58:09,150 INFO L290 TraceCheckUtils]: 18: Hoare triple {1171#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1171#false} is VALID [2022-04-07 22:58:09,150 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:09,150 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:09,747 INFO L290 TraceCheckUtils]: 18: Hoare triple {1171#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1171#false} is VALID [2022-04-07 22:58:09,747 INFO L290 TraceCheckUtils]: 17: Hoare triple {1243#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1171#false} is VALID [2022-04-07 22:58:09,748 INFO L290 TraceCheckUtils]: 16: Hoare triple {1239#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1243#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:58:09,749 INFO L272 TraceCheckUtils]: 15: Hoare triple {1181#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1239#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:58:09,750 INFO L290 TraceCheckUtils]: 14: Hoare triple {1262#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1181#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:09,751 INFO L290 TraceCheckUtils]: 13: Hoare triple {1266#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {1262#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:58:09,752 INFO L290 TraceCheckUtils]: 12: Hoare triple {1266#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1266#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} is VALID [2022-04-07 22:58:09,753 INFO L290 TraceCheckUtils]: 11: Hoare triple {1273#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1266#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} is VALID [2022-04-07 22:58:09,754 INFO L290 TraceCheckUtils]: 10: Hoare triple {1273#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1273#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 22:58:09,755 INFO L290 TraceCheckUtils]: 9: Hoare triple {1280#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))) (< 0 (mod main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1273#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 22:58:09,756 INFO L290 TraceCheckUtils]: 8: Hoare triple {1284#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 1) (+ (* (div (+ main_~y~0 1) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 1) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2))) (< 0 (mod main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1280#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:58:09,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {1284#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 1) (+ (* (div (+ main_~y~0 1) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 1) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2))) (< 0 (mod main_~x~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1284#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 1) (+ (* (div (+ main_~y~0 1) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 1) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:58:09,758 INFO L290 TraceCheckUtils]: 6: Hoare triple {1291#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1284#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 1) (+ (* (div (+ main_~y~0 1) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 1) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:58:09,759 INFO L290 TraceCheckUtils]: 5: Hoare triple {1170#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1291#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3))))} is VALID [2022-04-07 22:58:09,759 INFO L272 TraceCheckUtils]: 4: Hoare triple {1170#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:09,759 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1170#true} {1170#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:09,760 INFO L290 TraceCheckUtils]: 2: Hoare triple {1170#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:09,760 INFO L290 TraceCheckUtils]: 1: Hoare triple {1170#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1170#true} is VALID [2022-04-07 22:58:09,760 INFO L272 TraceCheckUtils]: 0: Hoare triple {1170#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1170#true} is VALID [2022-04-07 22:58:09,760 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:09,760 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [609168355] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:09,760 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:09,760 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 11] total 26 [2022-04-07 22:58:09,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1737390757] [2022-04-07 22:58:09,761 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:09,761 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.44) internal successors, (36), 23 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:58:09,761 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:09,761 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.44) internal successors, (36), 23 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:09,896 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:09,896 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 22:58:09,896 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:09,897 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 22:58:09,897 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=558, Unknown=0, NotChecked=0, Total=650 [2022-04-07 22:58:09,897 INFO L87 Difference]: Start difference. First operand 38 states and 51 transitions. Second operand has 26 states, 25 states have (on average 1.44) internal successors, (36), 23 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:11,183 INFO L93 Difference]: Finished difference Result 52 states and 69 transitions. [2022-04-07 22:58:11,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-07 22:58:11,184 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.44) internal successors, (36), 23 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:58:11,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:11,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.44) internal successors, (36), 23 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 52 transitions. [2022-04-07 22:58:11,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.44) internal successors, (36), 23 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 52 transitions. [2022-04-07 22:58:11,186 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 52 transitions. [2022-04-07 22:58:11,281 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:11,281 INFO L225 Difference]: With dead ends: 52 [2022-04-07 22:58:11,281 INFO L226 Difference]: Without dead ends: 33 [2022-04-07 22:58:11,282 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 22 SyntacticMatches, 4 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=192, Invalid=1140, Unknown=0, NotChecked=0, Total=1332 [2022-04-07 22:58:11,282 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 49 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 270 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 306 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:11,283 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [49 Valid, 79 Invalid, 306 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 270 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-07 22:58:11,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-04-07 22:58:11,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2022-04-07 22:58:11,301 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:11,301 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,302 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,302 INFO L87 Difference]: Start difference. First operand 33 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:11,303 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2022-04-07 22:58:11,303 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2022-04-07 22:58:11,303 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:11,303 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:11,303 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-07 22:58:11,303 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-07 22:58:11,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:11,304 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2022-04-07 22:58:11,304 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2022-04-07 22:58:11,304 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:11,304 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:11,304 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:11,304 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:11,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 44 transitions. [2022-04-07 22:58:11,305 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 44 transitions. Word has length 19 [2022-04-07 22:58:11,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:11,305 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 44 transitions. [2022-04-07 22:58:11,305 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.44) internal successors, (36), 23 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:11,305 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 44 transitions. [2022-04-07 22:58:11,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:58:11,306 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:11,306 INFO L499 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:11,324 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:11,519 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:11,519 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:11,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:11,520 INFO L85 PathProgramCache]: Analyzing trace with hash -485269154, now seen corresponding path program 2 times [2022-04-07 22:58:11,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:11,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327275521] [2022-04-07 22:58:11,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:11,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:11,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:11,609 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:11,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:11,614 INFO L290 TraceCheckUtils]: 0: Hoare triple {1536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1525#true} is VALID [2022-04-07 22:58:11,614 INFO L290 TraceCheckUtils]: 1: Hoare triple {1525#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,614 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1525#true} {1525#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,615 INFO L272 TraceCheckUtils]: 0: Hoare triple {1525#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:11,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {1536#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1525#true} is VALID [2022-04-07 22:58:11,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {1525#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1525#true} {1525#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,615 INFO L272 TraceCheckUtils]: 4: Hoare triple {1525#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,616 INFO L290 TraceCheckUtils]: 5: Hoare triple {1525#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1530#(= main_~y~0 0)} is VALID [2022-04-07 22:58:11,618 INFO L290 TraceCheckUtils]: 6: Hoare triple {1530#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1531#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:11,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {1531#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1532#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:11,620 INFO L290 TraceCheckUtils]: 8: Hoare triple {1532#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1533#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:11,620 INFO L290 TraceCheckUtils]: 9: Hoare triple {1533#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1534#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:58:11,621 INFO L290 TraceCheckUtils]: 10: Hoare triple {1534#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1534#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:58:11,621 INFO L290 TraceCheckUtils]: 11: Hoare triple {1534#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1535#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:58:11,622 INFO L290 TraceCheckUtils]: 12: Hoare triple {1535#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,622 INFO L290 TraceCheckUtils]: 13: Hoare triple {1526#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,622 INFO L290 TraceCheckUtils]: 14: Hoare triple {1526#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,622 INFO L272 TraceCheckUtils]: 15: Hoare triple {1526#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1526#false} is VALID [2022-04-07 22:58:11,622 INFO L290 TraceCheckUtils]: 16: Hoare triple {1526#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1526#false} is VALID [2022-04-07 22:58:11,622 INFO L290 TraceCheckUtils]: 17: Hoare triple {1526#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,622 INFO L290 TraceCheckUtils]: 18: Hoare triple {1526#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,622 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:11,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:11,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327275521] [2022-04-07 22:58:11,623 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [327275521] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:11,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [850607246] [2022-04-07 22:58:11,623 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:58:11,623 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:11,623 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:11,624 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:11,625 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 22:58:11,652 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:58:11,652 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:11,653 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-07 22:58:11,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:11,666 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:11,857 INFO L272 TraceCheckUtils]: 0: Hoare triple {1525#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,857 INFO L290 TraceCheckUtils]: 1: Hoare triple {1525#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1525#true} is VALID [2022-04-07 22:58:11,857 INFO L290 TraceCheckUtils]: 2: Hoare triple {1525#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,857 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1525#true} {1525#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,857 INFO L272 TraceCheckUtils]: 4: Hoare triple {1525#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:11,858 INFO L290 TraceCheckUtils]: 5: Hoare triple {1525#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1530#(= main_~y~0 0)} is VALID [2022-04-07 22:58:11,858 INFO L290 TraceCheckUtils]: 6: Hoare triple {1530#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1531#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:11,859 INFO L290 TraceCheckUtils]: 7: Hoare triple {1531#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1532#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:11,859 INFO L290 TraceCheckUtils]: 8: Hoare triple {1532#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1533#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:58:11,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {1533#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1534#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:58:11,860 INFO L290 TraceCheckUtils]: 10: Hoare triple {1534#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1534#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:58:11,860 INFO L290 TraceCheckUtils]: 11: Hoare triple {1534#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1573#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:58:11,861 INFO L290 TraceCheckUtils]: 12: Hoare triple {1573#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,861 INFO L290 TraceCheckUtils]: 13: Hoare triple {1526#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,861 INFO L290 TraceCheckUtils]: 14: Hoare triple {1526#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,861 INFO L272 TraceCheckUtils]: 15: Hoare triple {1526#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1526#false} is VALID [2022-04-07 22:58:11,861 INFO L290 TraceCheckUtils]: 16: Hoare triple {1526#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1526#false} is VALID [2022-04-07 22:58:11,861 INFO L290 TraceCheckUtils]: 17: Hoare triple {1526#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,861 INFO L290 TraceCheckUtils]: 18: Hoare triple {1526#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:11,861 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:11,861 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:12,001 INFO L290 TraceCheckUtils]: 18: Hoare triple {1526#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:12,001 INFO L290 TraceCheckUtils]: 17: Hoare triple {1526#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:12,002 INFO L290 TraceCheckUtils]: 16: Hoare triple {1526#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1526#false} is VALID [2022-04-07 22:58:12,002 INFO L272 TraceCheckUtils]: 15: Hoare triple {1526#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1526#false} is VALID [2022-04-07 22:58:12,002 INFO L290 TraceCheckUtils]: 14: Hoare triple {1526#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:12,002 INFO L290 TraceCheckUtils]: 13: Hoare triple {1526#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:12,002 INFO L290 TraceCheckUtils]: 12: Hoare triple {1613#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {1526#false} is VALID [2022-04-07 22:58:12,002 INFO L290 TraceCheckUtils]: 11: Hoare triple {1617#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {1613#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:58:12,003 INFO L290 TraceCheckUtils]: 10: Hoare triple {1617#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1617#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:58:12,003 INFO L290 TraceCheckUtils]: 9: Hoare triple {1624#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1617#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:58:12,004 INFO L290 TraceCheckUtils]: 8: Hoare triple {1628#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1624#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:58:12,005 INFO L290 TraceCheckUtils]: 7: Hoare triple {1632#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1628#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:58:12,005 INFO L290 TraceCheckUtils]: 6: Hoare triple {1636#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1632#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:58:12,006 INFO L290 TraceCheckUtils]: 5: Hoare triple {1525#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1636#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:58:12,006 INFO L272 TraceCheckUtils]: 4: Hoare triple {1525#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:12,006 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1525#true} {1525#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:12,006 INFO L290 TraceCheckUtils]: 2: Hoare triple {1525#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:12,006 INFO L290 TraceCheckUtils]: 1: Hoare triple {1525#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1525#true} is VALID [2022-04-07 22:58:12,006 INFO L272 TraceCheckUtils]: 0: Hoare triple {1525#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1525#true} is VALID [2022-04-07 22:58:12,006 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:12,006 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [850607246] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:12,006 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:12,006 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-07 22:58:12,007 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464967115] [2022-04-07 22:58:12,007 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:12,007 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:58:12,007 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:12,007 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:12,026 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:12,027 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 22:58:12,027 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:12,027 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 22:58:12,027 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2022-04-07 22:58:12,027 INFO L87 Difference]: Start difference. First operand 32 states and 44 transitions. Second operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:13,222 INFO L93 Difference]: Finished difference Result 112 states and 185 transitions. [2022-04-07 22:58:13,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-07 22:58:13,222 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:58:13,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:13,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 116 transitions. [2022-04-07 22:58:13,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 116 transitions. [2022-04-07 22:58:13,226 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 116 transitions. [2022-04-07 22:58:13,357 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 116 edges. 116 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:13,363 INFO L225 Difference]: With dead ends: 112 [2022-04-07 22:58:13,363 INFO L226 Difference]: Without dead ends: 101 [2022-04-07 22:58:13,364 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=391, Invalid=1091, Unknown=0, NotChecked=0, Total=1482 [2022-04-07 22:58:13,364 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 176 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 198 mSolverCounterSat, 127 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 176 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 325 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 127 IncrementalHoareTripleChecker+Valid, 198 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:13,364 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [176 Valid, 55 Invalid, 325 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [127 Valid, 198 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 22:58:13,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-04-07 22:58:13,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 59. [2022-04-07 22:58:13,418 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:13,419 INFO L82 GeneralOperation]: Start isEquivalent. First operand 101 states. Second operand has 59 states, 54 states have (on average 1.4444444444444444) internal successors, (78), 54 states have internal predecessors, (78), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,419 INFO L74 IsIncluded]: Start isIncluded. First operand 101 states. Second operand has 59 states, 54 states have (on average 1.4444444444444444) internal successors, (78), 54 states have internal predecessors, (78), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,419 INFO L87 Difference]: Start difference. First operand 101 states. Second operand has 59 states, 54 states have (on average 1.4444444444444444) internal successors, (78), 54 states have internal predecessors, (78), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:13,421 INFO L93 Difference]: Finished difference Result 101 states and 145 transitions. [2022-04-07 22:58:13,421 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 145 transitions. [2022-04-07 22:58:13,421 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:13,421 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:13,422 INFO L74 IsIncluded]: Start isIncluded. First operand has 59 states, 54 states have (on average 1.4444444444444444) internal successors, (78), 54 states have internal predecessors, (78), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 101 states. [2022-04-07 22:58:13,422 INFO L87 Difference]: Start difference. First operand has 59 states, 54 states have (on average 1.4444444444444444) internal successors, (78), 54 states have internal predecessors, (78), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 101 states. [2022-04-07 22:58:13,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:13,424 INFO L93 Difference]: Finished difference Result 101 states and 145 transitions. [2022-04-07 22:58:13,424 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 145 transitions. [2022-04-07 22:58:13,424 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:13,424 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:13,424 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:13,424 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:13,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 54 states have (on average 1.4444444444444444) internal successors, (78), 54 states have internal predecessors, (78), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 82 transitions. [2022-04-07 22:58:13,425 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 82 transitions. Word has length 19 [2022-04-07 22:58:13,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:13,425 INFO L478 AbstractCegarLoop]: Abstraction has 59 states and 82 transitions. [2022-04-07 22:58:13,425 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,426 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 82 transitions. [2022-04-07 22:58:13,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-07 22:58:13,426 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:13,426 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:13,445 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:13,635 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:13,635 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:13,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:13,636 INFO L85 PathProgramCache]: Analyzing trace with hash 1850387710, now seen corresponding path program 2 times [2022-04-07 22:58:13,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:13,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1277643687] [2022-04-07 22:58:13,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:13,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:13,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:13,718 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:13,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:13,723 INFO L290 TraceCheckUtils]: 0: Hoare triple {2165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2155#true} is VALID [2022-04-07 22:58:13,723 INFO L290 TraceCheckUtils]: 1: Hoare triple {2155#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,724 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2155#true} {2155#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,725 INFO L272 TraceCheckUtils]: 0: Hoare triple {2155#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:13,725 INFO L290 TraceCheckUtils]: 1: Hoare triple {2165#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2155#true} is VALID [2022-04-07 22:58:13,725 INFO L290 TraceCheckUtils]: 2: Hoare triple {2155#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,725 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2155#true} {2155#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,725 INFO L272 TraceCheckUtils]: 4: Hoare triple {2155#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,725 INFO L290 TraceCheckUtils]: 5: Hoare triple {2155#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2160#(= main_~y~0 0)} is VALID [2022-04-07 22:58:13,726 INFO L290 TraceCheckUtils]: 6: Hoare triple {2160#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2161#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:13,726 INFO L290 TraceCheckUtils]: 7: Hoare triple {2161#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:13,727 INFO L290 TraceCheckUtils]: 8: Hoare triple {2162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:13,727 INFO L290 TraceCheckUtils]: 9: Hoare triple {2162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {2163#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:58:13,728 INFO L290 TraceCheckUtils]: 10: Hoare triple {2163#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2164#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:13,728 INFO L290 TraceCheckUtils]: 11: Hoare triple {2164#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,728 INFO L290 TraceCheckUtils]: 12: Hoare triple {2156#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2156#false} is VALID [2022-04-07 22:58:13,728 INFO L290 TraceCheckUtils]: 13: Hoare triple {2156#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2156#false} is VALID [2022-04-07 22:58:13,728 INFO L290 TraceCheckUtils]: 14: Hoare triple {2156#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,728 INFO L290 TraceCheckUtils]: 15: Hoare triple {2156#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {2156#false} is VALID [2022-04-07 22:58:13,728 INFO L290 TraceCheckUtils]: 16: Hoare triple {2156#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,728 INFO L272 TraceCheckUtils]: 17: Hoare triple {2156#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2156#false} is VALID [2022-04-07 22:58:13,729 INFO L290 TraceCheckUtils]: 18: Hoare triple {2156#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2156#false} is VALID [2022-04-07 22:58:13,729 INFO L290 TraceCheckUtils]: 19: Hoare triple {2156#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,729 INFO L290 TraceCheckUtils]: 20: Hoare triple {2156#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,729 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:58:13,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:13,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1277643687] [2022-04-07 22:58:13,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1277643687] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:13,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1660113803] [2022-04-07 22:58:13,729 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:58:13,729 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:13,729 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:13,730 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:13,741 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 22:58:13,773 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:58:13,773 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:13,774 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 22:58:13,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:13,780 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:13,870 INFO L272 TraceCheckUtils]: 0: Hoare triple {2155#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,871 INFO L290 TraceCheckUtils]: 1: Hoare triple {2155#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2155#true} is VALID [2022-04-07 22:58:13,871 INFO L290 TraceCheckUtils]: 2: Hoare triple {2155#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,871 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2155#true} {2155#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,871 INFO L272 TraceCheckUtils]: 4: Hoare triple {2155#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,871 INFO L290 TraceCheckUtils]: 5: Hoare triple {2155#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2160#(= main_~y~0 0)} is VALID [2022-04-07 22:58:13,872 INFO L290 TraceCheckUtils]: 6: Hoare triple {2160#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2161#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:58:13,872 INFO L290 TraceCheckUtils]: 7: Hoare triple {2161#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:13,873 INFO L290 TraceCheckUtils]: 8: Hoare triple {2162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:13,873 INFO L290 TraceCheckUtils]: 9: Hoare triple {2162#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {2196#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:58:13,873 INFO L290 TraceCheckUtils]: 10: Hoare triple {2196#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2200#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:58:13,874 INFO L290 TraceCheckUtils]: 11: Hoare triple {2200#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,874 INFO L290 TraceCheckUtils]: 12: Hoare triple {2156#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2156#false} is VALID [2022-04-07 22:58:13,874 INFO L290 TraceCheckUtils]: 13: Hoare triple {2156#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2156#false} is VALID [2022-04-07 22:58:13,874 INFO L290 TraceCheckUtils]: 14: Hoare triple {2156#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,874 INFO L290 TraceCheckUtils]: 15: Hoare triple {2156#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {2156#false} is VALID [2022-04-07 22:58:13,874 INFO L290 TraceCheckUtils]: 16: Hoare triple {2156#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,874 INFO L272 TraceCheckUtils]: 17: Hoare triple {2156#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2156#false} is VALID [2022-04-07 22:58:13,874 INFO L290 TraceCheckUtils]: 18: Hoare triple {2156#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2156#false} is VALID [2022-04-07 22:58:13,874 INFO L290 TraceCheckUtils]: 19: Hoare triple {2156#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,875 INFO L290 TraceCheckUtils]: 20: Hoare triple {2156#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,875 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:58:13,875 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:13,968 INFO L290 TraceCheckUtils]: 20: Hoare triple {2156#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,968 INFO L290 TraceCheckUtils]: 19: Hoare triple {2156#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,969 INFO L290 TraceCheckUtils]: 18: Hoare triple {2156#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2156#false} is VALID [2022-04-07 22:58:13,969 INFO L272 TraceCheckUtils]: 17: Hoare triple {2156#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2156#false} is VALID [2022-04-07 22:58:13,969 INFO L290 TraceCheckUtils]: 16: Hoare triple {2156#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,969 INFO L290 TraceCheckUtils]: 15: Hoare triple {2156#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {2156#false} is VALID [2022-04-07 22:58:13,969 INFO L290 TraceCheckUtils]: 14: Hoare triple {2156#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2156#false} is VALID [2022-04-07 22:58:13,969 INFO L290 TraceCheckUtils]: 13: Hoare triple {2252#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2156#false} is VALID [2022-04-07 22:58:13,970 INFO L290 TraceCheckUtils]: 12: Hoare triple {2256#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2252#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:58:13,971 INFO L290 TraceCheckUtils]: 11: Hoare triple {2260#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2256#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:58:13,972 INFO L290 TraceCheckUtils]: 10: Hoare triple {2264#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2260#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:58:13,972 INFO L290 TraceCheckUtils]: 9: Hoare triple {2155#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {2264#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:58:13,972 INFO L290 TraceCheckUtils]: 8: Hoare triple {2155#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,972 INFO L290 TraceCheckUtils]: 7: Hoare triple {2155#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2155#true} is VALID [2022-04-07 22:58:13,972 INFO L290 TraceCheckUtils]: 6: Hoare triple {2155#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2155#true} is VALID [2022-04-07 22:58:13,972 INFO L290 TraceCheckUtils]: 5: Hoare triple {2155#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2155#true} is VALID [2022-04-07 22:58:13,972 INFO L272 TraceCheckUtils]: 4: Hoare triple {2155#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,972 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2155#true} {2155#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,973 INFO L290 TraceCheckUtils]: 2: Hoare triple {2155#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,973 INFO L290 TraceCheckUtils]: 1: Hoare triple {2155#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2155#true} is VALID [2022-04-07 22:58:13,973 INFO L272 TraceCheckUtils]: 0: Hoare triple {2155#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2155#true} is VALID [2022-04-07 22:58:13,973 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:58:13,973 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1660113803] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:13,973 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:13,973 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2022-04-07 22:58:13,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [360589930] [2022-04-07 22:58:13,973 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:13,974 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:58:13,974 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:13,974 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:13,993 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:13,994 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-07 22:58:13,994 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:13,994 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-07 22:58:13,994 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-07 22:58:13,994 INFO L87 Difference]: Start difference. First operand 59 states and 82 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:14,478 INFO L93 Difference]: Finished difference Result 85 states and 117 transitions. [2022-04-07 22:58:14,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 22:58:14,479 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:58:14,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:14,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 60 transitions. [2022-04-07 22:58:14,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 60 transitions. [2022-04-07 22:58:14,481 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 60 transitions. [2022-04-07 22:58:14,540 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:14,541 INFO L225 Difference]: With dead ends: 85 [2022-04-07 22:58:14,541 INFO L226 Difference]: Without dead ends: 69 [2022-04-07 22:58:14,541 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=128, Invalid=522, Unknown=0, NotChecked=0, Total=650 [2022-04-07 22:58:14,541 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 35 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 127 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 127 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:14,542 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 42 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 127 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:58:14,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-07 22:58:14,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 57. [2022-04-07 22:58:14,615 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:14,615 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 57 states, 52 states have (on average 1.4230769230769231) internal successors, (74), 52 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,615 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 57 states, 52 states have (on average 1.4230769230769231) internal successors, (74), 52 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,615 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 57 states, 52 states have (on average 1.4230769230769231) internal successors, (74), 52 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:14,617 INFO L93 Difference]: Finished difference Result 69 states and 95 transitions. [2022-04-07 22:58:14,617 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 95 transitions. [2022-04-07 22:58:14,617 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:14,617 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:14,617 INFO L74 IsIncluded]: Start isIncluded. First operand has 57 states, 52 states have (on average 1.4230769230769231) internal successors, (74), 52 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 69 states. [2022-04-07 22:58:14,617 INFO L87 Difference]: Start difference. First operand has 57 states, 52 states have (on average 1.4230769230769231) internal successors, (74), 52 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 69 states. [2022-04-07 22:58:14,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:14,619 INFO L93 Difference]: Finished difference Result 69 states and 95 transitions. [2022-04-07 22:58:14,619 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 95 transitions. [2022-04-07 22:58:14,619 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:14,619 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:14,619 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:14,619 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:14,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 52 states have (on average 1.4230769230769231) internal successors, (74), 52 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 78 transitions. [2022-04-07 22:58:14,620 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 78 transitions. Word has length 21 [2022-04-07 22:58:14,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:14,620 INFO L478 AbstractCegarLoop]: Abstraction has 57 states and 78 transitions. [2022-04-07 22:58:14,620 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:14,621 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 78 transitions. [2022-04-07 22:58:14,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-07 22:58:14,621 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:14,621 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:14,640 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:14,840 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:14,840 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:14,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:14,840 INFO L85 PathProgramCache]: Analyzing trace with hash 1066744542, now seen corresponding path program 2 times [2022-04-07 22:58:14,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:14,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1829619234] [2022-04-07 22:58:14,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:14,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:14,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:14,897 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:14,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:14,901 INFO L290 TraceCheckUtils]: 0: Hoare triple {2685#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2676#true} is VALID [2022-04-07 22:58:14,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {2676#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:14,902 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2676#true} {2676#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:14,902 INFO L272 TraceCheckUtils]: 0: Hoare triple {2676#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2685#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:14,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {2685#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2676#true} is VALID [2022-04-07 22:58:14,902 INFO L290 TraceCheckUtils]: 2: Hoare triple {2676#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:14,902 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2676#true} {2676#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:14,903 INFO L272 TraceCheckUtils]: 4: Hoare triple {2676#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:14,903 INFO L290 TraceCheckUtils]: 5: Hoare triple {2676#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2676#true} is VALID [2022-04-07 22:58:14,903 INFO L290 TraceCheckUtils]: 6: Hoare triple {2676#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:14,904 INFO L290 TraceCheckUtils]: 7: Hoare triple {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2682#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:58:14,905 INFO L290 TraceCheckUtils]: 8: Hoare triple {2682#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2682#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:58:14,905 INFO L290 TraceCheckUtils]: 9: Hoare triple {2682#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {2682#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 22:58:14,906 INFO L290 TraceCheckUtils]: 10: Hoare triple {2682#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2683#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 22:58:14,907 INFO L290 TraceCheckUtils]: 11: Hoare triple {2683#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:14,907 INFO L290 TraceCheckUtils]: 12: Hoare triple {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:14,907 INFO L290 TraceCheckUtils]: 13: Hoare triple {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:14,908 INFO L290 TraceCheckUtils]: 14: Hoare triple {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:14,908 INFO L290 TraceCheckUtils]: 15: Hoare triple {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:58:14,909 INFO L290 TraceCheckUtils]: 16: Hoare triple {2684#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:14,909 INFO L272 TraceCheckUtils]: 17: Hoare triple {2677#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2677#false} is VALID [2022-04-07 22:58:14,909 INFO L290 TraceCheckUtils]: 18: Hoare triple {2677#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2677#false} is VALID [2022-04-07 22:58:14,909 INFO L290 TraceCheckUtils]: 19: Hoare triple {2677#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:14,909 INFO L290 TraceCheckUtils]: 20: Hoare triple {2677#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:14,909 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:58:14,909 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:14,909 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1829619234] [2022-04-07 22:58:14,909 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1829619234] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:14,909 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1874010183] [2022-04-07 22:58:14,909 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:58:14,910 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:14,910 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:14,910 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:14,911 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 22:58:14,940 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:58:14,940 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:14,940 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-07 22:58:14,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:14,946 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:58:15,157 INFO L272 TraceCheckUtils]: 0: Hoare triple {2676#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:15,157 INFO L290 TraceCheckUtils]: 1: Hoare triple {2676#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2676#true} is VALID [2022-04-07 22:58:15,157 INFO L290 TraceCheckUtils]: 2: Hoare triple {2676#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:15,157 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2676#true} {2676#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:15,157 INFO L272 TraceCheckUtils]: 4: Hoare triple {2676#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:15,157 INFO L290 TraceCheckUtils]: 5: Hoare triple {2676#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2676#true} is VALID [2022-04-07 22:58:15,158 INFO L290 TraceCheckUtils]: 6: Hoare triple {2676#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:15,159 INFO L290 TraceCheckUtils]: 7: Hoare triple {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:15,159 INFO L290 TraceCheckUtils]: 8: Hoare triple {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:15,159 INFO L290 TraceCheckUtils]: 9: Hoare triple {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:15,160 INFO L290 TraceCheckUtils]: 10: Hoare triple {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:15,161 INFO L290 TraceCheckUtils]: 11: Hoare triple {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,161 INFO L290 TraceCheckUtils]: 12: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,161 INFO L290 TraceCheckUtils]: 13: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,161 INFO L290 TraceCheckUtils]: 14: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,162 INFO L290 TraceCheckUtils]: 15: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,162 INFO L290 TraceCheckUtils]: 16: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:15,162 INFO L272 TraceCheckUtils]: 17: Hoare triple {2677#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2677#false} is VALID [2022-04-07 22:58:15,162 INFO L290 TraceCheckUtils]: 18: Hoare triple {2677#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2677#false} is VALID [2022-04-07 22:58:15,163 INFO L290 TraceCheckUtils]: 19: Hoare triple {2677#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:15,163 INFO L290 TraceCheckUtils]: 20: Hoare triple {2677#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:15,163 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:58:15,163 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:58:15,374 INFO L290 TraceCheckUtils]: 20: Hoare triple {2677#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:15,374 INFO L290 TraceCheckUtils]: 19: Hoare triple {2677#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:15,374 INFO L290 TraceCheckUtils]: 18: Hoare triple {2677#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2677#false} is VALID [2022-04-07 22:58:15,374 INFO L272 TraceCheckUtils]: 17: Hoare triple {2677#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2677#false} is VALID [2022-04-07 22:58:15,375 INFO L290 TraceCheckUtils]: 16: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2677#false} is VALID [2022-04-07 22:58:15,375 INFO L290 TraceCheckUtils]: 15: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,376 INFO L290 TraceCheckUtils]: 14: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,376 INFO L290 TraceCheckUtils]: 13: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,376 INFO L290 TraceCheckUtils]: 12: Hoare triple {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,377 INFO L290 TraceCheckUtils]: 11: Hoare triple {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2723#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:58:15,377 INFO L290 TraceCheckUtils]: 10: Hoare triple {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:15,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:15,378 INFO L290 TraceCheckUtils]: 8: Hoare triple {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:15,379 INFO L290 TraceCheckUtils]: 7: Hoare triple {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2710#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:58:15,379 INFO L290 TraceCheckUtils]: 6: Hoare triple {2676#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2681#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:58:15,380 INFO L290 TraceCheckUtils]: 5: Hoare triple {2676#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2676#true} is VALID [2022-04-07 22:58:15,380 INFO L272 TraceCheckUtils]: 4: Hoare triple {2676#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:15,380 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2676#true} {2676#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:15,380 INFO L290 TraceCheckUtils]: 2: Hoare triple {2676#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:15,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {2676#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2676#true} is VALID [2022-04-07 22:58:15,380 INFO L272 TraceCheckUtils]: 0: Hoare triple {2676#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2676#true} is VALID [2022-04-07 22:58:15,380 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:58:15,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1874010183] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:58:15,380 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:58:15,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 9 [2022-04-07 22:58:15,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271640588] [2022-04-07 22:58:15,380 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:58:15,381 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:58:15,381 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:58:15,382 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,403 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:15,403 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-07 22:58:15,403 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:58:15,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-07 22:58:15,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2022-04-07 22:58:15,404 INFO L87 Difference]: Start difference. First operand 57 states and 78 transitions. Second operand has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:15,705 INFO L93 Difference]: Finished difference Result 78 states and 107 transitions. [2022-04-07 22:58:15,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 22:58:15,705 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:58:15,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:58:15,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 45 transitions. [2022-04-07 22:58:15,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 45 transitions. [2022-04-07 22:58:15,708 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 45 transitions. [2022-04-07 22:58:15,748 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:58:15,749 INFO L225 Difference]: With dead ends: 78 [2022-04-07 22:58:15,749 INFO L226 Difference]: Without dead ends: 73 [2022-04-07 22:58:15,749 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 40 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2022-04-07 22:58:15,750 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 38 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:58:15,750 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [38 Valid, 38 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:58:15,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-04-07 22:58:15,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 69. [2022-04-07 22:58:15,839 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:58:15,840 INFO L82 GeneralOperation]: Start isEquivalent. First operand 73 states. Second operand has 69 states, 64 states have (on average 1.421875) internal successors, (91), 64 states have internal predecessors, (91), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,840 INFO L74 IsIncluded]: Start isIncluded. First operand 73 states. Second operand has 69 states, 64 states have (on average 1.421875) internal successors, (91), 64 states have internal predecessors, (91), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,840 INFO L87 Difference]: Start difference. First operand 73 states. Second operand has 69 states, 64 states have (on average 1.421875) internal successors, (91), 64 states have internal predecessors, (91), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:15,841 INFO L93 Difference]: Finished difference Result 73 states and 101 transitions. [2022-04-07 22:58:15,841 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 101 transitions. [2022-04-07 22:58:15,841 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:15,841 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:15,841 INFO L74 IsIncluded]: Start isIncluded. First operand has 69 states, 64 states have (on average 1.421875) internal successors, (91), 64 states have internal predecessors, (91), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 73 states. [2022-04-07 22:58:15,842 INFO L87 Difference]: Start difference. First operand has 69 states, 64 states have (on average 1.421875) internal successors, (91), 64 states have internal predecessors, (91), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 73 states. [2022-04-07 22:58:15,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:58:15,843 INFO L93 Difference]: Finished difference Result 73 states and 101 transitions. [2022-04-07 22:58:15,843 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 101 transitions. [2022-04-07 22:58:15,843 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:58:15,843 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:58:15,843 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:58:15,843 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:58:15,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 64 states have (on average 1.421875) internal successors, (91), 64 states have internal predecessors, (91), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 95 transitions. [2022-04-07 22:58:15,844 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 95 transitions. Word has length 21 [2022-04-07 22:58:15,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:58:15,844 INFO L478 AbstractCegarLoop]: Abstraction has 69 states and 95 transitions. [2022-04-07 22:58:15,844 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:58:15,844 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 95 transitions. [2022-04-07 22:58:15,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 22:58:15,845 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:58:15,845 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:58:15,861 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 22:58:16,059 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:16,061 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:58:16,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:58:16,062 INFO L85 PathProgramCache]: Analyzing trace with hash -500618306, now seen corresponding path program 3 times [2022-04-07 22:58:16,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:58:16,062 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266509579] [2022-04-07 22:58:16,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:58:16,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:58:16,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:16,354 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:58:16,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:16,362 INFO L290 TraceCheckUtils]: 0: Hoare triple {3209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3192#true} is VALID [2022-04-07 22:58:16,362 INFO L290 TraceCheckUtils]: 1: Hoare triple {3192#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:58:16,362 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3192#true} {3192#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:58:16,362 INFO L272 TraceCheckUtils]: 0: Hoare triple {3192#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:58:16,363 INFO L290 TraceCheckUtils]: 1: Hoare triple {3209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3192#true} is VALID [2022-04-07 22:58:16,363 INFO L290 TraceCheckUtils]: 2: Hoare triple {3192#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:58:16,363 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3192#true} {3192#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:58:16,363 INFO L272 TraceCheckUtils]: 4: Hoare triple {3192#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:58:16,363 INFO L290 TraceCheckUtils]: 5: Hoare triple {3192#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3197#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:58:16,364 INFO L290 TraceCheckUtils]: 6: Hoare triple {3197#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3198#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} is VALID [2022-04-07 22:58:16,365 INFO L290 TraceCheckUtils]: 7: Hoare triple {3198#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3199#(and (<= 2 main_~y~0) (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-07 22:58:16,365 INFO L290 TraceCheckUtils]: 8: Hoare triple {3199#(and (<= 2 main_~y~0) (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 2)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3200#(and (<= main_~n~0 (+ 2 (* 4294967296 (div main_~x~0 4294967296)))) (<= 2 main_~y~0) (<= (+ main_~y~0 2 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)))} is VALID [2022-04-07 22:58:16,366 INFO L290 TraceCheckUtils]: 9: Hoare triple {3200#(and (<= main_~n~0 (+ 2 (* 4294967296 (div main_~x~0 4294967296)))) (<= 2 main_~y~0) (<= (+ main_~y~0 2 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3201#(and (<= main_~n~0 (+ 2 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~z~0 2 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)) (<= 2 main_~z~0))} is VALID [2022-04-07 22:58:16,367 INFO L290 TraceCheckUtils]: 10: Hoare triple {3201#(and (<= main_~n~0 (+ 2 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~z~0 2 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3202#(and (<= main_~n~0 (+ 2 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 2147483648))) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:16,367 INFO L290 TraceCheckUtils]: 11: Hoare triple {3202#(and (<= main_~n~0 (+ 2 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 2147483648))) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3203#(and (<= main_~n~0 (+ 2 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296) 2147483648))) (<= 0 main_~z~0))} is VALID [2022-04-07 22:58:16,368 INFO L290 TraceCheckUtils]: 12: Hoare triple {3203#(and (<= main_~n~0 (+ 2 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296) 2147483648))) (<= 0 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3203#(and (<= main_~n~0 (+ 2 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296) 2147483648))) (<= 0 main_~z~0))} is VALID [2022-04-07 22:58:16,369 INFO L290 TraceCheckUtils]: 13: Hoare triple {3203#(and (<= main_~n~0 (+ 2 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296) 2147483648))) (<= 0 main_~z~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3202#(and (<= main_~n~0 (+ 2 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 2147483648))) (<= 1 main_~z~0))} is VALID [2022-04-07 22:58:16,369 INFO L290 TraceCheckUtils]: 14: Hoare triple {3202#(and (<= main_~n~0 (+ 2 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 2147483648))) (<= 1 main_~z~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3204#(and (<= main_~n~0 (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 2)) (<= 2 main_~z~0))} is VALID [2022-04-07 22:58:16,370 INFO L290 TraceCheckUtils]: 15: Hoare triple {3204#(and (<= main_~n~0 (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 2)) (<= 2 main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3204#(and (<= main_~n~0 (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 2)) (<= 2 main_~z~0))} is VALID [2022-04-07 22:58:16,371 INFO L290 TraceCheckUtils]: 16: Hoare triple {3204#(and (<= main_~n~0 (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 2)) (<= 2 main_~z~0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3205#(and (<= 3 main_~z~0) (<= main_~n~0 (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 2)))} is VALID [2022-04-07 22:58:16,377 INFO L290 TraceCheckUtils]: 17: Hoare triple {3205#(and (<= 3 main_~z~0) (<= main_~n~0 (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 2147483648) 2)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3206#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:16,377 INFO L290 TraceCheckUtils]: 18: Hoare triple {3206#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3206#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:58:16,379 INFO L272 TraceCheckUtils]: 19: Hoare triple {3206#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3207#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:58:16,379 INFO L290 TraceCheckUtils]: 20: Hoare triple {3207#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3208#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:58:16,380 INFO L290 TraceCheckUtils]: 21: Hoare triple {3208#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3193#false} is VALID [2022-04-07 22:58:16,380 INFO L290 TraceCheckUtils]: 22: Hoare triple {3193#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3193#false} is VALID [2022-04-07 22:58:16,380 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:58:16,380 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:58:16,380 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1266509579] [2022-04-07 22:58:16,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1266509579] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:58:16,380 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1688500093] [2022-04-07 22:58:16,380 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:58:16,380 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:58:16,381 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:58:16,381 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:58:16,382 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 22:58:16,466 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-07 22:58:16,466 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:58:16,467 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-07 22:58:16,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:58:16,479 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:04,829 INFO L272 TraceCheckUtils]: 0: Hoare triple {3192#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:59:04,829 INFO L290 TraceCheckUtils]: 1: Hoare triple {3192#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3192#true} is VALID [2022-04-07 22:59:04,829 INFO L290 TraceCheckUtils]: 2: Hoare triple {3192#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:59:04,829 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3192#true} {3192#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:59:04,829 INFO L272 TraceCheckUtils]: 4: Hoare triple {3192#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:59:04,830 INFO L290 TraceCheckUtils]: 5: Hoare triple {3192#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3197#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:59:04,831 INFO L290 TraceCheckUtils]: 6: Hoare triple {3197#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3198#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} is VALID [2022-04-07 22:59:04,832 INFO L290 TraceCheckUtils]: 7: Hoare triple {3198#(and (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3199#(and (<= 2 main_~y~0) (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-07 22:59:04,832 INFO L290 TraceCheckUtils]: 8: Hoare triple {3199#(and (<= 2 main_~y~0) (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 2)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3199#(and (<= 2 main_~y~0) (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-07 22:59:04,833 INFO L290 TraceCheckUtils]: 9: Hoare triple {3199#(and (<= 2 main_~y~0) (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 2)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3240#(and (<= (+ (* main_~x~0 2) main_~z~0 2) (* main_~n~0 2)) (<= 2 main_~z~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-07 22:59:04,833 INFO L290 TraceCheckUtils]: 10: Hoare triple {3240#(and (<= (+ (* main_~x~0 2) main_~z~0 2) (* main_~n~0 2)) (<= 2 main_~z~0) (<= main_~n~0 (+ main_~x~0 2)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3244#(and (<= (+ (* main_~x~0 2) main_~z~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:04,834 INFO L290 TraceCheckUtils]: 11: Hoare triple {3244#(and (<= (+ (* main_~x~0 2) main_~z~0 1) (* main_~n~0 2)) (<= main_~n~0 (+ main_~x~0 1)) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3248#(and (<= main_~n~0 main_~x~0) (<= 0 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} is VALID [2022-04-07 22:59:04,835 INFO L290 TraceCheckUtils]: 12: Hoare triple {3248#(and (<= main_~n~0 main_~x~0) (<= 0 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3248#(and (<= main_~n~0 main_~x~0) (<= 0 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} is VALID [2022-04-07 22:59:04,836 INFO L290 TraceCheckUtils]: 13: Hoare triple {3248#(and (<= main_~n~0 main_~x~0) (<= 0 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3255#(and (<= (+ (* main_~x~0 2) main_~z~0) (+ (* main_~n~0 2) 1)) (<= main_~n~0 main_~x~0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:04,836 INFO L290 TraceCheckUtils]: 14: Hoare triple {3255#(and (<= (+ (* main_~x~0 2) main_~z~0) (+ (* main_~n~0 2) 1)) (<= main_~n~0 main_~x~0) (<= 1 main_~z~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3259#(and (<= main_~n~0 main_~x~0) (<= (+ (* main_~x~0 2) main_~z~0) (+ 2 (* main_~n~0 2))) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:04,837 INFO L290 TraceCheckUtils]: 15: Hoare triple {3259#(and (<= main_~n~0 main_~x~0) (<= (+ (* main_~x~0 2) main_~z~0) (+ 2 (* main_~n~0 2))) (<= 2 main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3259#(and (<= main_~n~0 main_~x~0) (<= (+ (* main_~x~0 2) main_~z~0) (+ 2 (* main_~n~0 2))) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:04,837 INFO L290 TraceCheckUtils]: 16: Hoare triple {3259#(and (<= main_~n~0 main_~x~0) (<= (+ (* main_~x~0 2) main_~z~0) (+ 2 (* main_~n~0 2))) (<= 2 main_~z~0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3266#(and (<= 3 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (+ (* main_~n~0 2) 1)) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-07 22:59:04,838 INFO L290 TraceCheckUtils]: 17: Hoare triple {3266#(and (<= 3 main_~z~0) (<= (+ (* main_~x~0 2) main_~z~0) (+ (* main_~n~0 2) 1)) (<= main_~n~0 (+ main_~x~0 1)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3270#(and (<= 4 main_~z~0) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= main_~n~0 (+ main_~x~0 2)) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} is VALID [2022-04-07 22:59:04,853 INFO L290 TraceCheckUtils]: 18: Hoare triple {3270#(and (<= 4 main_~z~0) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= main_~n~0 (+ main_~x~0 2)) (<= (+ (* main_~x~0 2) main_~z~0) (* main_~n~0 2)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3274#(and (<= 4 main_~z~0) (< (+ (div (+ 4294967296 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ (- 4294967294) (* (- 1) main_~n~0)) (- 4294967296))) (+ (div (+ main_~n~0 (- 4294967296) (div (+ 8589934592 (* (- 1) main_~z~0)) 2)) 4294967296) (div (+ main_~n~0 (div (+ 8589934592 (* (- 1) main_~z~0)) 2)) 4294967296) 1)))} is VALID [2022-04-07 22:59:04,885 INFO L272 TraceCheckUtils]: 19: Hoare triple {3274#(and (<= 4 main_~z~0) (< (+ (div (+ 4294967296 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ (- 4294967294) (* (- 1) main_~n~0)) (- 4294967296))) (+ (div (+ main_~n~0 (- 4294967296) (div (+ 8589934592 (* (- 1) main_~z~0)) 2)) 4294967296) (div (+ main_~n~0 (div (+ 8589934592 (* (- 1) main_~z~0)) 2)) 4294967296) 1)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3278#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:59:04,885 INFO L290 TraceCheckUtils]: 20: Hoare triple {3278#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3282#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:59:04,885 INFO L290 TraceCheckUtils]: 21: Hoare triple {3282#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3193#false} is VALID [2022-04-07 22:59:04,886 INFO L290 TraceCheckUtils]: 22: Hoare triple {3193#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3193#false} is VALID [2022-04-07 22:59:04,886 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:04,886 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:06,110 INFO L290 TraceCheckUtils]: 22: Hoare triple {3193#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3193#false} is VALID [2022-04-07 22:59:06,110 INFO L290 TraceCheckUtils]: 21: Hoare triple {3282#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3193#false} is VALID [2022-04-07 22:59:06,111 INFO L290 TraceCheckUtils]: 20: Hoare triple {3278#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3282#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:59:06,112 INFO L272 TraceCheckUtils]: 19: Hoare triple {3206#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3278#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:59:06,113 INFO L290 TraceCheckUtils]: 18: Hoare triple {3301#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3206#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:59:06,115 INFO L290 TraceCheckUtils]: 17: Hoare triple {3305#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3301#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} is VALID [2022-04-07 22:59:06,117 INFO L290 TraceCheckUtils]: 16: Hoare triple {3309#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3305#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} is VALID [2022-04-07 22:59:06,117 INFO L290 TraceCheckUtils]: 15: Hoare triple {3309#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3309#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 22:59:06,118 INFO L290 TraceCheckUtils]: 14: Hoare triple {3316#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3309#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 22:59:06,120 INFO L290 TraceCheckUtils]: 13: Hoare triple {3320#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3316#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:59:06,120 INFO L290 TraceCheckUtils]: 12: Hoare triple {3320#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3320#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:59:06,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {3327#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3320#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:59:06,125 INFO L290 TraceCheckUtils]: 10: Hoare triple {3331#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3327#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))))} is VALID [2022-04-07 22:59:06,125 INFO L290 TraceCheckUtils]: 9: Hoare triple {3335#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3))) (< 0 (mod main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3331#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 22:59:06,126 INFO L290 TraceCheckUtils]: 8: Hoare triple {3335#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3))) (< 0 (mod main_~x~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3335#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:06,127 INFO L290 TraceCheckUtils]: 7: Hoare triple {3342#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3) (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3335#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 2) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:06,129 INFO L290 TraceCheckUtils]: 6: Hoare triple {3346#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4) (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3342#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3) (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:59:06,132 INFO L290 TraceCheckUtils]: 5: Hoare triple {3192#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3346#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4) (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))))))} is VALID [2022-04-07 22:59:06,133 INFO L272 TraceCheckUtils]: 4: Hoare triple {3192#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:59:06,133 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3192#true} {3192#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:59:06,133 INFO L290 TraceCheckUtils]: 2: Hoare triple {3192#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:59:06,133 INFO L290 TraceCheckUtils]: 1: Hoare triple {3192#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3192#true} is VALID [2022-04-07 22:59:06,133 INFO L272 TraceCheckUtils]: 0: Hoare triple {3192#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3192#true} is VALID [2022-04-07 22:59:06,133 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:06,133 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1688500093] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:06,133 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:06,133 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 35 [2022-04-07 22:59:06,134 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241897866] [2022-04-07 22:59:06,134 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:06,134 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 32 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:59:06,134 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:06,134 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 32 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:06,239 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:06,239 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-07 22:59:06,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:06,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-07 22:59:06,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1094, Unknown=0, NotChecked=0, Total=1190 [2022-04-07 22:59:06,240 INFO L87 Difference]: Start difference. First operand 69 states and 95 transitions. Second operand has 35 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 32 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:13,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:13,123 INFO L93 Difference]: Finished difference Result 93 states and 124 transitions. [2022-04-07 22:59:13,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-07 22:59:13,123 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 32 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:59:13,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:13,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 32 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:13,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 67 transitions. [2022-04-07 22:59:13,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 32 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:13,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 67 transitions. [2022-04-07 22:59:13,125 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 67 transitions. [2022-04-07 22:59:13,336 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 67 edges. 67 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:13,337 INFO L225 Difference]: With dead ends: 93 [2022-04-07 22:59:13,337 INFO L226 Difference]: Without dead ends: 79 [2022-04-07 22:59:13,338 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 25 SyntacticMatches, 4 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 370 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=351, Invalid=2729, Unknown=0, NotChecked=0, Total=3080 [2022-04-07 22:59:13,339 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 80 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 551 mSolverCounterSat, 95 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 646 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 95 IncrementalHoareTripleChecker+Valid, 551 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:13,339 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [80 Valid, 113 Invalid, 646 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [95 Valid, 551 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2022-04-07 22:59:13,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2022-04-07 22:59:13,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 76. [2022-04-07 22:59:13,424 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:13,424 INFO L82 GeneralOperation]: Start isEquivalent. First operand 79 states. Second operand has 76 states, 71 states have (on average 1.3661971830985915) internal successors, (97), 71 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:13,425 INFO L74 IsIncluded]: Start isIncluded. First operand 79 states. Second operand has 76 states, 71 states have (on average 1.3661971830985915) internal successors, (97), 71 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:13,425 INFO L87 Difference]: Start difference. First operand 79 states. Second operand has 76 states, 71 states have (on average 1.3661971830985915) internal successors, (97), 71 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:13,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:13,426 INFO L93 Difference]: Finished difference Result 79 states and 104 transitions. [2022-04-07 22:59:13,426 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 104 transitions. [2022-04-07 22:59:13,426 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:13,426 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:13,426 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.3661971830985915) internal successors, (97), 71 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 79 states. [2022-04-07 22:59:13,426 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.3661971830985915) internal successors, (97), 71 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 79 states. [2022-04-07 22:59:13,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:13,427 INFO L93 Difference]: Finished difference Result 79 states and 104 transitions. [2022-04-07 22:59:13,427 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 104 transitions. [2022-04-07 22:59:13,428 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:13,428 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:13,428 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:13,428 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:13,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.3661971830985915) internal successors, (97), 71 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:13,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 101 transitions. [2022-04-07 22:59:13,429 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 101 transitions. Word has length 23 [2022-04-07 22:59:13,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:13,429 INFO L478 AbstractCegarLoop]: Abstraction has 76 states and 101 transitions. [2022-04-07 22:59:13,429 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 32 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:13,429 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 101 transitions. [2022-04-07 22:59:13,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 22:59:13,429 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:13,429 INFO L499 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:13,435 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:13,630 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:13,630 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:13,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:13,630 INFO L85 PathProgramCache]: Analyzing trace with hash -1238154631, now seen corresponding path program 4 times [2022-04-07 22:59:13,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:13,631 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083294841] [2022-04-07 22:59:13,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:13,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:13,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:13,785 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:13,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:13,788 INFO L290 TraceCheckUtils]: 0: Hoare triple {3827#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3814#true} is VALID [2022-04-07 22:59:13,788 INFO L290 TraceCheckUtils]: 1: Hoare triple {3814#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:13,789 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3814#true} {3814#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:13,789 INFO L272 TraceCheckUtils]: 0: Hoare triple {3814#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3827#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:13,789 INFO L290 TraceCheckUtils]: 1: Hoare triple {3827#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3814#true} is VALID [2022-04-07 22:59:13,789 INFO L290 TraceCheckUtils]: 2: Hoare triple {3814#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:13,789 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3814#true} {3814#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:13,789 INFO L272 TraceCheckUtils]: 4: Hoare triple {3814#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:13,790 INFO L290 TraceCheckUtils]: 5: Hoare triple {3814#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3819#(= main_~y~0 0)} is VALID [2022-04-07 22:59:13,790 INFO L290 TraceCheckUtils]: 6: Hoare triple {3819#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3820#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:13,790 INFO L290 TraceCheckUtils]: 7: Hoare triple {3820#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3821#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:13,791 INFO L290 TraceCheckUtils]: 8: Hoare triple {3821#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3822#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:13,792 INFO L290 TraceCheckUtils]: 9: Hoare triple {3822#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3823#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:13,792 INFO L290 TraceCheckUtils]: 10: Hoare triple {3823#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3824#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:59:13,793 INFO L290 TraceCheckUtils]: 11: Hoare triple {3824#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3824#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:59:13,793 INFO L290 TraceCheckUtils]: 12: Hoare triple {3824#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3825#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 22:59:13,793 INFO L290 TraceCheckUtils]: 13: Hoare triple {3825#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3826#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 22:59:13,794 INFO L290 TraceCheckUtils]: 14: Hoare triple {3826#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:13,794 INFO L290 TraceCheckUtils]: 15: Hoare triple {3815#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3815#false} is VALID [2022-04-07 22:59:13,794 INFO L290 TraceCheckUtils]: 16: Hoare triple {3815#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:13,794 INFO L290 TraceCheckUtils]: 17: Hoare triple {3815#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3815#false} is VALID [2022-04-07 22:59:13,794 INFO L290 TraceCheckUtils]: 18: Hoare triple {3815#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:13,794 INFO L272 TraceCheckUtils]: 19: Hoare triple {3815#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3815#false} is VALID [2022-04-07 22:59:13,794 INFO L290 TraceCheckUtils]: 20: Hoare triple {3815#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3815#false} is VALID [2022-04-07 22:59:13,794 INFO L290 TraceCheckUtils]: 21: Hoare triple {3815#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:13,794 INFO L290 TraceCheckUtils]: 22: Hoare triple {3815#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:13,795 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:13,795 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:13,795 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2083294841] [2022-04-07 22:59:13,795 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2083294841] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:13,795 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1987624665] [2022-04-07 22:59:13,795 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:59:13,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:13,795 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:13,799 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:13,800 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 22:59:13,831 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:59:13,832 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:13,832 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-07 22:59:13,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:13,838 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:14,029 INFO L272 TraceCheckUtils]: 0: Hoare triple {3814#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:14,029 INFO L290 TraceCheckUtils]: 1: Hoare triple {3814#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3814#true} is VALID [2022-04-07 22:59:14,029 INFO L290 TraceCheckUtils]: 2: Hoare triple {3814#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:14,030 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3814#true} {3814#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:14,030 INFO L272 TraceCheckUtils]: 4: Hoare triple {3814#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:14,030 INFO L290 TraceCheckUtils]: 5: Hoare triple {3814#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3819#(= main_~y~0 0)} is VALID [2022-04-07 22:59:14,030 INFO L290 TraceCheckUtils]: 6: Hoare triple {3819#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3820#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:14,031 INFO L290 TraceCheckUtils]: 7: Hoare triple {3820#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3821#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:14,031 INFO L290 TraceCheckUtils]: 8: Hoare triple {3821#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3822#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:14,032 INFO L290 TraceCheckUtils]: 9: Hoare triple {3822#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3823#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:14,032 INFO L290 TraceCheckUtils]: 10: Hoare triple {3823#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3824#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:59:14,033 INFO L290 TraceCheckUtils]: 11: Hoare triple {3824#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3824#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:59:14,033 INFO L290 TraceCheckUtils]: 12: Hoare triple {3824#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3825#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 22:59:14,034 INFO L290 TraceCheckUtils]: 13: Hoare triple {3825#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3870#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 22:59:14,034 INFO L290 TraceCheckUtils]: 14: Hoare triple {3870#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,034 INFO L290 TraceCheckUtils]: 15: Hoare triple {3815#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3815#false} is VALID [2022-04-07 22:59:14,034 INFO L290 TraceCheckUtils]: 16: Hoare triple {3815#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,034 INFO L290 TraceCheckUtils]: 17: Hoare triple {3815#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3815#false} is VALID [2022-04-07 22:59:14,034 INFO L290 TraceCheckUtils]: 18: Hoare triple {3815#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,034 INFO L272 TraceCheckUtils]: 19: Hoare triple {3815#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3815#false} is VALID [2022-04-07 22:59:14,035 INFO L290 TraceCheckUtils]: 20: Hoare triple {3815#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3815#false} is VALID [2022-04-07 22:59:14,035 INFO L290 TraceCheckUtils]: 21: Hoare triple {3815#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,035 INFO L290 TraceCheckUtils]: 22: Hoare triple {3815#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,035 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:14,035 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:14,200 INFO L290 TraceCheckUtils]: 22: Hoare triple {3815#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,201 INFO L290 TraceCheckUtils]: 21: Hoare triple {3815#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,201 INFO L290 TraceCheckUtils]: 20: Hoare triple {3815#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3815#false} is VALID [2022-04-07 22:59:14,201 INFO L272 TraceCheckUtils]: 19: Hoare triple {3815#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3815#false} is VALID [2022-04-07 22:59:14,201 INFO L290 TraceCheckUtils]: 18: Hoare triple {3815#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,201 INFO L290 TraceCheckUtils]: 17: Hoare triple {3815#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {3815#false} is VALID [2022-04-07 22:59:14,201 INFO L290 TraceCheckUtils]: 16: Hoare triple {3815#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,201 INFO L290 TraceCheckUtils]: 15: Hoare triple {3815#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3815#false} is VALID [2022-04-07 22:59:14,201 INFO L290 TraceCheckUtils]: 14: Hoare triple {3922#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {3815#false} is VALID [2022-04-07 22:59:14,203 INFO L290 TraceCheckUtils]: 13: Hoare triple {3926#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3922#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:59:14,203 INFO L290 TraceCheckUtils]: 12: Hoare triple {3930#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {3926#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 22:59:14,203 INFO L290 TraceCheckUtils]: 11: Hoare triple {3930#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3930#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:59:14,204 INFO L290 TraceCheckUtils]: 10: Hoare triple {3937#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3930#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 22:59:14,205 INFO L290 TraceCheckUtils]: 9: Hoare triple {3941#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3937#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:59:14,205 INFO L290 TraceCheckUtils]: 8: Hoare triple {3945#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3941#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:59:14,206 INFO L290 TraceCheckUtils]: 7: Hoare triple {3949#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3945#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:59:14,207 INFO L290 TraceCheckUtils]: 6: Hoare triple {3953#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3949#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:59:14,207 INFO L290 TraceCheckUtils]: 5: Hoare triple {3814#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3953#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:59:14,207 INFO L272 TraceCheckUtils]: 4: Hoare triple {3814#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:14,207 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3814#true} {3814#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:14,207 INFO L290 TraceCheckUtils]: 2: Hoare triple {3814#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:14,207 INFO L290 TraceCheckUtils]: 1: Hoare triple {3814#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3814#true} is VALID [2022-04-07 22:59:14,208 INFO L272 TraceCheckUtils]: 0: Hoare triple {3814#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3814#true} is VALID [2022-04-07 22:59:14,208 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:14,208 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1987624665] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:14,208 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:14,208 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 20 [2022-04-07 22:59:14,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1048622486] [2022-04-07 22:59:14,208 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:14,208 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.6) internal successors, (32), 19 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:59:14,209 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:14,209 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.6) internal successors, (32), 19 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:14,233 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:14,233 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-07 22:59:14,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:14,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-07 22:59:14,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=301, Unknown=0, NotChecked=0, Total=380 [2022-04-07 22:59:14,234 INFO L87 Difference]: Start difference. First operand 76 states and 101 transitions. Second operand has 20 states, 20 states have (on average 1.6) internal successors, (32), 19 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:17,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:17,994 INFO L93 Difference]: Finished difference Result 178 states and 265 transitions. [2022-04-07 22:59:17,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2022-04-07 22:59:17,994 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.6) internal successors, (32), 19 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:59:17,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:17,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.6) internal successors, (32), 19 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:17,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 157 transitions. [2022-04-07 22:59:17,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.6) internal successors, (32), 19 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:17,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 157 transitions. [2022-04-07 22:59:17,998 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 58 states and 157 transitions. [2022-04-07 22:59:18,234 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 157 edges. 157 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:18,251 INFO L225 Difference]: With dead ends: 178 [2022-04-07 22:59:18,252 INFO L226 Difference]: Without dead ends: 155 [2022-04-07 22:59:18,253 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1843 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1367, Invalid=4183, Unknown=0, NotChecked=0, Total=5550 [2022-04-07 22:59:18,253 INFO L913 BasicCegarLoop]: 22 mSDtfsCounter, 211 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 346 mSolverCounterSat, 257 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 603 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 257 IncrementalHoareTripleChecker+Valid, 346 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:18,254 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [211 Valid, 64 Invalid, 603 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [257 Valid, 346 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-07 22:59:18,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2022-04-07 22:59:18,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 95. [2022-04-07 22:59:18,376 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:18,376 INFO L82 GeneralOperation]: Start isEquivalent. First operand 155 states. Second operand has 95 states, 90 states have (on average 1.3666666666666667) internal successors, (123), 90 states have internal predecessors, (123), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:18,376 INFO L74 IsIncluded]: Start isIncluded. First operand 155 states. Second operand has 95 states, 90 states have (on average 1.3666666666666667) internal successors, (123), 90 states have internal predecessors, (123), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:18,377 INFO L87 Difference]: Start difference. First operand 155 states. Second operand has 95 states, 90 states have (on average 1.3666666666666667) internal successors, (123), 90 states have internal predecessors, (123), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:18,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:18,379 INFO L93 Difference]: Finished difference Result 155 states and 210 transitions. [2022-04-07 22:59:18,379 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 210 transitions. [2022-04-07 22:59:18,379 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:18,379 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:18,379 INFO L74 IsIncluded]: Start isIncluded. First operand has 95 states, 90 states have (on average 1.3666666666666667) internal successors, (123), 90 states have internal predecessors, (123), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 155 states. [2022-04-07 22:59:18,379 INFO L87 Difference]: Start difference. First operand has 95 states, 90 states have (on average 1.3666666666666667) internal successors, (123), 90 states have internal predecessors, (123), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 155 states. [2022-04-07 22:59:18,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:18,381 INFO L93 Difference]: Finished difference Result 155 states and 210 transitions. [2022-04-07 22:59:18,381 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 210 transitions. [2022-04-07 22:59:18,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:18,382 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:18,382 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:18,382 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:18,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 90 states have (on average 1.3666666666666667) internal successors, (123), 90 states have internal predecessors, (123), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:18,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 127 transitions. [2022-04-07 22:59:18,383 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 127 transitions. Word has length 23 [2022-04-07 22:59:18,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:18,383 INFO L478 AbstractCegarLoop]: Abstraction has 95 states and 127 transitions. [2022-04-07 22:59:18,383 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.6) internal successors, (32), 19 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:18,383 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 127 transitions. [2022-04-07 22:59:18,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 22:59:18,384 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:18,384 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:18,403 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-04-07 22:59:18,601 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-07 22:59:18,601 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:18,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:18,602 INFO L85 PathProgramCache]: Analyzing trace with hash 466505418, now seen corresponding path program 3 times [2022-04-07 22:59:18,602 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:18,602 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826757930] [2022-04-07 22:59:18,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:18,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:18,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:18,685 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:18,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:18,690 INFO L290 TraceCheckUtils]: 0: Hoare triple {4792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4781#true} is VALID [2022-04-07 22:59:18,690 INFO L290 TraceCheckUtils]: 1: Hoare triple {4781#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,690 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4781#true} {4781#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,690 INFO L272 TraceCheckUtils]: 0: Hoare triple {4781#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:18,690 INFO L290 TraceCheckUtils]: 1: Hoare triple {4792#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4781#true} is VALID [2022-04-07 22:59:18,690 INFO L290 TraceCheckUtils]: 2: Hoare triple {4781#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,690 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4781#true} {4781#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,691 INFO L272 TraceCheckUtils]: 4: Hoare triple {4781#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,691 INFO L290 TraceCheckUtils]: 5: Hoare triple {4781#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4781#true} is VALID [2022-04-07 22:59:18,691 INFO L290 TraceCheckUtils]: 6: Hoare triple {4781#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:18,693 INFO L290 TraceCheckUtils]: 7: Hoare triple {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4787#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 22:59:18,693 INFO L290 TraceCheckUtils]: 8: Hoare triple {4787#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4788#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:59:18,694 INFO L290 TraceCheckUtils]: 9: Hoare triple {4788#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4788#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:59:18,694 INFO L290 TraceCheckUtils]: 10: Hoare triple {4788#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {4788#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:59:18,695 INFO L290 TraceCheckUtils]: 11: Hoare triple {4788#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4789#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 22:59:18,695 INFO L290 TraceCheckUtils]: 12: Hoare triple {4789#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4790#(<= (+ 2 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 22:59:18,696 INFO L290 TraceCheckUtils]: 13: Hoare triple {4790#(<= (+ 2 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:59:18,696 INFO L290 TraceCheckUtils]: 14: Hoare triple {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:59:18,697 INFO L290 TraceCheckUtils]: 15: Hoare triple {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:59:18,697 INFO L290 TraceCheckUtils]: 16: Hoare triple {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:59:18,698 INFO L290 TraceCheckUtils]: 17: Hoare triple {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:59:18,698 INFO L290 TraceCheckUtils]: 18: Hoare triple {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 22:59:18,698 INFO L290 TraceCheckUtils]: 19: Hoare triple {4791#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:18,698 INFO L272 TraceCheckUtils]: 20: Hoare triple {4782#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4782#false} is VALID [2022-04-07 22:59:18,698 INFO L290 TraceCheckUtils]: 21: Hoare triple {4782#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4782#false} is VALID [2022-04-07 22:59:18,698 INFO L290 TraceCheckUtils]: 22: Hoare triple {4782#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:18,699 INFO L290 TraceCheckUtils]: 23: Hoare triple {4782#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:18,699 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:59:18,699 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:18,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826757930] [2022-04-07 22:59:18,699 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1826757930] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:18,699 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1455559879] [2022-04-07 22:59:18,699 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:59:18,699 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:18,699 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:18,700 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:18,700 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 22:59:18,738 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 22:59:18,738 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:18,739 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 22:59:18,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:18,747 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:18,975 INFO L272 TraceCheckUtils]: 0: Hoare triple {4781#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,975 INFO L290 TraceCheckUtils]: 1: Hoare triple {4781#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4781#true} is VALID [2022-04-07 22:59:18,975 INFO L290 TraceCheckUtils]: 2: Hoare triple {4781#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,976 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4781#true} {4781#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,976 INFO L272 TraceCheckUtils]: 4: Hoare triple {4781#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:18,976 INFO L290 TraceCheckUtils]: 5: Hoare triple {4781#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4781#true} is VALID [2022-04-07 22:59:18,976 INFO L290 TraceCheckUtils]: 6: Hoare triple {4781#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:18,977 INFO L290 TraceCheckUtils]: 7: Hoare triple {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4817#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:59:18,978 INFO L290 TraceCheckUtils]: 8: Hoare triple {4817#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,978 INFO L290 TraceCheckUtils]: 9: Hoare triple {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,979 INFO L290 TraceCheckUtils]: 10: Hoare triple {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,979 INFO L290 TraceCheckUtils]: 11: Hoare triple {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4817#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:59:18,980 INFO L290 TraceCheckUtils]: 12: Hoare triple {4817#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:18,981 INFO L290 TraceCheckUtils]: 13: Hoare triple {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,981 INFO L290 TraceCheckUtils]: 14: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,981 INFO L290 TraceCheckUtils]: 15: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,982 INFO L290 TraceCheckUtils]: 16: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,982 INFO L290 TraceCheckUtils]: 17: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,982 INFO L290 TraceCheckUtils]: 18: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:18,983 INFO L290 TraceCheckUtils]: 19: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:18,983 INFO L272 TraceCheckUtils]: 20: Hoare triple {4782#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4782#false} is VALID [2022-04-07 22:59:18,983 INFO L290 TraceCheckUtils]: 21: Hoare triple {4782#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4782#false} is VALID [2022-04-07 22:59:18,983 INFO L290 TraceCheckUtils]: 22: Hoare triple {4782#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:18,983 INFO L290 TraceCheckUtils]: 23: Hoare triple {4782#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:18,983 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:59:18,983 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:19,182 INFO L290 TraceCheckUtils]: 23: Hoare triple {4782#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:19,183 INFO L290 TraceCheckUtils]: 22: Hoare triple {4782#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:19,183 INFO L290 TraceCheckUtils]: 21: Hoare triple {4782#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4782#false} is VALID [2022-04-07 22:59:19,183 INFO L272 TraceCheckUtils]: 20: Hoare triple {4782#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4782#false} is VALID [2022-04-07 22:59:19,183 INFO L290 TraceCheckUtils]: 19: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4782#false} is VALID [2022-04-07 22:59:19,184 INFO L290 TraceCheckUtils]: 18: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,184 INFO L290 TraceCheckUtils]: 17: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,184 INFO L290 TraceCheckUtils]: 16: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,185 INFO L290 TraceCheckUtils]: 15: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,185 INFO L290 TraceCheckUtils]: 14: Hoare triple {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,185 INFO L290 TraceCheckUtils]: 13: Hoare triple {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4837#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,186 INFO L290 TraceCheckUtils]: 12: Hoare triple {4817#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:19,187 INFO L290 TraceCheckUtils]: 11: Hoare triple {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4817#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:59:19,187 INFO L290 TraceCheckUtils]: 10: Hoare triple {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,187 INFO L290 TraceCheckUtils]: 9: Hoare triple {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,188 INFO L290 TraceCheckUtils]: 8: Hoare triple {4817#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4821#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:19,189 INFO L290 TraceCheckUtils]: 7: Hoare triple {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4817#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 22:59:19,190 INFO L290 TraceCheckUtils]: 6: Hoare triple {4781#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4786#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:19,190 INFO L290 TraceCheckUtils]: 5: Hoare triple {4781#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4781#true} is VALID [2022-04-07 22:59:19,190 INFO L272 TraceCheckUtils]: 4: Hoare triple {4781#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:19,190 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4781#true} {4781#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:19,190 INFO L290 TraceCheckUtils]: 2: Hoare triple {4781#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:19,190 INFO L290 TraceCheckUtils]: 1: Hoare triple {4781#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4781#true} is VALID [2022-04-07 22:59:19,190 INFO L272 TraceCheckUtils]: 0: Hoare triple {4781#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4781#true} is VALID [2022-04-07 22:59:19,190 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:59:19,190 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1455559879] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:19,190 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:19,190 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6, 6] total 12 [2022-04-07 22:59:19,191 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127532320] [2022-04-07 22:59:19,191 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:19,191 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 22:59:19,191 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:19,191 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,223 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:19,223 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-07 22:59:19,223 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:19,224 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-07 22:59:19,224 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-04-07 22:59:19,224 INFO L87 Difference]: Start difference. First operand 95 states and 127 transitions. Second operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:19,762 INFO L93 Difference]: Finished difference Result 122 states and 166 transitions. [2022-04-07 22:59:19,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 22:59:19,762 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 22:59:19,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:19,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 55 transitions. [2022-04-07 22:59:19,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 55 transitions. [2022-04-07 22:59:19,764 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 55 transitions. [2022-04-07 22:59:19,816 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:19,818 INFO L225 Difference]: With dead ends: 122 [2022-04-07 22:59:19,818 INFO L226 Difference]: Without dead ends: 117 [2022-04-07 22:59:19,818 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=229, Unknown=0, NotChecked=0, Total=306 [2022-04-07 22:59:19,818 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 42 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 166 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 56 SdHoareTripleChecker+Invalid, 191 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 166 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:19,819 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [42 Valid, 56 Invalid, 191 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 166 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 22:59:19,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-04-07 22:59:19,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 109. [2022-04-07 22:59:19,983 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:19,984 INFO L82 GeneralOperation]: Start isEquivalent. First operand 117 states. Second operand has 109 states, 104 states have (on average 1.3846153846153846) internal successors, (144), 104 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,984 INFO L74 IsIncluded]: Start isIncluded. First operand 117 states. Second operand has 109 states, 104 states have (on average 1.3846153846153846) internal successors, (144), 104 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,987 INFO L87 Difference]: Start difference. First operand 117 states. Second operand has 109 states, 104 states have (on average 1.3846153846153846) internal successors, (144), 104 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:19,988 INFO L93 Difference]: Finished difference Result 117 states and 159 transitions. [2022-04-07 22:59:19,988 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 159 transitions. [2022-04-07 22:59:19,989 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:19,989 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:19,989 INFO L74 IsIncluded]: Start isIncluded. First operand has 109 states, 104 states have (on average 1.3846153846153846) internal successors, (144), 104 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 117 states. [2022-04-07 22:59:19,989 INFO L87 Difference]: Start difference. First operand has 109 states, 104 states have (on average 1.3846153846153846) internal successors, (144), 104 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 117 states. [2022-04-07 22:59:19,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:19,991 INFO L93 Difference]: Finished difference Result 117 states and 159 transitions. [2022-04-07 22:59:19,991 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 159 transitions. [2022-04-07 22:59:19,992 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:19,993 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:19,993 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:19,993 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:19,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 104 states have (on average 1.3846153846153846) internal successors, (144), 104 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 148 transitions. [2022-04-07 22:59:19,994 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 148 transitions. Word has length 24 [2022-04-07 22:59:19,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:19,994 INFO L478 AbstractCegarLoop]: Abstraction has 109 states and 148 transitions. [2022-04-07 22:59:19,994 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:19,994 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 148 transitions. [2022-04-07 22:59:19,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 22:59:19,996 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:19,996 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:20,012 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:20,203 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-07 22:59:20,203 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:20,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:20,204 INFO L85 PathProgramCache]: Analyzing trace with hash 388770243, now seen corresponding path program 5 times [2022-04-07 22:59:20,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:20,204 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040998720] [2022-04-07 22:59:20,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:20,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:20,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:20,294 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:20,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:20,312 INFO L290 TraceCheckUtils]: 0: Hoare triple {5534#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5522#true} is VALID [2022-04-07 22:59:20,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {5522#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,312 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5522#true} {5522#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,313 INFO L272 TraceCheckUtils]: 0: Hoare triple {5522#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5534#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:20,313 INFO L290 TraceCheckUtils]: 1: Hoare triple {5534#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5522#true} is VALID [2022-04-07 22:59:20,313 INFO L290 TraceCheckUtils]: 2: Hoare triple {5522#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,313 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5522#true} {5522#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,313 INFO L272 TraceCheckUtils]: 4: Hoare triple {5522#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,314 INFO L290 TraceCheckUtils]: 5: Hoare triple {5522#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5527#(= main_~y~0 0)} is VALID [2022-04-07 22:59:20,314 INFO L290 TraceCheckUtils]: 6: Hoare triple {5527#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:20,315 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:20,315 INFO L290 TraceCheckUtils]: 8: Hoare triple {5529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:20,316 INFO L290 TraceCheckUtils]: 9: Hoare triple {5530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:20,316 INFO L290 TraceCheckUtils]: 10: Hoare triple {5530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {5531#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 22:59:20,317 INFO L290 TraceCheckUtils]: 11: Hoare triple {5531#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5532#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:20,317 INFO L290 TraceCheckUtils]: 12: Hoare triple {5532#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5533#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 13: Hoare triple {5533#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 14: Hoare triple {5523#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 15: Hoare triple {5523#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 16: Hoare triple {5523#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 17: Hoare triple {5523#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 18: Hoare triple {5523#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 19: Hoare triple {5523#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 20: Hoare triple {5523#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L272 TraceCheckUtils]: 21: Hoare triple {5523#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 22: Hoare triple {5523#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 23: Hoare triple {5523#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L290 TraceCheckUtils]: 24: Hoare triple {5523#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,318 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:59:20,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:20,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2040998720] [2022-04-07 22:59:20,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2040998720] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:20,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1878972053] [2022-04-07 22:59:20,319 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 22:59:20,319 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:20,319 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:20,320 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:20,321 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-07 22:59:20,371 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-07 22:59:20,372 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:20,372 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-07 22:59:20,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:20,383 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:20,495 INFO L272 TraceCheckUtils]: 0: Hoare triple {5522#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,495 INFO L290 TraceCheckUtils]: 1: Hoare triple {5522#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5522#true} is VALID [2022-04-07 22:59:20,495 INFO L290 TraceCheckUtils]: 2: Hoare triple {5522#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,495 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5522#true} {5522#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,495 INFO L272 TraceCheckUtils]: 4: Hoare triple {5522#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,495 INFO L290 TraceCheckUtils]: 5: Hoare triple {5522#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5527#(= main_~y~0 0)} is VALID [2022-04-07 22:59:20,496 INFO L290 TraceCheckUtils]: 6: Hoare triple {5527#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:20,496 INFO L290 TraceCheckUtils]: 7: Hoare triple {5528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:20,497 INFO L290 TraceCheckUtils]: 8: Hoare triple {5529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:20,497 INFO L290 TraceCheckUtils]: 9: Hoare triple {5530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:20,497 INFO L290 TraceCheckUtils]: 10: Hoare triple {5530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {5568#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:20,498 INFO L290 TraceCheckUtils]: 11: Hoare triple {5568#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5572#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:59:20,498 INFO L290 TraceCheckUtils]: 12: Hoare triple {5572#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5576#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 13: Hoare triple {5576#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 14: Hoare triple {5523#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 15: Hoare triple {5523#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 16: Hoare triple {5523#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 17: Hoare triple {5523#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 18: Hoare triple {5523#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 19: Hoare triple {5523#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 20: Hoare triple {5523#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L272 TraceCheckUtils]: 21: Hoare triple {5523#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 22: Hoare triple {5523#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5523#false} is VALID [2022-04-07 22:59:20,499 INFO L290 TraceCheckUtils]: 23: Hoare triple {5523#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,500 INFO L290 TraceCheckUtils]: 24: Hoare triple {5523#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,500 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:59:20,500 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:20,651 INFO L290 TraceCheckUtils]: 24: Hoare triple {5523#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,651 INFO L290 TraceCheckUtils]: 23: Hoare triple {5523#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,651 INFO L290 TraceCheckUtils]: 22: Hoare triple {5523#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5523#false} is VALID [2022-04-07 22:59:20,651 INFO L272 TraceCheckUtils]: 21: Hoare triple {5523#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5523#false} is VALID [2022-04-07 22:59:20,651 INFO L290 TraceCheckUtils]: 20: Hoare triple {5523#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,651 INFO L290 TraceCheckUtils]: 19: Hoare triple {5523#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {5523#false} is VALID [2022-04-07 22:59:20,651 INFO L290 TraceCheckUtils]: 18: Hoare triple {5523#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {5523#false} is VALID [2022-04-07 22:59:20,651 INFO L290 TraceCheckUtils]: 17: Hoare triple {5523#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5523#false} is VALID [2022-04-07 22:59:20,659 INFO L290 TraceCheckUtils]: 16: Hoare triple {5637#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5523#false} is VALID [2022-04-07 22:59:20,660 INFO L290 TraceCheckUtils]: 15: Hoare triple {5641#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5637#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:59:20,661 INFO L290 TraceCheckUtils]: 14: Hoare triple {5645#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5641#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:59:20,661 INFO L290 TraceCheckUtils]: 13: Hoare triple {5649#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {5645#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:59:20,664 INFO L290 TraceCheckUtils]: 12: Hoare triple {5653#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5649#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:59:20,665 INFO L290 TraceCheckUtils]: 11: Hoare triple {5657#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5653#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:59:20,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {5522#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {5657#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:59:20,665 INFO L290 TraceCheckUtils]: 9: Hoare triple {5522#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,665 INFO L290 TraceCheckUtils]: 8: Hoare triple {5522#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5522#true} is VALID [2022-04-07 22:59:20,665 INFO L290 TraceCheckUtils]: 7: Hoare triple {5522#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5522#true} is VALID [2022-04-07 22:59:20,665 INFO L290 TraceCheckUtils]: 6: Hoare triple {5522#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5522#true} is VALID [2022-04-07 22:59:20,665 INFO L290 TraceCheckUtils]: 5: Hoare triple {5522#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5522#true} is VALID [2022-04-07 22:59:20,665 INFO L272 TraceCheckUtils]: 4: Hoare triple {5522#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,666 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5522#true} {5522#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,666 INFO L290 TraceCheckUtils]: 2: Hoare triple {5522#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,666 INFO L290 TraceCheckUtils]: 1: Hoare triple {5522#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5522#true} is VALID [2022-04-07 22:59:20,666 INFO L272 TraceCheckUtils]: 0: Hoare triple {5522#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5522#true} is VALID [2022-04-07 22:59:20,666 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:59:20,666 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1878972053] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:20,666 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:20,666 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 8] total 19 [2022-04-07 22:59:20,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861205028] [2022-04-07 22:59:20,666 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:20,667 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 22:59:20,667 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:20,667 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:20,690 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:20,690 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 22:59:20,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:20,690 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 22:59:20,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-04-07 22:59:20,691 INFO L87 Difference]: Start difference. First operand 109 states and 148 transitions. Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:21,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:21,710 INFO L93 Difference]: Finished difference Result 150 states and 201 transitions. [2022-04-07 22:59:21,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-04-07 22:59:21,710 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 22:59:21,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:21,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:21,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 77 transitions. [2022-04-07 22:59:21,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:21,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 77 transitions. [2022-04-07 22:59:21,712 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 24 states and 77 transitions. [2022-04-07 22:59:21,782 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:21,783 INFO L225 Difference]: With dead ends: 150 [2022-04-07 22:59:21,783 INFO L226 Difference]: Without dead ends: 133 [2022-04-07 22:59:21,784 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 301 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=255, Invalid=1305, Unknown=0, NotChecked=0, Total=1560 [2022-04-07 22:59:21,784 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 48 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 229 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 281 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 229 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:21,784 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [48 Valid, 54 Invalid, 281 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 229 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 22:59:21,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2022-04-07 22:59:21,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 106. [2022-04-07 22:59:21,958 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:21,958 INFO L82 GeneralOperation]: Start isEquivalent. First operand 133 states. Second operand has 106 states, 101 states have (on average 1.3663366336633664) internal successors, (138), 101 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:21,959 INFO L74 IsIncluded]: Start isIncluded. First operand 133 states. Second operand has 106 states, 101 states have (on average 1.3663366336633664) internal successors, (138), 101 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:21,959 INFO L87 Difference]: Start difference. First operand 133 states. Second operand has 106 states, 101 states have (on average 1.3663366336633664) internal successors, (138), 101 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:21,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:21,960 INFO L93 Difference]: Finished difference Result 133 states and 176 transitions. [2022-04-07 22:59:21,960 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 176 transitions. [2022-04-07 22:59:21,961 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:21,961 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:21,961 INFO L74 IsIncluded]: Start isIncluded. First operand has 106 states, 101 states have (on average 1.3663366336633664) internal successors, (138), 101 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 133 states. [2022-04-07 22:59:21,961 INFO L87 Difference]: Start difference. First operand has 106 states, 101 states have (on average 1.3663366336633664) internal successors, (138), 101 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 133 states. [2022-04-07 22:59:21,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:21,963 INFO L93 Difference]: Finished difference Result 133 states and 176 transitions. [2022-04-07 22:59:21,963 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 176 transitions. [2022-04-07 22:59:21,963 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:21,963 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:21,963 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:21,963 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:21,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 101 states have (on average 1.3663366336633664) internal successors, (138), 101 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:21,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 142 transitions. [2022-04-07 22:59:21,965 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 142 transitions. Word has length 25 [2022-04-07 22:59:21,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:21,965 INFO L478 AbstractCegarLoop]: Abstraction has 106 states and 142 transitions. [2022-04-07 22:59:21,965 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:21,965 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 142 transitions. [2022-04-07 22:59:21,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 22:59:21,965 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:21,965 INFO L499 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:21,981 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:22,174 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-07 22:59:22,174 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:22,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:22,175 INFO L85 PathProgramCache]: Analyzing trace with hash 1620297317, now seen corresponding path program 3 times [2022-04-07 22:59:22,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:22,175 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969168515] [2022-04-07 22:59:22,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:22,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:22,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:22,354 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:22,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:22,360 INFO L290 TraceCheckUtils]: 0: Hoare triple {6392#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6374#true} is VALID [2022-04-07 22:59:22,360 INFO L290 TraceCheckUtils]: 1: Hoare triple {6374#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,360 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6374#true} {6374#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,361 INFO L272 TraceCheckUtils]: 0: Hoare triple {6374#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6392#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:22,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {6392#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6374#true} is VALID [2022-04-07 22:59:22,361 INFO L290 TraceCheckUtils]: 2: Hoare triple {6374#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,361 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6374#true} {6374#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,361 INFO L272 TraceCheckUtils]: 4: Hoare triple {6374#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,361 INFO L290 TraceCheckUtils]: 5: Hoare triple {6374#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6379#(= main_~y~0 0)} is VALID [2022-04-07 22:59:22,362 INFO L290 TraceCheckUtils]: 6: Hoare triple {6379#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6380#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:22,362 INFO L290 TraceCheckUtils]: 7: Hoare triple {6380#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6381#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:22,363 INFO L290 TraceCheckUtils]: 8: Hoare triple {6381#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6382#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:22,363 INFO L290 TraceCheckUtils]: 9: Hoare triple {6382#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6383#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:22,364 INFO L290 TraceCheckUtils]: 10: Hoare triple {6383#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6384#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:59:22,364 INFO L290 TraceCheckUtils]: 11: Hoare triple {6384#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6385#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:59:22,365 INFO L290 TraceCheckUtils]: 12: Hoare triple {6385#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6386#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:59:22,365 INFO L290 TraceCheckUtils]: 13: Hoare triple {6386#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6387#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 22:59:22,366 INFO L290 TraceCheckUtils]: 14: Hoare triple {6387#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6388#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 22:59:22,366 INFO L290 TraceCheckUtils]: 15: Hoare triple {6388#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6389#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 22:59:22,366 INFO L290 TraceCheckUtils]: 16: Hoare triple {6389#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6390#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:59:22,367 INFO L290 TraceCheckUtils]: 17: Hoare triple {6390#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6390#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:59:22,367 INFO L290 TraceCheckUtils]: 18: Hoare triple {6390#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {6391#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} is VALID [2022-04-07 22:59:22,368 INFO L290 TraceCheckUtils]: 19: Hoare triple {6391#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,368 INFO L290 TraceCheckUtils]: 20: Hoare triple {6375#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,368 INFO L290 TraceCheckUtils]: 21: Hoare triple {6375#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,368 INFO L272 TraceCheckUtils]: 22: Hoare triple {6375#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6375#false} is VALID [2022-04-07 22:59:22,368 INFO L290 TraceCheckUtils]: 23: Hoare triple {6375#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6375#false} is VALID [2022-04-07 22:59:22,368 INFO L290 TraceCheckUtils]: 24: Hoare triple {6375#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,368 INFO L290 TraceCheckUtils]: 25: Hoare triple {6375#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,368 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:22,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:22,368 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969168515] [2022-04-07 22:59:22,368 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1969168515] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:22,368 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [465888099] [2022-04-07 22:59:22,368 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:59:22,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:22,369 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:22,369 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:22,370 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-07 22:59:22,501 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-04-07 22:59:22,501 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:22,502 INFO L263 TraceCheckSpWp]: Trace formula consists of 115 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-07 22:59:22,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:22,509 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:22,737 INFO L272 TraceCheckUtils]: 0: Hoare triple {6374#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {6374#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6374#true} is VALID [2022-04-07 22:59:22,737 INFO L290 TraceCheckUtils]: 2: Hoare triple {6374#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,737 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6374#true} {6374#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,737 INFO L272 TraceCheckUtils]: 4: Hoare triple {6374#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:22,738 INFO L290 TraceCheckUtils]: 5: Hoare triple {6374#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6379#(= main_~y~0 0)} is VALID [2022-04-07 22:59:22,738 INFO L290 TraceCheckUtils]: 6: Hoare triple {6379#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6380#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:22,739 INFO L290 TraceCheckUtils]: 7: Hoare triple {6380#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6381#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:22,739 INFO L290 TraceCheckUtils]: 8: Hoare triple {6381#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6382#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:22,740 INFO L290 TraceCheckUtils]: 9: Hoare triple {6382#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6383#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 22:59:22,740 INFO L290 TraceCheckUtils]: 10: Hoare triple {6383#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6384#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 22:59:22,741 INFO L290 TraceCheckUtils]: 11: Hoare triple {6384#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6385#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 22:59:22,741 INFO L290 TraceCheckUtils]: 12: Hoare triple {6385#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6386#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 22:59:22,742 INFO L290 TraceCheckUtils]: 13: Hoare triple {6386#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6387#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 22:59:22,742 INFO L290 TraceCheckUtils]: 14: Hoare triple {6387#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6388#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 22:59:22,743 INFO L290 TraceCheckUtils]: 15: Hoare triple {6388#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6389#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 22:59:22,744 INFO L290 TraceCheckUtils]: 16: Hoare triple {6389#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6390#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:59:22,744 INFO L290 TraceCheckUtils]: 17: Hoare triple {6390#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6390#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 22:59:22,745 INFO L290 TraceCheckUtils]: 18: Hoare triple {6390#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {6450#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-07 22:59:22,745 INFO L290 TraceCheckUtils]: 19: Hoare triple {6450#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,745 INFO L290 TraceCheckUtils]: 20: Hoare triple {6375#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,745 INFO L290 TraceCheckUtils]: 21: Hoare triple {6375#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,745 INFO L272 TraceCheckUtils]: 22: Hoare triple {6375#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6375#false} is VALID [2022-04-07 22:59:22,745 INFO L290 TraceCheckUtils]: 23: Hoare triple {6375#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6375#false} is VALID [2022-04-07 22:59:22,745 INFO L290 TraceCheckUtils]: 24: Hoare triple {6375#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,745 INFO L290 TraceCheckUtils]: 25: Hoare triple {6375#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:22,746 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:22,746 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:23,059 INFO L290 TraceCheckUtils]: 25: Hoare triple {6375#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:23,059 INFO L290 TraceCheckUtils]: 24: Hoare triple {6375#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:23,059 INFO L290 TraceCheckUtils]: 23: Hoare triple {6375#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6375#false} is VALID [2022-04-07 22:59:23,059 INFO L272 TraceCheckUtils]: 22: Hoare triple {6375#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6375#false} is VALID [2022-04-07 22:59:23,059 INFO L290 TraceCheckUtils]: 21: Hoare triple {6375#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:23,059 INFO L290 TraceCheckUtils]: 20: Hoare triple {6375#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:23,060 INFO L290 TraceCheckUtils]: 19: Hoare triple {6490#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {6375#false} is VALID [2022-04-07 22:59:23,060 INFO L290 TraceCheckUtils]: 18: Hoare triple {6494#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {6490#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:59:23,060 INFO L290 TraceCheckUtils]: 17: Hoare triple {6494#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6494#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:59:23,061 INFO L290 TraceCheckUtils]: 16: Hoare triple {6501#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6494#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:59:23,062 INFO L290 TraceCheckUtils]: 15: Hoare triple {6505#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6501#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 22:59:23,062 INFO L290 TraceCheckUtils]: 14: Hoare triple {6509#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6505#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 22:59:23,063 INFO L290 TraceCheckUtils]: 13: Hoare triple {6513#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6509#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 22:59:23,067 INFO L290 TraceCheckUtils]: 12: Hoare triple {6517#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6513#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 22:59:23,068 INFO L290 TraceCheckUtils]: 11: Hoare triple {6521#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6517#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 22:59:23,069 INFO L290 TraceCheckUtils]: 10: Hoare triple {6525#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6521#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 22:59:23,069 INFO L290 TraceCheckUtils]: 9: Hoare triple {6529#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6525#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 22:59:23,070 INFO L290 TraceCheckUtils]: 8: Hoare triple {6533#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6529#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 22:59:23,071 INFO L290 TraceCheckUtils]: 7: Hoare triple {6537#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6533#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 22:59:23,071 INFO L290 TraceCheckUtils]: 6: Hoare triple {6541#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6537#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 22:59:23,073 INFO L290 TraceCheckUtils]: 5: Hoare triple {6374#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6541#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 22:59:23,073 INFO L272 TraceCheckUtils]: 4: Hoare triple {6374#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:23,073 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6374#true} {6374#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:23,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {6374#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:23,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {6374#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6374#true} is VALID [2022-04-07 22:59:23,073 INFO L272 TraceCheckUtils]: 0: Hoare triple {6374#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6374#true} is VALID [2022-04-07 22:59:23,073 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:23,074 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [465888099] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:23,074 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:23,074 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15] total 30 [2022-04-07 22:59:23,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923566695] [2022-04-07 22:59:23,074 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:23,074 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.3333333333333333) internal successors, (40), 29 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 22:59:23,074 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:23,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 1.3333333333333333) internal successors, (40), 29 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:23,099 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:23,099 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-07 22:59:23,099 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:23,100 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-07 22:59:23,100 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=667, Unknown=0, NotChecked=0, Total=870 [2022-04-07 22:59:23,100 INFO L87 Difference]: Start difference. First operand 106 states and 142 transitions. Second operand has 30 states, 30 states have (on average 1.3333333333333333) internal successors, (40), 29 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:50,424 INFO L93 Difference]: Finished difference Result 398 states and 600 transitions. [2022-04-07 22:59:50,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2022-04-07 22:59:50,425 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.3333333333333333) internal successors, (40), 29 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 22:59:50,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:50,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.3333333333333333) internal successors, (40), 29 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 247 transitions. [2022-04-07 22:59:50,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.3333333333333333) internal successors, (40), 29 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 247 transitions. [2022-04-07 22:59:50,428 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 61 states and 247 transitions. [2022-04-07 22:59:51,913 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 247 edges. 247 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:51,919 INFO L225 Difference]: With dead ends: 398 [2022-04-07 22:59:51,919 INFO L226 Difference]: Without dead ends: 365 [2022-04-07 22:59:51,921 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2084 ImplicationChecksByTransitivity, 22.9s TimeCoverageRelationStatistics Valid=1980, Invalid=5676, Unknown=0, NotChecked=0, Total=7656 [2022-04-07 22:59:51,921 INFO L913 BasicCegarLoop]: 32 mSDtfsCounter, 740 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 931 mSolverCounterSat, 541 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 740 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 1472 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 541 IncrementalHoareTripleChecker+Valid, 931 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:51,921 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [740 Valid, 99 Invalid, 1472 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [541 Valid, 931 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-07 22:59:51,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2022-04-07 22:59:52,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 155. [2022-04-07 22:59:52,285 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:52,285 INFO L82 GeneralOperation]: Start isEquivalent. First operand 365 states. Second operand has 155 states, 150 states have (on average 1.3666666666666667) internal successors, (205), 150 states have internal predecessors, (205), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,285 INFO L74 IsIncluded]: Start isIncluded. First operand 365 states. Second operand has 155 states, 150 states have (on average 1.3666666666666667) internal successors, (205), 150 states have internal predecessors, (205), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,285 INFO L87 Difference]: Start difference. First operand 365 states. Second operand has 155 states, 150 states have (on average 1.3666666666666667) internal successors, (205), 150 states have internal predecessors, (205), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:52,292 INFO L93 Difference]: Finished difference Result 365 states and 497 transitions. [2022-04-07 22:59:52,292 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 497 transitions. [2022-04-07 22:59:52,292 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:52,292 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:52,293 INFO L74 IsIncluded]: Start isIncluded. First operand has 155 states, 150 states have (on average 1.3666666666666667) internal successors, (205), 150 states have internal predecessors, (205), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-07 22:59:52,293 INFO L87 Difference]: Start difference. First operand has 155 states, 150 states have (on average 1.3666666666666667) internal successors, (205), 150 states have internal predecessors, (205), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-07 22:59:52,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:52,298 INFO L93 Difference]: Finished difference Result 365 states and 497 transitions. [2022-04-07 22:59:52,298 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 497 transitions. [2022-04-07 22:59:52,299 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:52,299 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:52,299 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:52,299 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:52,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 150 states have (on average 1.3666666666666667) internal successors, (205), 150 states have internal predecessors, (205), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 209 transitions. [2022-04-07 22:59:52,302 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 209 transitions. Word has length 26 [2022-04-07 22:59:52,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:52,302 INFO L478 AbstractCegarLoop]: Abstraction has 155 states and 209 transitions. [2022-04-07 22:59:52,303 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 1.3333333333333333) internal successors, (40), 29 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,303 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 209 transitions. [2022-04-07 22:59:52,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 22:59:52,303 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:52,303 INFO L499 BasicCegarLoop]: trace histogram [6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:52,307 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:52,507 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-07 22:59:52,508 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:52,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:52,508 INFO L85 PathProgramCache]: Analyzing trace with hash -1829444226, now seen corresponding path program 6 times [2022-04-07 22:59:52,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:52,508 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211208098] [2022-04-07 22:59:52,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:52,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:52,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:52,593 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:52,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:52,598 INFO L290 TraceCheckUtils]: 0: Hoare triple {8209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8201#true} is VALID [2022-04-07 22:59:52,598 INFO L290 TraceCheckUtils]: 1: Hoare triple {8201#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,598 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8201#true} {8201#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,599 INFO L272 TraceCheckUtils]: 0: Hoare triple {8201#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:52,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {8209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8201#true} is VALID [2022-04-07 22:59:52,599 INFO L290 TraceCheckUtils]: 2: Hoare triple {8201#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,599 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8201#true} {8201#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,599 INFO L272 TraceCheckUtils]: 4: Hoare triple {8201#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,599 INFO L290 TraceCheckUtils]: 5: Hoare triple {8201#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8201#true} is VALID [2022-04-07 22:59:52,599 INFO L290 TraceCheckUtils]: 6: Hoare triple {8201#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8201#true} is VALID [2022-04-07 22:59:52,599 INFO L290 TraceCheckUtils]: 7: Hoare triple {8201#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8201#true} is VALID [2022-04-07 22:59:52,600 INFO L290 TraceCheckUtils]: 8: Hoare triple {8201#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:52,600 INFO L290 TraceCheckUtils]: 9: Hoare triple {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:52,601 INFO L290 TraceCheckUtils]: 10: Hoare triple {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8207#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:52,601 INFO L290 TraceCheckUtils]: 11: Hoare triple {8207#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,602 INFO L290 TraceCheckUtils]: 12: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,602 INFO L290 TraceCheckUtils]: 13: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,602 INFO L290 TraceCheckUtils]: 14: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,602 INFO L290 TraceCheckUtils]: 15: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,603 INFO L290 TraceCheckUtils]: 16: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8207#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:52,604 INFO L290 TraceCheckUtils]: 17: Hoare triple {8207#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:52,604 INFO L290 TraceCheckUtils]: 18: Hoare triple {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8202#false} is VALID [2022-04-07 22:59:52,604 INFO L290 TraceCheckUtils]: 19: Hoare triple {8202#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8202#false} is VALID [2022-04-07 22:59:52,604 INFO L290 TraceCheckUtils]: 20: Hoare triple {8202#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8202#false} is VALID [2022-04-07 22:59:52,604 INFO L290 TraceCheckUtils]: 21: Hoare triple {8202#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8202#false} is VALID [2022-04-07 22:59:52,605 INFO L290 TraceCheckUtils]: 22: Hoare triple {8202#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:52,605 INFO L272 TraceCheckUtils]: 23: Hoare triple {8202#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8202#false} is VALID [2022-04-07 22:59:52,605 INFO L290 TraceCheckUtils]: 24: Hoare triple {8202#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8202#false} is VALID [2022-04-07 22:59:52,605 INFO L290 TraceCheckUtils]: 25: Hoare triple {8202#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:52,605 INFO L290 TraceCheckUtils]: 26: Hoare triple {8202#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:52,605 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 12 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 22:59:52,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:52,605 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211208098] [2022-04-07 22:59:52,605 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211208098] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:52,605 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [68199438] [2022-04-07 22:59:52,605 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 22:59:52,605 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:52,606 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:52,607 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:52,608 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-07 22:59:52,674 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-07 22:59:52,675 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:52,675 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 22:59:52,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:52,682 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:52,894 INFO L272 TraceCheckUtils]: 0: Hoare triple {8201#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,894 INFO L290 TraceCheckUtils]: 1: Hoare triple {8201#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8201#true} is VALID [2022-04-07 22:59:52,894 INFO L290 TraceCheckUtils]: 2: Hoare triple {8201#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,894 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8201#true} {8201#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,894 INFO L272 TraceCheckUtils]: 4: Hoare triple {8201#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:52,894 INFO L290 TraceCheckUtils]: 5: Hoare triple {8201#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8201#true} is VALID [2022-04-07 22:59:52,894 INFO L290 TraceCheckUtils]: 6: Hoare triple {8201#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8201#true} is VALID [2022-04-07 22:59:52,894 INFO L290 TraceCheckUtils]: 7: Hoare triple {8201#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8201#true} is VALID [2022-04-07 22:59:52,895 INFO L290 TraceCheckUtils]: 8: Hoare triple {8201#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:52,895 INFO L290 TraceCheckUtils]: 9: Hoare triple {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:52,896 INFO L290 TraceCheckUtils]: 10: Hoare triple {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8207#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:52,896 INFO L290 TraceCheckUtils]: 11: Hoare triple {8207#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,897 INFO L290 TraceCheckUtils]: 12: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,897 INFO L290 TraceCheckUtils]: 13: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,897 INFO L290 TraceCheckUtils]: 14: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,898 INFO L290 TraceCheckUtils]: 15: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:52,898 INFO L290 TraceCheckUtils]: 16: Hoare triple {8208#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8207#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:52,899 INFO L290 TraceCheckUtils]: 17: Hoare triple {8207#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:52,900 INFO L290 TraceCheckUtils]: 18: Hoare triple {8206#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8267#(<= (+ main_~x~0 1) (* (div (+ main_~x~0 1) 4294967296) 4294967296))} is VALID [2022-04-07 22:59:52,901 INFO L290 TraceCheckUtils]: 19: Hoare triple {8267#(<= (+ main_~x~0 1) (* (div (+ main_~x~0 1) 4294967296) 4294967296))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8271#(<= (+ main_~x~0 2) (* (div (+ main_~x~0 2) 4294967296) 4294967296))} is VALID [2022-04-07 22:59:52,901 INFO L290 TraceCheckUtils]: 20: Hoare triple {8271#(<= (+ main_~x~0 2) (* (div (+ main_~x~0 2) 4294967296) 4294967296))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8275#(<= (+ main_~x~0 3) (* 4294967296 (div (+ main_~x~0 3) 4294967296)))} is VALID [2022-04-07 22:59:52,902 INFO L290 TraceCheckUtils]: 21: Hoare triple {8275#(<= (+ main_~x~0 3) (* 4294967296 (div (+ main_~x~0 3) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8279#(<= (+ main_~x~0 4) (* (div (+ main_~x~0 4) 4294967296) 4294967296))} is VALID [2022-04-07 22:59:52,902 INFO L290 TraceCheckUtils]: 22: Hoare triple {8279#(<= (+ main_~x~0 4) (* (div (+ main_~x~0 4) 4294967296) 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:52,903 INFO L272 TraceCheckUtils]: 23: Hoare triple {8202#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8202#false} is VALID [2022-04-07 22:59:52,903 INFO L290 TraceCheckUtils]: 24: Hoare triple {8202#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8202#false} is VALID [2022-04-07 22:59:52,903 INFO L290 TraceCheckUtils]: 25: Hoare triple {8202#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:52,903 INFO L290 TraceCheckUtils]: 26: Hoare triple {8202#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:52,903 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:59:52,903 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:53,180 INFO L290 TraceCheckUtils]: 26: Hoare triple {8202#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:53,180 INFO L290 TraceCheckUtils]: 25: Hoare triple {8202#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:53,180 INFO L290 TraceCheckUtils]: 24: Hoare triple {8202#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8202#false} is VALID [2022-04-07 22:59:53,180 INFO L272 TraceCheckUtils]: 23: Hoare triple {8202#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8202#false} is VALID [2022-04-07 22:59:53,181 INFO L290 TraceCheckUtils]: 22: Hoare triple {8307#(< 0 (mod main_~x~0 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8202#false} is VALID [2022-04-07 22:59:53,181 INFO L290 TraceCheckUtils]: 21: Hoare triple {8311#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8307#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:53,182 INFO L290 TraceCheckUtils]: 20: Hoare triple {8315#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8311#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 22:59:53,183 INFO L290 TraceCheckUtils]: 19: Hoare triple {8319#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8315#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 22:59:53,183 INFO L290 TraceCheckUtils]: 18: Hoare triple {8323#(< 0 (mod (+ 4294967292 main_~x~0) 4294967296))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8319#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 22:59:53,184 INFO L290 TraceCheckUtils]: 17: Hoare triple {8327#(< 0 (mod (+ 4294967291 main_~x~0) 4294967296))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8323#(< 0 (mod (+ 4294967292 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,185 INFO L290 TraceCheckUtils]: 16: Hoare triple {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {8327#(< 0 (mod (+ 4294967291 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,185 INFO L290 TraceCheckUtils]: 15: Hoare triple {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,185 INFO L290 TraceCheckUtils]: 14: Hoare triple {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,186 INFO L290 TraceCheckUtils]: 13: Hoare triple {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,186 INFO L290 TraceCheckUtils]: 12: Hoare triple {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,186 INFO L290 TraceCheckUtils]: 11: Hoare triple {8327#(< 0 (mod (+ 4294967291 main_~x~0) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8331#(< 0 (mod (+ 4294967290 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,187 INFO L290 TraceCheckUtils]: 10: Hoare triple {8323#(< 0 (mod (+ 4294967292 main_~x~0) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8327#(< 0 (mod (+ 4294967291 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,187 INFO L290 TraceCheckUtils]: 9: Hoare triple {8323#(< 0 (mod (+ 4294967292 main_~x~0) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {8323#(< 0 (mod (+ 4294967292 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,188 INFO L290 TraceCheckUtils]: 8: Hoare triple {8201#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8323#(< 0 (mod (+ 4294967292 main_~x~0) 4294967296))} is VALID [2022-04-07 22:59:53,188 INFO L290 TraceCheckUtils]: 7: Hoare triple {8201#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8201#true} is VALID [2022-04-07 22:59:53,188 INFO L290 TraceCheckUtils]: 6: Hoare triple {8201#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8201#true} is VALID [2022-04-07 22:59:53,188 INFO L290 TraceCheckUtils]: 5: Hoare triple {8201#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8201#true} is VALID [2022-04-07 22:59:53,188 INFO L272 TraceCheckUtils]: 4: Hoare triple {8201#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:53,188 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8201#true} {8201#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:53,188 INFO L290 TraceCheckUtils]: 2: Hoare triple {8201#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:53,188 INFO L290 TraceCheckUtils]: 1: Hoare triple {8201#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8201#true} is VALID [2022-04-07 22:59:53,188 INFO L272 TraceCheckUtils]: 0: Hoare triple {8201#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8201#true} is VALID [2022-04-07 22:59:53,189 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:59:53,189 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [68199438] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:53,189 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:53,189 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 9, 9] total 17 [2022-04-07 22:59:53,189 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [220648971] [2022-04-07 22:59:53,189 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:53,189 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:59:53,189 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:53,190 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,227 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:53,227 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-07 22:59:53,227 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:53,228 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-07 22:59:53,228 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=195, Unknown=0, NotChecked=0, Total=272 [2022-04-07 22:59:53,228 INFO L87 Difference]: Start difference. First operand 155 states and 209 transitions. Second operand has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:56,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:56,155 INFO L93 Difference]: Finished difference Result 342 states and 494 transitions. [2022-04-07 22:59:56,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-04-07 22:59:56,155 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 22:59:56,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:56,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:56,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 126 transitions. [2022-04-07 22:59:56,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:56,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 126 transitions. [2022-04-07 22:59:56,158 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 36 states and 126 transitions. [2022-04-07 22:59:56,460 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 126 edges. 126 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:56,474 INFO L225 Difference]: With dead ends: 342 [2022-04-07 22:59:56,474 INFO L226 Difference]: Without dead ends: 323 [2022-04-07 22:59:56,475 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 546 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=464, Invalid=1986, Unknown=0, NotChecked=0, Total=2450 [2022-04-07 22:59:56,475 INFO L913 BasicCegarLoop]: 31 mSDtfsCounter, 136 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 331 mSolverCounterSat, 83 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 136 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 414 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 83 IncrementalHoareTripleChecker+Valid, 331 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:56,475 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [136 Valid, 73 Invalid, 414 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [83 Valid, 331 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-07 22:59:56,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2022-04-07 22:59:57,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 320. [2022-04-07 22:59:57,098 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:57,099 INFO L82 GeneralOperation]: Start isEquivalent. First operand 323 states. Second operand has 320 states, 315 states have (on average 1.4444444444444444) internal successors, (455), 315 states have internal predecessors, (455), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,099 INFO L74 IsIncluded]: Start isIncluded. First operand 323 states. Second operand has 320 states, 315 states have (on average 1.4444444444444444) internal successors, (455), 315 states have internal predecessors, (455), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,099 INFO L87 Difference]: Start difference. First operand 323 states. Second operand has 320 states, 315 states have (on average 1.4444444444444444) internal successors, (455), 315 states have internal predecessors, (455), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:57,104 INFO L93 Difference]: Finished difference Result 323 states and 462 transitions. [2022-04-07 22:59:57,104 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 462 transitions. [2022-04-07 22:59:57,104 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:57,104 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:57,104 INFO L74 IsIncluded]: Start isIncluded. First operand has 320 states, 315 states have (on average 1.4444444444444444) internal successors, (455), 315 states have internal predecessors, (455), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 323 states. [2022-04-07 22:59:57,105 INFO L87 Difference]: Start difference. First operand has 320 states, 315 states have (on average 1.4444444444444444) internal successors, (455), 315 states have internal predecessors, (455), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 323 states. [2022-04-07 22:59:57,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:57,109 INFO L93 Difference]: Finished difference Result 323 states and 462 transitions. [2022-04-07 22:59:57,109 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 462 transitions. [2022-04-07 22:59:57,109 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:57,109 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:57,109 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:57,109 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:57,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 320 states, 315 states have (on average 1.4444444444444444) internal successors, (455), 315 states have internal predecessors, (455), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 459 transitions. [2022-04-07 22:59:57,114 INFO L78 Accepts]: Start accepts. Automaton has 320 states and 459 transitions. Word has length 27 [2022-04-07 22:59:57,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:57,115 INFO L478 AbstractCegarLoop]: Abstraction has 320 states and 459 transitions. [2022-04-07 22:59:57,115 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 16 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,115 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 459 transitions. [2022-04-07 22:59:57,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 22:59:57,115 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:57,115 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:57,119 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:57,319 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-07 22:59:57,319 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:57,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:57,319 INFO L85 PathProgramCache]: Analyzing trace with hash -87467495, now seen corresponding path program 7 times [2022-04-07 22:59:57,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:57,319 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [178943902] [2022-04-07 22:59:57,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:57,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:57,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:57,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:57,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:57,622 INFO L290 TraceCheckUtils]: 0: Hoare triple {10085#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10065#true} is VALID [2022-04-07 22:59:57,622 INFO L290 TraceCheckUtils]: 1: Hoare triple {10065#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:57,622 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10065#true} {10065#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:57,622 INFO L272 TraceCheckUtils]: 0: Hoare triple {10065#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10085#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:57,622 INFO L290 TraceCheckUtils]: 1: Hoare triple {10085#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10065#true} is VALID [2022-04-07 22:59:57,622 INFO L290 TraceCheckUtils]: 2: Hoare triple {10065#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:57,622 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10065#true} {10065#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:57,623 INFO L272 TraceCheckUtils]: 4: Hoare triple {10065#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:57,623 INFO L290 TraceCheckUtils]: 5: Hoare triple {10065#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10070#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:59:57,624 INFO L290 TraceCheckUtils]: 6: Hoare triple {10070#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10071#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 1)) (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)))} is VALID [2022-04-07 22:59:57,624 INFO L290 TraceCheckUtils]: 7: Hoare triple {10071#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 1)) (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10072#(and (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 2)))} is VALID [2022-04-07 22:59:57,625 INFO L290 TraceCheckUtils]: 8: Hoare triple {10072#(and (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10073#(and (<= (+ (* main_~x~0 2) main_~y~0 3) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 3)))} is VALID [2022-04-07 22:59:57,625 INFO L290 TraceCheckUtils]: 9: Hoare triple {10073#(and (<= (+ (* main_~x~0 2) main_~y~0 3) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 3)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10074#(and (<= (* main_~n~0 2) (+ main_~y~0 3 (* 8589934592 (div main_~x~0 4294967296)))) (<= (+ main_~y~0 3 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)))} is VALID [2022-04-07 22:59:57,626 INFO L290 TraceCheckUtils]: 10: Hoare triple {10074#(and (<= (* main_~n~0 2) (+ main_~y~0 3 (* 8589934592 (div main_~x~0 4294967296)))) (<= (+ main_~y~0 3 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {10075#(and (<= (+ main_~z~0 3 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ main_~z~0 3 (* 8589934592 (div main_~x~0 4294967296)))))} is VALID [2022-04-07 22:59:57,630 INFO L290 TraceCheckUtils]: 11: Hoare triple {10075#(and (<= (+ main_~z~0 3 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ main_~z~0 3 (* 8589934592 (div main_~x~0 4294967296)))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10076#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} is VALID [2022-04-07 22:59:57,631 INFO L290 TraceCheckUtils]: 12: Hoare triple {10076#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10077#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 22:59:57,632 INFO L290 TraceCheckUtils]: 13: Hoare triple {10077#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10078#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:57,632 INFO L290 TraceCheckUtils]: 14: Hoare triple {10078#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {10078#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:57,633 INFO L290 TraceCheckUtils]: 15: Hoare triple {10078#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10077#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 22:59:57,634 INFO L290 TraceCheckUtils]: 16: Hoare triple {10077#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10076#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} is VALID [2022-04-07 22:59:57,635 INFO L290 TraceCheckUtils]: 17: Hoare triple {10076#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10079#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:57,635 INFO L290 TraceCheckUtils]: 18: Hoare triple {10079#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10079#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 22:59:57,636 INFO L290 TraceCheckUtils]: 19: Hoare triple {10079#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10080#(<= (* main_~n~0 2) (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 2))} is VALID [2022-04-07 22:59:57,637 INFO L290 TraceCheckUtils]: 20: Hoare triple {10080#(<= (* main_~n~0 2) (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10081#(<= (* main_~n~0 2) (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 1))} is VALID [2022-04-07 22:59:57,639 INFO L290 TraceCheckUtils]: 21: Hoare triple {10081#(<= (* main_~n~0 2) (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10082#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:59:57,639 INFO L290 TraceCheckUtils]: 22: Hoare triple {10082#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10082#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 22:59:57,640 INFO L272 TraceCheckUtils]: 23: Hoare triple {10082#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10083#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:59:57,641 INFO L290 TraceCheckUtils]: 24: Hoare triple {10083#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10084#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:59:57,641 INFO L290 TraceCheckUtils]: 25: Hoare triple {10084#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10066#false} is VALID [2022-04-07 22:59:57,641 INFO L290 TraceCheckUtils]: 26: Hoare triple {10066#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10066#false} is VALID [2022-04-07 22:59:57,641 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:57,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:57,642 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [178943902] [2022-04-07 22:59:57,642 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [178943902] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:57,642 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1418182825] [2022-04-07 22:59:57,642 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 22:59:57,642 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:57,642 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:57,643 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:57,643 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-07 22:59:57,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:57,864 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 54 conjunts are in the unsatisfiable core [2022-04-07 22:59:57,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:57,899 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:58,715 INFO L272 TraceCheckUtils]: 0: Hoare triple {10065#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:58,715 INFO L290 TraceCheckUtils]: 1: Hoare triple {10065#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10065#true} is VALID [2022-04-07 22:59:58,715 INFO L290 TraceCheckUtils]: 2: Hoare triple {10065#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:58,715 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10065#true} {10065#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:58,715 INFO L272 TraceCheckUtils]: 4: Hoare triple {10065#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 22:59:58,716 INFO L290 TraceCheckUtils]: 5: Hoare triple {10065#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10070#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 22:59:58,716 INFO L290 TraceCheckUtils]: 6: Hoare triple {10070#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10107#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0))} is VALID [2022-04-07 22:59:58,717 INFO L290 TraceCheckUtils]: 7: Hoare triple {10107#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10111#(and (= (+ (- 2) main_~y~0) 0) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 22:59:58,718 INFO L290 TraceCheckUtils]: 8: Hoare triple {10111#(and (= (+ (- 2) main_~y~0) 0) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10115#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 1)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 3) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:59:58,718 INFO L290 TraceCheckUtils]: 9: Hoare triple {10115#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 1)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 3) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10115#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 1)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 3) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:59:58,719 INFO L290 TraceCheckUtils]: 10: Hoare triple {10115#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 1)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 3) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {10122#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 1)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 3))} is VALID [2022-04-07 22:59:58,719 INFO L290 TraceCheckUtils]: 11: Hoare triple {10122#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 1)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 3))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10126#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= 3 (+ main_~z~0 1)) (= (+ (- 2) main_~n~0) main_~x~0) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:59:58,720 INFO L290 TraceCheckUtils]: 12: Hoare triple {10126#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= 3 (+ main_~z~0 1)) (= (+ (- 2) main_~n~0) main_~x~0) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10130#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 1) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= 3 (+ main_~z~0 2)))} is VALID [2022-04-07 22:59:58,721 INFO L290 TraceCheckUtils]: 13: Hoare triple {10130#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 1) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= 3 (+ main_~z~0 2)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10134#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= (+ main_~z~0 1) 1))} is VALID [2022-04-07 22:59:58,721 INFO L290 TraceCheckUtils]: 14: Hoare triple {10134#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= (+ main_~z~0 1) 1))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {10134#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= (+ main_~z~0 1) 1))} is VALID [2022-04-07 22:59:58,722 INFO L290 TraceCheckUtils]: 15: Hoare triple {10134#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= (+ main_~z~0 1) 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10141#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 1) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)))} is VALID [2022-04-07 22:59:58,722 INFO L290 TraceCheckUtils]: 16: Hoare triple {10141#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 1) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10145#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 2))} is VALID [2022-04-07 22:59:58,722 INFO L290 TraceCheckUtils]: 17: Hoare triple {10145#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10149#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 3))} is VALID [2022-04-07 22:59:58,723 INFO L290 TraceCheckUtils]: 18: Hoare triple {10149#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 3))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10149#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 3))} is VALID [2022-04-07 22:59:58,724 INFO L290 TraceCheckUtils]: 19: Hoare triple {10149#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 3))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10156#(and (= (+ main_~x~0 1) main_~n~0) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= 3 (+ (- 1) main_~z~0)))} is VALID [2022-04-07 22:59:58,724 INFO L290 TraceCheckUtils]: 20: Hoare triple {10156#(and (= (+ main_~x~0 1) main_~n~0) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= 3 (+ (- 1) main_~z~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10160#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~n~0 (+ main_~x~0 2)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= 5 main_~z~0))} is VALID [2022-04-07 22:59:58,725 INFO L290 TraceCheckUtils]: 21: Hoare triple {10160#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~n~0 (+ main_~x~0 2)) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= 5 main_~z~0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10164#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 3) main_~n~0) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 6))} is VALID [2022-04-07 22:59:58,726 INFO L290 TraceCheckUtils]: 22: Hoare triple {10164#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 3) main_~n~0) (< 0 (mod (+ main_~n~0 4294967294) 4294967296)) (= main_~z~0 6))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10168#(and (<= (mod (+ main_~n~0 4294967293) 4294967296) 0) (= main_~z~0 6))} is VALID [2022-04-07 22:59:58,728 INFO L272 TraceCheckUtils]: 23: Hoare triple {10168#(and (<= (mod (+ main_~n~0 4294967293) 4294967296) 0) (= main_~z~0 6))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10172#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:59:58,729 INFO L290 TraceCheckUtils]: 24: Hoare triple {10172#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10176#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:59:58,729 INFO L290 TraceCheckUtils]: 25: Hoare triple {10176#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10066#false} is VALID [2022-04-07 22:59:58,729 INFO L290 TraceCheckUtils]: 26: Hoare triple {10066#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10066#false} is VALID [2022-04-07 22:59:58,729 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:58,729 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:00,254 INFO L290 TraceCheckUtils]: 26: Hoare triple {10066#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10066#false} is VALID [2022-04-07 23:00:00,254 INFO L290 TraceCheckUtils]: 25: Hoare triple {10176#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10066#false} is VALID [2022-04-07 23:00:00,255 INFO L290 TraceCheckUtils]: 24: Hoare triple {10172#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10176#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:00:00,256 INFO L272 TraceCheckUtils]: 23: Hoare triple {10082#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10172#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:00:00,257 INFO L290 TraceCheckUtils]: 22: Hoare triple {10195#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10082#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:00:00,259 INFO L290 TraceCheckUtils]: 21: Hoare triple {10199#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10195#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} is VALID [2022-04-07 23:00:00,261 INFO L290 TraceCheckUtils]: 20: Hoare triple {10203#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10199#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} is VALID [2022-04-07 23:00:00,262 INFO L290 TraceCheckUtils]: 19: Hoare triple {10207#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {10203#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 23:00:00,262 INFO L290 TraceCheckUtils]: 18: Hoare triple {10207#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10207#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))))} is VALID [2022-04-07 23:00:00,263 INFO L290 TraceCheckUtils]: 17: Hoare triple {10214#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10207#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))))} is VALID [2022-04-07 23:00:00,264 INFO L290 TraceCheckUtils]: 16: Hoare triple {10218#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0) (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10214#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))))} is VALID [2022-04-07 23:00:00,265 INFO L290 TraceCheckUtils]: 15: Hoare triple {10222#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10218#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0) (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 23:00:00,266 INFO L290 TraceCheckUtils]: 14: Hoare triple {10222#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {10222#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 23:00:00,267 INFO L290 TraceCheckUtils]: 13: Hoare triple {10229#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0) (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10222#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 23:00:00,268 INFO L290 TraceCheckUtils]: 12: Hoare triple {10233#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10229#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0) (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 23:00:00,271 INFO L290 TraceCheckUtils]: 11: Hoare triple {10237#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10233#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))))} is VALID [2022-04-07 23:00:00,271 INFO L290 TraceCheckUtils]: 10: Hoare triple {10241#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3) (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {10237#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:00,272 INFO L290 TraceCheckUtils]: 9: Hoare triple {10241#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3) (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10241#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3) (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:00,273 INFO L290 TraceCheckUtils]: 8: Hoare triple {10248#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4) (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10241#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 3) (+ (* main_~n~0 2) (* (div (+ main_~y~0 3) 4294967296) 4294967296)))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:00,274 INFO L290 TraceCheckUtils]: 7: Hoare triple {10252#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 6))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10248#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4) (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))))))} is VALID [2022-04-07 23:00:00,276 INFO L290 TraceCheckUtils]: 6: Hoare triple {10256#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 6) (+ (* main_~n~0 2) (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10252#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 6))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:00:00,278 INFO L290 TraceCheckUtils]: 5: Hoare triple {10065#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10256#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 6) (+ (* main_~n~0 2) (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:00:00,278 INFO L272 TraceCheckUtils]: 4: Hoare triple {10065#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 23:00:00,278 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10065#true} {10065#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 23:00:00,278 INFO L290 TraceCheckUtils]: 2: Hoare triple {10065#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 23:00:00,278 INFO L290 TraceCheckUtils]: 1: Hoare triple {10065#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10065#true} is VALID [2022-04-07 23:00:00,278 INFO L272 TraceCheckUtils]: 0: Hoare triple {10065#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10065#true} is VALID [2022-04-07 23:00:00,279 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:00:00,279 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1418182825] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:00,279 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:00,279 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19, 19] total 48 [2022-04-07 23:00:00,279 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1529096277] [2022-04-07 23:00:00,279 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:00,280 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 47 states have (on average 1.297872340425532) internal successors, (61), 45 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 23:00:00,280 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:00,280 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 48 states, 47 states have (on average 1.297872340425532) internal successors, (61), 45 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:00,350 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:00,350 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 48 states [2022-04-07 23:00:00,350 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:00,351 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2022-04-07 23:00:00,351 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=177, Invalid=2079, Unknown=0, NotChecked=0, Total=2256 [2022-04-07 23:00:00,351 INFO L87 Difference]: Start difference. First operand 320 states and 459 transitions. Second operand has 48 states, 47 states have (on average 1.297872340425532) internal successors, (61), 45 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:09,729 INFO L93 Difference]: Finished difference Result 382 states and 538 transitions. [2022-04-07 23:00:09,729 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-04-07 23:00:09,729 INFO L78 Accepts]: Start accepts. Automaton has has 48 states, 47 states have (on average 1.297872340425532) internal successors, (61), 45 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 23:00:09,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:09,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 47 states have (on average 1.297872340425532) internal successors, (61), 45 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 75 transitions. [2022-04-07 23:00:09,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 47 states have (on average 1.297872340425532) internal successors, (61), 45 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 75 transitions. [2022-04-07 23:00:09,731 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 32 states and 75 transitions. [2022-04-07 23:00:09,977 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:09,982 INFO L225 Difference]: With dead ends: 382 [2022-04-07 23:00:09,982 INFO L226 Difference]: Without dead ends: 328 [2022-04-07 23:00:09,983 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 848 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=634, Invalid=5218, Unknown=0, NotChecked=0, Total=5852 [2022-04-07 23:00:09,983 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 114 mSDsluCounter, 142 mSDsCounter, 0 mSdLazyCounter, 863 mSolverCounterSat, 179 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 158 SdHoareTripleChecker+Invalid, 1042 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 179 IncrementalHoareTripleChecker+Valid, 863 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:09,983 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [114 Valid, 158 Invalid, 1042 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [179 Valid, 863 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2022-04-07 23:00:09,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2022-04-07 23:00:10,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 322. [2022-04-07 23:00:10,640 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:10,640 INFO L82 GeneralOperation]: Start isEquivalent. First operand 328 states. Second operand has 322 states, 317 states have (on average 1.4227129337539433) internal successors, (451), 317 states have internal predecessors, (451), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,641 INFO L74 IsIncluded]: Start isIncluded. First operand 328 states. Second operand has 322 states, 317 states have (on average 1.4227129337539433) internal successors, (451), 317 states have internal predecessors, (451), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,641 INFO L87 Difference]: Start difference. First operand 328 states. Second operand has 322 states, 317 states have (on average 1.4227129337539433) internal successors, (451), 317 states have internal predecessors, (451), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:10,645 INFO L93 Difference]: Finished difference Result 328 states and 461 transitions. [2022-04-07 23:00:10,645 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 461 transitions. [2022-04-07 23:00:10,646 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:10,646 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:10,646 INFO L74 IsIncluded]: Start isIncluded. First operand has 322 states, 317 states have (on average 1.4227129337539433) internal successors, (451), 317 states have internal predecessors, (451), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 328 states. [2022-04-07 23:00:10,646 INFO L87 Difference]: Start difference. First operand has 322 states, 317 states have (on average 1.4227129337539433) internal successors, (451), 317 states have internal predecessors, (451), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 328 states. [2022-04-07 23:00:10,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:10,650 INFO L93 Difference]: Finished difference Result 328 states and 461 transitions. [2022-04-07 23:00:10,650 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 461 transitions. [2022-04-07 23:00:10,651 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:10,651 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:10,651 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:10,651 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:10,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 322 states, 317 states have (on average 1.4227129337539433) internal successors, (451), 317 states have internal predecessors, (451), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 455 transitions. [2022-04-07 23:00:10,655 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 455 transitions. Word has length 27 [2022-04-07 23:00:10,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:10,656 INFO L478 AbstractCegarLoop]: Abstraction has 322 states and 455 transitions. [2022-04-07 23:00:10,656 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 48 states, 47 states have (on average 1.297872340425532) internal successors, (61), 45 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,656 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 455 transitions. [2022-04-07 23:00:10,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 23:00:10,656 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:10,656 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:10,664 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:10,862 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-07 23:00:10,862 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:10,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:10,863 INFO L85 PathProgramCache]: Analyzing trace with hash -1270348258, now seen corresponding path program 4 times [2022-04-07 23:00:10,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:10,863 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989732238] [2022-04-07 23:00:10,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:10,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:10,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:10,974 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:10,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:10,978 INFO L290 TraceCheckUtils]: 0: Hoare triple {12009#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11996#true} is VALID [2022-04-07 23:00:10,978 INFO L290 TraceCheckUtils]: 1: Hoare triple {11996#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:10,978 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11996#true} {11996#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:10,978 INFO L272 TraceCheckUtils]: 0: Hoare triple {11996#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12009#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:10,978 INFO L290 TraceCheckUtils]: 1: Hoare triple {12009#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11996#true} is VALID [2022-04-07 23:00:10,979 INFO L290 TraceCheckUtils]: 2: Hoare triple {11996#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:10,979 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11996#true} {11996#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:10,979 INFO L272 TraceCheckUtils]: 4: Hoare triple {11996#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:10,979 INFO L290 TraceCheckUtils]: 5: Hoare triple {11996#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11996#true} is VALID [2022-04-07 23:00:10,979 INFO L290 TraceCheckUtils]: 6: Hoare triple {11996#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:10,980 INFO L290 TraceCheckUtils]: 7: Hoare triple {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12002#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 23:00:10,981 INFO L290 TraceCheckUtils]: 8: Hoare triple {12002#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12003#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:10,982 INFO L290 TraceCheckUtils]: 9: Hoare triple {12003#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12004#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:10,982 INFO L290 TraceCheckUtils]: 10: Hoare triple {12004#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12004#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:10,983 INFO L290 TraceCheckUtils]: 11: Hoare triple {12004#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {12004#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:10,984 INFO L290 TraceCheckUtils]: 12: Hoare triple {12004#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12005#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 23:00:10,984 INFO L290 TraceCheckUtils]: 13: Hoare triple {12005#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12006#(<= (+ 2 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:00:10,985 INFO L290 TraceCheckUtils]: 14: Hoare triple {12006#(<= (+ 2 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12007#(<= (+ 3 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:00:10,986 INFO L290 TraceCheckUtils]: 15: Hoare triple {12007#(<= (+ 3 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:10,986 INFO L290 TraceCheckUtils]: 16: Hoare triple {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:10,986 INFO L290 TraceCheckUtils]: 17: Hoare triple {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 18: Hoare triple {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 19: Hoare triple {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:10,988 INFO L290 TraceCheckUtils]: 20: Hoare triple {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:10,988 INFO L290 TraceCheckUtils]: 21: Hoare triple {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:10,988 INFO L290 TraceCheckUtils]: 22: Hoare triple {12008#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:10,988 INFO L272 TraceCheckUtils]: 23: Hoare triple {11997#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11997#false} is VALID [2022-04-07 23:00:10,988 INFO L290 TraceCheckUtils]: 24: Hoare triple {11997#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11997#false} is VALID [2022-04-07 23:00:10,989 INFO L290 TraceCheckUtils]: 25: Hoare triple {11997#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:10,989 INFO L290 TraceCheckUtils]: 26: Hoare triple {11997#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:10,989 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 10 proven. 10 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:00:10,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:10,989 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989732238] [2022-04-07 23:00:10,989 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1989732238] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:10,989 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1654625698] [2022-04-07 23:00:10,989 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:00:10,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:10,989 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:10,990 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:11,012 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-07 23:00:11,031 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:00:11,031 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:11,032 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 23:00:11,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:11,040 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:11,347 INFO L272 TraceCheckUtils]: 0: Hoare triple {11996#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:11,347 INFO L290 TraceCheckUtils]: 1: Hoare triple {11996#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11996#true} is VALID [2022-04-07 23:00:11,347 INFO L290 TraceCheckUtils]: 2: Hoare triple {11996#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:11,347 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11996#true} {11996#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:11,347 INFO L272 TraceCheckUtils]: 4: Hoare triple {11996#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:11,348 INFO L290 TraceCheckUtils]: 5: Hoare triple {11996#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11996#true} is VALID [2022-04-07 23:00:11,348 INFO L290 TraceCheckUtils]: 6: Hoare triple {11996#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:11,349 INFO L290 TraceCheckUtils]: 7: Hoare triple {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12034#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:00:11,350 INFO L290 TraceCheckUtils]: 8: Hoare triple {12034#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12038#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,350 INFO L290 TraceCheckUtils]: 9: Hoare triple {12038#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:11,351 INFO L290 TraceCheckUtils]: 10: Hoare triple {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:11,352 INFO L290 TraceCheckUtils]: 11: Hoare triple {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:11,353 INFO L290 TraceCheckUtils]: 12: Hoare triple {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12038#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,354 INFO L290 TraceCheckUtils]: 13: Hoare triple {12038#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12034#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:00:11,354 INFO L290 TraceCheckUtils]: 14: Hoare triple {12034#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:11,355 INFO L290 TraceCheckUtils]: 15: Hoare triple {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,355 INFO L290 TraceCheckUtils]: 16: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,355 INFO L290 TraceCheckUtils]: 17: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,356 INFO L290 TraceCheckUtils]: 18: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,356 INFO L290 TraceCheckUtils]: 19: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,356 INFO L290 TraceCheckUtils]: 20: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,357 INFO L290 TraceCheckUtils]: 21: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,357 INFO L290 TraceCheckUtils]: 22: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:11,357 INFO L272 TraceCheckUtils]: 23: Hoare triple {11997#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11997#false} is VALID [2022-04-07 23:00:11,357 INFO L290 TraceCheckUtils]: 24: Hoare triple {11997#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11997#false} is VALID [2022-04-07 23:00:11,357 INFO L290 TraceCheckUtils]: 25: Hoare triple {11997#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:11,358 INFO L290 TraceCheckUtils]: 26: Hoare triple {11997#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:11,358 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:00:11,358 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:11,588 INFO L290 TraceCheckUtils]: 26: Hoare triple {11997#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:11,588 INFO L290 TraceCheckUtils]: 25: Hoare triple {11997#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:11,588 INFO L290 TraceCheckUtils]: 24: Hoare triple {11997#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11997#false} is VALID [2022-04-07 23:00:11,588 INFO L272 TraceCheckUtils]: 23: Hoare triple {11997#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11997#false} is VALID [2022-04-07 23:00:11,589 INFO L290 TraceCheckUtils]: 22: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11997#false} is VALID [2022-04-07 23:00:11,589 INFO L290 TraceCheckUtils]: 21: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,589 INFO L290 TraceCheckUtils]: 20: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,589 INFO L290 TraceCheckUtils]: 19: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,590 INFO L290 TraceCheckUtils]: 18: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,590 INFO L290 TraceCheckUtils]: 17: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,590 INFO L290 TraceCheckUtils]: 16: Hoare triple {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,591 INFO L290 TraceCheckUtils]: 15: Hoare triple {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12061#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,592 INFO L290 TraceCheckUtils]: 14: Hoare triple {12034#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:11,593 INFO L290 TraceCheckUtils]: 13: Hoare triple {12038#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12034#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:00:11,594 INFO L290 TraceCheckUtils]: 12: Hoare triple {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12038#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,594 INFO L290 TraceCheckUtils]: 11: Hoare triple {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:11,594 INFO L290 TraceCheckUtils]: 10: Hoare triple {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:11,595 INFO L290 TraceCheckUtils]: 9: Hoare triple {12038#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12042#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:11,596 INFO L290 TraceCheckUtils]: 8: Hoare triple {12034#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12038#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:11,596 INFO L290 TraceCheckUtils]: 7: Hoare triple {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12034#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:00:11,597 INFO L290 TraceCheckUtils]: 6: Hoare triple {11996#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12001#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:11,597 INFO L290 TraceCheckUtils]: 5: Hoare triple {11996#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11996#true} is VALID [2022-04-07 23:00:11,597 INFO L272 TraceCheckUtils]: 4: Hoare triple {11996#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:11,597 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11996#true} {11996#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:11,597 INFO L290 TraceCheckUtils]: 2: Hoare triple {11996#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:11,597 INFO L290 TraceCheckUtils]: 1: Hoare triple {11996#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11996#true} is VALID [2022-04-07 23:00:11,597 INFO L272 TraceCheckUtils]: 0: Hoare triple {11996#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11996#true} is VALID [2022-04-07 23:00:11,598 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:00:11,598 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1654625698] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:11,598 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:11,598 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7] total 15 [2022-04-07 23:00:11,598 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1205021957] [2022-04-07 23:00:11,598 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:11,598 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 23:00:11,598 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:11,599 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:11,627 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:11,628 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-07 23:00:11,628 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:11,628 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-07 23:00:11,628 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2022-04-07 23:00:11,628 INFO L87 Difference]: Start difference. First operand 322 states and 455 transitions. Second operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:12,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:12,879 INFO L93 Difference]: Finished difference Result 336 states and 476 transitions. [2022-04-07 23:00:12,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-07 23:00:12,879 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 23:00:12,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:12,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:12,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 61 transitions. [2022-04-07 23:00:12,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:12,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 61 transitions. [2022-04-07 23:00:12,882 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 61 transitions. [2022-04-07 23:00:12,936 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:12,941 INFO L225 Difference]: With dead ends: 336 [2022-04-07 23:00:12,941 INFO L226 Difference]: Without dead ends: 331 [2022-04-07 23:00:12,942 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 50 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=121, Invalid=385, Unknown=0, NotChecked=0, Total=506 [2022-04-07 23:00:12,942 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 55 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 231 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 270 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 231 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:12,942 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [55 Valid, 65 Invalid, 270 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 231 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 23:00:12,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2022-04-07 23:00:13,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 322. [2022-04-07 23:00:13,620 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:13,621 INFO L82 GeneralOperation]: Start isEquivalent. First operand 331 states. Second operand has 322 states, 317 states have (on average 1.4195583596214512) internal successors, (450), 317 states have internal predecessors, (450), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,621 INFO L74 IsIncluded]: Start isIncluded. First operand 331 states. Second operand has 322 states, 317 states have (on average 1.4195583596214512) internal successors, (450), 317 states have internal predecessors, (450), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,621 INFO L87 Difference]: Start difference. First operand 331 states. Second operand has 322 states, 317 states have (on average 1.4195583596214512) internal successors, (450), 317 states have internal predecessors, (450), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:13,635 INFO L93 Difference]: Finished difference Result 331 states and 471 transitions. [2022-04-07 23:00:13,635 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 471 transitions. [2022-04-07 23:00:13,635 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:13,635 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:13,636 INFO L74 IsIncluded]: Start isIncluded. First operand has 322 states, 317 states have (on average 1.4195583596214512) internal successors, (450), 317 states have internal predecessors, (450), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 331 states. [2022-04-07 23:00:13,636 INFO L87 Difference]: Start difference. First operand has 322 states, 317 states have (on average 1.4195583596214512) internal successors, (450), 317 states have internal predecessors, (450), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 331 states. [2022-04-07 23:00:13,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:13,640 INFO L93 Difference]: Finished difference Result 331 states and 471 transitions. [2022-04-07 23:00:13,640 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 471 transitions. [2022-04-07 23:00:13,641 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:13,641 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:13,641 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:13,641 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:13,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 322 states, 317 states have (on average 1.4195583596214512) internal successors, (450), 317 states have internal predecessors, (450), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 454 transitions. [2022-04-07 23:00:13,646 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 454 transitions. Word has length 27 [2022-04-07 23:00:13,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:13,646 INFO L478 AbstractCegarLoop]: Abstraction has 322 states and 454 transitions. [2022-04-07 23:00:13,646 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,646 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 454 transitions. [2022-04-07 23:00:13,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 23:00:13,646 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:13,646 INFO L499 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:13,663 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:13,850 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:13,850 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:13,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:13,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1199429051, now seen corresponding path program 5 times [2022-04-07 23:00:13,850 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:13,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791042846] [2022-04-07 23:00:13,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:13,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:13,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:14,007 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:14,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:14,015 INFO L290 TraceCheckUtils]: 0: Hoare triple {13818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13803#true} is VALID [2022-04-07 23:00:14,015 INFO L290 TraceCheckUtils]: 1: Hoare triple {13803#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,016 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13803#true} {13803#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,016 INFO L272 TraceCheckUtils]: 0: Hoare triple {13803#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:14,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {13818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13803#true} is VALID [2022-04-07 23:00:14,016 INFO L290 TraceCheckUtils]: 2: Hoare triple {13803#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,016 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13803#true} {13803#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,016 INFO L272 TraceCheckUtils]: 4: Hoare triple {13803#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,016 INFO L290 TraceCheckUtils]: 5: Hoare triple {13803#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13808#(= main_~y~0 0)} is VALID [2022-04-07 23:00:14,017 INFO L290 TraceCheckUtils]: 6: Hoare triple {13808#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13809#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:14,017 INFO L290 TraceCheckUtils]: 7: Hoare triple {13809#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13810#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:14,018 INFO L290 TraceCheckUtils]: 8: Hoare triple {13810#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13811#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:14,018 INFO L290 TraceCheckUtils]: 9: Hoare triple {13811#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13812#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:14,019 INFO L290 TraceCheckUtils]: 10: Hoare triple {13812#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13812#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:14,019 INFO L290 TraceCheckUtils]: 11: Hoare triple {13812#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {13813#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:14,020 INFO L290 TraceCheckUtils]: 12: Hoare triple {13813#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13814#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:00:14,020 INFO L290 TraceCheckUtils]: 13: Hoare triple {13814#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13815#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:14,021 INFO L290 TraceCheckUtils]: 14: Hoare triple {13815#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13816#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:00:14,021 INFO L290 TraceCheckUtils]: 15: Hoare triple {13816#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13817#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 16: Hoare triple {13817#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 17: Hoare triple {13804#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 18: Hoare triple {13804#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 19: Hoare triple {13804#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 20: Hoare triple {13804#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 21: Hoare triple {13804#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 22: Hoare triple {13804#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 23: Hoare triple {13804#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L272 TraceCheckUtils]: 24: Hoare triple {13804#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 25: Hoare triple {13804#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 26: Hoare triple {13804#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L290 TraceCheckUtils]: 27: Hoare triple {13804#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,022 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:00:14,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:14,023 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [791042846] [2022-04-07 23:00:14,023 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [791042846] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:14,023 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [238388808] [2022-04-07 23:00:14,023 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 23:00:14,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:14,023 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:14,024 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:14,025 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-07 23:00:14,091 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 23:00:14,091 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:14,092 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 30 conjunts are in the unsatisfiable core [2022-04-07 23:00:14,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:14,098 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:14,286 INFO L272 TraceCheckUtils]: 0: Hoare triple {13803#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,286 INFO L290 TraceCheckUtils]: 1: Hoare triple {13803#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13803#true} is VALID [2022-04-07 23:00:14,287 INFO L290 TraceCheckUtils]: 2: Hoare triple {13803#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,287 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13803#true} {13803#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,287 INFO L272 TraceCheckUtils]: 4: Hoare triple {13803#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,287 INFO L290 TraceCheckUtils]: 5: Hoare triple {13803#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13808#(= main_~y~0 0)} is VALID [2022-04-07 23:00:14,287 INFO L290 TraceCheckUtils]: 6: Hoare triple {13808#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13809#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:14,288 INFO L290 TraceCheckUtils]: 7: Hoare triple {13809#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13810#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:14,288 INFO L290 TraceCheckUtils]: 8: Hoare triple {13810#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13811#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:14,289 INFO L290 TraceCheckUtils]: 9: Hoare triple {13811#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13812#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:14,289 INFO L290 TraceCheckUtils]: 10: Hoare triple {13812#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13812#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:14,289 INFO L290 TraceCheckUtils]: 11: Hoare triple {13812#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {13855#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:14,290 INFO L290 TraceCheckUtils]: 12: Hoare triple {13855#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13859#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:00:14,290 INFO L290 TraceCheckUtils]: 13: Hoare triple {13859#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13863#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:14,291 INFO L290 TraceCheckUtils]: 14: Hoare triple {13863#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13867#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:14,292 INFO L290 TraceCheckUtils]: 15: Hoare triple {13867#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13871#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)))} is VALID [2022-04-07 23:00:14,292 INFO L290 TraceCheckUtils]: 16: Hoare triple {13871#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13804#false} is VALID [2022-04-07 23:00:14,292 INFO L290 TraceCheckUtils]: 17: Hoare triple {13804#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,292 INFO L290 TraceCheckUtils]: 18: Hoare triple {13804#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13804#false} is VALID [2022-04-07 23:00:14,292 INFO L290 TraceCheckUtils]: 19: Hoare triple {13804#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13804#false} is VALID [2022-04-07 23:00:14,292 INFO L290 TraceCheckUtils]: 20: Hoare triple {13804#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13804#false} is VALID [2022-04-07 23:00:14,293 INFO L290 TraceCheckUtils]: 21: Hoare triple {13804#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13804#false} is VALID [2022-04-07 23:00:14,293 INFO L290 TraceCheckUtils]: 22: Hoare triple {13804#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,293 INFO L290 TraceCheckUtils]: 23: Hoare triple {13804#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,293 INFO L272 TraceCheckUtils]: 24: Hoare triple {13804#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13804#false} is VALID [2022-04-07 23:00:14,293 INFO L290 TraceCheckUtils]: 25: Hoare triple {13804#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13804#false} is VALID [2022-04-07 23:00:14,293 INFO L290 TraceCheckUtils]: 26: Hoare triple {13804#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,293 INFO L290 TraceCheckUtils]: 27: Hoare triple {13804#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,293 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:00:14,293 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:14,557 INFO L290 TraceCheckUtils]: 27: Hoare triple {13804#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,557 INFO L290 TraceCheckUtils]: 26: Hoare triple {13804#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,557 INFO L290 TraceCheckUtils]: 25: Hoare triple {13804#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13804#false} is VALID [2022-04-07 23:00:14,557 INFO L272 TraceCheckUtils]: 24: Hoare triple {13804#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13804#false} is VALID [2022-04-07 23:00:14,557 INFO L290 TraceCheckUtils]: 23: Hoare triple {13804#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,558 INFO L290 TraceCheckUtils]: 22: Hoare triple {13923#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13804#false} is VALID [2022-04-07 23:00:14,559 INFO L290 TraceCheckUtils]: 21: Hoare triple {13927#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13923#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:00:14,560 INFO L290 TraceCheckUtils]: 20: Hoare triple {13931#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13927#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:14,560 INFO L290 TraceCheckUtils]: 19: Hoare triple {13935#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13931#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:00:14,561 INFO L290 TraceCheckUtils]: 18: Hoare triple {13939#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13935#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:00:14,561 INFO L290 TraceCheckUtils]: 17: Hoare triple {13939#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {13939#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-07 23:00:14,562 INFO L290 TraceCheckUtils]: 16: Hoare triple {13946#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13939#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-07 23:00:14,563 INFO L290 TraceCheckUtils]: 15: Hoare triple {13950#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13946#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:00:14,563 INFO L290 TraceCheckUtils]: 14: Hoare triple {13954#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13950#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:00:14,565 INFO L290 TraceCheckUtils]: 13: Hoare triple {13958#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13954#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:00:14,565 INFO L290 TraceCheckUtils]: 12: Hoare triple {13962#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13958#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 11: Hoare triple {13803#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {13962#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 10: Hoare triple {13803#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 9: Hoare triple {13803#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 8: Hoare triple {13803#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 7: Hoare triple {13803#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 6: Hoare triple {13803#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 5: Hoare triple {13803#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L272 TraceCheckUtils]: 4: Hoare triple {13803#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13803#true} {13803#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 2: Hoare triple {13803#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L290 TraceCheckUtils]: 1: Hoare triple {13803#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13803#true} is VALID [2022-04-07 23:00:14,566 INFO L272 TraceCheckUtils]: 0: Hoare triple {13803#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13803#true} is VALID [2022-04-07 23:00:14,567 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:00:14,567 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [238388808] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:14,567 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:14,567 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 28 [2022-04-07 23:00:14,567 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [356642286] [2022-04-07 23:00:14,567 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:14,567 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 23:00:14,568 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:14,568 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:14,605 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:14,605 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-07 23:00:14,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:14,606 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-07 23:00:14,606 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=618, Unknown=0, NotChecked=0, Total=756 [2022-04-07 23:00:14,606 INFO L87 Difference]: Start difference. First operand 322 states and 454 transitions. Second operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:17,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:17,765 INFO L93 Difference]: Finished difference Result 677 states and 869 transitions. [2022-04-07 23:00:17,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-04-07 23:00:17,765 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 23:00:17,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:17,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:17,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 118 transitions. [2022-04-07 23:00:17,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:17,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 118 transitions. [2022-04-07 23:00:17,767 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 118 transitions. [2022-04-07 23:00:17,903 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 118 edges. 118 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:17,915 INFO L225 Difference]: With dead ends: 677 [2022-04-07 23:00:17,915 INFO L226 Difference]: Without dead ends: 603 [2022-04-07 23:00:17,916 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1236 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=852, Invalid=3704, Unknown=0, NotChecked=0, Total=4556 [2022-04-07 23:00:17,917 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 172 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 545 mSolverCounterSat, 156 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 172 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 701 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 156 IncrementalHoareTripleChecker+Valid, 545 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:17,917 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [172 Valid, 90 Invalid, 701 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [156 Valid, 545 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-07 23:00:17,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 603 states. [2022-04-07 23:00:18,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 603 to 356. [2022-04-07 23:00:18,695 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:18,696 INFO L82 GeneralOperation]: Start isEquivalent. First operand 603 states. Second operand has 356 states, 351 states have (on average 1.4472934472934473) internal successors, (508), 351 states have internal predecessors, (508), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:18,696 INFO L74 IsIncluded]: Start isIncluded. First operand 603 states. Second operand has 356 states, 351 states have (on average 1.4472934472934473) internal successors, (508), 351 states have internal predecessors, (508), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:18,696 INFO L87 Difference]: Start difference. First operand 603 states. Second operand has 356 states, 351 states have (on average 1.4472934472934473) internal successors, (508), 351 states have internal predecessors, (508), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:18,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:18,707 INFO L93 Difference]: Finished difference Result 603 states and 762 transitions. [2022-04-07 23:00:18,707 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 762 transitions. [2022-04-07 23:00:18,708 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:18,708 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:18,708 INFO L74 IsIncluded]: Start isIncluded. First operand has 356 states, 351 states have (on average 1.4472934472934473) internal successors, (508), 351 states have internal predecessors, (508), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 603 states. [2022-04-07 23:00:18,709 INFO L87 Difference]: Start difference. First operand has 356 states, 351 states have (on average 1.4472934472934473) internal successors, (508), 351 states have internal predecessors, (508), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 603 states. [2022-04-07 23:00:18,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:18,721 INFO L93 Difference]: Finished difference Result 603 states and 762 transitions. [2022-04-07 23:00:18,721 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 762 transitions. [2022-04-07 23:00:18,722 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:18,722 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:18,722 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:18,722 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:18,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 356 states, 351 states have (on average 1.4472934472934473) internal successors, (508), 351 states have internal predecessors, (508), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:18,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 512 transitions. [2022-04-07 23:00:18,727 INFO L78 Accepts]: Start accepts. Automaton has 356 states and 512 transitions. Word has length 28 [2022-04-07 23:00:18,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:18,728 INFO L478 AbstractCegarLoop]: Abstraction has 356 states and 512 transitions. [2022-04-07 23:00:18,728 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:18,728 INFO L276 IsEmpty]: Start isEmpty. Operand 356 states and 512 transitions. [2022-04-07 23:00:18,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 23:00:18,728 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:18,728 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:18,744 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2022-04-07 23:00:18,935 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:18,935 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:18,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:18,936 INFO L85 PathProgramCache]: Analyzing trace with hash 1682363274, now seen corresponding path program 6 times [2022-04-07 23:00:18,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:18,936 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630423118] [2022-04-07 23:00:18,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:18,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:18,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:19,072 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:19,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:19,075 INFO L290 TraceCheckUtils]: 0: Hoare triple {16628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16613#true} is VALID [2022-04-07 23:00:19,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {16613#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,075 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16613#true} {16613#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,075 INFO L272 TraceCheckUtils]: 0: Hoare triple {16613#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:19,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {16628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16613#true} is VALID [2022-04-07 23:00:19,076 INFO L290 TraceCheckUtils]: 2: Hoare triple {16613#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,076 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16613#true} {16613#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,076 INFO L272 TraceCheckUtils]: 4: Hoare triple {16613#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,076 INFO L290 TraceCheckUtils]: 5: Hoare triple {16613#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16613#true} is VALID [2022-04-07 23:00:19,077 INFO L290 TraceCheckUtils]: 6: Hoare triple {16613#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:19,077 INFO L290 TraceCheckUtils]: 7: Hoare triple {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16619#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 23:00:19,078 INFO L290 TraceCheckUtils]: 8: Hoare triple {16619#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16620#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:19,079 INFO L290 TraceCheckUtils]: 9: Hoare triple {16620#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16621#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:19,081 INFO L290 TraceCheckUtils]: 10: Hoare triple {16621#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16622#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:19,081 INFO L290 TraceCheckUtils]: 11: Hoare triple {16622#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16622#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:19,081 INFO L290 TraceCheckUtils]: 12: Hoare triple {16622#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {16622#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:00:19,082 INFO L290 TraceCheckUtils]: 13: Hoare triple {16622#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16623#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 23:00:19,083 INFO L290 TraceCheckUtils]: 14: Hoare triple {16623#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16624#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 2) main_~x~0)} is VALID [2022-04-07 23:00:19,083 INFO L290 TraceCheckUtils]: 15: Hoare triple {16624#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 2) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16625#(<= (+ 3 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:00:19,084 INFO L290 TraceCheckUtils]: 16: Hoare triple {16625#(<= (+ 3 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16626#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:00:19,085 INFO L290 TraceCheckUtils]: 17: Hoare triple {16626#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:19,085 INFO L290 TraceCheckUtils]: 18: Hoare triple {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:19,086 INFO L290 TraceCheckUtils]: 19: Hoare triple {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:19,086 INFO L290 TraceCheckUtils]: 20: Hoare triple {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:19,086 INFO L290 TraceCheckUtils]: 21: Hoare triple {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:19,087 INFO L290 TraceCheckUtils]: 22: Hoare triple {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:19,087 INFO L290 TraceCheckUtils]: 23: Hoare triple {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:19,087 INFO L290 TraceCheckUtils]: 24: Hoare triple {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:00:19,088 INFO L290 TraceCheckUtils]: 25: Hoare triple {16627#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,088 INFO L272 TraceCheckUtils]: 26: Hoare triple {16614#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16614#false} is VALID [2022-04-07 23:00:19,088 INFO L290 TraceCheckUtils]: 27: Hoare triple {16614#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16614#false} is VALID [2022-04-07 23:00:19,088 INFO L290 TraceCheckUtils]: 28: Hoare triple {16614#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,088 INFO L290 TraceCheckUtils]: 29: Hoare triple {16614#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,088 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 15 proven. 15 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:19,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:19,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630423118] [2022-04-07 23:00:19,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [630423118] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:19,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [998977484] [2022-04-07 23:00:19,089 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 23:00:19,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:19,089 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:19,089 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:19,090 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-07 23:00:19,136 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-07 23:00:19,136 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:19,137 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-07 23:00:19,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:19,144 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:19,426 INFO L272 TraceCheckUtils]: 0: Hoare triple {16613#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,426 INFO L290 TraceCheckUtils]: 1: Hoare triple {16613#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16613#true} is VALID [2022-04-07 23:00:19,426 INFO L290 TraceCheckUtils]: 2: Hoare triple {16613#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,426 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16613#true} {16613#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,426 INFO L272 TraceCheckUtils]: 4: Hoare triple {16613#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,426 INFO L290 TraceCheckUtils]: 5: Hoare triple {16613#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16613#true} is VALID [2022-04-07 23:00:19,427 INFO L290 TraceCheckUtils]: 6: Hoare triple {16613#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:19,428 INFO L290 TraceCheckUtils]: 7: Hoare triple {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16653#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:00:19,429 INFO L290 TraceCheckUtils]: 8: Hoare triple {16653#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16657#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,429 INFO L290 TraceCheckUtils]: 9: Hoare triple {16657#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16661#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:19,430 INFO L290 TraceCheckUtils]: 10: Hoare triple {16661#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,430 INFO L290 TraceCheckUtils]: 11: Hoare triple {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,431 INFO L290 TraceCheckUtils]: 12: Hoare triple {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16661#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:19,432 INFO L290 TraceCheckUtils]: 14: Hoare triple {16661#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16657#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,433 INFO L290 TraceCheckUtils]: 15: Hoare triple {16657#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16653#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:00:19,433 INFO L290 TraceCheckUtils]: 16: Hoare triple {16653#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:19,434 INFO L290 TraceCheckUtils]: 17: Hoare triple {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,434 INFO L290 TraceCheckUtils]: 18: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,435 INFO L290 TraceCheckUtils]: 19: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,435 INFO L290 TraceCheckUtils]: 20: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,435 INFO L290 TraceCheckUtils]: 21: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,435 INFO L290 TraceCheckUtils]: 22: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,436 INFO L290 TraceCheckUtils]: 23: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,436 INFO L290 TraceCheckUtils]: 24: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,436 INFO L290 TraceCheckUtils]: 25: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,437 INFO L272 TraceCheckUtils]: 26: Hoare triple {16614#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16614#false} is VALID [2022-04-07 23:00:19,437 INFO L290 TraceCheckUtils]: 27: Hoare triple {16614#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16614#false} is VALID [2022-04-07 23:00:19,437 INFO L290 TraceCheckUtils]: 28: Hoare triple {16614#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,437 INFO L290 TraceCheckUtils]: 29: Hoare triple {16614#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,437 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:19,437 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:19,553 INFO L290 TraceCheckUtils]: 29: Hoare triple {16614#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,553 INFO L290 TraceCheckUtils]: 28: Hoare triple {16614#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,553 INFO L290 TraceCheckUtils]: 27: Hoare triple {16614#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16614#false} is VALID [2022-04-07 23:00:19,553 INFO L272 TraceCheckUtils]: 26: Hoare triple {16614#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16614#false} is VALID [2022-04-07 23:00:19,554 INFO L290 TraceCheckUtils]: 25: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16614#false} is VALID [2022-04-07 23:00:19,554 INFO L290 TraceCheckUtils]: 24: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,555 INFO L290 TraceCheckUtils]: 23: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,555 INFO L290 TraceCheckUtils]: 22: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,555 INFO L290 TraceCheckUtils]: 21: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,555 INFO L290 TraceCheckUtils]: 20: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,556 INFO L290 TraceCheckUtils]: 19: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,556 INFO L290 TraceCheckUtils]: 18: Hoare triple {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,557 INFO L290 TraceCheckUtils]: 17: Hoare triple {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16687#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,557 INFO L290 TraceCheckUtils]: 16: Hoare triple {16653#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:19,558 INFO L290 TraceCheckUtils]: 15: Hoare triple {16657#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16653#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:00:19,559 INFO L290 TraceCheckUtils]: 14: Hoare triple {16661#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16657#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,559 INFO L290 TraceCheckUtils]: 13: Hoare triple {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16661#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:19,560 INFO L290 TraceCheckUtils]: 12: Hoare triple {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,560 INFO L290 TraceCheckUtils]: 11: Hoare triple {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,561 INFO L290 TraceCheckUtils]: 10: Hoare triple {16661#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16665#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,561 INFO L290 TraceCheckUtils]: 9: Hoare triple {16657#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16661#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:00:19,562 INFO L290 TraceCheckUtils]: 8: Hoare triple {16653#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16657#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:19,563 INFO L290 TraceCheckUtils]: 7: Hoare triple {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16653#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:00:19,563 INFO L290 TraceCheckUtils]: 6: Hoare triple {16613#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16618#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:19,563 INFO L290 TraceCheckUtils]: 5: Hoare triple {16613#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16613#true} is VALID [2022-04-07 23:00:19,563 INFO L272 TraceCheckUtils]: 4: Hoare triple {16613#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,564 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16613#true} {16613#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,564 INFO L290 TraceCheckUtils]: 2: Hoare triple {16613#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,564 INFO L290 TraceCheckUtils]: 1: Hoare triple {16613#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16613#true} is VALID [2022-04-07 23:00:19,564 INFO L272 TraceCheckUtils]: 0: Hoare triple {16613#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16613#true} is VALID [2022-04-07 23:00:19,564 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:19,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [998977484] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:19,564 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:19,564 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 8, 8] total 18 [2022-04-07 23:00:19,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1305103956] [2022-04-07 23:00:19,564 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:19,565 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:00:19,565 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:19,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:19,597 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:19,597 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-07 23:00:19,597 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:19,597 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-07 23:00:19,597 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=232, Unknown=0, NotChecked=0, Total=306 [2022-04-07 23:00:19,597 INFO L87 Difference]: Start difference. First operand 356 states and 512 transitions. Second operand has 18 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:21,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:21,246 INFO L93 Difference]: Finished difference Result 374 states and 539 transitions. [2022-04-07 23:00:21,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 23:00:21,246 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:00:21,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:21,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:21,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 71 transitions. [2022-04-07 23:00:21,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:21,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 71 transitions. [2022-04-07 23:00:21,248 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 71 transitions. [2022-04-07 23:00:21,323 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:21,328 INFO L225 Difference]: With dead ends: 374 [2022-04-07 23:00:21,328 INFO L226 Difference]: Without dead ends: 369 [2022-04-07 23:00:21,329 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 55 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=175, Invalid=581, Unknown=0, NotChecked=0, Total=756 [2022-04-07 23:00:21,329 INFO L913 BasicCegarLoop]: 30 mSDtfsCounter, 46 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 397 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 92 SdHoareTripleChecker+Invalid, 430 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 397 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:21,329 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 92 Invalid, 430 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 397 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 23:00:21,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 369 states. [2022-04-07 23:00:22,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 369 to 356. [2022-04-07 23:00:22,119 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:22,120 INFO L82 GeneralOperation]: Start isEquivalent. First operand 369 states. Second operand has 356 states, 351 states have (on average 1.4415954415954415) internal successors, (506), 351 states have internal predecessors, (506), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:22,120 INFO L74 IsIncluded]: Start isIncluded. First operand 369 states. Second operand has 356 states, 351 states have (on average 1.4415954415954415) internal successors, (506), 351 states have internal predecessors, (506), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:22,120 INFO L87 Difference]: Start difference. First operand 369 states. Second operand has 356 states, 351 states have (on average 1.4415954415954415) internal successors, (506), 351 states have internal predecessors, (506), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:22,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:22,125 INFO L93 Difference]: Finished difference Result 369 states and 533 transitions. [2022-04-07 23:00:22,125 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 533 transitions. [2022-04-07 23:00:22,125 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:22,125 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:22,126 INFO L74 IsIncluded]: Start isIncluded. First operand has 356 states, 351 states have (on average 1.4415954415954415) internal successors, (506), 351 states have internal predecessors, (506), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 369 states. [2022-04-07 23:00:22,126 INFO L87 Difference]: Start difference. First operand has 356 states, 351 states have (on average 1.4415954415954415) internal successors, (506), 351 states have internal predecessors, (506), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 369 states. [2022-04-07 23:00:22,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:22,131 INFO L93 Difference]: Finished difference Result 369 states and 533 transitions. [2022-04-07 23:00:22,131 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 533 transitions. [2022-04-07 23:00:22,131 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:22,131 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:22,131 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:22,131 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:22,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 356 states, 351 states have (on average 1.4415954415954415) internal successors, (506), 351 states have internal predecessors, (506), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:22,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 510 transitions. [2022-04-07 23:00:22,137 INFO L78 Accepts]: Start accepts. Automaton has 356 states and 510 transitions. Word has length 30 [2022-04-07 23:00:22,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:22,137 INFO L478 AbstractCegarLoop]: Abstraction has 356 states and 510 transitions. [2022-04-07 23:00:22,137 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:22,137 INFO L276 IsEmpty]: Start isEmpty. Operand 356 states and 510 transitions. [2022-04-07 23:00:22,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 23:00:22,138 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:22,138 INFO L499 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:22,153 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:22,341 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:22,341 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:22,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:22,342 INFO L85 PathProgramCache]: Analyzing trace with hash 56347648, now seen corresponding path program 8 times [2022-04-07 23:00:22,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:22,342 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834461502] [2022-04-07 23:00:22,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:22,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:22,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:22,563 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:22,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:22,569 INFO L290 TraceCheckUtils]: 0: Hoare triple {18601#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18581#true} is VALID [2022-04-07 23:00:22,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {18581#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,569 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18581#true} {18581#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,570 INFO L272 TraceCheckUtils]: 0: Hoare triple {18581#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18601#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:22,570 INFO L290 TraceCheckUtils]: 1: Hoare triple {18601#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18581#true} is VALID [2022-04-07 23:00:22,570 INFO L290 TraceCheckUtils]: 2: Hoare triple {18581#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,570 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18581#true} {18581#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,570 INFO L272 TraceCheckUtils]: 4: Hoare triple {18581#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,570 INFO L290 TraceCheckUtils]: 5: Hoare triple {18581#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18586#(= main_~y~0 0)} is VALID [2022-04-07 23:00:22,571 INFO L290 TraceCheckUtils]: 6: Hoare triple {18586#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18587#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:22,571 INFO L290 TraceCheckUtils]: 7: Hoare triple {18587#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18588#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:22,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {18588#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18589#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:22,572 INFO L290 TraceCheckUtils]: 9: Hoare triple {18589#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18590#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:22,573 INFO L290 TraceCheckUtils]: 10: Hoare triple {18590#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18591#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:22,573 INFO L290 TraceCheckUtils]: 11: Hoare triple {18591#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18592#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:00:22,574 INFO L290 TraceCheckUtils]: 12: Hoare triple {18592#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18593#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:00:22,574 INFO L290 TraceCheckUtils]: 13: Hoare triple {18593#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18594#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:00:22,575 INFO L290 TraceCheckUtils]: 14: Hoare triple {18594#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18595#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:00:22,575 INFO L290 TraceCheckUtils]: 15: Hoare triple {18595#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18596#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:00:22,576 INFO L290 TraceCheckUtils]: 16: Hoare triple {18596#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18597#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:00:22,576 INFO L290 TraceCheckUtils]: 17: Hoare triple {18597#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18598#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:00:22,577 INFO L290 TraceCheckUtils]: 18: Hoare triple {18598#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18598#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:00:22,577 INFO L290 TraceCheckUtils]: 19: Hoare triple {18598#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {18599#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-07 23:00:22,578 INFO L290 TraceCheckUtils]: 20: Hoare triple {18599#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18600#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} is VALID [2022-04-07 23:00:22,578 INFO L290 TraceCheckUtils]: 21: Hoare triple {18600#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,578 INFO L290 TraceCheckUtils]: 22: Hoare triple {18582#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18582#false} is VALID [2022-04-07 23:00:22,578 INFO L290 TraceCheckUtils]: 23: Hoare triple {18582#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,578 INFO L290 TraceCheckUtils]: 24: Hoare triple {18582#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {18582#false} is VALID [2022-04-07 23:00:22,578 INFO L290 TraceCheckUtils]: 25: Hoare triple {18582#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,578 INFO L272 TraceCheckUtils]: 26: Hoare triple {18582#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {18582#false} is VALID [2022-04-07 23:00:22,578 INFO L290 TraceCheckUtils]: 27: Hoare triple {18582#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18582#false} is VALID [2022-04-07 23:00:22,578 INFO L290 TraceCheckUtils]: 28: Hoare triple {18582#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,579 INFO L290 TraceCheckUtils]: 29: Hoare triple {18582#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,579 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 23:00:22,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:22,579 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1834461502] [2022-04-07 23:00:22,579 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1834461502] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:22,579 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [342025930] [2022-04-07 23:00:22,579 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 23:00:22,579 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:22,579 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:22,580 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:22,596 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-07 23:00:22,616 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 23:00:22,616 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:22,617 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-07 23:00:22,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:22,625 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:22,882 INFO L272 TraceCheckUtils]: 0: Hoare triple {18581#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,882 INFO L290 TraceCheckUtils]: 1: Hoare triple {18581#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18581#true} is VALID [2022-04-07 23:00:22,882 INFO L290 TraceCheckUtils]: 2: Hoare triple {18581#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,882 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18581#true} {18581#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,882 INFO L272 TraceCheckUtils]: 4: Hoare triple {18581#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:22,892 INFO L290 TraceCheckUtils]: 5: Hoare triple {18581#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18586#(= main_~y~0 0)} is VALID [2022-04-07 23:00:22,892 INFO L290 TraceCheckUtils]: 6: Hoare triple {18586#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18587#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:22,893 INFO L290 TraceCheckUtils]: 7: Hoare triple {18587#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18588#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:22,893 INFO L290 TraceCheckUtils]: 8: Hoare triple {18588#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18589#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:22,894 INFO L290 TraceCheckUtils]: 9: Hoare triple {18589#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18590#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:22,894 INFO L290 TraceCheckUtils]: 10: Hoare triple {18590#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18591#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:22,895 INFO L290 TraceCheckUtils]: 11: Hoare triple {18591#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18592#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:00:22,895 INFO L290 TraceCheckUtils]: 12: Hoare triple {18592#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18593#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:00:22,896 INFO L290 TraceCheckUtils]: 13: Hoare triple {18593#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18594#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:00:22,896 INFO L290 TraceCheckUtils]: 14: Hoare triple {18594#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18595#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:00:22,897 INFO L290 TraceCheckUtils]: 15: Hoare triple {18595#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18596#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:00:22,897 INFO L290 TraceCheckUtils]: 16: Hoare triple {18596#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18597#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:00:22,898 INFO L290 TraceCheckUtils]: 17: Hoare triple {18597#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18598#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:00:22,898 INFO L290 TraceCheckUtils]: 18: Hoare triple {18598#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18598#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:00:22,898 INFO L290 TraceCheckUtils]: 19: Hoare triple {18598#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {18599#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-07 23:00:22,899 INFO L290 TraceCheckUtils]: 20: Hoare triple {18599#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18665#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-07 23:00:22,899 INFO L290 TraceCheckUtils]: 21: Hoare triple {18665#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,899 INFO L290 TraceCheckUtils]: 22: Hoare triple {18582#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18582#false} is VALID [2022-04-07 23:00:22,899 INFO L290 TraceCheckUtils]: 23: Hoare triple {18582#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,899 INFO L290 TraceCheckUtils]: 24: Hoare triple {18582#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {18582#false} is VALID [2022-04-07 23:00:22,899 INFO L290 TraceCheckUtils]: 25: Hoare triple {18582#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,899 INFO L272 TraceCheckUtils]: 26: Hoare triple {18582#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {18582#false} is VALID [2022-04-07 23:00:22,899 INFO L290 TraceCheckUtils]: 27: Hoare triple {18582#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18582#false} is VALID [2022-04-07 23:00:22,899 INFO L290 TraceCheckUtils]: 28: Hoare triple {18582#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,900 INFO L290 TraceCheckUtils]: 29: Hoare triple {18582#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:22,900 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 23:00:22,900 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:23,282 INFO L290 TraceCheckUtils]: 29: Hoare triple {18582#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:23,282 INFO L290 TraceCheckUtils]: 28: Hoare triple {18582#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:23,282 INFO L290 TraceCheckUtils]: 27: Hoare triple {18582#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18582#false} is VALID [2022-04-07 23:00:23,282 INFO L272 TraceCheckUtils]: 26: Hoare triple {18582#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {18582#false} is VALID [2022-04-07 23:00:23,282 INFO L290 TraceCheckUtils]: 25: Hoare triple {18582#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:23,282 INFO L290 TraceCheckUtils]: 24: Hoare triple {18582#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {18582#false} is VALID [2022-04-07 23:00:23,282 INFO L290 TraceCheckUtils]: 23: Hoare triple {18582#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:23,282 INFO L290 TraceCheckUtils]: 22: Hoare triple {18582#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18582#false} is VALID [2022-04-07 23:00:23,283 INFO L290 TraceCheckUtils]: 21: Hoare triple {18717#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {18582#false} is VALID [2022-04-07 23:00:23,283 INFO L290 TraceCheckUtils]: 20: Hoare triple {18721#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18717#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 23:00:23,284 INFO L290 TraceCheckUtils]: 19: Hoare triple {18725#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {18721#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:23,284 INFO L290 TraceCheckUtils]: 18: Hoare triple {18725#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18725#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:23,285 INFO L290 TraceCheckUtils]: 17: Hoare triple {18732#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18725#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:23,286 INFO L290 TraceCheckUtils]: 16: Hoare triple {18736#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18732#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:00:23,286 INFO L290 TraceCheckUtils]: 15: Hoare triple {18740#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18736#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:00:23,287 INFO L290 TraceCheckUtils]: 14: Hoare triple {18744#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18740#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:00:23,288 INFO L290 TraceCheckUtils]: 13: Hoare triple {18748#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18744#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:00:23,288 INFO L290 TraceCheckUtils]: 12: Hoare triple {18752#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18748#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:00:23,289 INFO L290 TraceCheckUtils]: 11: Hoare triple {18756#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18752#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 23:00:23,290 INFO L290 TraceCheckUtils]: 10: Hoare triple {18760#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18756#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 23:00:23,290 INFO L290 TraceCheckUtils]: 9: Hoare triple {18764#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18760#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 23:00:23,291 INFO L290 TraceCheckUtils]: 8: Hoare triple {18768#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18764#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 23:00:23,291 INFO L290 TraceCheckUtils]: 7: Hoare triple {18772#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18768#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 23:00:23,292 INFO L290 TraceCheckUtils]: 6: Hoare triple {18776#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18772#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 23:00:23,292 INFO L290 TraceCheckUtils]: 5: Hoare triple {18581#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18776#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 23:00:23,292 INFO L272 TraceCheckUtils]: 4: Hoare triple {18581#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:23,293 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18581#true} {18581#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:23,293 INFO L290 TraceCheckUtils]: 2: Hoare triple {18581#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:23,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {18581#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18581#true} is VALID [2022-04-07 23:00:23,293 INFO L272 TraceCheckUtils]: 0: Hoare triple {18581#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18581#true} is VALID [2022-04-07 23:00:23,293 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 23:00:23,293 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [342025930] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:23,293 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:23,293 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 34 [2022-04-07 23:00:23,293 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [643770156] [2022-04-07 23:00:23,293 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:23,294 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:00:23,294 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:23,294 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:23,339 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:23,339 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-07 23:00:23,339 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:23,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-07 23:00:23,340 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=240, Invalid=882, Unknown=0, NotChecked=0, Total=1122 [2022-04-07 23:00:23,340 INFO L87 Difference]: Start difference. First operand 356 states and 510 transitions. Second operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:18,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:18,032 INFO L93 Difference]: Finished difference Result 1204 states and 1906 transitions. [2022-04-07 23:02:18,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 125 states. [2022-04-07 23:02:18,033 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:02:18,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:02:18,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:18,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 311 transitions. [2022-04-07 23:02:18,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:18,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 311 transitions. [2022-04-07 23:02:18,037 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 125 states and 311 transitions. [2022-04-07 23:02:21,384 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 311 edges. 311 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:21,423 INFO L225 Difference]: With dead ends: 1204 [2022-04-07 23:02:21,424 INFO L226 Difference]: Without dead ends: 1141 [2022-04-07 23:02:21,428 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 154 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9275 ImplicationChecksByTransitivity, 99.6s TimeCoverageRelationStatistics Valid=5877, Invalid=18303, Unknown=0, NotChecked=0, Total=24180 [2022-04-07 23:02:21,428 INFO L913 BasicCegarLoop]: 34 mSDtfsCounter, 874 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 1322 mSolverCounterSat, 1017 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 874 SdHoareTripleChecker+Valid, 121 SdHoareTripleChecker+Invalid, 2339 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1017 IncrementalHoareTripleChecker+Valid, 1322 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.1s IncrementalHoareTripleChecker+Time [2022-04-07 23:02:21,428 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [874 Valid, 121 Invalid, 2339 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1017 Valid, 1322 Invalid, 0 Unknown, 0 Unchecked, 6.1s Time] [2022-04-07 23:02:21,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1141 states. [2022-04-07 23:02:22,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1141 to 407. [2022-04-07 23:02:22,407 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:02:22,407 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1141 states. Second operand has 407 states, 402 states have (on average 1.4527363184079602) internal successors, (584), 402 states have internal predecessors, (584), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:22,407 INFO L74 IsIncluded]: Start isIncluded. First operand 1141 states. Second operand has 407 states, 402 states have (on average 1.4527363184079602) internal successors, (584), 402 states have internal predecessors, (584), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:22,408 INFO L87 Difference]: Start difference. First operand 1141 states. Second operand has 407 states, 402 states have (on average 1.4527363184079602) internal successors, (584), 402 states have internal predecessors, (584), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:22,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:22,439 INFO L93 Difference]: Finished difference Result 1141 states and 1620 transitions. [2022-04-07 23:02:22,439 INFO L276 IsEmpty]: Start isEmpty. Operand 1141 states and 1620 transitions. [2022-04-07 23:02:22,440 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:22,441 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:22,441 INFO L74 IsIncluded]: Start isIncluded. First operand has 407 states, 402 states have (on average 1.4527363184079602) internal successors, (584), 402 states have internal predecessors, (584), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1141 states. [2022-04-07 23:02:22,441 INFO L87 Difference]: Start difference. First operand has 407 states, 402 states have (on average 1.4527363184079602) internal successors, (584), 402 states have internal predecessors, (584), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1141 states. [2022-04-07 23:02:22,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:22,473 INFO L93 Difference]: Finished difference Result 1141 states and 1620 transitions. [2022-04-07 23:02:22,473 INFO L276 IsEmpty]: Start isEmpty. Operand 1141 states and 1620 transitions. [2022-04-07 23:02:22,475 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:22,475 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:22,475 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:02:22,475 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:02:22,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 407 states, 402 states have (on average 1.4527363184079602) internal successors, (584), 402 states have internal predecessors, (584), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:22,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 588 transitions. [2022-04-07 23:02:22,482 INFO L78 Accepts]: Start accepts. Automaton has 407 states and 588 transitions. Word has length 30 [2022-04-07 23:02:22,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:02:22,482 INFO L478 AbstractCegarLoop]: Abstraction has 407 states and 588 transitions. [2022-04-07 23:02:22,482 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:22,482 INFO L276 IsEmpty]: Start isEmpty. Operand 407 states and 588 transitions. [2022-04-07 23:02:22,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 23:02:22,482 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:02:22,483 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:02:22,501 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-07 23:02:22,697 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:22,697 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:02:22,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:02:22,698 INFO L85 PathProgramCache]: Analyzing trace with hash 727683038, now seen corresponding path program 9 times [2022-04-07 23:02:22,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:02:22,698 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036466839] [2022-04-07 23:02:22,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:02:22,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:02:22,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:23,102 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:02:23,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:23,106 INFO L290 TraceCheckUtils]: 0: Hoare triple {23408#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23385#true} is VALID [2022-04-07 23:02:23,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {23385#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:23,106 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23385#true} {23385#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:23,106 INFO L272 TraceCheckUtils]: 0: Hoare triple {23385#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23408#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:02:23,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {23408#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23385#true} is VALID [2022-04-07 23:02:23,106 INFO L290 TraceCheckUtils]: 2: Hoare triple {23385#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:23,107 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23385#true} {23385#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:23,107 INFO L272 TraceCheckUtils]: 4: Hoare triple {23385#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:23,107 INFO L290 TraceCheckUtils]: 5: Hoare triple {23385#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23390#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:02:23,108 INFO L290 TraceCheckUtils]: 6: Hoare triple {23390#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23391#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 1)) (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)))} is VALID [2022-04-07 23:02:23,108 INFO L290 TraceCheckUtils]: 7: Hoare triple {23391#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 1)) (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23392#(and (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 2)))} is VALID [2022-04-07 23:02:23,109 INFO L290 TraceCheckUtils]: 8: Hoare triple {23392#(and (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23393#(and (<= (+ (* main_~x~0 2) main_~y~0 3) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 3)))} is VALID [2022-04-07 23:02:23,110 INFO L290 TraceCheckUtils]: 9: Hoare triple {23393#(and (<= (+ (* main_~x~0 2) main_~y~0 3) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 3)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23394#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 4)) (<= (+ (* main_~x~0 2) main_~y~0 4) (* main_~n~0 2)))} is VALID [2022-04-07 23:02:23,110 INFO L290 TraceCheckUtils]: 10: Hoare triple {23394#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 4)) (<= (+ (* main_~x~0 2) main_~y~0 4) (* main_~n~0 2)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23395#(and (<= (+ main_~y~0 (* 8589934592 (div main_~x~0 4294967296)) 4) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ main_~y~0 (* 8589934592 (div main_~x~0 4294967296)) 4)))} is VALID [2022-04-07 23:02:23,111 INFO L290 TraceCheckUtils]: 11: Hoare triple {23395#(and (<= (+ main_~y~0 (* 8589934592 (div main_~x~0 4294967296)) 4) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ main_~y~0 (* 8589934592 (div main_~x~0 4294967296)) 4)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {23396#(and (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296)) 4) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296)) 4)))} is VALID [2022-04-07 23:02:23,129 INFO L290 TraceCheckUtils]: 12: Hoare triple {23396#(and (<= (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296)) 4) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ main_~z~0 (* 8589934592 (div main_~x~0 4294967296)) 4)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23397#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 23:02:23,131 INFO L290 TraceCheckUtils]: 13: Hoare triple {23397#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23398#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:23,132 INFO L290 TraceCheckUtils]: 14: Hoare triple {23398#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23399#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:23,132 INFO L290 TraceCheckUtils]: 15: Hoare triple {23399#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23400#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} is VALID [2022-04-07 23:02:23,133 INFO L290 TraceCheckUtils]: 16: Hoare triple {23400#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {23400#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} is VALID [2022-04-07 23:02:23,134 INFO L290 TraceCheckUtils]: 17: Hoare triple {23400#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23399#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:23,135 INFO L290 TraceCheckUtils]: 18: Hoare triple {23399#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23398#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:23,135 INFO L290 TraceCheckUtils]: 19: Hoare triple {23398#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23397#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 23:02:23,136 INFO L290 TraceCheckUtils]: 20: Hoare triple {23397#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23401#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} is VALID [2022-04-07 23:02:23,137 INFO L290 TraceCheckUtils]: 21: Hoare triple {23401#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23401#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} is VALID [2022-04-07 23:02:23,137 INFO L290 TraceCheckUtils]: 22: Hoare triple {23401#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23402#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:23,138 INFO L290 TraceCheckUtils]: 23: Hoare triple {23402#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23403#(<= (* main_~n~0 2) (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 2))} is VALID [2022-04-07 23:02:23,139 INFO L290 TraceCheckUtils]: 24: Hoare triple {23403#(<= (* main_~n~0 2) (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23404#(<= (* main_~n~0 2) (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 1))} is VALID [2022-04-07 23:02:23,142 INFO L290 TraceCheckUtils]: 25: Hoare triple {23404#(<= (* main_~n~0 2) (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23405#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:23,143 INFO L290 TraceCheckUtils]: 26: Hoare triple {23405#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23405#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:23,144 INFO L272 TraceCheckUtils]: 27: Hoare triple {23405#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {23406#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 23:02:23,144 INFO L290 TraceCheckUtils]: 28: Hoare triple {23406#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23407#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 23:02:23,145 INFO L290 TraceCheckUtils]: 29: Hoare triple {23407#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {23386#false} is VALID [2022-04-07 23:02:23,145 INFO L290 TraceCheckUtils]: 30: Hoare triple {23386#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23386#false} is VALID [2022-04-07 23:02:23,145 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:02:23,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:02:23,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1036466839] [2022-04-07 23:02:23,145 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1036466839] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:02:23,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1131108009] [2022-04-07 23:02:23,145 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:02:23,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:23,145 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:02:23,146 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:02:23,148 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-07 23:02:23,321 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 23:02:23,321 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:02:23,323 WARN L261 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 70 conjunts are in the unsatisfiable core [2022-04-07 23:02:23,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:23,349 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:02:24,406 INFO L272 TraceCheckUtils]: 0: Hoare triple {23385#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:24,406 INFO L290 TraceCheckUtils]: 1: Hoare triple {23385#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23385#true} is VALID [2022-04-07 23:02:24,406 INFO L290 TraceCheckUtils]: 2: Hoare triple {23385#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:24,406 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23385#true} {23385#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:24,406 INFO L272 TraceCheckUtils]: 4: Hoare triple {23385#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:24,407 INFO L290 TraceCheckUtils]: 5: Hoare triple {23385#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23390#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:02:24,407 INFO L290 TraceCheckUtils]: 6: Hoare triple {23390#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23430#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= main_~y~0 1) (< 0 (mod (+ main_~x~0 1) 4294967296)))} is VALID [2022-04-07 23:02:24,409 INFO L290 TraceCheckUtils]: 7: Hoare triple {23430#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= main_~y~0 1) (< 0 (mod (+ main_~x~0 1) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23434#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 1) main_~y~0) 1) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)) (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 23:02:24,409 INFO L290 TraceCheckUtils]: 8: Hoare triple {23434#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ (- 1) main_~y~0) 1) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)) (< 0 (mod main_~n~0 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23438#(and (= (+ (- 1) main_~n~0) (+ main_~x~0 2)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 3) (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 23:02:24,410 INFO L290 TraceCheckUtils]: 9: Hoare triple {23438#(and (= (+ (- 1) main_~n~0) (+ main_~x~0 2)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 3) (< 0 (mod main_~n~0 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23442#(and (= (+ main_~x~0 3) (+ (- 1) main_~n~0)) (< 0 (mod (+ main_~x~0 1) 4294967296)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 4) (< 0 (mod main_~n~0 4294967296)))} is VALID [2022-04-07 23:02:24,411 INFO L290 TraceCheckUtils]: 10: Hoare triple {23442#(and (= (+ main_~x~0 3) (+ (- 1) main_~n~0)) (< 0 (mod (+ main_~x~0 1) 4294967296)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 4) (< 0 (mod main_~n~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23446#(and (= main_~y~0 4) (<= (mod main_~x~0 4294967296) 0) (= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-07 23:02:24,411 INFO L290 TraceCheckUtils]: 11: Hoare triple {23446#(and (= main_~y~0 4) (<= (mod main_~x~0 4294967296) 0) (= (+ main_~x~0 4) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {23450#(and (<= (mod main_~x~0 4294967296) 0) (= (+ main_~x~0 4) main_~n~0) (= main_~z~0 4))} is VALID [2022-04-07 23:02:24,412 INFO L290 TraceCheckUtils]: 12: Hoare triple {23450#(and (<= (mod main_~x~0 4294967296) 0) (= (+ main_~x~0 4) main_~n~0) (= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23454#(and (= (+ main_~z~0 1) 4) (= (+ main_~x~0 3) main_~n~0) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0))} is VALID [2022-04-07 23:02:24,412 INFO L290 TraceCheckUtils]: 13: Hoare triple {23454#(and (= (+ main_~z~0 1) 4) (= (+ main_~x~0 3) main_~n~0) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23458#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ main_~z~0 2) 4) (= (+ (- 2) main_~n~0) main_~x~0))} is VALID [2022-04-07 23:02:24,413 INFO L290 TraceCheckUtils]: 14: Hoare triple {23458#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ main_~z~0 2) 4) (= (+ (- 2) main_~n~0) main_~x~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23462#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ main_~z~0 3) 4) (= (+ (- 2) main_~n~0) (+ (- 1) main_~x~0)))} is VALID [2022-04-07 23:02:24,413 INFO L290 TraceCheckUtils]: 15: Hoare triple {23462#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ main_~z~0 3) 4) (= (+ (- 2) main_~n~0) (+ (- 1) main_~x~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23466#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= (+ main_~z~0 1) 1))} is VALID [2022-04-07 23:02:24,414 INFO L290 TraceCheckUtils]: 16: Hoare triple {23466#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= (+ main_~z~0 1) 1))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {23466#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= (+ main_~z~0 1) 1))} is VALID [2022-04-07 23:02:24,414 INFO L290 TraceCheckUtils]: 17: Hoare triple {23466#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= (+ main_~z~0 1) 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23473#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 1))} is VALID [2022-04-07 23:02:24,415 INFO L290 TraceCheckUtils]: 18: Hoare triple {23473#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23477#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 2))} is VALID [2022-04-07 23:02:24,415 INFO L290 TraceCheckUtils]: 19: Hoare triple {23477#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23481#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= 2 (+ (- 1) main_~z~0)))} is VALID [2022-04-07 23:02:24,415 INFO L290 TraceCheckUtils]: 20: Hoare triple {23481#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= 2 (+ (- 1) main_~z~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23485#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 4))} is VALID [2022-04-07 23:02:24,416 INFO L290 TraceCheckUtils]: 21: Hoare triple {23485#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 4))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23485#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 4))} is VALID [2022-04-07 23:02:24,416 INFO L290 TraceCheckUtils]: 22: Hoare triple {23485#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ (- 2) main_~x~0)) (= main_~z~0 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23492#(and (= (+ main_~x~0 1) main_~n~0) (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 1) main_~z~0) 4))} is VALID [2022-04-07 23:02:24,417 INFO L290 TraceCheckUtils]: 23: Hoare triple {23492#(and (= (+ main_~x~0 1) main_~n~0) (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 1) main_~z~0) 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23496#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~z~0) 4) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:02:24,418 INFO L290 TraceCheckUtils]: 24: Hoare triple {23496#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~z~0) 4) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23500#(and (= 7 main_~z~0) (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ main_~x~0 1)))} is VALID [2022-04-07 23:02:24,418 INFO L290 TraceCheckUtils]: 25: Hoare triple {23500#(and (= 7 main_~z~0) (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ main_~x~0 1)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23504#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ main_~x~0 2)) (= 7 (+ (- 1) main_~z~0)))} is VALID [2022-04-07 23:02:24,419 INFO L290 TraceCheckUtils]: 26: Hoare triple {23504#(and (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0) (= (+ (- 2) main_~n~0) (+ main_~x~0 2)) (= 7 (+ (- 1) main_~z~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23508#(and (= main_~z~0 8) (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0))} is VALID [2022-04-07 23:02:24,431 INFO L272 TraceCheckUtils]: 27: Hoare triple {23508#(and (= main_~z~0 8) (<= (mod (+ 4294967292 main_~n~0) 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {23512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:02:24,431 INFO L290 TraceCheckUtils]: 28: Hoare triple {23512#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:02:24,432 INFO L290 TraceCheckUtils]: 29: Hoare triple {23516#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {23386#false} is VALID [2022-04-07 23:02:24,432 INFO L290 TraceCheckUtils]: 30: Hoare triple {23386#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23386#false} is VALID [2022-04-07 23:02:24,432 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:02:24,432 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:02:26,104 INFO L290 TraceCheckUtils]: 30: Hoare triple {23386#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23386#false} is VALID [2022-04-07 23:02:26,104 INFO L290 TraceCheckUtils]: 29: Hoare triple {23516#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {23386#false} is VALID [2022-04-07 23:02:26,105 INFO L290 TraceCheckUtils]: 28: Hoare triple {23512#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23516#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:02:26,107 INFO L272 TraceCheckUtils]: 27: Hoare triple {23405#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {23512#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:02:26,108 INFO L290 TraceCheckUtils]: 26: Hoare triple {23535#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23405#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:02:26,109 INFO L290 TraceCheckUtils]: 25: Hoare triple {23539#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23535#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)))))} is VALID [2022-04-07 23:02:26,110 INFO L290 TraceCheckUtils]: 24: Hoare triple {23543#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23539#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1) (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2))))} is VALID [2022-04-07 23:02:26,111 INFO L290 TraceCheckUtils]: 23: Hoare triple {23547#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23543#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 2) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 23:02:26,113 INFO L290 TraceCheckUtils]: 22: Hoare triple {23551#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {23547#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 3) (+ (* main_~n~0 2) (* (div (+ main_~z~0 3) 4294967296) 4294967296)))))} is VALID [2022-04-07 23:02:26,119 INFO L290 TraceCheckUtils]: 21: Hoare triple {23551#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23551#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:26,120 INFO L290 TraceCheckUtils]: 20: Hoare triple {23558#(or (and (< (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0) (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23551#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:26,122 INFO L290 TraceCheckUtils]: 19: Hoare triple {23562#(or (and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23558#(or (and (< (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0) (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:26,123 INFO L290 TraceCheckUtils]: 18: Hoare triple {23566#(or (and (< (+ (* main_~n~0 2) (* (div (+ 7 main_~z~0) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 8)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0) (+ (* main_~n~0 2) (* (div (+ 7 main_~z~0) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23562#(or (and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:26,124 INFO L290 TraceCheckUtils]: 17: Hoare triple {23570#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 8) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 9)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 8) (+ (* main_~n~0 2) (* (div (+ main_~z~0 8) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23566#(or (and (< (+ (* main_~n~0 2) (* (div (+ 7 main_~z~0) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 8)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0) (+ (* main_~n~0 2) (* (div (+ 7 main_~z~0) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:26,124 INFO L290 TraceCheckUtils]: 16: Hoare triple {23570#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 8) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 9)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 8) (+ (* main_~n~0 2) (* (div (+ main_~z~0 8) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {23570#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 8) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 9)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 8) (+ (* main_~n~0 2) (* (div (+ main_~z~0 8) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:26,125 INFO L290 TraceCheckUtils]: 15: Hoare triple {23577#(or (and (< (+ (* main_~n~0 2) (* (div (+ 7 main_~z~0) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 8)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0) (+ (* main_~n~0 2) (* (div (+ 7 main_~z~0) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23570#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~z~0 8) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 9)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 8) (+ (* main_~n~0 2) (* (div (+ main_~z~0 8) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:26,126 INFO L290 TraceCheckUtils]: 14: Hoare triple {23581#(or (and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23577#(or (and (< (+ (* main_~n~0 2) (* (div (+ 7 main_~z~0) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 8)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0) (+ (* main_~n~0 2) (* (div (+ 7 main_~z~0) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:02:26,128 INFO L290 TraceCheckUtils]: 13: Hoare triple {23585#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0) (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23581#(or (and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~z~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) (* main_~n~0 2)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:02:26,129 INFO L290 TraceCheckUtils]: 12: Hoare triple {23589#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23585#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 6)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0) (+ (* (div (+ 5 main_~z~0) 4294967296) 4294967296) (* main_~n~0 2)))))} is VALID [2022-04-07 23:02:26,137 INFO L290 TraceCheckUtils]: 11: Hoare triple {23593#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4) (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {23589#(or (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~z~0))) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:26,138 INFO L290 TraceCheckUtils]: 10: Hoare triple {23593#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4) (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23593#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4) (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))))))} is VALID [2022-04-07 23:02:26,139 INFO L290 TraceCheckUtils]: 9: Hoare triple {23600#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 6))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23593#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 4) (+ (* main_~n~0 2) (* 4294967296 (div (+ main_~y~0 4) 4294967296))))))} is VALID [2022-04-07 23:02:26,141 INFO L290 TraceCheckUtils]: 8: Hoare triple {23604#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 6) (+ (* main_~n~0 2) (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23600#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 5 main_~y~0) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) (* main_~n~0 2))) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 6))))} is VALID [2022-04-07 23:02:26,142 INFO L290 TraceCheckUtils]: 7: Hoare triple {23608#(or (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ 7 main_~y~0) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 8)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~y~0) (+ (* main_~n~0 2) (* 4294967296 (div (+ 7 main_~y~0) 4294967296))))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23604#(or (and (< (+ (* main_~n~0 2) (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~y~0)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 6) (+ (* main_~n~0 2) (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:02:26,143 INFO L290 TraceCheckUtils]: 6: Hoare triple {23612#(or (and (< (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 9)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 8) (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) (* main_~n~0 2)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23608#(or (and (< (+ (* main_~n~0 2) (* 4294967296 (div (+ 7 main_~y~0) 4294967296))) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 8)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) 7 main_~y~0) (+ (* main_~n~0 2) (* 4294967296 (div (+ 7 main_~y~0) 4294967296))))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:02:26,146 INFO L290 TraceCheckUtils]: 5: Hoare triple {23385#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23612#(or (and (< (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) (* main_~n~0 2)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 9)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~y~0 8) (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) (* main_~n~0 2)))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:02:26,147 INFO L272 TraceCheckUtils]: 4: Hoare triple {23385#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:26,147 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23385#true} {23385#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:26,147 INFO L290 TraceCheckUtils]: 2: Hoare triple {23385#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:26,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {23385#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23385#true} is VALID [2022-04-07 23:02:26,147 INFO L272 TraceCheckUtils]: 0: Hoare triple {23385#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23385#true} is VALID [2022-04-07 23:02:26,147 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:02:26,147 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1131108009] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:02:26,147 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:02:26,147 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 24, 23] total 60 [2022-04-07 23:02:26,147 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1625375603] [2022-04-07 23:02:26,148 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:02:26,148 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 59 states have (on average 1.2372881355932204) internal successors, (73), 57 states have internal predecessors, (73), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:02:26,148 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:02:26,148 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 60 states, 59 states have (on average 1.2372881355932204) internal successors, (73), 57 states have internal predecessors, (73), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:26,251 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 80 edges. 80 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:26,251 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 60 states [2022-04-07 23:02:26,251 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:02:26,252 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2022-04-07 23:02:26,252 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=379, Invalid=3161, Unknown=0, NotChecked=0, Total=3540 [2022-04-07 23:02:26,252 INFO L87 Difference]: Start difference. First operand 407 states and 588 transitions. Second operand has 60 states, 59 states have (on average 1.2372881355932204) internal successors, (73), 57 states have internal predecessors, (73), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:34,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:34,776 INFO L93 Difference]: Finished difference Result 433 states and 616 transitions. [2022-04-07 23:02:34,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-07 23:02:34,777 INFO L78 Accepts]: Start accepts. Automaton has has 60 states, 59 states have (on average 1.2372881355932204) internal successors, (73), 57 states have internal predecessors, (73), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:02:34,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:02:34,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 59 states have (on average 1.2372881355932204) internal successors, (73), 57 states have internal predecessors, (73), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:34,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 83 transitions. [2022-04-07 23:02:34,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 59 states have (on average 1.2372881355932204) internal successors, (73), 57 states have internal predecessors, (73), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:34,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 83 transitions. [2022-04-07 23:02:34,778 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 83 transitions. [2022-04-07 23:02:34,908 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 83 edges. 83 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:34,915 INFO L225 Difference]: With dead ends: 433 [2022-04-07 23:02:34,915 INFO L226 Difference]: Without dead ends: 406 [2022-04-07 23:02:34,916 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2133 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=1031, Invalid=7899, Unknown=0, NotChecked=0, Total=8930 [2022-04-07 23:02:34,916 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 163 mSDsluCounter, 122 mSDsCounter, 0 mSdLazyCounter, 1047 mSolverCounterSat, 232 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 1279 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 232 IncrementalHoareTripleChecker+Valid, 1047 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2022-04-07 23:02:34,916 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [163 Valid, 141 Invalid, 1279 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [232 Valid, 1047 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2022-04-07 23:02:34,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 406 states. [2022-04-07 23:02:35,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 406 to 401. [2022-04-07 23:02:35,871 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:02:35,872 INFO L82 GeneralOperation]: Start isEquivalent. First operand 406 states. Second operand has 401 states, 396 states have (on average 1.457070707070707) internal successors, (577), 396 states have internal predecessors, (577), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:35,872 INFO L74 IsIncluded]: Start isIncluded. First operand 406 states. Second operand has 401 states, 396 states have (on average 1.457070707070707) internal successors, (577), 396 states have internal predecessors, (577), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:35,872 INFO L87 Difference]: Start difference. First operand 406 states. Second operand has 401 states, 396 states have (on average 1.457070707070707) internal successors, (577), 396 states have internal predecessors, (577), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:35,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:35,878 INFO L93 Difference]: Finished difference Result 406 states and 587 transitions. [2022-04-07 23:02:35,878 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 587 transitions. [2022-04-07 23:02:35,879 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:35,879 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:35,879 INFO L74 IsIncluded]: Start isIncluded. First operand has 401 states, 396 states have (on average 1.457070707070707) internal successors, (577), 396 states have internal predecessors, (577), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 406 states. [2022-04-07 23:02:35,879 INFO L87 Difference]: Start difference. First operand has 401 states, 396 states have (on average 1.457070707070707) internal successors, (577), 396 states have internal predecessors, (577), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 406 states. [2022-04-07 23:02:35,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:35,885 INFO L93 Difference]: Finished difference Result 406 states and 587 transitions. [2022-04-07 23:02:35,885 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 587 transitions. [2022-04-07 23:02:35,885 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:35,885 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:35,885 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:02:35,885 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:02:35,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 401 states, 396 states have (on average 1.457070707070707) internal successors, (577), 396 states have internal predecessors, (577), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:35,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 401 states and 581 transitions. [2022-04-07 23:02:35,892 INFO L78 Accepts]: Start accepts. Automaton has 401 states and 581 transitions. Word has length 31 [2022-04-07 23:02:35,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:02:35,892 INFO L478 AbstractCegarLoop]: Abstraction has 401 states and 581 transitions. [2022-04-07 23:02:35,892 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 60 states, 59 states have (on average 1.2372881355932204) internal successors, (73), 57 states have internal predecessors, (73), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:35,892 INFO L276 IsEmpty]: Start isEmpty. Operand 401 states and 581 transitions. [2022-04-07 23:02:35,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 23:02:35,893 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:02:35,893 INFO L499 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:02:35,899 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-07 23:02:36,093 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:36,094 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:02:36,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:02:36,101 INFO L85 PathProgramCache]: Analyzing trace with hash 603627779, now seen corresponding path program 7 times [2022-04-07 23:02:36,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:02:36,101 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [731290512] [2022-04-07 23:02:36,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:02:36,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:02:36,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:36,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:02:36,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:36,280 INFO L290 TraceCheckUtils]: 0: Hoare triple {25691#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25674#true} is VALID [2022-04-07 23:02:36,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {25674#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,280 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25674#true} {25674#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,280 INFO L272 TraceCheckUtils]: 0: Hoare triple {25674#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25691#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:02:36,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {25691#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25674#true} is VALID [2022-04-07 23:02:36,281 INFO L290 TraceCheckUtils]: 2: Hoare triple {25674#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,281 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25674#true} {25674#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,281 INFO L272 TraceCheckUtils]: 4: Hoare triple {25674#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,281 INFO L290 TraceCheckUtils]: 5: Hoare triple {25674#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25679#(= main_~y~0 0)} is VALID [2022-04-07 23:02:36,281 INFO L290 TraceCheckUtils]: 6: Hoare triple {25679#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25680#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:36,282 INFO L290 TraceCheckUtils]: 7: Hoare triple {25680#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25681#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:02:36,283 INFO L290 TraceCheckUtils]: 8: Hoare triple {25681#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25682#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:02:36,284 INFO L290 TraceCheckUtils]: 9: Hoare triple {25682#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25683#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:02:36,284 INFO L290 TraceCheckUtils]: 10: Hoare triple {25683#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25684#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,285 INFO L290 TraceCheckUtils]: 11: Hoare triple {25684#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25684#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,285 INFO L290 TraceCheckUtils]: 12: Hoare triple {25684#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {25685#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:02:36,286 INFO L290 TraceCheckUtils]: 13: Hoare triple {25685#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25686#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:02:36,286 INFO L290 TraceCheckUtils]: 14: Hoare triple {25686#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25687#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:02:36,287 INFO L290 TraceCheckUtils]: 15: Hoare triple {25687#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25688#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:02:36,287 INFO L290 TraceCheckUtils]: 16: Hoare triple {25688#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25689#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:02:36,288 INFO L290 TraceCheckUtils]: 17: Hoare triple {25689#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25690#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:02:36,288 INFO L290 TraceCheckUtils]: 18: Hoare triple {25690#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25675#false} is VALID [2022-04-07 23:02:36,288 INFO L290 TraceCheckUtils]: 19: Hoare triple {25675#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,288 INFO L290 TraceCheckUtils]: 20: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 21: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 22: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 23: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 24: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 25: Hoare triple {25675#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 26: Hoare triple {25675#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L272 TraceCheckUtils]: 27: Hoare triple {25675#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 28: Hoare triple {25675#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 29: Hoare triple {25675#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L290 TraceCheckUtils]: 30: Hoare triple {25675#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,289 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:02:36,289 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:02:36,289 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [731290512] [2022-04-07 23:02:36,289 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [731290512] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:02:36,289 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1132368341] [2022-04-07 23:02:36,290 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 23:02:36,290 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:36,290 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:02:36,290 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:02:36,292 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-07 23:02:36,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:36,326 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-07 23:02:36,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:36,334 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:02:36,546 INFO L272 TraceCheckUtils]: 0: Hoare triple {25674#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,546 INFO L290 TraceCheckUtils]: 1: Hoare triple {25674#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25674#true} is VALID [2022-04-07 23:02:36,546 INFO L290 TraceCheckUtils]: 2: Hoare triple {25674#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,547 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25674#true} {25674#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,547 INFO L272 TraceCheckUtils]: 4: Hoare triple {25674#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,547 INFO L290 TraceCheckUtils]: 5: Hoare triple {25674#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25679#(= main_~y~0 0)} is VALID [2022-04-07 23:02:36,547 INFO L290 TraceCheckUtils]: 6: Hoare triple {25679#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25680#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:36,548 INFO L290 TraceCheckUtils]: 7: Hoare triple {25680#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25681#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:02:36,548 INFO L290 TraceCheckUtils]: 8: Hoare triple {25681#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25682#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:02:36,549 INFO L290 TraceCheckUtils]: 9: Hoare triple {25682#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25683#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:02:36,549 INFO L290 TraceCheckUtils]: 10: Hoare triple {25683#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25684#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,550 INFO L290 TraceCheckUtils]: 11: Hoare triple {25684#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25684#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,550 INFO L290 TraceCheckUtils]: 12: Hoare triple {25684#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {25731#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,550 INFO L290 TraceCheckUtils]: 13: Hoare triple {25731#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25735#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:02:36,551 INFO L290 TraceCheckUtils]: 14: Hoare triple {25735#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25739#(and (= main_~y~0 (+ main_~z~0 2)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,551 INFO L290 TraceCheckUtils]: 15: Hoare triple {25739#(and (= main_~y~0 (+ main_~z~0 2)) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25743#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 3)) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,552 INFO L290 TraceCheckUtils]: 16: Hoare triple {25743#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 3)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25747#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,553 INFO L290 TraceCheckUtils]: 17: Hoare triple {25747#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25751#(and (<= 5 main_~y~0) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:36,553 INFO L290 TraceCheckUtils]: 18: Hoare triple {25751#(and (<= 5 main_~y~0) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25675#false} is VALID [2022-04-07 23:02:36,553 INFO L290 TraceCheckUtils]: 19: Hoare triple {25675#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,553 INFO L290 TraceCheckUtils]: 20: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,553 INFO L290 TraceCheckUtils]: 21: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,553 INFO L290 TraceCheckUtils]: 22: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,553 INFO L290 TraceCheckUtils]: 23: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,553 INFO L290 TraceCheckUtils]: 24: Hoare triple {25675#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25675#false} is VALID [2022-04-07 23:02:36,554 INFO L290 TraceCheckUtils]: 25: Hoare triple {25675#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,554 INFO L290 TraceCheckUtils]: 26: Hoare triple {25675#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,554 INFO L272 TraceCheckUtils]: 27: Hoare triple {25675#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {25675#false} is VALID [2022-04-07 23:02:36,554 INFO L290 TraceCheckUtils]: 28: Hoare triple {25675#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25675#false} is VALID [2022-04-07 23:02:36,554 INFO L290 TraceCheckUtils]: 29: Hoare triple {25675#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,554 INFO L290 TraceCheckUtils]: 30: Hoare triple {25675#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,554 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:02:36,554 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:02:36,879 INFO L290 TraceCheckUtils]: 30: Hoare triple {25675#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,879 INFO L290 TraceCheckUtils]: 29: Hoare triple {25675#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,879 INFO L290 TraceCheckUtils]: 28: Hoare triple {25675#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25675#false} is VALID [2022-04-07 23:02:36,879 INFO L272 TraceCheckUtils]: 27: Hoare triple {25675#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {25675#false} is VALID [2022-04-07 23:02:36,879 INFO L290 TraceCheckUtils]: 26: Hoare triple {25675#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,879 INFO L290 TraceCheckUtils]: 25: Hoare triple {25806#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25675#false} is VALID [2022-04-07 23:02:36,880 INFO L290 TraceCheckUtils]: 24: Hoare triple {25810#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25806#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:02:36,881 INFO L290 TraceCheckUtils]: 23: Hoare triple {25814#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25810#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:02:36,881 INFO L290 TraceCheckUtils]: 22: Hoare triple {25818#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25814#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:02:36,882 INFO L290 TraceCheckUtils]: 21: Hoare triple {25822#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25818#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:02:36,883 INFO L290 TraceCheckUtils]: 20: Hoare triple {25826#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25822#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-07 23:02:36,883 INFO L290 TraceCheckUtils]: 19: Hoare triple {25826#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {25826#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-07 23:02:36,883 INFO L290 TraceCheckUtils]: 18: Hoare triple {25833#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25826#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-07 23:02:36,884 INFO L290 TraceCheckUtils]: 17: Hoare triple {25837#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25833#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 23:02:36,885 INFO L290 TraceCheckUtils]: 16: Hoare triple {25841#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25837#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:02:36,886 INFO L290 TraceCheckUtils]: 15: Hoare triple {25845#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25841#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-07 23:02:36,887 INFO L290 TraceCheckUtils]: 14: Hoare triple {25849#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25845#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 13: Hoare triple {25853#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25849#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 12: Hoare triple {25674#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {25853#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 11: Hoare triple {25674#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 10: Hoare triple {25674#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25674#true} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 9: Hoare triple {25674#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25674#true} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 8: Hoare triple {25674#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25674#true} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 7: Hoare triple {25674#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25674#true} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 6: Hoare triple {25674#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25674#true} is VALID [2022-04-07 23:02:36,888 INFO L290 TraceCheckUtils]: 5: Hoare triple {25674#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25674#true} is VALID [2022-04-07 23:02:36,889 INFO L272 TraceCheckUtils]: 4: Hoare triple {25674#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,889 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25674#true} {25674#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,889 INFO L290 TraceCheckUtils]: 2: Hoare triple {25674#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,889 INFO L290 TraceCheckUtils]: 1: Hoare triple {25674#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25674#true} is VALID [2022-04-07 23:02:36,889 INFO L272 TraceCheckUtils]: 0: Hoare triple {25674#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25674#true} is VALID [2022-04-07 23:02:36,889 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:02:36,889 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1132368341] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:02:36,889 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:02:36,889 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 33 [2022-04-07 23:02:36,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68372733] [2022-04-07 23:02:36,889 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:02:36,890 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 32 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:02:36,890 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:02:36,890 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 32 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:36,933 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:36,933 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-07 23:02:36,934 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:02:36,934 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-07 23:02:36,934 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=873, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 23:02:36,934 INFO L87 Difference]: Start difference. First operand 401 states and 581 transitions. Second operand has 33 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 32 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:41,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:41,314 INFO L93 Difference]: Finished difference Result 781 states and 991 transitions. [2022-04-07 23:02:41,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2022-04-07 23:02:41,315 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 32 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:02:41,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:02:41,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 32 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:41,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 136 transitions. [2022-04-07 23:02:41,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 32 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:41,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 136 transitions. [2022-04-07 23:02:41,321 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 54 states and 136 transitions. [2022-04-07 23:02:41,510 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 136 edges. 136 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:41,528 INFO L225 Difference]: With dead ends: 781 [2022-04-07 23:02:41,528 INFO L226 Difference]: Without dead ends: 708 [2022-04-07 23:02:41,529 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 52 SyntacticMatches, 1 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2000 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1269, Invalid=5703, Unknown=0, NotChecked=0, Total=6972 [2022-04-07 23:02:41,529 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 240 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 527 mSolverCounterSat, 213 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 240 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 740 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 213 IncrementalHoareTripleChecker+Valid, 527 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-07 23:02:41,529 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [240 Valid, 98 Invalid, 740 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [213 Valid, 527 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-07 23:02:41,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 708 states. [2022-04-07 23:02:42,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 708 to 409. [2022-04-07 23:02:42,509 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:02:42,509 INFO L82 GeneralOperation]: Start isEquivalent. First operand 708 states. Second operand has 409 states, 404 states have (on average 1.443069306930693) internal successors, (583), 404 states have internal predecessors, (583), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:42,510 INFO L74 IsIncluded]: Start isIncluded. First operand 708 states. Second operand has 409 states, 404 states have (on average 1.443069306930693) internal successors, (583), 404 states have internal predecessors, (583), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:42,510 INFO L87 Difference]: Start difference. First operand 708 states. Second operand has 409 states, 404 states have (on average 1.443069306930693) internal successors, (583), 404 states have internal predecessors, (583), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:42,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:42,523 INFO L93 Difference]: Finished difference Result 708 states and 888 transitions. [2022-04-07 23:02:42,523 INFO L276 IsEmpty]: Start isEmpty. Operand 708 states and 888 transitions. [2022-04-07 23:02:42,523 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:42,524 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:42,524 INFO L74 IsIncluded]: Start isIncluded. First operand has 409 states, 404 states have (on average 1.443069306930693) internal successors, (583), 404 states have internal predecessors, (583), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 708 states. [2022-04-07 23:02:42,524 INFO L87 Difference]: Start difference. First operand has 409 states, 404 states have (on average 1.443069306930693) internal successors, (583), 404 states have internal predecessors, (583), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 708 states. [2022-04-07 23:02:42,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:42,537 INFO L93 Difference]: Finished difference Result 708 states and 888 transitions. [2022-04-07 23:02:42,537 INFO L276 IsEmpty]: Start isEmpty. Operand 708 states and 888 transitions. [2022-04-07 23:02:42,538 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:42,538 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:42,538 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:02:42,538 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:02:42,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 409 states, 404 states have (on average 1.443069306930693) internal successors, (583), 404 states have internal predecessors, (583), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:42,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 587 transitions. [2022-04-07 23:02:42,545 INFO L78 Accepts]: Start accepts. Automaton has 409 states and 587 transitions. Word has length 31 [2022-04-07 23:02:42,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:02:42,545 INFO L478 AbstractCegarLoop]: Abstraction has 409 states and 587 transitions. [2022-04-07 23:02:42,545 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 32 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:42,545 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 587 transitions. [2022-04-07 23:02:42,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 23:02:42,545 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:02:42,545 INFO L499 BasicCegarLoop]: trace histogram [8, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:02:42,562 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2022-04-07 23:02:42,758 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:42,759 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:02:42,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:02:42,759 INFO L85 PathProgramCache]: Analyzing trace with hash 852825674, now seen corresponding path program 10 times [2022-04-07 23:02:42,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:02:42,759 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446608702] [2022-04-07 23:02:42,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:02:42,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:02:42,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:42,831 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:02:42,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:42,833 INFO L290 TraceCheckUtils]: 0: Hoare triple {28933#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L290 TraceCheckUtils]: 1: Hoare triple {28924#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28924#true} {28924#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L272 TraceCheckUtils]: 0: Hoare triple {28924#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28933#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:02:42,834 INFO L290 TraceCheckUtils]: 1: Hoare triple {28933#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L290 TraceCheckUtils]: 2: Hoare triple {28924#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28924#true} {28924#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L272 TraceCheckUtils]: 4: Hoare triple {28924#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L290 TraceCheckUtils]: 5: Hoare triple {28924#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L290 TraceCheckUtils]: 6: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:42,834 INFO L290 TraceCheckUtils]: 7: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:42,835 INFO L290 TraceCheckUtils]: 8: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:42,835 INFO L290 TraceCheckUtils]: 9: Hoare triple {28924#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:42,835 INFO L290 TraceCheckUtils]: 10: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:42,836 INFO L290 TraceCheckUtils]: 11: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:02:42,837 INFO L290 TraceCheckUtils]: 12: Hoare triple {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:42,837 INFO L290 TraceCheckUtils]: 13: Hoare triple {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:42,838 INFO L290 TraceCheckUtils]: 14: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:42,838 INFO L290 TraceCheckUtils]: 15: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:42,838 INFO L290 TraceCheckUtils]: 16: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:42,839 INFO L290 TraceCheckUtils]: 17: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:42,839 INFO L290 TraceCheckUtils]: 18: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:42,840 INFO L290 TraceCheckUtils]: 19: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:42,841 INFO L290 TraceCheckUtils]: 20: Hoare triple {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:02:42,842 INFO L290 TraceCheckUtils]: 21: Hoare triple {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 22: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 23: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 24: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 25: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 26: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 27: Hoare triple {28925#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L272 TraceCheckUtils]: 28: Hoare triple {28925#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 29: Hoare triple {28925#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 30: Hoare triple {28925#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L290 TraceCheckUtils]: 31: Hoare triple {28925#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:42,843 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 20 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-07 23:02:42,844 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:02:42,844 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446608702] [2022-04-07 23:02:42,844 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [446608702] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:02:42,844 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [209659503] [2022-04-07 23:02:42,844 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:02:42,844 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:42,844 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:02:42,845 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:02:42,846 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-07 23:02:42,883 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:02:42,883 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:02:42,883 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-07 23:02:42,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:42,891 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:02:43,032 INFO L272 TraceCheckUtils]: 0: Hoare triple {28924#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L290 TraceCheckUtils]: 1: Hoare triple {28924#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L290 TraceCheckUtils]: 2: Hoare triple {28924#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28924#true} {28924#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L272 TraceCheckUtils]: 4: Hoare triple {28924#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L290 TraceCheckUtils]: 5: Hoare triple {28924#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L290 TraceCheckUtils]: 6: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L290 TraceCheckUtils]: 7: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L290 TraceCheckUtils]: 8: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:43,033 INFO L290 TraceCheckUtils]: 9: Hoare triple {28924#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:43,034 INFO L290 TraceCheckUtils]: 10: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:43,035 INFO L290 TraceCheckUtils]: 11: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:02:43,035 INFO L290 TraceCheckUtils]: 12: Hoare triple {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,036 INFO L290 TraceCheckUtils]: 13: Hoare triple {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,036 INFO L290 TraceCheckUtils]: 14: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,037 INFO L290 TraceCheckUtils]: 15: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,037 INFO L290 TraceCheckUtils]: 16: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,037 INFO L290 TraceCheckUtils]: 17: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,038 INFO L290 TraceCheckUtils]: 18: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,039 INFO L290 TraceCheckUtils]: 19: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,039 INFO L290 TraceCheckUtils]: 20: Hoare triple {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:02:43,040 INFO L290 TraceCheckUtils]: 21: Hoare triple {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 22: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 23: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 24: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 25: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 26: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 27: Hoare triple {28925#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L272 TraceCheckUtils]: 28: Hoare triple {28925#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 29: Hoare triple {28925#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 30: Hoare triple {28925#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:43,041 INFO L290 TraceCheckUtils]: 31: Hoare triple {28925#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:43,042 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 20 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-07 23:02:43,042 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:02:43,233 INFO L290 TraceCheckUtils]: 31: Hoare triple {28925#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:43,233 INFO L290 TraceCheckUtils]: 30: Hoare triple {28925#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:43,233 INFO L290 TraceCheckUtils]: 29: Hoare triple {28925#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28925#false} is VALID [2022-04-07 23:02:43,233 INFO L272 TraceCheckUtils]: 28: Hoare triple {28925#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {28925#false} is VALID [2022-04-07 23:02:43,233 INFO L290 TraceCheckUtils]: 27: Hoare triple {28925#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28925#false} is VALID [2022-04-07 23:02:43,233 INFO L290 TraceCheckUtils]: 26: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,233 INFO L290 TraceCheckUtils]: 25: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,233 INFO L290 TraceCheckUtils]: 24: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,233 INFO L290 TraceCheckUtils]: 23: Hoare triple {28925#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,234 INFO L290 TraceCheckUtils]: 22: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28925#false} is VALID [2022-04-07 23:02:43,235 INFO L290 TraceCheckUtils]: 21: Hoare triple {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:43,235 INFO L290 TraceCheckUtils]: 20: Hoare triple {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:02:43,236 INFO L290 TraceCheckUtils]: 19: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,237 INFO L290 TraceCheckUtils]: 18: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,237 INFO L290 TraceCheckUtils]: 17: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,237 INFO L290 TraceCheckUtils]: 16: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,238 INFO L290 TraceCheckUtils]: 15: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,238 INFO L290 TraceCheckUtils]: 14: Hoare triple {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,239 INFO L290 TraceCheckUtils]: 13: Hoare triple {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28932#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,239 INFO L290 TraceCheckUtils]: 12: Hoare triple {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28931#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:43,240 INFO L290 TraceCheckUtils]: 11: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28930#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:02:43,240 INFO L290 TraceCheckUtils]: 10: Hoare triple {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:43,241 INFO L290 TraceCheckUtils]: 9: Hoare triple {28924#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28929#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:02:43,241 INFO L290 TraceCheckUtils]: 8: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:43,241 INFO L290 TraceCheckUtils]: 7: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:43,241 INFO L290 TraceCheckUtils]: 6: Hoare triple {28924#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28924#true} is VALID [2022-04-07 23:02:43,241 INFO L290 TraceCheckUtils]: 5: Hoare triple {28924#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28924#true} is VALID [2022-04-07 23:02:43,241 INFO L272 TraceCheckUtils]: 4: Hoare triple {28924#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:43,241 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28924#true} {28924#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:43,241 INFO L290 TraceCheckUtils]: 2: Hoare triple {28924#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:43,241 INFO L290 TraceCheckUtils]: 1: Hoare triple {28924#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28924#true} is VALID [2022-04-07 23:02:43,242 INFO L272 TraceCheckUtils]: 0: Hoare triple {28924#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28924#true} is VALID [2022-04-07 23:02:43,242 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 20 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-07 23:02:43,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [209659503] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:02:43,242 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:02:43,242 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-07 23:02:43,242 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17536229] [2022-04-07 23:02:43,242 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:02:43,242 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:02:43,243 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:02:43,243 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:43,262 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:43,263 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 23:02:43,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:02:43,263 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 23:02:43,263 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-07 23:02:43,263 INFO L87 Difference]: Start difference. First operand 409 states and 587 transitions. Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:44,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:44,507 INFO L93 Difference]: Finished difference Result 419 states and 598 transitions. [2022-04-07 23:02:44,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 23:02:44,507 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:02:44,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:02:44,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:44,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 46 transitions. [2022-04-07 23:02:44,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:44,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 46 transitions. [2022-04-07 23:02:44,508 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 46 transitions. [2022-04-07 23:02:44,544 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:44,550 INFO L225 Difference]: With dead ends: 419 [2022-04-07 23:02:44,550 INFO L226 Difference]: Without dead ends: 396 [2022-04-07 23:02:44,550 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 67 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-04-07 23:02:44,553 INFO L913 BasicCegarLoop]: 25 mSDtfsCounter, 27 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 103 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 113 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 103 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 23:02:44,554 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 47 Invalid, 113 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 103 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 23:02:44,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2022-04-07 23:02:45,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 393. [2022-04-07 23:02:45,500 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:02:45,501 INFO L82 GeneralOperation]: Start isEquivalent. First operand 396 states. Second operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:45,501 INFO L74 IsIncluded]: Start isIncluded. First operand 396 states. Second operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:45,501 INFO L87 Difference]: Start difference. First operand 396 states. Second operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:45,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:45,506 INFO L93 Difference]: Finished difference Result 396 states and 573 transitions. [2022-04-07 23:02:45,507 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 573 transitions. [2022-04-07 23:02:45,507 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:45,507 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:45,507 INFO L74 IsIncluded]: Start isIncluded. First operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 396 states. [2022-04-07 23:02:45,507 INFO L87 Difference]: Start difference. First operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 396 states. [2022-04-07 23:02:45,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:45,513 INFO L93 Difference]: Finished difference Result 396 states and 573 transitions. [2022-04-07 23:02:45,513 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 573 transitions. [2022-04-07 23:02:45,513 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:45,513 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:45,513 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:02:45,513 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:02:45,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:45,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 570 transitions. [2022-04-07 23:02:45,520 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 570 transitions. Word has length 32 [2022-04-07 23:02:45,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:02:45,520 INFO L478 AbstractCegarLoop]: Abstraction has 393 states and 570 transitions. [2022-04-07 23:02:45,520 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:45,520 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 570 transitions. [2022-04-07 23:02:45,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 23:02:45,520 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:02:45,520 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:02:45,548 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-07 23:02:45,727 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-07 23:02:45,727 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:02:45,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:02:45,728 INFO L85 PathProgramCache]: Analyzing trace with hash -1208765186, now seen corresponding path program 11 times [2022-04-07 23:02:45,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:02:45,728 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273421673] [2022-04-07 23:02:45,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:02:45,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:02:45,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:45,879 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:02:45,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:45,881 INFO L290 TraceCheckUtils]: 0: Hoare triple {31057#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31041#true} is VALID [2022-04-07 23:02:45,882 INFO L290 TraceCheckUtils]: 1: Hoare triple {31041#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:45,882 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31041#true} {31041#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:45,882 INFO L272 TraceCheckUtils]: 0: Hoare triple {31041#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31057#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:02:45,882 INFO L290 TraceCheckUtils]: 1: Hoare triple {31057#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31041#true} is VALID [2022-04-07 23:02:45,882 INFO L290 TraceCheckUtils]: 2: Hoare triple {31041#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:45,882 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31041#true} {31041#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:45,882 INFO L272 TraceCheckUtils]: 4: Hoare triple {31041#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:45,883 INFO L290 TraceCheckUtils]: 5: Hoare triple {31041#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {31046#(= main_~y~0 0)} is VALID [2022-04-07 23:02:45,883 INFO L290 TraceCheckUtils]: 6: Hoare triple {31046#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31047#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:45,883 INFO L290 TraceCheckUtils]: 7: Hoare triple {31047#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31048#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:02:45,884 INFO L290 TraceCheckUtils]: 8: Hoare triple {31048#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31049#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:02:45,885 INFO L290 TraceCheckUtils]: 9: Hoare triple {31049#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31050#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:02:45,885 INFO L290 TraceCheckUtils]: 10: Hoare triple {31050#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31051#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:45,886 INFO L290 TraceCheckUtils]: 11: Hoare triple {31051#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31052#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:45,886 INFO L290 TraceCheckUtils]: 12: Hoare triple {31052#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {31052#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:45,886 INFO L290 TraceCheckUtils]: 13: Hoare triple {31052#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {31053#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:02:45,887 INFO L290 TraceCheckUtils]: 14: Hoare triple {31053#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31054#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:02:45,887 INFO L290 TraceCheckUtils]: 15: Hoare triple {31054#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31055#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:02:45,888 INFO L290 TraceCheckUtils]: 16: Hoare triple {31055#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31056#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:02:45,888 INFO L290 TraceCheckUtils]: 17: Hoare triple {31056#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:45,888 INFO L290 TraceCheckUtils]: 18: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:45,888 INFO L290 TraceCheckUtils]: 19: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:45,888 INFO L290 TraceCheckUtils]: 20: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 21: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 22: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 23: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 24: Hoare triple {31042#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 25: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 26: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 27: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 28: Hoare triple {31042#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L272 TraceCheckUtils]: 29: Hoare triple {31042#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 30: Hoare triple {31042#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 31: Hoare triple {31042#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L290 TraceCheckUtils]: 32: Hoare triple {31042#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:45,889 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-07 23:02:45,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:02:45,889 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273421673] [2022-04-07 23:02:45,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1273421673] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:02:45,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2065242214] [2022-04-07 23:02:45,890 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 23:02:45,890 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:45,890 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:02:45,891 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:02:45,892 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-07 23:02:45,965 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 23:02:45,965 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:02:45,966 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 30 conjunts are in the unsatisfiable core [2022-04-07 23:02:45,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:45,975 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:02:46,178 INFO L272 TraceCheckUtils]: 0: Hoare triple {31041#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,178 INFO L290 TraceCheckUtils]: 1: Hoare triple {31041#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31041#true} is VALID [2022-04-07 23:02:46,178 INFO L290 TraceCheckUtils]: 2: Hoare triple {31041#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,178 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31041#true} {31041#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,178 INFO L272 TraceCheckUtils]: 4: Hoare triple {31041#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,178 INFO L290 TraceCheckUtils]: 5: Hoare triple {31041#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {31046#(= main_~y~0 0)} is VALID [2022-04-07 23:02:46,179 INFO L290 TraceCheckUtils]: 6: Hoare triple {31046#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31047#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:46,179 INFO L290 TraceCheckUtils]: 7: Hoare triple {31047#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31048#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:02:46,180 INFO L290 TraceCheckUtils]: 8: Hoare triple {31048#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31049#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:02:46,180 INFO L290 TraceCheckUtils]: 9: Hoare triple {31049#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31050#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:02:46,181 INFO L290 TraceCheckUtils]: 10: Hoare triple {31050#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31051#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:46,181 INFO L290 TraceCheckUtils]: 11: Hoare triple {31051#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31052#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:46,182 INFO L290 TraceCheckUtils]: 12: Hoare triple {31052#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {31052#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:46,182 INFO L290 TraceCheckUtils]: 13: Hoare triple {31052#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {31100#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:46,182 INFO L290 TraceCheckUtils]: 14: Hoare triple {31100#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31104#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:02:46,183 INFO L290 TraceCheckUtils]: 15: Hoare triple {31104#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31108#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:46,184 INFO L290 TraceCheckUtils]: 16: Hoare triple {31108#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31112#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:46,184 INFO L290 TraceCheckUtils]: 17: Hoare triple {31112#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,184 INFO L290 TraceCheckUtils]: 18: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,184 INFO L290 TraceCheckUtils]: 19: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,184 INFO L290 TraceCheckUtils]: 20: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,184 INFO L290 TraceCheckUtils]: 21: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,184 INFO L290 TraceCheckUtils]: 22: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,184 INFO L290 TraceCheckUtils]: 23: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L290 TraceCheckUtils]: 24: Hoare triple {31042#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L290 TraceCheckUtils]: 25: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L290 TraceCheckUtils]: 26: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L290 TraceCheckUtils]: 27: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L290 TraceCheckUtils]: 28: Hoare triple {31042#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L272 TraceCheckUtils]: 29: Hoare triple {31042#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L290 TraceCheckUtils]: 30: Hoare triple {31042#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L290 TraceCheckUtils]: 31: Hoare triple {31042#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L290 TraceCheckUtils]: 32: Hoare triple {31042#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,185 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-07 23:02:46,185 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:02:46,414 INFO L290 TraceCheckUtils]: 32: Hoare triple {31042#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,414 INFO L290 TraceCheckUtils]: 31: Hoare triple {31042#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,414 INFO L290 TraceCheckUtils]: 30: Hoare triple {31042#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31042#false} is VALID [2022-04-07 23:02:46,414 INFO L272 TraceCheckUtils]: 29: Hoare triple {31042#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {31042#false} is VALID [2022-04-07 23:02:46,414 INFO L290 TraceCheckUtils]: 28: Hoare triple {31042#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,414 INFO L290 TraceCheckUtils]: 27: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:46,414 INFO L290 TraceCheckUtils]: 26: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:46,415 INFO L290 TraceCheckUtils]: 25: Hoare triple {31042#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {31042#false} is VALID [2022-04-07 23:02:46,415 INFO L290 TraceCheckUtils]: 24: Hoare triple {31042#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31042#false} is VALID [2022-04-07 23:02:46,415 INFO L290 TraceCheckUtils]: 23: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,415 INFO L290 TraceCheckUtils]: 22: Hoare triple {31042#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,415 INFO L290 TraceCheckUtils]: 21: Hoare triple {31194#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31042#false} is VALID [2022-04-07 23:02:46,416 INFO L290 TraceCheckUtils]: 20: Hoare triple {31198#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31194#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:02:46,417 INFO L290 TraceCheckUtils]: 19: Hoare triple {31202#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31198#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:02:46,417 INFO L290 TraceCheckUtils]: 18: Hoare triple {31206#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31202#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:02:46,418 INFO L290 TraceCheckUtils]: 17: Hoare triple {31210#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {31206#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:02:46,418 INFO L290 TraceCheckUtils]: 16: Hoare triple {31214#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31210#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-07 23:02:46,419 INFO L290 TraceCheckUtils]: 15: Hoare triple {31218#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31214#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:02:46,420 INFO L290 TraceCheckUtils]: 14: Hoare triple {31222#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31218#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 13: Hoare triple {31041#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {31222#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 12: Hoare triple {31041#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 11: Hoare triple {31041#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 10: Hoare triple {31041#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 9: Hoare triple {31041#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 8: Hoare triple {31041#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 7: Hoare triple {31041#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 6: Hoare triple {31041#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 5: Hoare triple {31041#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L272 TraceCheckUtils]: 4: Hoare triple {31041#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31041#true} {31041#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 2: Hoare triple {31041#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {31041#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31041#true} is VALID [2022-04-07 23:02:46,421 INFO L272 TraceCheckUtils]: 0: Hoare triple {31041#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31041#true} is VALID [2022-04-07 23:02:46,422 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-04-07 23:02:46,422 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2065242214] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:02:46,422 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:02:46,422 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 10] total 26 [2022-04-07 23:02:46,422 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2055142284] [2022-04-07 23:02:46,422 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:02:46,422 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.5384615384615385) internal successors, (40), 25 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:02:46,422 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:02:46,422 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 1.5384615384615385) internal successors, (40), 25 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:46,453 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:46,453 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 23:02:46,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:02:46,454 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 23:02:46,454 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=545, Unknown=0, NotChecked=0, Total=650 [2022-04-07 23:02:46,454 INFO L87 Difference]: Start difference. First operand 393 states and 570 transitions. Second operand has 26 states, 26 states have (on average 1.5384615384615385) internal successors, (40), 25 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:49,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:49,472 INFO L93 Difference]: Finished difference Result 576 states and 789 transitions. [2022-04-07 23:02:49,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2022-04-07 23:02:49,472 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.5384615384615385) internal successors, (40), 25 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:02:49,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:02:49,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.5384615384615385) internal successors, (40), 25 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:49,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 98 transitions. [2022-04-07 23:02:49,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.5384615384615385) internal successors, (40), 25 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:49,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 98 transitions. [2022-04-07 23:02:49,474 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 40 states and 98 transitions. [2022-04-07 23:02:49,562 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 98 edges. 98 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:49,571 INFO L225 Difference]: With dead ends: 576 [2022-04-07 23:02:49,571 INFO L226 Difference]: Without dead ends: 496 [2022-04-07 23:02:49,572 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 837 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=475, Invalid=3431, Unknown=0, NotChecked=0, Total=3906 [2022-04-07 23:02:49,572 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 47 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 505 mSolverCounterSat, 97 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 602 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 97 IncrementalHoareTripleChecker+Valid, 505 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 23:02:49,572 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [47 Valid, 79 Invalid, 602 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [97 Valid, 505 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-07 23:02:49,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 496 states. [2022-04-07 23:02:50,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 496 to 375. [2022-04-07 23:02:50,555 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:02:50,555 INFO L82 GeneralOperation]: Start isEquivalent. First operand 496 states. Second operand has 375 states, 370 states have (on average 1.4405405405405405) internal successors, (533), 370 states have internal predecessors, (533), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:50,556 INFO L74 IsIncluded]: Start isIncluded. First operand 496 states. Second operand has 375 states, 370 states have (on average 1.4405405405405405) internal successors, (533), 370 states have internal predecessors, (533), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:50,556 INFO L87 Difference]: Start difference. First operand 496 states. Second operand has 375 states, 370 states have (on average 1.4405405405405405) internal successors, (533), 370 states have internal predecessors, (533), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:50,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:50,563 INFO L93 Difference]: Finished difference Result 496 states and 688 transitions. [2022-04-07 23:02:50,563 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 688 transitions. [2022-04-07 23:02:50,564 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:50,564 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:50,564 INFO L74 IsIncluded]: Start isIncluded. First operand has 375 states, 370 states have (on average 1.4405405405405405) internal successors, (533), 370 states have internal predecessors, (533), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 496 states. [2022-04-07 23:02:50,564 INFO L87 Difference]: Start difference. First operand has 375 states, 370 states have (on average 1.4405405405405405) internal successors, (533), 370 states have internal predecessors, (533), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 496 states. [2022-04-07 23:02:50,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:50,572 INFO L93 Difference]: Finished difference Result 496 states and 688 transitions. [2022-04-07 23:02:50,572 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 688 transitions. [2022-04-07 23:02:50,572 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:50,572 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:50,572 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:02:50,572 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:02:50,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 375 states, 370 states have (on average 1.4405405405405405) internal successors, (533), 370 states have internal predecessors, (533), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:50,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 537 transitions. [2022-04-07 23:02:50,578 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 537 transitions. Word has length 33 [2022-04-07 23:02:50,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:02:50,578 INFO L478 AbstractCegarLoop]: Abstraction has 375 states and 537 transitions. [2022-04-07 23:02:50,578 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 1.5384615384615385) internal successors, (40), 25 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:50,578 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 537 transitions. [2022-04-07 23:02:50,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 23:02:50,579 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:02:50,579 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:02:50,596 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-07 23:02:50,779 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-04-07 23:02:50,779 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:02:50,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:02:50,780 INFO L85 PathProgramCache]: Analyzing trace with hash -479678114, now seen corresponding path program 8 times [2022-04-07 23:02:50,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:02:50,780 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784550551] [2022-04-07 23:02:50,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:02:50,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:02:50,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:50,980 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:02:50,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:50,988 INFO L290 TraceCheckUtils]: 0: Hoare triple {33611#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {33594#true} is VALID [2022-04-07 23:02:50,988 INFO L290 TraceCheckUtils]: 1: Hoare triple {33594#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:50,988 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33594#true} {33594#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:50,988 INFO L272 TraceCheckUtils]: 0: Hoare triple {33594#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33611#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:02:50,988 INFO L290 TraceCheckUtils]: 1: Hoare triple {33611#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {33594#true} is VALID [2022-04-07 23:02:50,989 INFO L290 TraceCheckUtils]: 2: Hoare triple {33594#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:50,989 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33594#true} {33594#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:50,989 INFO L272 TraceCheckUtils]: 4: Hoare triple {33594#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:50,989 INFO L290 TraceCheckUtils]: 5: Hoare triple {33594#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {33594#true} is VALID [2022-04-07 23:02:50,989 INFO L290 TraceCheckUtils]: 6: Hoare triple {33594#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:02:50,990 INFO L290 TraceCheckUtils]: 7: Hoare triple {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33600#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 23:02:50,991 INFO L290 TraceCheckUtils]: 8: Hoare triple {33600#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33601#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:02:50,992 INFO L290 TraceCheckUtils]: 9: Hoare triple {33601#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33602#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:02:50,993 INFO L290 TraceCheckUtils]: 10: Hoare triple {33602#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33603#(<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:02:50,993 INFO L290 TraceCheckUtils]: 11: Hoare triple {33603#(<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33604#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:02:50,994 INFO L290 TraceCheckUtils]: 12: Hoare triple {33604#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {33604#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:02:50,994 INFO L290 TraceCheckUtils]: 13: Hoare triple {33604#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {33604#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:02:50,995 INFO L290 TraceCheckUtils]: 14: Hoare triple {33604#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33605#(<= (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 23:02:50,995 INFO L290 TraceCheckUtils]: 15: Hoare triple {33605#(<= (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33606#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 2) main_~x~0)} is VALID [2022-04-07 23:02:50,996 INFO L290 TraceCheckUtils]: 16: Hoare triple {33606#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 2) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33607#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 3) main_~x~0)} is VALID [2022-04-07 23:02:50,999 INFO L290 TraceCheckUtils]: 17: Hoare triple {33607#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 3) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33608#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:02:51,000 INFO L290 TraceCheckUtils]: 18: Hoare triple {33608#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 4) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33609#(<= (+ 5 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:02:51,001 INFO L290 TraceCheckUtils]: 19: Hoare triple {33609#(<= (+ 5 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,001 INFO L290 TraceCheckUtils]: 20: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,002 INFO L290 TraceCheckUtils]: 21: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,002 INFO L290 TraceCheckUtils]: 22: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,002 INFO L290 TraceCheckUtils]: 23: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,003 INFO L290 TraceCheckUtils]: 24: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,003 INFO L290 TraceCheckUtils]: 25: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,003 INFO L290 TraceCheckUtils]: 26: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,004 INFO L290 TraceCheckUtils]: 27: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:02:51,004 INFO L290 TraceCheckUtils]: 28: Hoare triple {33610#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,004 INFO L272 TraceCheckUtils]: 29: Hoare triple {33595#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {33595#false} is VALID [2022-04-07 23:02:51,004 INFO L290 TraceCheckUtils]: 30: Hoare triple {33595#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {33595#false} is VALID [2022-04-07 23:02:51,004 INFO L290 TraceCheckUtils]: 31: Hoare triple {33595#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,004 INFO L290 TraceCheckUtils]: 32: Hoare triple {33595#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,005 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:02:51,005 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:02:51,005 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784550551] [2022-04-07 23:02:51,005 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1784550551] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:02:51,005 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [511574547] [2022-04-07 23:02:51,005 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 23:02:51,005 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:51,005 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:02:51,006 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:02:51,007 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-07 23:02:51,044 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 23:02:51,044 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:02:51,045 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-07 23:02:51,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:51,053 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:02:51,340 INFO L272 TraceCheckUtils]: 0: Hoare triple {33594#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:51,341 INFO L290 TraceCheckUtils]: 1: Hoare triple {33594#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {33594#true} is VALID [2022-04-07 23:02:51,341 INFO L290 TraceCheckUtils]: 2: Hoare triple {33594#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:51,341 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33594#true} {33594#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:51,341 INFO L272 TraceCheckUtils]: 4: Hoare triple {33594#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:51,341 INFO L290 TraceCheckUtils]: 5: Hoare triple {33594#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {33594#true} is VALID [2022-04-07 23:02:51,341 INFO L290 TraceCheckUtils]: 6: Hoare triple {33594#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:02:51,342 INFO L290 TraceCheckUtils]: 7: Hoare triple {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33636#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:02:51,343 INFO L290 TraceCheckUtils]: 8: Hoare triple {33636#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33640#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,344 INFO L290 TraceCheckUtils]: 9: Hoare triple {33640#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33644#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:02:51,344 INFO L290 TraceCheckUtils]: 10: Hoare triple {33644#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33648#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,345 INFO L290 TraceCheckUtils]: 11: Hoare triple {33648#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:02:51,345 INFO L290 TraceCheckUtils]: 12: Hoare triple {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:02:51,346 INFO L290 TraceCheckUtils]: 13: Hoare triple {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:02:51,346 INFO L290 TraceCheckUtils]: 14: Hoare triple {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33648#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,347 INFO L290 TraceCheckUtils]: 15: Hoare triple {33648#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33644#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:02:51,348 INFO L290 TraceCheckUtils]: 16: Hoare triple {33644#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33640#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,348 INFO L290 TraceCheckUtils]: 17: Hoare triple {33640#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33636#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:02:51,349 INFO L290 TraceCheckUtils]: 18: Hoare triple {33636#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:02:51,350 INFO L290 TraceCheckUtils]: 19: Hoare triple {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,350 INFO L290 TraceCheckUtils]: 20: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,351 INFO L290 TraceCheckUtils]: 21: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,351 INFO L290 TraceCheckUtils]: 22: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,351 INFO L290 TraceCheckUtils]: 23: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,351 INFO L290 TraceCheckUtils]: 24: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,352 INFO L290 TraceCheckUtils]: 25: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,352 INFO L290 TraceCheckUtils]: 26: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,352 INFO L290 TraceCheckUtils]: 27: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,353 INFO L290 TraceCheckUtils]: 28: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,353 INFO L272 TraceCheckUtils]: 29: Hoare triple {33595#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {33595#false} is VALID [2022-04-07 23:02:51,353 INFO L290 TraceCheckUtils]: 30: Hoare triple {33595#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {33595#false} is VALID [2022-04-07 23:02:51,353 INFO L290 TraceCheckUtils]: 31: Hoare triple {33595#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,353 INFO L290 TraceCheckUtils]: 32: Hoare triple {33595#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,353 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 36 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:02:51,353 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:02:51,586 INFO L290 TraceCheckUtils]: 32: Hoare triple {33595#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,586 INFO L290 TraceCheckUtils]: 31: Hoare triple {33595#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,586 INFO L290 TraceCheckUtils]: 30: Hoare triple {33595#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {33595#false} is VALID [2022-04-07 23:02:51,586 INFO L272 TraceCheckUtils]: 29: Hoare triple {33595#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {33595#false} is VALID [2022-04-07 23:02:51,587 INFO L290 TraceCheckUtils]: 28: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {33595#false} is VALID [2022-04-07 23:02:51,587 INFO L290 TraceCheckUtils]: 27: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,588 INFO L290 TraceCheckUtils]: 26: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,588 INFO L290 TraceCheckUtils]: 25: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,588 INFO L290 TraceCheckUtils]: 24: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,588 INFO L290 TraceCheckUtils]: 23: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,589 INFO L290 TraceCheckUtils]: 22: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,589 INFO L290 TraceCheckUtils]: 21: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,589 INFO L290 TraceCheckUtils]: 20: Hoare triple {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,590 INFO L290 TraceCheckUtils]: 19: Hoare triple {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33677#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,591 INFO L290 TraceCheckUtils]: 18: Hoare triple {33636#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:02:51,591 INFO L290 TraceCheckUtils]: 17: Hoare triple {33640#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33636#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:02:51,592 INFO L290 TraceCheckUtils]: 16: Hoare triple {33644#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33640#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,593 INFO L290 TraceCheckUtils]: 15: Hoare triple {33648#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33644#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:02:51,593 INFO L290 TraceCheckUtils]: 14: Hoare triple {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {33648#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,597 INFO L290 TraceCheckUtils]: 13: Hoare triple {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:02:51,597 INFO L290 TraceCheckUtils]: 12: Hoare triple {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:02:51,598 INFO L290 TraceCheckUtils]: 11: Hoare triple {33648#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33652#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:02:51,599 INFO L290 TraceCheckUtils]: 10: Hoare triple {33644#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33648#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,600 INFO L290 TraceCheckUtils]: 9: Hoare triple {33640#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33644#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:02:51,600 INFO L290 TraceCheckUtils]: 8: Hoare triple {33636#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33640#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:02:51,601 INFO L290 TraceCheckUtils]: 7: Hoare triple {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33636#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:02:51,602 INFO L290 TraceCheckUtils]: 6: Hoare triple {33594#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {33599#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:02:51,602 INFO L290 TraceCheckUtils]: 5: Hoare triple {33594#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {33594#true} is VALID [2022-04-07 23:02:51,602 INFO L272 TraceCheckUtils]: 4: Hoare triple {33594#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:51,602 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33594#true} {33594#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:51,602 INFO L290 TraceCheckUtils]: 2: Hoare triple {33594#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:51,602 INFO L290 TraceCheckUtils]: 1: Hoare triple {33594#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {33594#true} is VALID [2022-04-07 23:02:51,602 INFO L272 TraceCheckUtils]: 0: Hoare triple {33594#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33594#true} is VALID [2022-04-07 23:02:51,602 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 36 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-07 23:02:51,602 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [511574547] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:02:51,602 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:02:51,602 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 9, 9] total 21 [2022-04-07 23:02:51,603 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1049204870] [2022-04-07 23:02:51,603 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:02:51,603 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:02:51,603 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:02:51,603 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:51,640 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:51,640 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-07 23:02:51,640 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:02:51,640 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-07 23:02:51,640 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=320, Unknown=0, NotChecked=0, Total=420 [2022-04-07 23:02:51,641 INFO L87 Difference]: Start difference. First operand 375 states and 537 transitions. Second operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:53,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:53,615 INFO L93 Difference]: Finished difference Result 395 states and 567 transitions. [2022-04-07 23:02:53,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-07 23:02:53,615 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:02:53,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:02:53,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:53,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 79 transitions. [2022-04-07 23:02:53,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:53,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 79 transitions. [2022-04-07 23:02:53,616 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 79 transitions. [2022-04-07 23:02:53,697 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:53,703 INFO L225 Difference]: With dead ends: 395 [2022-04-07 23:02:53,703 INFO L226 Difference]: Without dead ends: 390 [2022-04-07 23:02:53,703 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 60 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=239, Invalid=817, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 23:02:53,703 INFO L913 BasicCegarLoop]: 33 mSDtfsCounter, 78 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 351 mSolverCounterSat, 60 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 78 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 411 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 60 IncrementalHoareTripleChecker+Valid, 351 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 23:02:53,704 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [78 Valid, 75 Invalid, 411 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [60 Valid, 351 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 23:02:53,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states. [2022-04-07 23:02:54,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 378. [2022-04-07 23:02:54,755 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:02:54,756 INFO L82 GeneralOperation]: Start isEquivalent. First operand 390 states. Second operand has 378 states, 373 states have (on average 1.4369973190348526) internal successors, (536), 373 states have internal predecessors, (536), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:54,756 INFO L74 IsIncluded]: Start isIncluded. First operand 390 states. Second operand has 378 states, 373 states have (on average 1.4369973190348526) internal successors, (536), 373 states have internal predecessors, (536), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:54,756 INFO L87 Difference]: Start difference. First operand 390 states. Second operand has 378 states, 373 states have (on average 1.4369973190348526) internal successors, (536), 373 states have internal predecessors, (536), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:54,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:54,762 INFO L93 Difference]: Finished difference Result 390 states and 560 transitions. [2022-04-07 23:02:54,762 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 560 transitions. [2022-04-07 23:02:54,762 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:54,762 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:54,763 INFO L74 IsIncluded]: Start isIncluded. First operand has 378 states, 373 states have (on average 1.4369973190348526) internal successors, (536), 373 states have internal predecessors, (536), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 390 states. [2022-04-07 23:02:54,763 INFO L87 Difference]: Start difference. First operand has 378 states, 373 states have (on average 1.4369973190348526) internal successors, (536), 373 states have internal predecessors, (536), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 390 states. [2022-04-07 23:02:54,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:02:54,769 INFO L93 Difference]: Finished difference Result 390 states and 560 transitions. [2022-04-07 23:02:54,769 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 560 transitions. [2022-04-07 23:02:54,769 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:02:54,769 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:02:54,769 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:02:54,769 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:02:54,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 378 states, 373 states have (on average 1.4369973190348526) internal successors, (536), 373 states have internal predecessors, (536), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:54,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 540 transitions. [2022-04-07 23:02:54,776 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 540 transitions. Word has length 33 [2022-04-07 23:02:54,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:02:54,776 INFO L478 AbstractCegarLoop]: Abstraction has 378 states and 540 transitions. [2022-04-07 23:02:54,776 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:54,776 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 540 transitions. [2022-04-07 23:02:54,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-07 23:02:54,776 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:02:54,777 INFO L499 BasicCegarLoop]: trace histogram [13, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:02:54,796 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-07 23:02:54,993 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-07 23:02:54,994 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:02:54,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:02:54,994 INFO L85 PathProgramCache]: Analyzing trace with hash 88927109, now seen corresponding path program 12 times [2022-04-07 23:02:54,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:02:54,994 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [749336110] [2022-04-07 23:02:54,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:02:54,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:02:55,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:55,254 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:02:55,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:55,256 INFO L290 TraceCheckUtils]: 0: Hoare triple {35714#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35692#true} is VALID [2022-04-07 23:02:55,257 INFO L290 TraceCheckUtils]: 1: Hoare triple {35692#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,257 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {35692#true} {35692#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,257 INFO L272 TraceCheckUtils]: 0: Hoare triple {35692#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35714#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:02:55,257 INFO L290 TraceCheckUtils]: 1: Hoare triple {35714#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35692#true} is VALID [2022-04-07 23:02:55,257 INFO L290 TraceCheckUtils]: 2: Hoare triple {35692#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,257 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35692#true} {35692#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,257 INFO L272 TraceCheckUtils]: 4: Hoare triple {35692#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,258 INFO L290 TraceCheckUtils]: 5: Hoare triple {35692#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35697#(= main_~y~0 0)} is VALID [2022-04-07 23:02:55,258 INFO L290 TraceCheckUtils]: 6: Hoare triple {35697#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35698#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:55,258 INFO L290 TraceCheckUtils]: 7: Hoare triple {35698#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35699#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:02:55,259 INFO L290 TraceCheckUtils]: 8: Hoare triple {35699#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35700#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:02:55,260 INFO L290 TraceCheckUtils]: 9: Hoare triple {35700#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35701#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:02:55,260 INFO L290 TraceCheckUtils]: 10: Hoare triple {35701#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35702#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:55,261 INFO L290 TraceCheckUtils]: 11: Hoare triple {35702#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35703#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:55,261 INFO L290 TraceCheckUtils]: 12: Hoare triple {35703#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35704#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:02:55,262 INFO L290 TraceCheckUtils]: 13: Hoare triple {35704#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35705#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:02:55,262 INFO L290 TraceCheckUtils]: 14: Hoare triple {35705#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35706#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:02:55,263 INFO L290 TraceCheckUtils]: 15: Hoare triple {35706#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35707#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:02:55,263 INFO L290 TraceCheckUtils]: 16: Hoare triple {35707#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35708#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:02:55,264 INFO L290 TraceCheckUtils]: 17: Hoare triple {35708#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35709#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:02:55,264 INFO L290 TraceCheckUtils]: 18: Hoare triple {35709#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:02:55,264 INFO L290 TraceCheckUtils]: 19: Hoare triple {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:02:55,265 INFO L290 TraceCheckUtils]: 20: Hoare triple {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {35711#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 23:02:55,265 INFO L290 TraceCheckUtils]: 21: Hoare triple {35711#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35712#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-07 23:02:55,266 INFO L290 TraceCheckUtils]: 22: Hoare triple {35712#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35713#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} is VALID [2022-04-07 23:02:55,266 INFO L290 TraceCheckUtils]: 23: Hoare triple {35713#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,266 INFO L290 TraceCheckUtils]: 24: Hoare triple {35693#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35693#false} is VALID [2022-04-07 23:02:55,266 INFO L290 TraceCheckUtils]: 25: Hoare triple {35693#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L290 TraceCheckUtils]: 26: Hoare triple {35693#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L290 TraceCheckUtils]: 27: Hoare triple {35693#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L290 TraceCheckUtils]: 28: Hoare triple {35693#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L290 TraceCheckUtils]: 29: Hoare triple {35693#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L272 TraceCheckUtils]: 30: Hoare triple {35693#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L290 TraceCheckUtils]: 31: Hoare triple {35693#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L290 TraceCheckUtils]: 32: Hoare triple {35693#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L290 TraceCheckUtils]: 33: Hoare triple {35693#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,267 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:02:55,267 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:02:55,267 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [749336110] [2022-04-07 23:02:55,267 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [749336110] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:02:55,267 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1719055826] [2022-04-07 23:02:55,267 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 23:02:55,268 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:02:55,268 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:02:55,268 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:02:55,269 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-07 23:02:55,479 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-07 23:02:55,479 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:02:55,481 INFO L263 TraceCheckSpWp]: Trace formula consists of 155 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-07 23:02:55,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:02:55,489 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:02:55,742 INFO L272 TraceCheckUtils]: 0: Hoare triple {35692#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,743 INFO L290 TraceCheckUtils]: 1: Hoare triple {35692#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35692#true} is VALID [2022-04-07 23:02:55,743 INFO L290 TraceCheckUtils]: 2: Hoare triple {35692#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,743 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35692#true} {35692#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,743 INFO L272 TraceCheckUtils]: 4: Hoare triple {35692#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:55,743 INFO L290 TraceCheckUtils]: 5: Hoare triple {35692#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35697#(= main_~y~0 0)} is VALID [2022-04-07 23:02:55,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {35697#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35698#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:02:55,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {35698#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35699#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:02:55,745 INFO L290 TraceCheckUtils]: 8: Hoare triple {35699#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35700#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:02:55,745 INFO L290 TraceCheckUtils]: 9: Hoare triple {35700#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35701#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:02:55,746 INFO L290 TraceCheckUtils]: 10: Hoare triple {35701#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35702#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:02:55,746 INFO L290 TraceCheckUtils]: 11: Hoare triple {35702#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35703#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:02:55,747 INFO L290 TraceCheckUtils]: 12: Hoare triple {35703#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35704#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:02:55,747 INFO L290 TraceCheckUtils]: 13: Hoare triple {35704#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35705#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:02:55,748 INFO L290 TraceCheckUtils]: 14: Hoare triple {35705#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35706#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:02:55,748 INFO L290 TraceCheckUtils]: 15: Hoare triple {35706#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35707#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:02:55,749 INFO L290 TraceCheckUtils]: 16: Hoare triple {35707#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35708#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:02:55,749 INFO L290 TraceCheckUtils]: 17: Hoare triple {35708#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35709#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:02:55,749 INFO L290 TraceCheckUtils]: 18: Hoare triple {35709#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:02:55,750 INFO L290 TraceCheckUtils]: 19: Hoare triple {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:02:55,750 INFO L290 TraceCheckUtils]: 20: Hoare triple {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:02:55,750 INFO L290 TraceCheckUtils]: 21: Hoare triple {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:02:55,751 INFO L290 TraceCheckUtils]: 22: Hoare triple {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:02:55,751 INFO L290 TraceCheckUtils]: 23: Hoare triple {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:02:55,752 INFO L290 TraceCheckUtils]: 24: Hoare triple {35710#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35709#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:02:55,752 INFO L290 TraceCheckUtils]: 25: Hoare triple {35709#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35708#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:02:55,752 INFO L290 TraceCheckUtils]: 26: Hoare triple {35708#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,753 INFO L290 TraceCheckUtils]: 27: Hoare triple {35693#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {35693#false} is VALID [2022-04-07 23:02:55,753 INFO L290 TraceCheckUtils]: 28: Hoare triple {35693#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {35693#false} is VALID [2022-04-07 23:02:55,753 INFO L290 TraceCheckUtils]: 29: Hoare triple {35693#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,753 INFO L272 TraceCheckUtils]: 30: Hoare triple {35693#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {35693#false} is VALID [2022-04-07 23:02:55,753 INFO L290 TraceCheckUtils]: 31: Hoare triple {35693#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {35693#false} is VALID [2022-04-07 23:02:55,753 INFO L290 TraceCheckUtils]: 32: Hoare triple {35693#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,753 INFO L290 TraceCheckUtils]: 33: Hoare triple {35693#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:55,753 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:02:55,753 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:02:56,170 INFO L290 TraceCheckUtils]: 33: Hoare triple {35693#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:56,170 INFO L290 TraceCheckUtils]: 32: Hoare triple {35693#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:56,170 INFO L290 TraceCheckUtils]: 31: Hoare triple {35693#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {35693#false} is VALID [2022-04-07 23:02:56,170 INFO L272 TraceCheckUtils]: 30: Hoare triple {35693#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {35693#false} is VALID [2022-04-07 23:02:56,170 INFO L290 TraceCheckUtils]: 29: Hoare triple {35693#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:56,170 INFO L290 TraceCheckUtils]: 28: Hoare triple {35693#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {35693#false} is VALID [2022-04-07 23:02:56,171 INFO L290 TraceCheckUtils]: 27: Hoare triple {35693#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {35693#false} is VALID [2022-04-07 23:02:56,172 INFO L290 TraceCheckUtils]: 26: Hoare triple {35838#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {35693#false} is VALID [2022-04-07 23:02:56,173 INFO L290 TraceCheckUtils]: 25: Hoare triple {35842#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35838#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:02:56,174 INFO L290 TraceCheckUtils]: 24: Hoare triple {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {35842#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:02:56,174 INFO L290 TraceCheckUtils]: 23: Hoare triple {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:02:56,175 INFO L290 TraceCheckUtils]: 22: Hoare triple {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:02:56,175 INFO L290 TraceCheckUtils]: 21: Hoare triple {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:02:56,175 INFO L290 TraceCheckUtils]: 20: Hoare triple {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:02:56,176 INFO L290 TraceCheckUtils]: 19: Hoare triple {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:02:56,176 INFO L290 TraceCheckUtils]: 18: Hoare triple {35842#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35846#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:02:56,177 INFO L290 TraceCheckUtils]: 17: Hoare triple {35838#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35842#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:02:56,178 INFO L290 TraceCheckUtils]: 16: Hoare triple {35871#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35838#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:02:56,178 INFO L290 TraceCheckUtils]: 15: Hoare triple {35875#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35871#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:02:56,179 INFO L290 TraceCheckUtils]: 14: Hoare triple {35879#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35875#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:02:56,180 INFO L290 TraceCheckUtils]: 13: Hoare triple {35883#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35879#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:02:56,180 INFO L290 TraceCheckUtils]: 12: Hoare triple {35887#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35883#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:02:56,181 INFO L290 TraceCheckUtils]: 11: Hoare triple {35891#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35887#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 23:02:56,181 INFO L290 TraceCheckUtils]: 10: Hoare triple {35895#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35891#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 23:02:56,182 INFO L290 TraceCheckUtils]: 9: Hoare triple {35899#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35895#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 23:02:56,183 INFO L290 TraceCheckUtils]: 8: Hoare triple {35903#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35899#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 23:02:56,183 INFO L290 TraceCheckUtils]: 7: Hoare triple {35907#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35903#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 23:02:56,184 INFO L290 TraceCheckUtils]: 6: Hoare triple {35911#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35907#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 23:02:56,184 INFO L290 TraceCheckUtils]: 5: Hoare triple {35692#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35911#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 23:02:56,184 INFO L272 TraceCheckUtils]: 4: Hoare triple {35692#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:56,184 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {35692#true} {35692#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:56,184 INFO L290 TraceCheckUtils]: 2: Hoare triple {35692#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:56,185 INFO L290 TraceCheckUtils]: 1: Hoare triple {35692#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {35692#true} is VALID [2022-04-07 23:02:56,185 INFO L272 TraceCheckUtils]: 0: Hoare triple {35692#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35692#true} is VALID [2022-04-07 23:02:56,185 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:02:56,185 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1719055826] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:02:56,185 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:02:56,185 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 16, 16] total 34 [2022-04-07 23:02:56,185 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2028482766] [2022-04-07 23:02:56,185 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:02:56,186 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 33 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 23:02:56,186 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:02:56,186 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 33 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:02:56,224 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:02:56,225 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-07 23:02:56,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:02:56,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-07 23:02:56,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=260, Invalid=862, Unknown=0, NotChecked=0, Total=1122 [2022-04-07 23:02:56,225 INFO L87 Difference]: Start difference. First operand 378 states and 540 transitions. Second operand has 34 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 33 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:05,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:05,717 INFO L93 Difference]: Finished difference Result 1229 states and 1831 transitions. [2022-04-07 23:04:05,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2022-04-07 23:04:05,718 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 33 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 23:04:05,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:04:05,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 33 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:05,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 256 transitions. [2022-04-07 23:04:05,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 33 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:05,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 256 transitions. [2022-04-07 23:04:05,721 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 71 states and 256 transitions. [2022-04-07 23:04:11,120 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 256 edges. 255 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:11,160 INFO L225 Difference]: With dead ends: 1229 [2022-04-07 23:04:11,160 INFO L226 Difference]: Without dead ends: 1137 [2022-04-07 23:04:11,161 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 56 SyntacticMatches, 1 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2584 ImplicationChecksByTransitivity, 61.4s TimeCoverageRelationStatistics Valid=2671, Invalid=7631, Unknown=0, NotChecked=0, Total=10302 [2022-04-07 23:04:11,161 INFO L913 BasicCegarLoop]: 36 mSDtfsCounter, 784 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 1270 mSolverCounterSat, 609 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 784 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 1879 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 609 IncrementalHoareTripleChecker+Valid, 1270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.4s IncrementalHoareTripleChecker+Time [2022-04-07 23:04:11,162 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [784 Valid, 138 Invalid, 1879 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [609 Valid, 1270 Invalid, 0 Unknown, 0 Unchecked, 3.4s Time] [2022-04-07 23:04:11,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1137 states. [2022-04-07 23:04:12,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1137 to 438. [2022-04-07 23:04:12,410 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:04:12,410 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1137 states. Second operand has 438 states, 433 states have (on average 1.4549653579676673) internal successors, (630), 433 states have internal predecessors, (630), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,410 INFO L74 IsIncluded]: Start isIncluded. First operand 1137 states. Second operand has 438 states, 433 states have (on average 1.4549653579676673) internal successors, (630), 433 states have internal predecessors, (630), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,410 INFO L87 Difference]: Start difference. First operand 1137 states. Second operand has 438 states, 433 states have (on average 1.4549653579676673) internal successors, (630), 433 states have internal predecessors, (630), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:12,442 INFO L93 Difference]: Finished difference Result 1137 states and 1541 transitions. [2022-04-07 23:04:12,442 INFO L276 IsEmpty]: Start isEmpty. Operand 1137 states and 1541 transitions. [2022-04-07 23:04:12,443 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:12,443 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:12,443 INFO L74 IsIncluded]: Start isIncluded. First operand has 438 states, 433 states have (on average 1.4549653579676673) internal successors, (630), 433 states have internal predecessors, (630), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1137 states. [2022-04-07 23:04:12,443 INFO L87 Difference]: Start difference. First operand has 438 states, 433 states have (on average 1.4549653579676673) internal successors, (630), 433 states have internal predecessors, (630), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1137 states. [2022-04-07 23:04:12,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:12,475 INFO L93 Difference]: Finished difference Result 1137 states and 1541 transitions. [2022-04-07 23:04:12,475 INFO L276 IsEmpty]: Start isEmpty. Operand 1137 states and 1541 transitions. [2022-04-07 23:04:12,476 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:12,476 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:12,476 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:04:12,476 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:04:12,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 438 states, 433 states have (on average 1.4549653579676673) internal successors, (630), 433 states have internal predecessors, (630), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 634 transitions. [2022-04-07 23:04:12,484 INFO L78 Accepts]: Start accepts. Automaton has 438 states and 634 transitions. Word has length 34 [2022-04-07 23:04:12,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:04:12,484 INFO L478 AbstractCegarLoop]: Abstraction has 438 states and 634 transitions. [2022-04-07 23:04:12,484 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.6470588235294117) internal successors, (56), 33 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,484 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 634 transitions. [2022-04-07 23:04:12,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-07 23:04:12,485 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:04:12,485 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:04:12,490 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-07 23:04:12,685 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:12,685 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:04:12,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:04:12,686 INFO L85 PathProgramCache]: Analyzing trace with hash 1789844345, now seen corresponding path program 13 times [2022-04-07 23:04:12,686 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:04:12,686 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406780132] [2022-04-07 23:04:12,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:04:12,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:04:12,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:13,169 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:04:13,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:13,181 INFO L290 TraceCheckUtils]: 0: Hoare triple {40506#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40480#true} is VALID [2022-04-07 23:04:13,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {40480#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:13,181 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {40480#true} {40480#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:13,181 INFO L272 TraceCheckUtils]: 0: Hoare triple {40480#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40506#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:04:13,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {40506#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40480#true} is VALID [2022-04-07 23:04:13,181 INFO L290 TraceCheckUtils]: 2: Hoare triple {40480#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:13,181 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40480#true} {40480#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:13,182 INFO L272 TraceCheckUtils]: 4: Hoare triple {40480#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:13,182 INFO L290 TraceCheckUtils]: 5: Hoare triple {40480#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {40485#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:04:13,183 INFO L290 TraceCheckUtils]: 6: Hoare triple {40485#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40486#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 1)) (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)))} is VALID [2022-04-07 23:04:13,183 INFO L290 TraceCheckUtils]: 7: Hoare triple {40486#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 1)) (<= (+ (* main_~x~0 2) main_~y~0 1) (* main_~n~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40487#(and (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 2)))} is VALID [2022-04-07 23:04:13,184 INFO L290 TraceCheckUtils]: 8: Hoare triple {40487#(and (<= (+ (* main_~x~0 2) main_~y~0 2) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40488#(and (<= (+ (* main_~x~0 2) main_~y~0 3) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 3)))} is VALID [2022-04-07 23:04:13,184 INFO L290 TraceCheckUtils]: 9: Hoare triple {40488#(and (<= (+ (* main_~x~0 2) main_~y~0 3) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 3)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40489#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 4)) (<= (+ (* main_~x~0 2) main_~y~0 4) (* main_~n~0 2)))} is VALID [2022-04-07 23:04:13,185 INFO L290 TraceCheckUtils]: 10: Hoare triple {40489#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) main_~y~0 4)) (<= (+ (* main_~x~0 2) main_~y~0 4) (* main_~n~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40490#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) 5 main_~y~0)) (<= (+ (* main_~x~0 2) 5 main_~y~0) (* main_~n~0 2)))} is VALID [2022-04-07 23:04:13,186 INFO L290 TraceCheckUtils]: 11: Hoare triple {40490#(and (<= (* main_~n~0 2) (+ (* main_~x~0 2) 5 main_~y~0)) (<= (+ (* main_~x~0 2) 5 main_~y~0) (* main_~n~0 2)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40491#(and (<= (+ 5 main_~y~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ 5 main_~y~0 (* 8589934592 (div main_~x~0 4294967296)))))} is VALID [2022-04-07 23:04:13,186 INFO L290 TraceCheckUtils]: 12: Hoare triple {40491#(and (<= (+ 5 main_~y~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)) (<= (* main_~n~0 2) (+ 5 main_~y~0 (* 8589934592 (div main_~x~0 4294967296)))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {40492#(and (<= (* main_~n~0 2) (+ 5 main_~z~0 (* 8589934592 (div main_~x~0 4294967296)))) (<= (+ 5 main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)))} is VALID [2022-04-07 23:04:13,187 INFO L290 TraceCheckUtils]: 13: Hoare triple {40492#(and (<= (* main_~n~0 2) (+ 5 main_~z~0 (* 8589934592 (div main_~x~0 4294967296)))) (<= (+ 5 main_~z~0 (* 8589934592 (div main_~x~0 4294967296))) (* main_~n~0 2)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40493#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:13,188 INFO L290 TraceCheckUtils]: 14: Hoare triple {40493#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40494#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:13,189 INFO L290 TraceCheckUtils]: 15: Hoare triple {40494#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40495#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} is VALID [2022-04-07 23:04:13,190 INFO L290 TraceCheckUtils]: 16: Hoare triple {40495#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40496#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (- 9) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296)) main_~z~0 9))} is VALID [2022-04-07 23:04:13,191 INFO L290 TraceCheckUtils]: 17: Hoare triple {40496#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (- 9) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296)) main_~z~0 9))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40497#(<= (* main_~n~0 2) (+ main_~z~0 (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 10)) 4294967296)) 10))} is VALID [2022-04-07 23:04:13,191 INFO L290 TraceCheckUtils]: 18: Hoare triple {40497#(<= (* main_~n~0 2) (+ main_~z~0 (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 10)) 4294967296)) 10))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {40497#(<= (* main_~n~0 2) (+ main_~z~0 (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 10)) 4294967296)) 10))} is VALID [2022-04-07 23:04:13,192 INFO L290 TraceCheckUtils]: 19: Hoare triple {40497#(<= (* main_~n~0 2) (+ main_~z~0 (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 10)) 4294967296)) 10))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40496#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (- 9) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296)) main_~z~0 9))} is VALID [2022-04-07 23:04:13,193 INFO L290 TraceCheckUtils]: 20: Hoare triple {40496#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (- 9) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296)) main_~z~0 9))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40495#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} is VALID [2022-04-07 23:04:13,194 INFO L290 TraceCheckUtils]: 21: Hoare triple {40495#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40494#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:13,195 INFO L290 TraceCheckUtils]: 22: Hoare triple {40494#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40493#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:13,195 INFO L290 TraceCheckUtils]: 23: Hoare triple {40493#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 23:04:13,196 INFO L290 TraceCheckUtils]: 24: Hoare triple {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 23:04:13,197 INFO L290 TraceCheckUtils]: 25: Hoare triple {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40499#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} is VALID [2022-04-07 23:04:13,197 INFO L290 TraceCheckUtils]: 26: Hoare triple {40499#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40500#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:13,198 INFO L290 TraceCheckUtils]: 27: Hoare triple {40500#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40501#(<= (* main_~n~0 2) (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 2))} is VALID [2022-04-07 23:04:13,199 INFO L290 TraceCheckUtils]: 28: Hoare triple {40501#(<= (* main_~n~0 2) (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40502#(<= (* main_~n~0 2) (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 1))} is VALID [2022-04-07 23:04:13,210 INFO L290 TraceCheckUtils]: 29: Hoare triple {40502#(<= (* main_~n~0 2) (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40503#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:04:13,210 INFO L290 TraceCheckUtils]: 30: Hoare triple {40503#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40503#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:04:13,212 INFO L272 TraceCheckUtils]: 31: Hoare triple {40503#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {40504#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 23:04:13,213 INFO L290 TraceCheckUtils]: 32: Hoare triple {40504#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40505#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 23:04:13,213 INFO L290 TraceCheckUtils]: 33: Hoare triple {40505#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {40481#false} is VALID [2022-04-07 23:04:13,213 INFO L290 TraceCheckUtils]: 34: Hoare triple {40481#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40481#false} is VALID [2022-04-07 23:04:13,213 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:04:13,213 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:04:13,213 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406780132] [2022-04-07 23:04:13,213 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406780132] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:04:13,213 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [931439968] [2022-04-07 23:04:13,213 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 23:04:13,214 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:13,214 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:04:13,214 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:04:13,215 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-07 23:04:13,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:13,464 WARN L261 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 80 conjunts are in the unsatisfiable core [2022-04-07 23:04:13,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:13,545 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:04:14,726 INFO L272 TraceCheckUtils]: 0: Hoare triple {40480#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:14,726 INFO L290 TraceCheckUtils]: 1: Hoare triple {40480#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40480#true} is VALID [2022-04-07 23:04:14,726 INFO L290 TraceCheckUtils]: 2: Hoare triple {40480#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:14,726 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40480#true} {40480#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:14,726 INFO L272 TraceCheckUtils]: 4: Hoare triple {40480#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:14,727 INFO L290 TraceCheckUtils]: 5: Hoare triple {40480#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {40485#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-07 23:04:14,727 INFO L290 TraceCheckUtils]: 6: Hoare triple {40485#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40528#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} is VALID [2022-04-07 23:04:14,728 INFO L290 TraceCheckUtils]: 7: Hoare triple {40528#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40532#(and (= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-07 23:04:14,729 INFO L290 TraceCheckUtils]: 8: Hoare triple {40532#(and (= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (= main_~n~0 (+ main_~x~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40536#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 1)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 3))} is VALID [2022-04-07 23:04:14,730 INFO L290 TraceCheckUtils]: 9: Hoare triple {40536#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 1)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 3))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40540#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 2)) (< 0 (mod (+ main_~x~0 1) 4294967296)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 4))} is VALID [2022-04-07 23:04:14,731 INFO L290 TraceCheckUtils]: 10: Hoare triple {40540#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 2)) (< 0 (mod (+ main_~x~0 1) 4294967296)) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= main_~y~0 4))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40544#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 1) (+ main_~n~0 (- 4))) (= 5 main_~y~0) (< 0 (mod (+ main_~n~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:04:14,731 INFO L290 TraceCheckUtils]: 11: Hoare triple {40544#(and (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 1) (+ main_~n~0 (- 4))) (= 5 main_~y~0) (< 0 (mod (+ main_~n~0 4294967293) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40548#(and (<= (mod main_~x~0 4294967296) 0) (= (+ 5 main_~x~0) main_~n~0) (= 5 main_~y~0))} is VALID [2022-04-07 23:04:14,732 INFO L290 TraceCheckUtils]: 12: Hoare triple {40548#(and (<= (mod main_~x~0 4294967296) 0) (= (+ 5 main_~x~0) main_~n~0) (= 5 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {40552#(and (<= (mod main_~x~0 4294967296) 0) (= (+ 5 main_~x~0) main_~n~0) (= 5 main_~z~0))} is VALID [2022-04-07 23:04:14,732 INFO L290 TraceCheckUtils]: 13: Hoare triple {40552#(and (<= (mod main_~x~0 4294967296) 0) (= (+ 5 main_~x~0) main_~n~0) (= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40556#(and (= 5 (+ main_~z~0 1)) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0) (= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-07 23:04:14,733 INFO L290 TraceCheckUtils]: 14: Hoare triple {40556#(and (= 5 (+ main_~z~0 1)) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0) (= (+ main_~x~0 4) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40560#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ main_~z~0 1) 4) (= (+ main_~n~0 (- 3)) main_~x~0))} is VALID [2022-04-07 23:04:14,734 INFO L290 TraceCheckUtils]: 15: Hoare triple {40560#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ main_~z~0 1) 4) (= (+ main_~n~0 (- 3)) main_~x~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40564#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ main_~n~0 (- 3)) (+ (- 1) main_~x~0)) (= (+ main_~z~0 2) 4))} is VALID [2022-04-07 23:04:14,734 INFO L290 TraceCheckUtils]: 16: Hoare triple {40564#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ main_~n~0 (- 3)) (+ (- 1) main_~x~0)) (= (+ main_~z~0 2) 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40568#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= main_~x~0 (+ (- 1) main_~n~0)) (= (+ main_~z~0 3) 4))} is VALID [2022-04-07 23:04:14,735 INFO L290 TraceCheckUtils]: 17: Hoare triple {40568#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= main_~x~0 (+ (- 1) main_~n~0)) (= (+ main_~z~0 3) 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40572#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 4 (+ main_~z~0 4)) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:04:14,735 INFO L290 TraceCheckUtils]: 18: Hoare triple {40572#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 4 (+ main_~z~0 4)) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {40572#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 4 (+ main_~z~0 4)) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:04:14,736 INFO L290 TraceCheckUtils]: 19: Hoare triple {40572#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 4 (+ main_~z~0 4)) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40579#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ main_~z~0 3) 4) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:04:14,736 INFO L290 TraceCheckUtils]: 20: Hoare triple {40579#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ main_~z~0 3) 4) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40583#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)) (= main_~z~0 2))} is VALID [2022-04-07 23:04:14,737 INFO L290 TraceCheckUtils]: 21: Hoare triple {40583#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)) (= main_~z~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40587#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 2 (+ (- 1) main_~z~0)) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:04:14,737 INFO L290 TraceCheckUtils]: 22: Hoare triple {40587#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 2 (+ (- 1) main_~z~0)) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40591#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= main_~z~0 4) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:04:14,737 INFO L290 TraceCheckUtils]: 23: Hoare triple {40591#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= main_~z~0 4) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40595#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 5 main_~z~0) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:04:14,738 INFO L290 TraceCheckUtils]: 24: Hoare triple {40595#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 5 main_~z~0) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40595#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 5 main_~z~0) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:04:14,738 INFO L290 TraceCheckUtils]: 25: Hoare triple {40595#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 5 main_~z~0) (= (+ (- 1) main_~x~0) (+ (- 1) main_~n~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40602#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ main_~x~0 1) main_~n~0) (= main_~z~0 6))} is VALID [2022-04-07 23:04:14,739 INFO L290 TraceCheckUtils]: 26: Hoare triple {40602#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= (+ main_~x~0 1) main_~n~0) (= main_~z~0 6))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40606#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 6 (+ (- 1) main_~z~0)) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} is VALID [2022-04-07 23:04:14,740 INFO L290 TraceCheckUtils]: 27: Hoare triple {40606#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 6 (+ (- 1) main_~z~0)) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40610#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 6 (+ (- 2) main_~z~0)) (= (+ (- 2) main_~n~0) (+ main_~x~0 1)))} is VALID [2022-04-07 23:04:14,740 INFO L290 TraceCheckUtils]: 28: Hoare triple {40610#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 6 (+ (- 2) main_~z~0)) (= (+ (- 2) main_~n~0) (+ main_~x~0 1)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40614#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= main_~z~0 9))} is VALID [2022-04-07 23:04:14,740 INFO L290 TraceCheckUtils]: 29: Hoare triple {40614#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= main_~z~0 9))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40618#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 9 (+ (- 1) main_~z~0)))} is VALID [2022-04-07 23:04:14,741 INFO L290 TraceCheckUtils]: 30: Hoare triple {40618#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 9 (+ (- 1) main_~z~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40618#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 9 (+ (- 1) main_~z~0)))} is VALID [2022-04-07 23:04:14,742 INFO L272 TraceCheckUtils]: 31: Hoare triple {40618#(and (<= (mod (+ 4294967291 main_~n~0) 4294967296) 0) (= 9 (+ (- 1) main_~z~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {40625#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:04:14,742 INFO L290 TraceCheckUtils]: 32: Hoare triple {40625#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40629#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:04:14,743 INFO L290 TraceCheckUtils]: 33: Hoare triple {40629#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {40481#false} is VALID [2022-04-07 23:04:14,743 INFO L290 TraceCheckUtils]: 34: Hoare triple {40481#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40481#false} is VALID [2022-04-07 23:04:14,743 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:04:14,743 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:04:15,574 INFO L290 TraceCheckUtils]: 34: Hoare triple {40481#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40481#false} is VALID [2022-04-07 23:04:15,575 INFO L290 TraceCheckUtils]: 33: Hoare triple {40629#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {40481#false} is VALID [2022-04-07 23:04:15,575 INFO L290 TraceCheckUtils]: 32: Hoare triple {40625#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40629#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:04:15,576 INFO L272 TraceCheckUtils]: 31: Hoare triple {40503#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {40625#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:04:15,577 INFO L290 TraceCheckUtils]: 30: Hoare triple {40503#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40503#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:04:15,579 INFO L290 TraceCheckUtils]: 29: Hoare triple {40502#(<= (* main_~n~0 2) (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40503#(and (< (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296)) (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0 1)) (<= (+ (* (div (* main_~n~0 2) 4294967296) 4294967296) main_~z~0) (+ (* main_~n~0 2) (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-07 23:04:15,580 INFO L290 TraceCheckUtils]: 28: Hoare triple {40501#(<= (* main_~n~0 2) (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40502#(<= (* main_~n~0 2) (+ (* (div (+ (- 1) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 1))} is VALID [2022-04-07 23:04:15,581 INFO L290 TraceCheckUtils]: 27: Hoare triple {40500#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40501#(<= (* main_~n~0 2) (+ (* (div (+ (- 2) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296) main_~z~0 2))} is VALID [2022-04-07 23:04:15,582 INFO L290 TraceCheckUtils]: 26: Hoare triple {40499#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40500#(<= (* main_~n~0 2) (+ main_~z~0 3 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:15,583 INFO L290 TraceCheckUtils]: 25: Hoare triple {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {40499#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 4)) 4294967296)) main_~z~0 4))} is VALID [2022-04-07 23:04:15,583 INFO L290 TraceCheckUtils]: 24: Hoare triple {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 23:04:15,584 INFO L290 TraceCheckUtils]: 23: Hoare triple {40493#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 23:04:15,585 INFO L290 TraceCheckUtils]: 22: Hoare triple {40494#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40493#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:15,586 INFO L290 TraceCheckUtils]: 21: Hoare triple {40495#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40494#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:15,586 INFO L290 TraceCheckUtils]: 20: Hoare triple {40496#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (- 9) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296)) main_~z~0 9))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40495#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} is VALID [2022-04-07 23:04:15,587 INFO L290 TraceCheckUtils]: 19: Hoare triple {40497#(<= (* main_~n~0 2) (+ main_~z~0 (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 10)) 4294967296)) 10))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40496#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (- 9) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296)) main_~z~0 9))} is VALID [2022-04-07 23:04:15,588 INFO L290 TraceCheckUtils]: 18: Hoare triple {40497#(<= (* main_~n~0 2) (+ main_~z~0 (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 10)) 4294967296)) 10))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {40497#(<= (* main_~n~0 2) (+ main_~z~0 (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 10)) 4294967296)) 10))} is VALID [2022-04-07 23:04:15,588 INFO L290 TraceCheckUtils]: 17: Hoare triple {40496#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (- 9) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296)) main_~z~0 9))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40497#(<= (* main_~n~0 2) (+ main_~z~0 (* 4294967296 (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 10)) 4294967296)) 10))} is VALID [2022-04-07 23:04:15,589 INFO L290 TraceCheckUtils]: 16: Hoare triple {40495#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40496#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (- 9) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296)) main_~z~0 9))} is VALID [2022-04-07 23:04:15,590 INFO L290 TraceCheckUtils]: 15: Hoare triple {40494#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40495#(<= (* main_~n~0 2) (+ main_~z~0 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 8)) 4294967296) 4294967296) 8))} is VALID [2022-04-07 23:04:15,591 INFO L290 TraceCheckUtils]: 14: Hoare triple {40493#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40494#(<= (* main_~n~0 2) (+ 7 main_~z~0 (* (div (+ (- 7) (* (- 1) main_~z~0) (* main_~n~0 2)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:15,592 INFO L290 TraceCheckUtils]: 13: Hoare triple {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40493#(<= (* main_~n~0 2) (+ main_~z~0 6 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:15,592 INFO L290 TraceCheckUtils]: 12: Hoare triple {40702#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* main_~n~0 2) (- 5) (* (- 1) main_~y~0)) 4294967296)) 5 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {40498#(<= (* main_~n~0 2) (+ 5 (* (div (+ (* (- 1) main_~z~0) (* main_~n~0 2) (- 5)) 4294967296) 4294967296) main_~z~0))} is VALID [2022-04-07 23:04:15,592 INFO L290 TraceCheckUtils]: 11: Hoare triple {40706#(or (<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* main_~n~0 2) (- 5) (* (- 1) main_~y~0)) 4294967296)) 5 main_~y~0)) (< 0 (mod main_~x~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40702#(<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* main_~n~0 2) (- 5) (* (- 1) main_~y~0)) 4294967296)) 5 main_~y~0))} is VALID [2022-04-07 23:04:15,594 INFO L290 TraceCheckUtils]: 10: Hoare triple {40710#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* main_~n~0 2) (- 6) (* (- 1) main_~y~0)) 4294967296)) main_~y~0 6)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40706#(or (<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* main_~n~0 2) (- 5) (* (- 1) main_~y~0)) 4294967296)) 5 main_~y~0)) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:15,595 INFO L290 TraceCheckUtils]: 9: Hoare triple {40714#(or (<= (* main_~n~0 2) (+ 7 main_~y~0 (* (div (+ (- 7) (* main_~n~0 2) (* (- 1) main_~y~0)) 4294967296) 4294967296))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40710#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= (* main_~n~0 2) (+ (* 4294967296 (div (+ (* main_~n~0 2) (- 6) (* (- 1) main_~y~0)) 4294967296)) main_~y~0 6)))} is VALID [2022-04-07 23:04:15,597 INFO L290 TraceCheckUtils]: 8: Hoare triple {40718#(or (<= (* main_~n~0 2) (+ (* (div (+ (* main_~n~0 2) (* (- 1) main_~y~0) (- 8)) 4294967296) 4294967296) main_~y~0 8)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40714#(or (<= (* main_~n~0 2) (+ 7 main_~y~0 (* (div (+ (- 7) (* main_~n~0 2) (* (- 1) main_~y~0)) 4294967296) 4294967296))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:04:15,598 INFO L290 TraceCheckUtils]: 7: Hoare triple {40722#(or (<= (* main_~n~0 2) (+ (* (div (+ (- 9) (* main_~n~0 2) (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0 9)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40718#(or (<= (* main_~n~0 2) (+ (* (div (+ (* main_~n~0 2) (* (- 1) main_~y~0) (- 8)) 4294967296) 4294967296) main_~y~0 8)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:04:15,599 INFO L290 TraceCheckUtils]: 6: Hoare triple {40726#(or (<= (* main_~n~0 2) (+ main_~y~0 (* (div (+ (* main_~n~0 2) (* (- 1) main_~y~0) (- 10)) 4294967296) 4294967296) 10)) (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40722#(or (<= (* main_~n~0 2) (+ (* (div (+ (- 9) (* main_~n~0 2) (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0 9)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:04:15,600 INFO L290 TraceCheckUtils]: 5: Hoare triple {40480#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {40726#(or (<= (* main_~n~0 2) (+ main_~y~0 (* (div (+ (* main_~n~0 2) (* (- 1) main_~y~0) (- 10)) 4294967296) 4294967296) 10)) (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:04:15,600 INFO L272 TraceCheckUtils]: 4: Hoare triple {40480#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:15,600 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40480#true} {40480#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:15,600 INFO L290 TraceCheckUtils]: 2: Hoare triple {40480#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:15,600 INFO L290 TraceCheckUtils]: 1: Hoare triple {40480#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40480#true} is VALID [2022-04-07 23:04:15,600 INFO L272 TraceCheckUtils]: 0: Hoare triple {40480#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40480#true} is VALID [2022-04-07 23:04:15,600 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:04:15,600 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [931439968] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:04:15,600 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:04:15,600 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 27, 22] total 55 [2022-04-07 23:04:15,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [982493679] [2022-04-07 23:04:15,601 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:04:15,601 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 55 states have (on average 1.2363636363636363) internal successors, (68), 52 states have internal predecessors, (68), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:04:15,601 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:04:15,601 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 55 states, 55 states have (on average 1.2363636363636363) internal successors, (68), 52 states have internal predecessors, (68), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:15,706 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:15,706 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 55 states [2022-04-07 23:04:15,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:04:15,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2022-04-07 23:04:15,707 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=227, Invalid=2743, Unknown=0, NotChecked=0, Total=2970 [2022-04-07 23:04:15,707 INFO L87 Difference]: Start difference. First operand 438 states and 634 transitions. Second operand has 55 states, 55 states have (on average 1.2363636363636363) internal successors, (68), 52 states have internal predecessors, (68), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:22,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:22,315 INFO L93 Difference]: Finished difference Result 456 states and 652 transitions. [2022-04-07 23:04:22,315 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-07 23:04:22,315 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 55 states have (on average 1.2363636363636363) internal successors, (68), 52 states have internal predecessors, (68), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:04:22,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:04:22,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.2363636363636363) internal successors, (68), 52 states have internal predecessors, (68), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:22,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 55 transitions. [2022-04-07 23:04:22,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.2363636363636363) internal successors, (68), 52 states have internal predecessors, (68), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:22,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 55 transitions. [2022-04-07 23:04:22,317 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 55 transitions. [2022-04-07 23:04:22,401 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:22,408 INFO L225 Difference]: With dead ends: 456 [2022-04-07 23:04:22,409 INFO L226 Difference]: Without dead ends: 451 [2022-04-07 23:04:22,409 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 41 SyntacticMatches, 4 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1575 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=503, Invalid=6303, Unknown=0, NotChecked=0, Total=6806 [2022-04-07 23:04:22,409 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 58 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 1032 mSolverCounterSat, 113 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 1145 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 113 IncrementalHoareTripleChecker+Valid, 1032 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-07 23:04:22,409 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [58 Valid, 139 Invalid, 1145 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [113 Valid, 1032 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-07 23:04:22,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 451 states. [2022-04-07 23:04:23,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 451 to 445. [2022-04-07 23:04:23,685 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:04:23,686 INFO L82 GeneralOperation]: Start isEquivalent. First operand 451 states. Second operand has 445 states, 440 states have (on average 1.4477272727272728) internal successors, (637), 440 states have internal predecessors, (637), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:23,686 INFO L74 IsIncluded]: Start isIncluded. First operand 451 states. Second operand has 445 states, 440 states have (on average 1.4477272727272728) internal successors, (637), 440 states have internal predecessors, (637), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:23,686 INFO L87 Difference]: Start difference. First operand 451 states. Second operand has 445 states, 440 states have (on average 1.4477272727272728) internal successors, (637), 440 states have internal predecessors, (637), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:23,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:23,692 INFO L93 Difference]: Finished difference Result 451 states and 647 transitions. [2022-04-07 23:04:23,692 INFO L276 IsEmpty]: Start isEmpty. Operand 451 states and 647 transitions. [2022-04-07 23:04:23,693 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:23,693 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:23,693 INFO L74 IsIncluded]: Start isIncluded. First operand has 445 states, 440 states have (on average 1.4477272727272728) internal successors, (637), 440 states have internal predecessors, (637), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 451 states. [2022-04-07 23:04:23,693 INFO L87 Difference]: Start difference. First operand has 445 states, 440 states have (on average 1.4477272727272728) internal successors, (637), 440 states have internal predecessors, (637), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 451 states. [2022-04-07 23:04:23,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:23,700 INFO L93 Difference]: Finished difference Result 451 states and 647 transitions. [2022-04-07 23:04:23,700 INFO L276 IsEmpty]: Start isEmpty. Operand 451 states and 647 transitions. [2022-04-07 23:04:23,700 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:23,700 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:23,700 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:04:23,700 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:04:23,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 445 states, 440 states have (on average 1.4477272727272728) internal successors, (637), 440 states have internal predecessors, (637), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:23,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 641 transitions. [2022-04-07 23:04:23,707 INFO L78 Accepts]: Start accepts. Automaton has 445 states and 641 transitions. Word has length 35 [2022-04-07 23:04:23,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:04:23,708 INFO L478 AbstractCegarLoop]: Abstraction has 445 states and 641 transitions. [2022-04-07 23:04:23,708 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 55 states, 55 states have (on average 1.2363636363636363) internal successors, (68), 52 states have internal predecessors, (68), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:23,708 INFO L276 IsEmpty]: Start isEmpty. Operand 445 states and 641 transitions. [2022-04-07 23:04:23,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-07 23:04:23,708 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:04:23,708 INFO L499 BasicCegarLoop]: trace histogram [8, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:04:23,712 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-07 23:04:23,908 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-04-07 23:04:23,909 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:04:23,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:04:23,909 INFO L85 PathProgramCache]: Analyzing trace with hash -1685451202, now seen corresponding path program 9 times [2022-04-07 23:04:23,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:04:23,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1109461510] [2022-04-07 23:04:23,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:04:23,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:04:23,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:24,119 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:04:24,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:24,122 INFO L290 TraceCheckUtils]: 0: Hoare triple {42975#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42956#true} is VALID [2022-04-07 23:04:24,122 INFO L290 TraceCheckUtils]: 1: Hoare triple {42956#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,123 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {42956#true} {42956#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,123 INFO L272 TraceCheckUtils]: 0: Hoare triple {42956#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42975#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:04:24,123 INFO L290 TraceCheckUtils]: 1: Hoare triple {42975#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42956#true} is VALID [2022-04-07 23:04:24,123 INFO L290 TraceCheckUtils]: 2: Hoare triple {42956#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,123 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42956#true} {42956#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,123 INFO L272 TraceCheckUtils]: 4: Hoare triple {42956#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,123 INFO L290 TraceCheckUtils]: 5: Hoare triple {42956#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42961#(= main_~y~0 0)} is VALID [2022-04-07 23:04:24,124 INFO L290 TraceCheckUtils]: 6: Hoare triple {42961#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42962#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:04:24,124 INFO L290 TraceCheckUtils]: 7: Hoare triple {42962#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42963#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:04:24,125 INFO L290 TraceCheckUtils]: 8: Hoare triple {42963#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42964#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:04:24,125 INFO L290 TraceCheckUtils]: 9: Hoare triple {42964#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42965#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:04:24,126 INFO L290 TraceCheckUtils]: 10: Hoare triple {42965#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42966#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:04:24,126 INFO L290 TraceCheckUtils]: 11: Hoare triple {42966#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42967#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,127 INFO L290 TraceCheckUtils]: 12: Hoare triple {42967#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42967#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,127 INFO L290 TraceCheckUtils]: 13: Hoare triple {42967#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {42968#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:04:24,128 INFO L290 TraceCheckUtils]: 14: Hoare triple {42968#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42969#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:04:24,128 INFO L290 TraceCheckUtils]: 15: Hoare triple {42969#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42970#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:04:24,129 INFO L290 TraceCheckUtils]: 16: Hoare triple {42970#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42971#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:04:24,129 INFO L290 TraceCheckUtils]: 17: Hoare triple {42971#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42972#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:04:24,130 INFO L290 TraceCheckUtils]: 18: Hoare triple {42972#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42973#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:04:24,130 INFO L290 TraceCheckUtils]: 19: Hoare triple {42973#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42974#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 20: Hoare triple {42974#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 21: Hoare triple {42957#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 22: Hoare triple {42957#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 23: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 24: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 25: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 26: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 27: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 28: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 29: Hoare triple {42957#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 30: Hoare triple {42957#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L272 TraceCheckUtils]: 31: Hoare triple {42957#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {42957#false} is VALID [2022-04-07 23:04:24,131 INFO L290 TraceCheckUtils]: 32: Hoare triple {42957#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42957#false} is VALID [2022-04-07 23:04:24,132 INFO L290 TraceCheckUtils]: 33: Hoare triple {42957#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,132 INFO L290 TraceCheckUtils]: 34: Hoare triple {42957#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,132 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-07 23:04:24,132 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:04:24,132 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1109461510] [2022-04-07 23:04:24,132 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1109461510] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:04:24,132 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [659509376] [2022-04-07 23:04:24,132 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:04:24,132 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:24,132 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:04:24,133 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:04:24,134 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-07 23:04:24,287 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-07 23:04:24,287 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:04:24,288 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-07 23:04:24,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:24,294 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:04:24,545 INFO L272 TraceCheckUtils]: 0: Hoare triple {42956#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,545 INFO L290 TraceCheckUtils]: 1: Hoare triple {42956#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42956#true} is VALID [2022-04-07 23:04:24,545 INFO L290 TraceCheckUtils]: 2: Hoare triple {42956#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,545 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42956#true} {42956#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,545 INFO L272 TraceCheckUtils]: 4: Hoare triple {42956#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,545 INFO L290 TraceCheckUtils]: 5: Hoare triple {42956#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42961#(= main_~y~0 0)} is VALID [2022-04-07 23:04:24,546 INFO L290 TraceCheckUtils]: 6: Hoare triple {42961#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42962#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:04:24,546 INFO L290 TraceCheckUtils]: 7: Hoare triple {42962#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42963#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:04:24,547 INFO L290 TraceCheckUtils]: 8: Hoare triple {42963#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42964#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:04:24,547 INFO L290 TraceCheckUtils]: 9: Hoare triple {42964#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42965#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:04:24,548 INFO L290 TraceCheckUtils]: 10: Hoare triple {42965#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42966#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:04:24,548 INFO L290 TraceCheckUtils]: 11: Hoare triple {42966#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42967#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,548 INFO L290 TraceCheckUtils]: 12: Hoare triple {42967#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42967#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,549 INFO L290 TraceCheckUtils]: 13: Hoare triple {42967#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {43018#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,549 INFO L290 TraceCheckUtils]: 14: Hoare triple {43018#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43022#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:04:24,550 INFO L290 TraceCheckUtils]: 15: Hoare triple {43022#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43026#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,550 INFO L290 TraceCheckUtils]: 16: Hoare triple {43026#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43030#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,551 INFO L290 TraceCheckUtils]: 17: Hoare triple {43030#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43034#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,551 INFO L290 TraceCheckUtils]: 18: Hoare triple {43034#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43038#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,552 INFO L290 TraceCheckUtils]: 19: Hoare triple {43038#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43042#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:24,552 INFO L290 TraceCheckUtils]: 20: Hoare triple {43042#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 21: Hoare triple {42957#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 22: Hoare triple {42957#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 23: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 24: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 25: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 26: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 27: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 28: Hoare triple {42957#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 29: Hoare triple {42957#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 30: Hoare triple {42957#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L272 TraceCheckUtils]: 31: Hoare triple {42957#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 32: Hoare triple {42957#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 33: Hoare triple {42957#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,553 INFO L290 TraceCheckUtils]: 34: Hoare triple {42957#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,554 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-07 23:04:24,554 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:04:24,963 INFO L290 TraceCheckUtils]: 34: Hoare triple {42957#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,963 INFO L290 TraceCheckUtils]: 33: Hoare triple {42957#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,963 INFO L290 TraceCheckUtils]: 32: Hoare triple {42957#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42957#false} is VALID [2022-04-07 23:04:24,963 INFO L272 TraceCheckUtils]: 31: Hoare triple {42957#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {42957#false} is VALID [2022-04-07 23:04:24,963 INFO L290 TraceCheckUtils]: 30: Hoare triple {42957#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,963 INFO L290 TraceCheckUtils]: 29: Hoare triple {43103#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42957#false} is VALID [2022-04-07 23:04:24,964 INFO L290 TraceCheckUtils]: 28: Hoare triple {43107#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {43103#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:04:24,965 INFO L290 TraceCheckUtils]: 27: Hoare triple {43111#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {43107#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:04:24,966 INFO L290 TraceCheckUtils]: 26: Hoare triple {43115#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {43111#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:04:24,966 INFO L290 TraceCheckUtils]: 25: Hoare triple {43119#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {43115#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:04:24,967 INFO L290 TraceCheckUtils]: 24: Hoare triple {43123#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {43119#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:24,969 INFO L290 TraceCheckUtils]: 23: Hoare triple {43127#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {43123#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:24,969 INFO L290 TraceCheckUtils]: 22: Hoare triple {43127#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {43127#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:24,969 INFO L290 TraceCheckUtils]: 21: Hoare triple {43127#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43127#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:24,969 INFO L290 TraceCheckUtils]: 20: Hoare triple {43137#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43127#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:24,970 INFO L290 TraceCheckUtils]: 19: Hoare triple {43141#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43137#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:04:24,971 INFO L290 TraceCheckUtils]: 18: Hoare triple {43145#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43141#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:04:24,972 INFO L290 TraceCheckUtils]: 17: Hoare triple {43149#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43145#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:04:24,973 INFO L290 TraceCheckUtils]: 16: Hoare triple {43153#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43149#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:04:24,974 INFO L290 TraceCheckUtils]: 15: Hoare triple {43157#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43153#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:04:24,974 INFO L290 TraceCheckUtils]: 14: Hoare triple {43161#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {43157#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 13: Hoare triple {42956#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {43161#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 12: Hoare triple {42956#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 11: Hoare triple {42956#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 10: Hoare triple {42956#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 9: Hoare triple {42956#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 8: Hoare triple {42956#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 7: Hoare triple {42956#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 6: Hoare triple {42956#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 5: Hoare triple {42956#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L272 TraceCheckUtils]: 4: Hoare triple {42956#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42956#true} {42956#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,975 INFO L290 TraceCheckUtils]: 2: Hoare triple {42956#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {42956#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42956#true} is VALID [2022-04-07 23:04:24,976 INFO L272 TraceCheckUtils]: 0: Hoare triple {42956#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42956#true} is VALID [2022-04-07 23:04:24,976 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-07 23:04:24,976 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [659509376] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:04:24,976 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:04:24,976 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 38 [2022-04-07 23:04:24,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446559893] [2022-04-07 23:04:24,976 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:04:24,976 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4473684210526316) internal successors, (55), 37 states have internal predecessors, (55), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:04:24,977 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:04:24,977 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.4473684210526316) internal successors, (55), 37 states have internal predecessors, (55), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:25,020 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:25,020 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-07 23:04:25,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:04:25,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-07 23:04:25,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=1172, Unknown=0, NotChecked=0, Total=1406 [2022-04-07 23:04:25,021 INFO L87 Difference]: Start difference. First operand 445 states and 641 transitions. Second operand has 38 states, 38 states have (on average 1.4473684210526316) internal successors, (55), 37 states have internal predecessors, (55), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:33,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:33,510 INFO L93 Difference]: Finished difference Result 817 states and 1037 transitions. [2022-04-07 23:04:33,510 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2022-04-07 23:04:33,510 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4473684210526316) internal successors, (55), 37 states have internal predecessors, (55), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:04:33,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:04:33,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4473684210526316) internal successors, (55), 37 states have internal predecessors, (55), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:33,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 156 transitions. [2022-04-07 23:04:33,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4473684210526316) internal successors, (55), 37 states have internal predecessors, (55), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:33,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 156 transitions. [2022-04-07 23:04:33,513 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 68 states and 156 transitions. [2022-04-07 23:04:33,841 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 156 edges. 156 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:33,858 INFO L225 Difference]: With dead ends: 817 [2022-04-07 23:04:33,858 INFO L226 Difference]: Without dead ends: 758 [2022-04-07 23:04:33,859 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3198 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=1890, Invalid=8616, Unknown=0, NotChecked=0, Total=10506 [2022-04-07 23:04:33,859 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 406 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 856 mSolverCounterSat, 414 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 406 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 1270 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 414 IncrementalHoareTripleChecker+Valid, 856 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-07 23:04:33,859 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [406 Valid, 115 Invalid, 1270 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [414 Valid, 856 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-07 23:04:33,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 758 states. [2022-04-07 23:04:35,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 758 to 449. [2022-04-07 23:04:35,196 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:04:35,196 INFO L82 GeneralOperation]: Start isEquivalent. First operand 758 states. Second operand has 449 states, 444 states have (on average 1.436936936936937) internal successors, (638), 444 states have internal predecessors, (638), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:35,197 INFO L74 IsIncluded]: Start isIncluded. First operand 758 states. Second operand has 449 states, 444 states have (on average 1.436936936936937) internal successors, (638), 444 states have internal predecessors, (638), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:35,198 INFO L87 Difference]: Start difference. First operand 758 states. Second operand has 449 states, 444 states have (on average 1.436936936936937) internal successors, (638), 444 states have internal predecessors, (638), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:35,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:35,212 INFO L93 Difference]: Finished difference Result 758 states and 952 transitions. [2022-04-07 23:04:35,212 INFO L276 IsEmpty]: Start isEmpty. Operand 758 states and 952 transitions. [2022-04-07 23:04:35,213 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:35,213 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:35,213 INFO L74 IsIncluded]: Start isIncluded. First operand has 449 states, 444 states have (on average 1.436936936936937) internal successors, (638), 444 states have internal predecessors, (638), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 758 states. [2022-04-07 23:04:35,213 INFO L87 Difference]: Start difference. First operand has 449 states, 444 states have (on average 1.436936936936937) internal successors, (638), 444 states have internal predecessors, (638), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 758 states. [2022-04-07 23:04:35,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:35,227 INFO L93 Difference]: Finished difference Result 758 states and 952 transitions. [2022-04-07 23:04:35,227 INFO L276 IsEmpty]: Start isEmpty. Operand 758 states and 952 transitions. [2022-04-07 23:04:35,228 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:35,228 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:35,228 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:04:35,228 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:04:35,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 449 states, 444 states have (on average 1.436936936936937) internal successors, (638), 444 states have internal predecessors, (638), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:35,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 449 states and 642 transitions. [2022-04-07 23:04:35,235 INFO L78 Accepts]: Start accepts. Automaton has 449 states and 642 transitions. Word has length 35 [2022-04-07 23:04:35,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:04:35,235 INFO L478 AbstractCegarLoop]: Abstraction has 449 states and 642 transitions. [2022-04-07 23:04:35,235 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.4473684210526316) internal successors, (55), 37 states have internal predecessors, (55), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:35,236 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 642 transitions. [2022-04-07 23:04:35,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-07 23:04:35,236 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:04:35,236 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:04:35,241 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-04-07 23:04:35,436 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-07 23:04:35,436 INFO L403 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:04:35,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:04:35,440 INFO L85 PathProgramCache]: Analyzing trace with hash -647006134, now seen corresponding path program 10 times [2022-04-07 23:04:35,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:04:35,440 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [782235429] [2022-04-07 23:04:35,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:04:35,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:04:35,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:35,643 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:04:35,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:35,646 INFO L290 TraceCheckUtils]: 0: Hoare triple {46492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46473#true} is VALID [2022-04-07 23:04:35,646 INFO L290 TraceCheckUtils]: 1: Hoare triple {46473#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:35,646 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {46473#true} {46473#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:35,647 INFO L272 TraceCheckUtils]: 0: Hoare triple {46473#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:04:35,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {46492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46473#true} is VALID [2022-04-07 23:04:35,647 INFO L290 TraceCheckUtils]: 2: Hoare triple {46473#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:35,647 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46473#true} {46473#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:35,647 INFO L272 TraceCheckUtils]: 4: Hoare triple {46473#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:35,647 INFO L290 TraceCheckUtils]: 5: Hoare triple {46473#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46473#true} is VALID [2022-04-07 23:04:35,648 INFO L290 TraceCheckUtils]: 6: Hoare triple {46473#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:35,649 INFO L290 TraceCheckUtils]: 7: Hoare triple {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46479#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-07 23:04:35,649 INFO L290 TraceCheckUtils]: 8: Hoare triple {46479#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46480#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:35,651 INFO L290 TraceCheckUtils]: 9: Hoare triple {46480#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46481#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:35,652 INFO L290 TraceCheckUtils]: 10: Hoare triple {46481#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46482#(<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:35,654 INFO L290 TraceCheckUtils]: 11: Hoare triple {46482#(<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46483#(<= main_~x~0 (+ 4294967289 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:35,655 INFO L290 TraceCheckUtils]: 12: Hoare triple {46483#(<= main_~x~0 (+ 4294967289 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46484#(<= (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:04:35,655 INFO L290 TraceCheckUtils]: 13: Hoare triple {46484#(<= (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46484#(<= (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:04:35,655 INFO L290 TraceCheckUtils]: 14: Hoare triple {46484#(<= (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {46484#(<= (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:04:35,656 INFO L290 TraceCheckUtils]: 15: Hoare triple {46484#(<= (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46485#(<= (+ (* 4294967296 (div (+ main_~x~0 6) 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 23:04:35,657 INFO L290 TraceCheckUtils]: 16: Hoare triple {46485#(<= (+ (* 4294967296 (div (+ main_~x~0 6) 4294967296)) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46486#(<= (+ 2 (* (div (+ 5 main_~x~0) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:04:35,657 INFO L290 TraceCheckUtils]: 17: Hoare triple {46486#(<= (+ 2 (* (div (+ 5 main_~x~0) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46487#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 3) main_~x~0)} is VALID [2022-04-07 23:04:35,658 INFO L290 TraceCheckUtils]: 18: Hoare triple {46487#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 3) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46488#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4) main_~x~0)} is VALID [2022-04-07 23:04:35,659 INFO L290 TraceCheckUtils]: 19: Hoare triple {46488#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46489#(<= (+ 5 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:04:35,660 INFO L290 TraceCheckUtils]: 20: Hoare triple {46489#(<= (+ 5 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46490#(<= (+ 6 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:04:35,660 INFO L290 TraceCheckUtils]: 21: Hoare triple {46490#(<= (+ 6 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,661 INFO L290 TraceCheckUtils]: 22: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,661 INFO L290 TraceCheckUtils]: 23: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,661 INFO L290 TraceCheckUtils]: 24: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,662 INFO L290 TraceCheckUtils]: 25: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,662 INFO L290 TraceCheckUtils]: 26: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,662 INFO L290 TraceCheckUtils]: 27: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,663 INFO L290 TraceCheckUtils]: 28: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,663 INFO L290 TraceCheckUtils]: 29: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,663 INFO L290 TraceCheckUtils]: 30: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:04:35,664 INFO L290 TraceCheckUtils]: 31: Hoare triple {46491#(<= (+ 7 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:35,664 INFO L272 TraceCheckUtils]: 32: Hoare triple {46474#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {46474#false} is VALID [2022-04-07 23:04:35,664 INFO L290 TraceCheckUtils]: 33: Hoare triple {46474#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46474#false} is VALID [2022-04-07 23:04:35,664 INFO L290 TraceCheckUtils]: 34: Hoare triple {46474#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:35,664 INFO L290 TraceCheckUtils]: 35: Hoare triple {46474#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:35,664 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 28 proven. 28 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-07 23:04:35,664 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:04:35,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [782235429] [2022-04-07 23:04:35,665 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [782235429] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:04:35,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1042634601] [2022-04-07 23:04:35,665 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:04:35,665 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:35,665 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:04:35,667 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:04:35,668 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-04-07 23:04:35,705 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:04:35,705 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:04:35,706 INFO L263 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 30 conjunts are in the unsatisfiable core [2022-04-07 23:04:35,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:35,714 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:04:36,069 INFO L272 TraceCheckUtils]: 0: Hoare triple {46473#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:36,070 INFO L290 TraceCheckUtils]: 1: Hoare triple {46473#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46473#true} is VALID [2022-04-07 23:04:36,070 INFO L290 TraceCheckUtils]: 2: Hoare triple {46473#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:36,070 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46473#true} {46473#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:36,070 INFO L272 TraceCheckUtils]: 4: Hoare triple {46473#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:36,070 INFO L290 TraceCheckUtils]: 5: Hoare triple {46473#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46473#true} is VALID [2022-04-07 23:04:36,070 INFO L290 TraceCheckUtils]: 6: Hoare triple {46473#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:36,071 INFO L290 TraceCheckUtils]: 7: Hoare triple {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46517#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:04:36,072 INFO L290 TraceCheckUtils]: 8: Hoare triple {46517#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46521#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,073 INFO L290 TraceCheckUtils]: 9: Hoare triple {46521#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46525#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:04:36,073 INFO L290 TraceCheckUtils]: 10: Hoare triple {46525#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46529#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,074 INFO L290 TraceCheckUtils]: 11: Hoare triple {46529#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46533#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:04:36,075 INFO L290 TraceCheckUtils]: 12: Hoare triple {46533#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} is VALID [2022-04-07 23:04:36,075 INFO L290 TraceCheckUtils]: 13: Hoare triple {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} is VALID [2022-04-07 23:04:36,075 INFO L290 TraceCheckUtils]: 14: Hoare triple {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} is VALID [2022-04-07 23:04:36,076 INFO L290 TraceCheckUtils]: 15: Hoare triple {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46533#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:04:36,077 INFO L290 TraceCheckUtils]: 16: Hoare triple {46533#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46529#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,077 INFO L290 TraceCheckUtils]: 17: Hoare triple {46529#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46525#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:04:36,078 INFO L290 TraceCheckUtils]: 18: Hoare triple {46525#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46521#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,079 INFO L290 TraceCheckUtils]: 19: Hoare triple {46521#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46517#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:04:36,079 INFO L290 TraceCheckUtils]: 20: Hoare triple {46517#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:36,080 INFO L290 TraceCheckUtils]: 21: Hoare triple {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,080 INFO L290 TraceCheckUtils]: 22: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,080 INFO L290 TraceCheckUtils]: 23: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,081 INFO L290 TraceCheckUtils]: 24: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,081 INFO L290 TraceCheckUtils]: 25: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,081 INFO L290 TraceCheckUtils]: 26: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,081 INFO L290 TraceCheckUtils]: 27: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,082 INFO L290 TraceCheckUtils]: 28: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,082 INFO L290 TraceCheckUtils]: 29: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,082 INFO L290 TraceCheckUtils]: 30: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,083 INFO L290 TraceCheckUtils]: 31: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:36,083 INFO L272 TraceCheckUtils]: 32: Hoare triple {46474#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {46474#false} is VALID [2022-04-07 23:04:36,083 INFO L290 TraceCheckUtils]: 33: Hoare triple {46474#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46474#false} is VALID [2022-04-07 23:04:36,083 INFO L290 TraceCheckUtils]: 34: Hoare triple {46474#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:36,083 INFO L290 TraceCheckUtils]: 35: Hoare triple {46474#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:36,083 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 7 proven. 49 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-07 23:04:36,083 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:04:36,328 INFO L290 TraceCheckUtils]: 35: Hoare triple {46474#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:36,329 INFO L290 TraceCheckUtils]: 34: Hoare triple {46474#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:36,329 INFO L290 TraceCheckUtils]: 33: Hoare triple {46474#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46474#false} is VALID [2022-04-07 23:04:36,329 INFO L272 TraceCheckUtils]: 32: Hoare triple {46474#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {46474#false} is VALID [2022-04-07 23:04:36,329 INFO L290 TraceCheckUtils]: 31: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46474#false} is VALID [2022-04-07 23:04:36,330 INFO L290 TraceCheckUtils]: 30: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,330 INFO L290 TraceCheckUtils]: 29: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,330 INFO L290 TraceCheckUtils]: 28: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,330 INFO L290 TraceCheckUtils]: 27: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,331 INFO L290 TraceCheckUtils]: 26: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,331 INFO L290 TraceCheckUtils]: 25: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,331 INFO L290 TraceCheckUtils]: 24: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,331 INFO L290 TraceCheckUtils]: 23: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,332 INFO L290 TraceCheckUtils]: 22: Hoare triple {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,332 INFO L290 TraceCheckUtils]: 21: Hoare triple {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46565#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,333 INFO L290 TraceCheckUtils]: 20: Hoare triple {46517#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:36,334 INFO L290 TraceCheckUtils]: 19: Hoare triple {46521#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46517#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:04:36,334 INFO L290 TraceCheckUtils]: 18: Hoare triple {46525#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46521#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,335 INFO L290 TraceCheckUtils]: 17: Hoare triple {46529#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46525#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:04:36,336 INFO L290 TraceCheckUtils]: 16: Hoare triple {46533#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46529#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,337 INFO L290 TraceCheckUtils]: 15: Hoare triple {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46533#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:04:36,337 INFO L290 TraceCheckUtils]: 14: Hoare triple {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} is VALID [2022-04-07 23:04:36,337 INFO L290 TraceCheckUtils]: 13: Hoare triple {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} is VALID [2022-04-07 23:04:36,338 INFO L290 TraceCheckUtils]: 12: Hoare triple {46533#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46537#(<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~x~0 6) 4294967296))))} is VALID [2022-04-07 23:04:36,339 INFO L290 TraceCheckUtils]: 11: Hoare triple {46529#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46533#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-07 23:04:36,339 INFO L290 TraceCheckUtils]: 10: Hoare triple {46525#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46529#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,340 INFO L290 TraceCheckUtils]: 9: Hoare triple {46521#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46525#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-07 23:04:36,341 INFO L290 TraceCheckUtils]: 8: Hoare triple {46517#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46521#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:36,341 INFO L290 TraceCheckUtils]: 7: Hoare triple {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46517#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-07 23:04:36,342 INFO L290 TraceCheckUtils]: 6: Hoare triple {46473#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46478#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:04:36,342 INFO L290 TraceCheckUtils]: 5: Hoare triple {46473#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46473#true} is VALID [2022-04-07 23:04:36,342 INFO L272 TraceCheckUtils]: 4: Hoare triple {46473#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:36,342 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46473#true} {46473#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:36,342 INFO L290 TraceCheckUtils]: 2: Hoare triple {46473#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:36,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {46473#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46473#true} is VALID [2022-04-07 23:04:36,342 INFO L272 TraceCheckUtils]: 0: Hoare triple {46473#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46473#true} is VALID [2022-04-07 23:04:36,342 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 7 proven. 49 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-07 23:04:36,343 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1042634601] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:04:36,343 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:04:36,343 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 10, 10] total 24 [2022-04-07 23:04:36,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1049492184] [2022-04-07 23:04:36,343 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:04:36,345 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.9166666666666667) internal successors, (46), 23 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-07 23:04:36,345 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:04:36,345 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.9166666666666667) internal successors, (46), 23 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:36,386 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:36,386 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-07 23:04:36,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:04:36,387 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-07 23:04:36,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=130, Invalid=422, Unknown=0, NotChecked=0, Total=552 [2022-04-07 23:04:36,387 INFO L87 Difference]: Start difference. First operand 449 states and 642 transitions. Second operand has 24 states, 24 states have (on average 1.9166666666666667) internal successors, (46), 23 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:38,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:38,899 INFO L93 Difference]: Finished difference Result 471 states and 672 transitions. [2022-04-07 23:04:38,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-07 23:04:38,899 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.9166666666666667) internal successors, (46), 23 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-07 23:04:38,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:04:38,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.9166666666666667) internal successors, (46), 23 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:38,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 89 transitions. [2022-04-07 23:04:38,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.9166666666666667) internal successors, (46), 23 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:38,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 89 transitions. [2022-04-07 23:04:38,900 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 89 transitions. [2022-04-07 23:04:38,989 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:38,997 INFO L225 Difference]: With dead ends: 471 [2022-04-07 23:04:38,997 INFO L226 Difference]: Without dead ends: 466 [2022-04-07 23:04:38,998 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 65 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 341 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=313, Invalid=1093, Unknown=0, NotChecked=0, Total=1406 [2022-04-07 23:04:38,998 INFO L913 BasicCegarLoop]: 36 mSDtfsCounter, 116 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 382 mSolverCounterSat, 84 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 83 SdHoareTripleChecker+Invalid, 466 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 84 IncrementalHoareTripleChecker+Valid, 382 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-07 23:04:38,998 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [116 Valid, 83 Invalid, 466 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [84 Valid, 382 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-07 23:04:38,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2022-04-07 23:04:40,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 439. [2022-04-07 23:04:40,387 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:04:40,387 INFO L82 GeneralOperation]: Start isEquivalent. First operand 466 states. Second operand has 439 states, 434 states have (on average 1.4377880184331797) internal successors, (624), 434 states have internal predecessors, (624), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:40,388 INFO L74 IsIncluded]: Start isIncluded. First operand 466 states. Second operand has 439 states, 434 states have (on average 1.4377880184331797) internal successors, (624), 434 states have internal predecessors, (624), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:40,388 INFO L87 Difference]: Start difference. First operand 466 states. Second operand has 439 states, 434 states have (on average 1.4377880184331797) internal successors, (624), 434 states have internal predecessors, (624), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:40,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:40,394 INFO L93 Difference]: Finished difference Result 466 states and 664 transitions. [2022-04-07 23:04:40,394 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 664 transitions. [2022-04-07 23:04:40,395 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:40,395 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:40,395 INFO L74 IsIncluded]: Start isIncluded. First operand has 439 states, 434 states have (on average 1.4377880184331797) internal successors, (624), 434 states have internal predecessors, (624), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 466 states. [2022-04-07 23:04:40,395 INFO L87 Difference]: Start difference. First operand has 439 states, 434 states have (on average 1.4377880184331797) internal successors, (624), 434 states have internal predecessors, (624), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 466 states. [2022-04-07 23:04:40,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:40,402 INFO L93 Difference]: Finished difference Result 466 states and 664 transitions. [2022-04-07 23:04:40,402 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 664 transitions. [2022-04-07 23:04:40,402 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:40,402 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:40,402 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:04:40,402 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:04:40,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 439 states, 434 states have (on average 1.4377880184331797) internal successors, (624), 434 states have internal predecessors, (624), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:40,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 628 transitions. [2022-04-07 23:04:40,410 INFO L78 Accepts]: Start accepts. Automaton has 439 states and 628 transitions. Word has length 36 [2022-04-07 23:04:40,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:04:40,411 INFO L478 AbstractCegarLoop]: Abstraction has 439 states and 628 transitions. [2022-04-07 23:04:40,411 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.9166666666666667) internal successors, (46), 23 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:40,411 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 628 transitions. [2022-04-07 23:04:40,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-07 23:04:40,411 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:04:40,411 INFO L499 BasicCegarLoop]: trace histogram [7, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:04:40,427 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-04-07 23:04:40,627 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:40,627 INFO L403 AbstractCegarLoop]: === Iteration 31 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:04:40,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:04:40,627 INFO L85 PathProgramCache]: Analyzing trace with hash -1386409575, now seen corresponding path program 14 times [2022-04-07 23:04:40,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:04:40,628 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125598132] [2022-04-07 23:04:40,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:04:40,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:04:40,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:40,745 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:04:40,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:40,749 INFO L290 TraceCheckUtils]: 0: Hoare triple {48938#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {48927#true} is VALID [2022-04-07 23:04:40,749 INFO L290 TraceCheckUtils]: 1: Hoare triple {48927#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:40,749 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {48927#true} {48927#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L272 TraceCheckUtils]: 0: Hoare triple {48927#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48938#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:04:40,750 INFO L290 TraceCheckUtils]: 1: Hoare triple {48938#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L290 TraceCheckUtils]: 2: Hoare triple {48927#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48927#true} {48927#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L272 TraceCheckUtils]: 4: Hoare triple {48927#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L290 TraceCheckUtils]: 5: Hoare triple {48927#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L290 TraceCheckUtils]: 6: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L290 TraceCheckUtils]: 7: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L290 TraceCheckUtils]: 8: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L290 TraceCheckUtils]: 9: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:40,750 INFO L290 TraceCheckUtils]: 10: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:40,751 INFO L290 TraceCheckUtils]: 11: Hoare triple {48927#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:40,751 INFO L290 TraceCheckUtils]: 12: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:40,752 INFO L290 TraceCheckUtils]: 13: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:04:40,752 INFO L290 TraceCheckUtils]: 14: Hoare triple {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:40,753 INFO L290 TraceCheckUtils]: 15: Hoare triple {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:40,754 INFO L290 TraceCheckUtils]: 16: Hoare triple {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:40,755 INFO L290 TraceCheckUtils]: 17: Hoare triple {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:40,755 INFO L290 TraceCheckUtils]: 18: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:40,755 INFO L290 TraceCheckUtils]: 19: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:40,756 INFO L290 TraceCheckUtils]: 20: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:40,756 INFO L290 TraceCheckUtils]: 21: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:40,756 INFO L290 TraceCheckUtils]: 22: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:40,757 INFO L290 TraceCheckUtils]: 23: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:40,757 INFO L290 TraceCheckUtils]: 24: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:40,758 INFO L290 TraceCheckUtils]: 25: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:40,759 INFO L290 TraceCheckUtils]: 26: Hoare triple {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:40,759 INFO L290 TraceCheckUtils]: 27: Hoare triple {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:40,760 INFO L290 TraceCheckUtils]: 28: Hoare triple {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:04:40,761 INFO L290 TraceCheckUtils]: 29: Hoare triple {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:40,761 INFO L290 TraceCheckUtils]: 30: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48928#false} is VALID [2022-04-07 23:04:40,761 INFO L290 TraceCheckUtils]: 31: Hoare triple {48928#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48928#false} is VALID [2022-04-07 23:04:40,762 INFO L290 TraceCheckUtils]: 32: Hoare triple {48928#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:40,762 INFO L272 TraceCheckUtils]: 33: Hoare triple {48928#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {48928#false} is VALID [2022-04-07 23:04:40,762 INFO L290 TraceCheckUtils]: 34: Hoare triple {48928#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {48928#false} is VALID [2022-04-07 23:04:40,762 INFO L290 TraceCheckUtils]: 35: Hoare triple {48928#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:40,762 INFO L290 TraceCheckUtils]: 36: Hoare triple {48928#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:40,762 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 12 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-04-07 23:04:40,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:04:40,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125598132] [2022-04-07 23:04:40,762 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2125598132] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:04:40,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [537781278] [2022-04-07 23:04:40,762 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 23:04:40,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:40,762 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:04:40,764 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:04:40,764 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-04-07 23:04:40,805 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 23:04:40,805 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:04:40,805 INFO L263 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-07 23:04:40,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:40,817 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:04:41,036 INFO L272 TraceCheckUtils]: 0: Hoare triple {48927#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L290 TraceCheckUtils]: 1: Hoare triple {48927#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L290 TraceCheckUtils]: 2: Hoare triple {48927#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48927#true} {48927#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L272 TraceCheckUtils]: 4: Hoare triple {48927#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L290 TraceCheckUtils]: 5: Hoare triple {48927#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L290 TraceCheckUtils]: 6: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L290 TraceCheckUtils]: 7: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L290 TraceCheckUtils]: 8: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,036 INFO L290 TraceCheckUtils]: 9: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,037 INFO L290 TraceCheckUtils]: 10: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,042 INFO L290 TraceCheckUtils]: 11: Hoare triple {48927#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:41,042 INFO L290 TraceCheckUtils]: 12: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:41,043 INFO L290 TraceCheckUtils]: 13: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:04:41,043 INFO L290 TraceCheckUtils]: 14: Hoare triple {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,044 INFO L290 TraceCheckUtils]: 15: Hoare triple {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,045 INFO L290 TraceCheckUtils]: 16: Hoare triple {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,045 INFO L290 TraceCheckUtils]: 17: Hoare triple {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,046 INFO L290 TraceCheckUtils]: 18: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,046 INFO L290 TraceCheckUtils]: 19: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,047 INFO L290 TraceCheckUtils]: 20: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,047 INFO L290 TraceCheckUtils]: 21: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,047 INFO L290 TraceCheckUtils]: 22: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,048 INFO L290 TraceCheckUtils]: 23: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,048 INFO L290 TraceCheckUtils]: 24: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,049 INFO L290 TraceCheckUtils]: 25: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,049 INFO L290 TraceCheckUtils]: 26: Hoare triple {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,050 INFO L290 TraceCheckUtils]: 27: Hoare triple {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,051 INFO L290 TraceCheckUtils]: 28: Hoare triple {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:04:41,052 INFO L290 TraceCheckUtils]: 29: Hoare triple {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:41,052 INFO L290 TraceCheckUtils]: 30: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48928#false} is VALID [2022-04-07 23:04:41,052 INFO L290 TraceCheckUtils]: 31: Hoare triple {48928#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48928#false} is VALID [2022-04-07 23:04:41,052 INFO L290 TraceCheckUtils]: 32: Hoare triple {48928#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:41,052 INFO L272 TraceCheckUtils]: 33: Hoare triple {48928#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {48928#false} is VALID [2022-04-07 23:04:41,052 INFO L290 TraceCheckUtils]: 34: Hoare triple {48928#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {48928#false} is VALID [2022-04-07 23:04:41,052 INFO L290 TraceCheckUtils]: 35: Hoare triple {48928#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:41,052 INFO L290 TraceCheckUtils]: 36: Hoare triple {48928#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:41,053 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 12 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-04-07 23:04:41,053 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:04:41,278 INFO L290 TraceCheckUtils]: 36: Hoare triple {48928#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:41,278 INFO L290 TraceCheckUtils]: 35: Hoare triple {48928#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:41,278 INFO L290 TraceCheckUtils]: 34: Hoare triple {48928#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {48928#false} is VALID [2022-04-07 23:04:41,278 INFO L272 TraceCheckUtils]: 33: Hoare triple {48928#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {48928#false} is VALID [2022-04-07 23:04:41,278 INFO L290 TraceCheckUtils]: 32: Hoare triple {48928#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {48928#false} is VALID [2022-04-07 23:04:41,278 INFO L290 TraceCheckUtils]: 31: Hoare triple {48928#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48928#false} is VALID [2022-04-07 23:04:41,279 INFO L290 TraceCheckUtils]: 30: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48928#false} is VALID [2022-04-07 23:04:41,279 INFO L290 TraceCheckUtils]: 29: Hoare triple {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:41,280 INFO L290 TraceCheckUtils]: 28: Hoare triple {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:04:41,281 INFO L290 TraceCheckUtils]: 27: Hoare triple {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,281 INFO L290 TraceCheckUtils]: 26: Hoare triple {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,282 INFO L290 TraceCheckUtils]: 25: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,282 INFO L290 TraceCheckUtils]: 24: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,283 INFO L290 TraceCheckUtils]: 23: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,283 INFO L290 TraceCheckUtils]: 22: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,284 INFO L290 TraceCheckUtils]: 21: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,284 INFO L290 TraceCheckUtils]: 20: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,284 INFO L290 TraceCheckUtils]: 19: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,285 INFO L290 TraceCheckUtils]: 18: Hoare triple {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,285 INFO L290 TraceCheckUtils]: 17: Hoare triple {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48937#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-07 23:04:41,286 INFO L290 TraceCheckUtils]: 16: Hoare triple {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48936#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,287 INFO L290 TraceCheckUtils]: 15: Hoare triple {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48935#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,287 INFO L290 TraceCheckUtils]: 14: Hoare triple {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48934#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:04:41,288 INFO L290 TraceCheckUtils]: 13: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {48933#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:04:41,288 INFO L290 TraceCheckUtils]: 12: Hoare triple {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 11: Hoare triple {48927#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {48932#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 10: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 9: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 8: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 7: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 6: Hoare triple {48927#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 5: Hoare triple {48927#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L272 TraceCheckUtils]: 4: Hoare triple {48927#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {48927#true} {48927#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 2: Hoare triple {48927#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L290 TraceCheckUtils]: 1: Hoare triple {48927#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L272 TraceCheckUtils]: 0: Hoare triple {48927#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {48927#true} is VALID [2022-04-07 23:04:41,289 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 12 proven. 30 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-04-07 23:04:41,290 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [537781278] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:04:41,290 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:04:41,290 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 9 [2022-04-07 23:04:41,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1542192643] [2022-04-07 23:04:41,290 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:04:41,290 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-07 23:04:41,290 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:04:41,290 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:41,312 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:41,312 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-07 23:04:41,312 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:04:41,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-07 23:04:41,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2022-04-07 23:04:41,313 INFO L87 Difference]: Start difference. First operand 439 states and 628 transitions. Second operand has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:43,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:43,148 INFO L93 Difference]: Finished difference Result 461 states and 652 transitions. [2022-04-07 23:04:43,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 23:04:43,148 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-07 23:04:43,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:04:43,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:43,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 56 transitions. [2022-04-07 23:04:43,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:43,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 56 transitions. [2022-04-07 23:04:43,149 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 56 transitions. [2022-04-07 23:04:43,195 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:43,202 INFO L225 Difference]: With dead ends: 461 [2022-04-07 23:04:43,202 INFO L226 Difference]: Without dead ends: 434 [2022-04-07 23:04:43,202 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2022-04-07 23:04:43,203 INFO L913 BasicCegarLoop]: 31 mSDtfsCounter, 35 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 211 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 211 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 23:04:43,203 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 63 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 211 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 23:04:43,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2022-04-07 23:04:44,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 425. [2022-04-07 23:04:44,513 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:04:44,514 INFO L82 GeneralOperation]: Start isEquivalent. First operand 434 states. Second operand has 425 states, 420 states have (on average 1.45) internal successors, (609), 420 states have internal predecessors, (609), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:44,514 INFO L74 IsIncluded]: Start isIncluded. First operand 434 states. Second operand has 425 states, 420 states have (on average 1.45) internal successors, (609), 420 states have internal predecessors, (609), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:44,514 INFO L87 Difference]: Start difference. First operand 434 states. Second operand has 425 states, 420 states have (on average 1.45) internal successors, (609), 420 states have internal predecessors, (609), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:44,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:44,520 INFO L93 Difference]: Finished difference Result 434 states and 622 transitions. [2022-04-07 23:04:44,520 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 622 transitions. [2022-04-07 23:04:44,521 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:44,521 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:44,521 INFO L74 IsIncluded]: Start isIncluded. First operand has 425 states, 420 states have (on average 1.45) internal successors, (609), 420 states have internal predecessors, (609), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 434 states. [2022-04-07 23:04:44,521 INFO L87 Difference]: Start difference. First operand has 425 states, 420 states have (on average 1.45) internal successors, (609), 420 states have internal predecessors, (609), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 434 states. [2022-04-07 23:04:44,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:44,527 INFO L93 Difference]: Finished difference Result 434 states and 622 transitions. [2022-04-07 23:04:44,527 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 622 transitions. [2022-04-07 23:04:44,528 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:44,528 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:44,528 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:04:44,528 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:04:44,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 425 states, 420 states have (on average 1.45) internal successors, (609), 420 states have internal predecessors, (609), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:44,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 613 transitions. [2022-04-07 23:04:44,535 INFO L78 Accepts]: Start accepts. Automaton has 425 states and 613 transitions. Word has length 37 [2022-04-07 23:04:44,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:04:44,535 INFO L478 AbstractCegarLoop]: Abstraction has 425 states and 613 transitions. [2022-04-07 23:04:44,535 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.888888888888889) internal successors, (26), 8 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:44,535 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states and 613 transitions. [2022-04-07 23:04:44,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-07 23:04:44,535 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:04:44,535 INFO L499 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:04:44,552 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2022-04-07 23:04:44,739 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,28 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:44,739 INFO L403 AbstractCegarLoop]: === Iteration 32 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:04:44,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:04:44,740 INFO L85 PathProgramCache]: Analyzing trace with hash 1667667075, now seen corresponding path program 15 times [2022-04-07 23:04:44,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:04:44,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1583706241] [2022-04-07 23:04:44,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:04:44,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:04:44,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:44,919 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:04:44,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:44,922 INFO L290 TraceCheckUtils]: 0: Hoare triple {51280#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51262#true} is VALID [2022-04-07 23:04:44,922 INFO L290 TraceCheckUtils]: 1: Hoare triple {51262#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:44,922 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {51262#true} {51262#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:44,922 INFO L272 TraceCheckUtils]: 0: Hoare triple {51262#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51280#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:04:44,922 INFO L290 TraceCheckUtils]: 1: Hoare triple {51280#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51262#true} is VALID [2022-04-07 23:04:44,922 INFO L290 TraceCheckUtils]: 2: Hoare triple {51262#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:44,922 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51262#true} {51262#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:44,922 INFO L272 TraceCheckUtils]: 4: Hoare triple {51262#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:44,923 INFO L290 TraceCheckUtils]: 5: Hoare triple {51262#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {51267#(= main_~y~0 0)} is VALID [2022-04-07 23:04:44,923 INFO L290 TraceCheckUtils]: 6: Hoare triple {51267#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:04:44,923 INFO L290 TraceCheckUtils]: 7: Hoare triple {51268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:04:44,924 INFO L290 TraceCheckUtils]: 8: Hoare triple {51269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:04:44,924 INFO L290 TraceCheckUtils]: 9: Hoare triple {51270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:04:44,925 INFO L290 TraceCheckUtils]: 10: Hoare triple {51271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51272#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:04:44,925 INFO L290 TraceCheckUtils]: 11: Hoare triple {51272#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51273#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:44,926 INFO L290 TraceCheckUtils]: 12: Hoare triple {51273#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51274#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:44,926 INFO L290 TraceCheckUtils]: 13: Hoare triple {51274#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {51274#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:44,927 INFO L290 TraceCheckUtils]: 14: Hoare triple {51274#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {51275#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:04:44,927 INFO L290 TraceCheckUtils]: 15: Hoare triple {51275#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51276#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:04:44,928 INFO L290 TraceCheckUtils]: 16: Hoare triple {51276#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51277#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:04:44,928 INFO L290 TraceCheckUtils]: 17: Hoare triple {51277#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51278#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 18: Hoare triple {51278#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51279#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 19: Hoare triple {51279#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 20: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 21: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 22: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 23: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 24: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 25: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 26: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 27: Hoare triple {51263#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:44,929 INFO L290 TraceCheckUtils]: 28: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L290 TraceCheckUtils]: 29: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L290 TraceCheckUtils]: 30: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L290 TraceCheckUtils]: 31: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L290 TraceCheckUtils]: 32: Hoare triple {51263#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L272 TraceCheckUtils]: 33: Hoare triple {51263#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L290 TraceCheckUtils]: 34: Hoare triple {51263#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L290 TraceCheckUtils]: 35: Hoare triple {51263#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L290 TraceCheckUtils]: 36: Hoare triple {51263#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:44,930 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-04-07 23:04:44,930 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:04:44,930 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1583706241] [2022-04-07 23:04:44,930 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1583706241] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:04:44,930 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [84702180] [2022-04-07 23:04:44,930 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:04:44,930 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:44,931 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:04:44,931 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:04:44,933 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-04-07 23:04:45,108 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-07 23:04:45,109 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:04:45,110 INFO L263 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-07 23:04:45,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:45,118 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:04:45,328 INFO L272 TraceCheckUtils]: 0: Hoare triple {51262#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,328 INFO L290 TraceCheckUtils]: 1: Hoare triple {51262#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51262#true} is VALID [2022-04-07 23:04:45,329 INFO L290 TraceCheckUtils]: 2: Hoare triple {51262#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,329 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51262#true} {51262#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,329 INFO L272 TraceCheckUtils]: 4: Hoare triple {51262#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,329 INFO L290 TraceCheckUtils]: 5: Hoare triple {51262#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {51267#(= main_~y~0 0)} is VALID [2022-04-07 23:04:45,329 INFO L290 TraceCheckUtils]: 6: Hoare triple {51267#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:04:45,330 INFO L290 TraceCheckUtils]: 7: Hoare triple {51268#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:04:45,330 INFO L290 TraceCheckUtils]: 8: Hoare triple {51269#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:04:45,331 INFO L290 TraceCheckUtils]: 9: Hoare triple {51270#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:04:45,331 INFO L290 TraceCheckUtils]: 10: Hoare triple {51271#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51272#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:04:45,332 INFO L290 TraceCheckUtils]: 11: Hoare triple {51272#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51273#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:45,332 INFO L290 TraceCheckUtils]: 12: Hoare triple {51273#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51274#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:45,333 INFO L290 TraceCheckUtils]: 13: Hoare triple {51274#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {51274#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:45,333 INFO L290 TraceCheckUtils]: 14: Hoare triple {51274#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {51326#(and (= main_~z~0 main_~y~0) (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:45,333 INFO L290 TraceCheckUtils]: 15: Hoare triple {51326#(and (= main_~z~0 main_~y~0) (<= 7 main_~y~0) (<= main_~y~0 7))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51330#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:04:45,334 INFO L290 TraceCheckUtils]: 16: Hoare triple {51330#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51334#(and (= main_~y~0 (+ main_~z~0 2)) (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:45,335 INFO L290 TraceCheckUtils]: 17: Hoare triple {51334#(and (= main_~y~0 (+ main_~z~0 2)) (<= 7 main_~y~0) (<= main_~y~0 7))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51338#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:45,335 INFO L290 TraceCheckUtils]: 18: Hoare triple {51338#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 7 main_~y~0) (<= main_~y~0 7))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51342#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)))} is VALID [2022-04-07 23:04:45,336 INFO L290 TraceCheckUtils]: 19: Hoare triple {51342#(and (<= 7 main_~y~0) (<= main_~y~0 7) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,336 INFO L290 TraceCheckUtils]: 20: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,336 INFO L290 TraceCheckUtils]: 21: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,336 INFO L290 TraceCheckUtils]: 22: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,336 INFO L290 TraceCheckUtils]: 23: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,336 INFO L290 TraceCheckUtils]: 24: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,336 INFO L290 TraceCheckUtils]: 25: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 26: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 27: Hoare triple {51263#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 28: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 29: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 30: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 31: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 32: Hoare triple {51263#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L272 TraceCheckUtils]: 33: Hoare triple {51263#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 34: Hoare triple {51263#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 35: Hoare triple {51263#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L290 TraceCheckUtils]: 36: Hoare triple {51263#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,337 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-04-07 23:04:45,337 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:04:45,630 INFO L290 TraceCheckUtils]: 36: Hoare triple {51263#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,630 INFO L290 TraceCheckUtils]: 35: Hoare triple {51263#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,630 INFO L290 TraceCheckUtils]: 34: Hoare triple {51263#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L272 TraceCheckUtils]: 33: Hoare triple {51263#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L290 TraceCheckUtils]: 32: Hoare triple {51263#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L290 TraceCheckUtils]: 31: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L290 TraceCheckUtils]: 30: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L290 TraceCheckUtils]: 29: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L290 TraceCheckUtils]: 28: Hoare triple {51263#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L290 TraceCheckUtils]: 27: Hoare triple {51263#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L290 TraceCheckUtils]: 26: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,631 INFO L290 TraceCheckUtils]: 25: Hoare triple {51263#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,639 INFO L290 TraceCheckUtils]: 24: Hoare triple {51433#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51263#false} is VALID [2022-04-07 23:04:45,640 INFO L290 TraceCheckUtils]: 23: Hoare triple {51437#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51433#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:04:45,641 INFO L290 TraceCheckUtils]: 22: Hoare triple {51441#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51437#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:04:45,641 INFO L290 TraceCheckUtils]: 21: Hoare triple {51445#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51441#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:04:45,642 INFO L290 TraceCheckUtils]: 20: Hoare triple {51449#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {51445#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:04:45,642 INFO L290 TraceCheckUtils]: 19: Hoare triple {51453#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {51449#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-07 23:04:45,643 INFO L290 TraceCheckUtils]: 18: Hoare triple {51457#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51453#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:04:45,644 INFO L290 TraceCheckUtils]: 17: Hoare triple {51461#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51457#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:04:45,645 INFO L290 TraceCheckUtils]: 16: Hoare triple {51465#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51461#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 15: Hoare triple {51469#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {51465#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 14: Hoare triple {51262#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {51469#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 13: Hoare triple {51262#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 12: Hoare triple {51262#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51262#true} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 11: Hoare triple {51262#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51262#true} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 10: Hoare triple {51262#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51262#true} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 9: Hoare triple {51262#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51262#true} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 8: Hoare triple {51262#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51262#true} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 7: Hoare triple {51262#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51262#true} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 6: Hoare triple {51262#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {51262#true} is VALID [2022-04-07 23:04:45,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {51262#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {51262#true} is VALID [2022-04-07 23:04:45,647 INFO L272 TraceCheckUtils]: 4: Hoare triple {51262#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,647 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51262#true} {51262#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,647 INFO L290 TraceCheckUtils]: 2: Hoare triple {51262#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,647 INFO L290 TraceCheckUtils]: 1: Hoare triple {51262#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51262#true} is VALID [2022-04-07 23:04:45,647 INFO L272 TraceCheckUtils]: 0: Hoare triple {51262#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51262#true} is VALID [2022-04-07 23:04:45,647 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 15 proven. 20 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2022-04-07 23:04:45,647 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [84702180] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:04:45,647 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:04:45,647 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 12] total 31 [2022-04-07 23:04:45,647 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1995995700] [2022-04-07 23:04:45,647 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:04:45,648 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.4516129032258065) internal successors, (45), 30 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-07 23:04:45,648 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:04:45,648 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 1.4516129032258065) internal successors, (45), 30 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:45,680 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:45,680 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-07 23:04:45,680 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:04:45,681 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-07 23:04:45,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=793, Unknown=0, NotChecked=0, Total=930 [2022-04-07 23:04:45,681 INFO L87 Difference]: Start difference. First operand 425 states and 613 transitions. Second operand has 31 states, 31 states have (on average 1.4516129032258065) internal successors, (45), 30 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:50,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:50,678 INFO L93 Difference]: Finished difference Result 602 states and 814 transitions. [2022-04-07 23:04:50,678 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-04-07 23:04:50,678 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.4516129032258065) internal successors, (45), 30 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-07 23:04:50,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:04:50,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.4516129032258065) internal successors, (45), 30 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:50,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 111 transitions. [2022-04-07 23:04:50,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.4516129032258065) internal successors, (45), 30 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:50,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 111 transitions. [2022-04-07 23:04:50,680 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 48 states and 111 transitions. [2022-04-07 23:04:50,791 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:50,800 INFO L225 Difference]: With dead ends: 602 [2022-04-07 23:04:50,800 INFO L226 Difference]: Without dead ends: 499 [2022-04-07 23:04:50,801 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 67 SyntacticMatches, 1 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1257 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=638, Invalid=5062, Unknown=0, NotChecked=0, Total=5700 [2022-04-07 23:04:50,801 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 49 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 948 mSolverCounterSat, 121 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 120 SdHoareTripleChecker+Invalid, 1069 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 121 IncrementalHoareTripleChecker+Valid, 948 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-07 23:04:50,801 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [49 Valid, 120 Invalid, 1069 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [121 Valid, 948 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-07 23:04:50,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2022-04-07 23:04:52,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 402. [2022-04-07 23:04:52,155 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:04:52,155 INFO L82 GeneralOperation]: Start isEquivalent. First operand 499 states. Second operand has 402 states, 397 states have (on average 1.4256926952141058) internal successors, (566), 397 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:52,155 INFO L74 IsIncluded]: Start isIncluded. First operand 499 states. Second operand has 402 states, 397 states have (on average 1.4256926952141058) internal successors, (566), 397 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:52,156 INFO L87 Difference]: Start difference. First operand 499 states. Second operand has 402 states, 397 states have (on average 1.4256926952141058) internal successors, (566), 397 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:52,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:52,163 INFO L93 Difference]: Finished difference Result 499 states and 680 transitions. [2022-04-07 23:04:52,163 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 680 transitions. [2022-04-07 23:04:52,163 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:52,163 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:52,164 INFO L74 IsIncluded]: Start isIncluded. First operand has 402 states, 397 states have (on average 1.4256926952141058) internal successors, (566), 397 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 499 states. [2022-04-07 23:04:52,164 INFO L87 Difference]: Start difference. First operand has 402 states, 397 states have (on average 1.4256926952141058) internal successors, (566), 397 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 499 states. [2022-04-07 23:04:52,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:52,171 INFO L93 Difference]: Finished difference Result 499 states and 680 transitions. [2022-04-07 23:04:52,171 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 680 transitions. [2022-04-07 23:04:52,172 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:52,172 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:52,172 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:04:52,172 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:04:52,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 402 states, 397 states have (on average 1.4256926952141058) internal successors, (566), 397 states have internal predecessors, (566), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:52,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 402 states to 402 states and 570 transitions. [2022-04-07 23:04:52,178 INFO L78 Accepts]: Start accepts. Automaton has 402 states and 570 transitions. Word has length 37 [2022-04-07 23:04:52,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:04:52,178 INFO L478 AbstractCegarLoop]: Abstraction has 402 states and 570 transitions. [2022-04-07 23:04:52,178 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 1.4516129032258065) internal successors, (45), 30 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:52,178 INFO L276 IsEmpty]: Start isEmpty. Operand 402 states and 570 transitions. [2022-04-07 23:04:52,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-07 23:04:52,179 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:04:52,179 INFO L499 BasicCegarLoop]: trace histogram [14, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:04:52,184 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Ended with exit code 0 [2022-04-07 23:04:52,382 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,29 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:52,383 INFO L403 AbstractCegarLoop]: === Iteration 33 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:04:52,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:04:52,383 INFO L85 PathProgramCache]: Analyzing trace with hash 1659493984, now seen corresponding path program 16 times [2022-04-07 23:04:52,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:04:52,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410028865] [2022-04-07 23:04:52,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:04:52,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:04:52,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:52,659 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:04:52,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:52,662 INFO L290 TraceCheckUtils]: 0: Hoare triple {53974#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {53950#true} is VALID [2022-04-07 23:04:52,662 INFO L290 TraceCheckUtils]: 1: Hoare triple {53950#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,662 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {53950#true} {53950#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,662 INFO L272 TraceCheckUtils]: 0: Hoare triple {53950#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53974#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:04:52,662 INFO L290 TraceCheckUtils]: 1: Hoare triple {53974#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {53950#true} is VALID [2022-04-07 23:04:52,662 INFO L290 TraceCheckUtils]: 2: Hoare triple {53950#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,663 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53950#true} {53950#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,663 INFO L272 TraceCheckUtils]: 4: Hoare triple {53950#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,663 INFO L290 TraceCheckUtils]: 5: Hoare triple {53950#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {53955#(= main_~y~0 0)} is VALID [2022-04-07 23:04:52,663 INFO L290 TraceCheckUtils]: 6: Hoare triple {53955#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53956#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:04:52,664 INFO L290 TraceCheckUtils]: 7: Hoare triple {53956#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53957#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:04:52,664 INFO L290 TraceCheckUtils]: 8: Hoare triple {53957#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53958#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:04:52,665 INFO L290 TraceCheckUtils]: 9: Hoare triple {53958#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53959#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:04:52,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {53959#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53960#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:04:52,666 INFO L290 TraceCheckUtils]: 11: Hoare triple {53960#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53961#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:52,666 INFO L290 TraceCheckUtils]: 12: Hoare triple {53961#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53962#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:52,667 INFO L290 TraceCheckUtils]: 13: Hoare triple {53962#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53963#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:04:52,667 INFO L290 TraceCheckUtils]: 14: Hoare triple {53963#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53964#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:04:52,668 INFO L290 TraceCheckUtils]: 15: Hoare triple {53964#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53965#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:04:52,668 INFO L290 TraceCheckUtils]: 16: Hoare triple {53965#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53966#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:04:52,669 INFO L290 TraceCheckUtils]: 17: Hoare triple {53966#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53967#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:04:52,669 INFO L290 TraceCheckUtils]: 18: Hoare triple {53967#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53968#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:04:52,670 INFO L290 TraceCheckUtils]: 19: Hoare triple {53968#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53969#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:04:52,670 INFO L290 TraceCheckUtils]: 20: Hoare triple {53969#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {53969#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:04:52,670 INFO L290 TraceCheckUtils]: 21: Hoare triple {53969#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {53970#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 23:04:52,671 INFO L290 TraceCheckUtils]: 22: Hoare triple {53970#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {53971#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 23:04:52,671 INFO L290 TraceCheckUtils]: 23: Hoare triple {53971#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {53972#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-07 23:04:52,672 INFO L290 TraceCheckUtils]: 24: Hoare triple {53972#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {53973#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} is VALID [2022-04-07 23:04:52,672 INFO L290 TraceCheckUtils]: 25: Hoare triple {53973#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,672 INFO L290 TraceCheckUtils]: 26: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:52,672 INFO L290 TraceCheckUtils]: 27: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:52,672 INFO L290 TraceCheckUtils]: 28: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:52,672 INFO L290 TraceCheckUtils]: 29: Hoare triple {53951#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,672 INFO L290 TraceCheckUtils]: 30: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:52,672 INFO L290 TraceCheckUtils]: 31: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:52,673 INFO L290 TraceCheckUtils]: 32: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:52,673 INFO L290 TraceCheckUtils]: 33: Hoare triple {53951#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,673 INFO L272 TraceCheckUtils]: 34: Hoare triple {53951#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {53951#false} is VALID [2022-04-07 23:04:52,673 INFO L290 TraceCheckUtils]: 35: Hoare triple {53951#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {53951#false} is VALID [2022-04-07 23:04:52,673 INFO L290 TraceCheckUtils]: 36: Hoare triple {53951#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,673 INFO L290 TraceCheckUtils]: 37: Hoare triple {53951#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,673 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 23:04:52,673 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:04:52,673 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410028865] [2022-04-07 23:04:52,673 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [410028865] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:04:52,673 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [667391747] [2022-04-07 23:04:52,673 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:04:52,673 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:52,673 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:04:52,674 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:04:52,675 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-04-07 23:04:52,714 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:04:52,714 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:04:52,715 INFO L263 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-07 23:04:52,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:52,722 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:04:52,978 INFO L272 TraceCheckUtils]: 0: Hoare triple {53950#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,979 INFO L290 TraceCheckUtils]: 1: Hoare triple {53950#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {53950#true} is VALID [2022-04-07 23:04:52,979 INFO L290 TraceCheckUtils]: 2: Hoare triple {53950#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,979 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53950#true} {53950#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,979 INFO L272 TraceCheckUtils]: 4: Hoare triple {53950#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:52,979 INFO L290 TraceCheckUtils]: 5: Hoare triple {53950#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {53955#(= main_~y~0 0)} is VALID [2022-04-07 23:04:52,980 INFO L290 TraceCheckUtils]: 6: Hoare triple {53955#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53956#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:04:52,980 INFO L290 TraceCheckUtils]: 7: Hoare triple {53956#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53957#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:04:52,981 INFO L290 TraceCheckUtils]: 8: Hoare triple {53957#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53958#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:04:52,981 INFO L290 TraceCheckUtils]: 9: Hoare triple {53958#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53959#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:04:52,982 INFO L290 TraceCheckUtils]: 10: Hoare triple {53959#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53960#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:04:52,982 INFO L290 TraceCheckUtils]: 11: Hoare triple {53960#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53961#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:52,983 INFO L290 TraceCheckUtils]: 12: Hoare triple {53961#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53962#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:52,983 INFO L290 TraceCheckUtils]: 13: Hoare triple {53962#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53963#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:04:52,984 INFO L290 TraceCheckUtils]: 14: Hoare triple {53963#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53964#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:04:52,984 INFO L290 TraceCheckUtils]: 15: Hoare triple {53964#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53965#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:04:52,985 INFO L290 TraceCheckUtils]: 16: Hoare triple {53965#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53966#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:04:52,985 INFO L290 TraceCheckUtils]: 17: Hoare triple {53966#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53967#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-07 23:04:52,986 INFO L290 TraceCheckUtils]: 18: Hoare triple {53967#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53968#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-07 23:04:52,986 INFO L290 TraceCheckUtils]: 19: Hoare triple {53968#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {53969#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:04:52,986 INFO L290 TraceCheckUtils]: 20: Hoare triple {53969#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {53969#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-07 23:04:52,987 INFO L290 TraceCheckUtils]: 21: Hoare triple {53969#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {53970#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-07 23:04:52,987 INFO L290 TraceCheckUtils]: 22: Hoare triple {53970#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {53971#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-07 23:04:52,988 INFO L290 TraceCheckUtils]: 23: Hoare triple {53971#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {53972#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-07 23:04:52,988 INFO L290 TraceCheckUtils]: 24: Hoare triple {53972#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {54050#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 25: Hoare triple {54050#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 26: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 27: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 28: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 29: Hoare triple {53951#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 30: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 31: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 32: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 33: Hoare triple {53951#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L272 TraceCheckUtils]: 34: Hoare triple {53951#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 35: Hoare triple {53951#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 36: Hoare triple {53951#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,989 INFO L290 TraceCheckUtils]: 37: Hoare triple {53951#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:52,990 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 23:04:52,990 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:04:53,561 INFO L290 TraceCheckUtils]: 37: Hoare triple {53951#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:53,561 INFO L290 TraceCheckUtils]: 36: Hoare triple {53951#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 35: Hoare triple {53951#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L272 TraceCheckUtils]: 34: Hoare triple {53951#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod (* v_main_~n~0_3 2) 4294967296) (mod v_main_~z~0_11 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 33: Hoare triple {53951#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 32: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 31: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 30: Hoare triple {53951#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~z~0_4 (+ v_main_~z~0_5 1)) (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_7, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post11, main_#t~post12] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 29: Hoare triple {53951#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 28: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 27: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 26: Hoare triple {53951#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {53951#false} is VALID [2022-04-07 23:04:53,562 INFO L290 TraceCheckUtils]: 25: Hoare triple {54126#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~z~0=v_main_~z~0_8} OutVars{main_~z~0=v_main_~z~0_8} AuxVars[] AssignedVars[] {53951#false} is VALID [2022-04-07 23:04:53,563 INFO L290 TraceCheckUtils]: 24: Hoare triple {54130#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {54126#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 23:04:53,564 INFO L290 TraceCheckUtils]: 23: Hoare triple {54134#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {54130#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 23:04:53,564 INFO L290 TraceCheckUtils]: 22: Hoare triple {54138#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_9, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {54134#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-07 23:04:53,565 INFO L290 TraceCheckUtils]: 21: Hoare triple {54142#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_6) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[main_~z~0] {54138#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-07 23:04:53,565 INFO L290 TraceCheckUtils]: 20: Hoare triple {54142#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {54142#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:04:53,566 INFO L290 TraceCheckUtils]: 19: Hoare triple {54149#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54142#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:04:53,566 INFO L290 TraceCheckUtils]: 18: Hoare triple {54153#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54149#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:04:53,567 INFO L290 TraceCheckUtils]: 17: Hoare triple {54157#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54153#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:04:53,568 INFO L290 TraceCheckUtils]: 16: Hoare triple {54161#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54157#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:04:53,568 INFO L290 TraceCheckUtils]: 15: Hoare triple {54165#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54161#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:04:53,569 INFO L290 TraceCheckUtils]: 14: Hoare triple {54169#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54165#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:04:53,570 INFO L290 TraceCheckUtils]: 13: Hoare triple {54173#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54169#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:04:53,570 INFO L290 TraceCheckUtils]: 12: Hoare triple {54177#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54173#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:04:53,571 INFO L290 TraceCheckUtils]: 11: Hoare triple {54181#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54177#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:53,571 INFO L290 TraceCheckUtils]: 10: Hoare triple {54185#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54181#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 23:04:53,572 INFO L290 TraceCheckUtils]: 9: Hoare triple {54189#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54185#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:53,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {54193#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54189#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-07 23:04:53,573 INFO L290 TraceCheckUtils]: 7: Hoare triple {54197#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54193#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-07 23:04:53,574 INFO L290 TraceCheckUtils]: 6: Hoare triple {54201#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {54197#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-07 23:04:53,574 INFO L290 TraceCheckUtils]: 5: Hoare triple {53950#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {54201#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-07 23:04:53,574 INFO L272 TraceCheckUtils]: 4: Hoare triple {53950#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:53,574 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {53950#true} {53950#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:53,574 INFO L290 TraceCheckUtils]: 2: Hoare triple {53950#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:53,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {53950#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {53950#true} is VALID [2022-04-07 23:04:53,574 INFO L272 TraceCheckUtils]: 0: Hoare triple {53950#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {53950#true} is VALID [2022-04-07 23:04:53,574 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 23:04:53,575 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [667391747] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:04:53,575 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:04:53,575 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-07 23:04:53,575 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831401979] [2022-04-07 23:04:53,575 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:04:53,575 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-07 23:04:53,575 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:04:53,575 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:53,611 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:53,611 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-07 23:04:53,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:04:53,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-07 23:04:53,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=326, Invalid=1396, Unknown=0, NotChecked=0, Total=1722 [2022-04-07 23:04:53,612 INFO L87 Difference]: Start difference. First operand 402 states and 570 transitions. Second operand has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:05:22,297 WARN L232 SmtUtils]: Spent 7.21s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:05:50,896 WARN L232 SmtUtils]: Spent 18.82s on a formula simplification that was a NOOP. DAG size: 80 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:06:15,894 WARN L232 SmtUtils]: Spent 10.80s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:06:35,786 WARN L232 SmtUtils]: Spent 13.00s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:07:01,851 WARN L232 SmtUtils]: Spent 16.98s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:07:18,210 WARN L232 SmtUtils]: Spent 9.13s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:07:31,941 WARN L232 SmtUtils]: Spent 7.54s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:07:45,278 WARN L232 SmtUtils]: Spent 5.48s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:08:02,589 WARN L232 SmtUtils]: Spent 6.67s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:08:14,733 WARN L232 SmtUtils]: Spent 6.38s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:08:25,860 WARN L232 SmtUtils]: Spent 6.01s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:08:39,133 WARN L232 SmtUtils]: Spent 5.29s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:08:49,336 WARN L232 SmtUtils]: Spent 5.17s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:09:00,225 WARN L232 SmtUtils]: Spent 7.25s on a formula simplification that was a NOOP. DAG size: 65 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:09:27,721 WARN L232 SmtUtils]: Spent 13.19s on a formula simplification that was a NOOP. DAG size: 78 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:09:36,686 WARN L232 SmtUtils]: Spent 6.09s on a formula simplification that was a NOOP. DAG size: 63 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:09:57,480 WARN L232 SmtUtils]: Spent 6.06s on a formula simplification that was a NOOP. DAG size: 60 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:10:13,139 WARN L232 SmtUtils]: Spent 6.90s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-07 23:10:15,231 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~z~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 4294967294 c_main_~z~0) 4294967296)) (< 0 (mod c_main_~y~0 4294967296)) (< 0 (mod (+ 4294967294 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 4294967293) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~y~0) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967293 c_main_~z~0) 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296))) is different from false [2022-04-07 23:10:52,445 WARN L232 SmtUtils]: Spent 5.24s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)