/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de52.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 22:59:44,186 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 22:59:44,188 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 22:59:44,223 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-07 22:59:44,236 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 22:59:44,236 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 22:59:44,237 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 22:59:44,238 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 22:59:44,239 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 22:59:44,239 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 22:59:44,240 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 22:59:44,242 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 22:59:44,243 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 22:59:44,243 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 22:59:44,244 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 22:59:44,245 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 22:59:44,246 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 22:59:44,248 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 22:59:44,253 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 22:59:44,254 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 22:59:44,255 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 22:59:44,255 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-07 22:59:44,274 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 22:59:44,274 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 22:59:44,277 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-07 22:59:44,277 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-07 22:59:44,278 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-07 22:59:44,278 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-07 22:59:44,278 INFO L138 SettingsManager]: * Use SBE=true [2022-04-07 22:59:44,279 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 22:59:44,279 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 22:59:44,279 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 22:59:44,279 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 22:59:44,279 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 22:59:44,279 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 22:59:44,280 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 22:59:44,280 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 22:59:44,280 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 22:59:44,280 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 22:59:44,280 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 22:59:44,280 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 22:59:44,281 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:59:44,281 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 22:59:44,281 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-07 22:59:44,281 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-07 22:59:44,281 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 22:59:44,282 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-07 22:59:44,282 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-07 22:59:44,282 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-07 22:59:44,282 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-07 22:59:44,283 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 22:59:44,283 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 22:59:44,488 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 22:59:44,519 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 22:59:44,521 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 22:59:44,522 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 22:59:44,524 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 22:59:44,526 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de52.c [2022-04-07 22:59:44,572 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/81efd2b00/f5a013336e324cac8d2c65a0c1f5da8b/FLAG0b624dc57 [2022-04-07 22:59:44,877 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 22:59:44,878 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c [2022-04-07 22:59:44,882 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/81efd2b00/f5a013336e324cac8d2c65a0c1f5da8b/FLAG0b624dc57 [2022-04-07 22:59:45,310 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/81efd2b00/f5a013336e324cac8d2c65a0c1f5da8b [2022-04-07 22:59:45,312 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 22:59:45,314 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 22:59:45,315 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 22:59:45,315 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 22:59:45,317 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 22:59:45,318 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,319 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1e344374 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45, skipping insertion in model container [2022-04-07 22:59:45,319 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,325 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 22:59:45,334 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 22:59:45,515 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c[368,381] [2022-04-07 22:59:45,541 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:59:45,549 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 22:59:45,568 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c[368,381] [2022-04-07 22:59:45,583 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 22:59:45,593 INFO L208 MainTranslator]: Completed translation [2022-04-07 22:59:45,593 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45 WrapperNode [2022-04-07 22:59:45,593 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 22:59:45,594 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 22:59:45,594 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 22:59:45,594 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 22:59:45,603 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,603 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,608 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,608 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,615 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,620 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,621 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,622 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 22:59:45,623 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 22:59:45,623 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 22:59:45,623 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 22:59:45,624 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,629 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 22:59:45,640 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:45,650 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 22:59:45,672 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 22:59:45,688 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 22:59:45,688 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 22:59:45,688 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 22:59:45,689 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 22:59:45,689 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 22:59:45,689 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 22:59:45,689 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 22:59:45,690 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 22:59:45,691 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 22:59:45,692 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 22:59:45,744 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 22:59:45,745 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 22:59:45,921 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 22:59:45,927 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 22:59:45,928 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-04-07 22:59:45,935 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:59:45 BoogieIcfgContainer [2022-04-07 22:59:45,935 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 22:59:45,936 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 22:59:45,936 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 22:59:45,939 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 22:59:45,945 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:59:45" (1/1) ... [2022-04-07 22:59:45,947 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-07 22:59:45,982 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:59:45 BasicIcfg [2022-04-07 22:59:45,982 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 22:59:45,984 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 22:59:45,984 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 22:59:45,988 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 22:59:45,988 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 10:59:45" (1/4) ... [2022-04-07 22:59:45,989 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6439eec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:59:45, skipping insertion in model container [2022-04-07 22:59:45,989 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 10:59:45" (2/4) ... [2022-04-07 22:59:45,989 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6439eec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 10:59:45, skipping insertion in model container [2022-04-07 22:59:45,989 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 10:59:45" (3/4) ... [2022-04-07 22:59:45,990 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6439eec and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 10:59:45, skipping insertion in model container [2022-04-07 22:59:45,990 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 10:59:45" (4/4) ... [2022-04-07 22:59:45,991 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de52.cqvasr [2022-04-07 22:59:45,995 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-07 22:59:45,995 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 22:59:46,029 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 22:59:46,035 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 22:59:46,035 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 22:59:46,051 INFO L276 IsEmpty]: Start isEmpty. Operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:59:46,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 22:59:46,055 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:46,055 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:46,056 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:46,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:46,060 INFO L85 PathProgramCache]: Analyzing trace with hash 702671213, now seen corresponding path program 1 times [2022-04-07 22:59:46,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:46,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763657640] [2022-04-07 22:59:46,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:46,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:46,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:46,189 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:46,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:46,204 INFO L290 TraceCheckUtils]: 0: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-07 22:59:46,205 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 22:59:46,205 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 22:59:46,207 INFO L272 TraceCheckUtils]: 0: Hoare triple {27#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:46,207 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-07 22:59:46,208 INFO L290 TraceCheckUtils]: 2: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 22:59:46,208 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 22:59:46,208 INFO L272 TraceCheckUtils]: 4: Hoare triple {27#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-07 22:59:46,209 INFO L290 TraceCheckUtils]: 5: Hoare triple {27#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {27#true} is VALID [2022-04-07 22:59:46,209 INFO L290 TraceCheckUtils]: 6: Hoare triple {27#true} [92] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 22:59:46,210 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#false} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28#false} is VALID [2022-04-07 22:59:46,210 INFO L290 TraceCheckUtils]: 8: Hoare triple {28#false} [96] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 22:59:46,210 INFO L290 TraceCheckUtils]: 9: Hoare triple {28#false} [99] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 22:59:46,210 INFO L290 TraceCheckUtils]: 10: Hoare triple {28#false} [102] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 22:59:46,211 INFO L290 TraceCheckUtils]: 11: Hoare triple {28#false} [105] L41-1-->L41-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 22:59:46,211 INFO L272 TraceCheckUtils]: 12: Hoare triple {28#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28#false} is VALID [2022-04-07 22:59:46,211 INFO L290 TraceCheckUtils]: 13: Hoare triple {28#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28#false} is VALID [2022-04-07 22:59:46,212 INFO L290 TraceCheckUtils]: 14: Hoare triple {28#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 22:59:46,212 INFO L290 TraceCheckUtils]: 15: Hoare triple {28#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-07 22:59:46,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:46,213 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:46,213 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763657640] [2022-04-07 22:59:46,214 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [763657640] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:59:46,214 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:59:46,214 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 22:59:46,215 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818360906] [2022-04-07 22:59:46,216 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:59:46,220 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:59:46,221 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:46,224 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,242 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:46,242 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 22:59:46,242 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:46,258 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 22:59:46,259 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:59:46,261 INFO L87 Difference]: Start difference. First operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:46,326 INFO L93 Difference]: Finished difference Result 41 states and 60 transitions. [2022-04-07 22:59:46,327 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 22:59:46,327 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:59:46,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:46,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2022-04-07 22:59:46,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2022-04-07 22:59:46,340 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 60 transitions. [2022-04-07 22:59:46,399 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:46,405 INFO L225 Difference]: With dead ends: 41 [2022-04-07 22:59:46,406 INFO L226 Difference]: Without dead ends: 17 [2022-04-07 22:59:46,408 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 22:59:46,411 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 19 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:46,411 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 30 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:59:46,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-07 22:59:46,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-07 22:59:46,434 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:46,435 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,435 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,436 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:46,439 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-07 22:59:46,439 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 22:59:46,439 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:46,439 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:46,440 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 22:59:46,440 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-07 22:59:46,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:46,445 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-07 22:59:46,445 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 22:59:46,445 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:46,446 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:46,447 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:46,447 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:46,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-04-07 22:59:46,456 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 16 [2022-04-07 22:59:46,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:46,456 INFO L478 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-04-07 22:59:46,457 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,457 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-07 22:59:46,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-07 22:59:46,457 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:46,457 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:46,458 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 22:59:46,458 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:46,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:46,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1128942900, now seen corresponding path program 1 times [2022-04-07 22:59:46,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:46,459 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [838771482] [2022-04-07 22:59:46,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:46,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:46,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:46,544 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:46,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:46,553 INFO L290 TraceCheckUtils]: 0: Hoare triple {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146#true} is VALID [2022-04-07 22:59:46,553 INFO L290 TraceCheckUtils]: 1: Hoare triple {146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-07 22:59:46,553 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {146#true} {146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-07 22:59:46,554 INFO L272 TraceCheckUtils]: 0: Hoare triple {146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:46,555 INFO L290 TraceCheckUtils]: 1: Hoare triple {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146#true} is VALID [2022-04-07 22:59:46,555 INFO L290 TraceCheckUtils]: 2: Hoare triple {146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-07 22:59:46,555 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {146#true} {146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-07 22:59:46,555 INFO L272 TraceCheckUtils]: 4: Hoare triple {146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-07 22:59:46,556 INFO L290 TraceCheckUtils]: 5: Hoare triple {146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {146#true} is VALID [2022-04-07 22:59:46,556 INFO L290 TraceCheckUtils]: 6: Hoare triple {146#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-07 22:59:46,556 INFO L290 TraceCheckUtils]: 7: Hoare triple {146#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {146#true} is VALID [2022-04-07 22:59:46,556 INFO L290 TraceCheckUtils]: 8: Hoare triple {146#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-07 22:59:46,557 INFO L290 TraceCheckUtils]: 9: Hoare triple {146#true} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-07 22:59:46,558 INFO L290 TraceCheckUtils]: 10: Hoare triple {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-07 22:59:46,558 INFO L290 TraceCheckUtils]: 11: Hoare triple {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} is VALID [2022-04-07 22:59:46,559 INFO L272 TraceCheckUtils]: 12: Hoare triple {151#(= (+ main_~y~0 (* (div main_~y~0 4294967296) (- 4294967296))) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {152#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:59:46,560 INFO L290 TraceCheckUtils]: 13: Hoare triple {152#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {153#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:59:46,560 INFO L290 TraceCheckUtils]: 14: Hoare triple {153#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {147#false} is VALID [2022-04-07 22:59:46,561 INFO L290 TraceCheckUtils]: 15: Hoare triple {147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {147#false} is VALID [2022-04-07 22:59:46,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:46,561 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:46,561 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [838771482] [2022-04-07 22:59:46,561 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [838771482] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:59:46,562 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:59:46,562 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-07 22:59:46,562 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2009130623] [2022-04-07 22:59:46,562 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:59:46,563 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:59:46,563 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:46,564 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,577 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:46,578 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 22:59:46,578 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:46,579 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 22:59:46,579 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-07 22:59:46,580 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:46,812 INFO L93 Difference]: Finished difference Result 34 states and 45 transitions. [2022-04-07 22:59:46,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 22:59:46,813 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-07 22:59:46,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:46,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 45 transitions. [2022-04-07 22:59:46,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 45 transitions. [2022-04-07 22:59:46,820 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 45 transitions. [2022-04-07 22:59:46,863 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:46,865 INFO L225 Difference]: With dead ends: 34 [2022-04-07 22:59:46,866 INFO L226 Difference]: Without dead ends: 23 [2022-04-07 22:59:46,869 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-07 22:59:46,871 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 28 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:46,872 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [28 Valid, 32 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 53 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:59:46,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-07 22:59:46,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-07 22:59:46,881 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:46,881 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,882 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,883 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:46,885 INFO L93 Difference]: Finished difference Result 23 states and 30 transitions. [2022-04-07 22:59:46,885 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 30 transitions. [2022-04-07 22:59:46,886 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:46,886 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:46,887 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-07 22:59:46,888 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-07 22:59:46,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:46,890 INFO L93 Difference]: Finished difference Result 23 states and 30 transitions. [2022-04-07 22:59:46,890 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 30 transitions. [2022-04-07 22:59:46,890 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:46,890 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:46,890 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:46,891 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:46,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.4444444444444444) internal successors, (26), 18 states have internal predecessors, (26), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 30 transitions. [2022-04-07 22:59:46,894 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 30 transitions. Word has length 16 [2022-04-07 22:59:46,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:46,894 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 30 transitions. [2022-04-07 22:59:46,896 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:46,897 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 30 transitions. [2022-04-07 22:59:46,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 22:59:46,898 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:46,898 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:46,898 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 22:59:46,899 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:46,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:46,899 INFO L85 PathProgramCache]: Analyzing trace with hash -610770875, now seen corresponding path program 1 times [2022-04-07 22:59:46,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:46,900 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836508190] [2022-04-07 22:59:46,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:46,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:46,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:46,999 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:47,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,007 INFO L290 TraceCheckUtils]: 0: Hoare triple {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-07 22:59:47,007 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:59:47,007 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291#true} {291#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:59:47,008 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:47,008 INFO L290 TraceCheckUtils]: 1: Hoare triple {297#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-07 22:59:47,009 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:59:47,009 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:59:47,009 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:59:47,009 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {291#true} is VALID [2022-04-07 22:59:47,009 INFO L290 TraceCheckUtils]: 6: Hoare triple {291#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-07 22:59:47,010 INFO L290 TraceCheckUtils]: 7: Hoare triple {291#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {291#true} is VALID [2022-04-07 22:59:47,010 INFO L290 TraceCheckUtils]: 8: Hoare triple {291#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-07 22:59:47,019 INFO L290 TraceCheckUtils]: 9: Hoare triple {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-07 22:59:47,022 INFO L290 TraceCheckUtils]: 10: Hoare triple {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-07 22:59:47,023 INFO L290 TraceCheckUtils]: 11: Hoare triple {296#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {292#false} is VALID [2022-04-07 22:59:47,023 INFO L290 TraceCheckUtils]: 12: Hoare triple {292#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:59:47,024 INFO L272 TraceCheckUtils]: 13: Hoare triple {292#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {292#false} is VALID [2022-04-07 22:59:47,024 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-07 22:59:47,024 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:59:47,024 INFO L290 TraceCheckUtils]: 16: Hoare triple {292#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-07 22:59:47,025 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:47,025 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:47,025 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836508190] [2022-04-07 22:59:47,025 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1836508190] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:59:47,025 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:59:47,025 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 22:59:47,026 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119973039] [2022-04-07 22:59:47,026 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:59:47,026 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 22:59:47,026 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:47,027 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,045 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:47,045 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 22:59:47,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:47,046 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 22:59:47,047 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 22:59:47,047 INFO L87 Difference]: Start difference. First operand 23 states and 30 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,131 INFO L93 Difference]: Finished difference Result 34 states and 45 transitions. [2022-04-07 22:59:47,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 22:59:47,131 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 22:59:47,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:47,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 33 transitions. [2022-04-07 22:59:47,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 33 transitions. [2022-04-07 22:59:47,137 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 33 transitions. [2022-04-07 22:59:47,175 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:47,176 INFO L225 Difference]: With dead ends: 34 [2022-04-07 22:59:47,177 INFO L226 Difference]: Without dead ends: 27 [2022-04-07 22:59:47,179 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:59:47,182 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 21 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:47,182 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 26 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:59:47,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2022-04-07 22:59:47,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2022-04-07 22:59:47,190 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:47,190 INFO L82 GeneralOperation]: Start isEquivalent. First operand 27 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,190 INFO L74 IsIncluded]: Start isIncluded. First operand 27 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,190 INFO L87 Difference]: Start difference. First operand 27 states. Second operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,196 INFO L93 Difference]: Finished difference Result 27 states and 36 transitions. [2022-04-07 22:59:47,196 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-04-07 22:59:47,197 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:47,197 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:47,198 INFO L74 IsIncluded]: Start isIncluded. First operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 27 states. [2022-04-07 22:59:47,198 INFO L87 Difference]: Start difference. First operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 27 states. [2022-04-07 22:59:47,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,201 INFO L93 Difference]: Finished difference Result 27 states and 36 transitions. [2022-04-07 22:59:47,201 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-04-07 22:59:47,201 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:47,201 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:47,201 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:47,201 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:47,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 22 states have internal predecessors, (32), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 36 transitions. [2022-04-07 22:59:47,206 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 36 transitions. Word has length 17 [2022-04-07 22:59:47,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:47,206 INFO L478 AbstractCegarLoop]: Abstraction has 27 states and 36 transitions. [2022-04-07 22:59:47,206 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,207 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 36 transitions. [2022-04-07 22:59:47,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 22:59:47,208 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:47,208 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:47,208 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-07 22:59:47,208 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:47,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:47,209 INFO L85 PathProgramCache]: Analyzing trace with hash 162216202, now seen corresponding path program 1 times [2022-04-07 22:59:47,209 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:47,209 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197291451] [2022-04-07 22:59:47,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:47,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:47,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,282 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:47,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,306 INFO L290 TraceCheckUtils]: 0: Hoare triple {445#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {439#true} is VALID [2022-04-07 22:59:47,307 INFO L290 TraceCheckUtils]: 1: Hoare triple {439#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-07 22:59:47,307 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {439#true} {439#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-07 22:59:47,310 INFO L272 TraceCheckUtils]: 0: Hoare triple {439#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {445#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:47,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {445#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {439#true} is VALID [2022-04-07 22:59:47,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {439#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-07 22:59:47,310 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {439#true} {439#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-07 22:59:47,310 INFO L272 TraceCheckUtils]: 4: Hoare triple {439#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#true} is VALID [2022-04-07 22:59:47,310 INFO L290 TraceCheckUtils]: 5: Hoare triple {439#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {439#true} is VALID [2022-04-07 22:59:47,311 INFO L290 TraceCheckUtils]: 6: Hoare triple {439#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:47,312 INFO L290 TraceCheckUtils]: 7: Hoare triple {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:47,313 INFO L290 TraceCheckUtils]: 8: Hoare triple {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:47,313 INFO L290 TraceCheckUtils]: 9: Hoare triple {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:47,314 INFO L290 TraceCheckUtils]: 10: Hoare triple {444#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {440#false} is VALID [2022-04-07 22:59:47,314 INFO L290 TraceCheckUtils]: 11: Hoare triple {440#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {440#false} is VALID [2022-04-07 22:59:47,314 INFO L290 TraceCheckUtils]: 12: Hoare triple {440#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {440#false} is VALID [2022-04-07 22:59:47,315 INFO L272 TraceCheckUtils]: 13: Hoare triple {440#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {440#false} is VALID [2022-04-07 22:59:47,315 INFO L290 TraceCheckUtils]: 14: Hoare triple {440#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {440#false} is VALID [2022-04-07 22:59:47,315 INFO L290 TraceCheckUtils]: 15: Hoare triple {440#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {440#false} is VALID [2022-04-07 22:59:47,315 INFO L290 TraceCheckUtils]: 16: Hoare triple {440#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {440#false} is VALID [2022-04-07 22:59:47,315 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:47,316 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:47,316 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197291451] [2022-04-07 22:59:47,316 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1197291451] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:59:47,316 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:59:47,316 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 22:59:47,316 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [470717831] [2022-04-07 22:59:47,316 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:59:47,317 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 22:59:47,317 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:47,317 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,336 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:47,337 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 22:59:47,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:47,338 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 22:59:47,338 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 22:59:47,339 INFO L87 Difference]: Start difference. First operand 27 states and 36 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,418 INFO L93 Difference]: Finished difference Result 43 states and 59 transitions. [2022-04-07 22:59:47,418 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 22:59:47,418 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 22:59:47,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:47,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 35 transitions. [2022-04-07 22:59:47,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 35 transitions. [2022-04-07 22:59:47,423 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 35 transitions. [2022-04-07 22:59:47,453 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:47,456 INFO L225 Difference]: With dead ends: 43 [2022-04-07 22:59:47,456 INFO L226 Difference]: Without dead ends: 32 [2022-04-07 22:59:47,459 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:59:47,462 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 21 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:47,463 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 27 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:59:47,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-04-07 22:59:47,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2022-04-07 22:59:47,470 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:47,470 INFO L82 GeneralOperation]: Start isEquivalent. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,470 INFO L74 IsIncluded]: Start isIncluded. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,471 INFO L87 Difference]: Start difference. First operand 32 states. Second operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,472 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-04-07 22:59:47,472 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 43 transitions. [2022-04-07 22:59:47,472 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:47,473 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:47,473 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 22:59:47,473 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 32 states. [2022-04-07 22:59:47,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,474 INFO L93 Difference]: Finished difference Result 32 states and 43 transitions. [2022-04-07 22:59:47,475 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 43 transitions. [2022-04-07 22:59:47,475 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:47,475 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:47,475 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:47,475 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:47,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.4444444444444444) internal successors, (39), 27 states have internal predecessors, (39), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 43 transitions. [2022-04-07 22:59:47,477 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 43 transitions. Word has length 17 [2022-04-07 22:59:47,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:47,477 INFO L478 AbstractCegarLoop]: Abstraction has 32 states and 43 transitions. [2022-04-07 22:59:47,477 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,477 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 43 transitions. [2022-04-07 22:59:47,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-07 22:59:47,478 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:47,478 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:47,478 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-07 22:59:47,478 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:47,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:47,478 INFO L85 PathProgramCache]: Analyzing trace with hash -211948756, now seen corresponding path program 1 times [2022-04-07 22:59:47,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:47,479 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635369341] [2022-04-07 22:59:47,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:47,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:47,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,519 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:47,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,530 INFO L290 TraceCheckUtils]: 0: Hoare triple {622#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {615#true} is VALID [2022-04-07 22:59:47,531 INFO L290 TraceCheckUtils]: 1: Hoare triple {615#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-07 22:59:47,531 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {615#true} {615#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-07 22:59:47,532 INFO L272 TraceCheckUtils]: 0: Hoare triple {615#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {622#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:47,533 INFO L290 TraceCheckUtils]: 1: Hoare triple {622#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {615#true} is VALID [2022-04-07 22:59:47,533 INFO L290 TraceCheckUtils]: 2: Hoare triple {615#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-07 22:59:47,533 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {615#true} {615#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-07 22:59:47,533 INFO L272 TraceCheckUtils]: 4: Hoare triple {615#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#true} is VALID [2022-04-07 22:59:47,534 INFO L290 TraceCheckUtils]: 5: Hoare triple {615#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {620#(= main_~y~0 0)} is VALID [2022-04-07 22:59:47,535 INFO L290 TraceCheckUtils]: 6: Hoare triple {620#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {620#(= main_~y~0 0)} is VALID [2022-04-07 22:59:47,535 INFO L290 TraceCheckUtils]: 7: Hoare triple {620#(= main_~y~0 0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {621#(= main_~z~0 0)} is VALID [2022-04-07 22:59:47,536 INFO L290 TraceCheckUtils]: 8: Hoare triple {621#(= main_~z~0 0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {616#false} is VALID [2022-04-07 22:59:47,536 INFO L290 TraceCheckUtils]: 9: Hoare triple {616#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-07 22:59:47,536 INFO L290 TraceCheckUtils]: 10: Hoare triple {616#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-07 22:59:47,536 INFO L290 TraceCheckUtils]: 11: Hoare triple {616#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {616#false} is VALID [2022-04-07 22:59:47,536 INFO L290 TraceCheckUtils]: 12: Hoare triple {616#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-07 22:59:47,537 INFO L290 TraceCheckUtils]: 13: Hoare triple {616#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-07 22:59:47,537 INFO L272 TraceCheckUtils]: 14: Hoare triple {616#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {616#false} is VALID [2022-04-07 22:59:47,537 INFO L290 TraceCheckUtils]: 15: Hoare triple {616#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {616#false} is VALID [2022-04-07 22:59:47,537 INFO L290 TraceCheckUtils]: 16: Hoare triple {616#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-07 22:59:47,537 INFO L290 TraceCheckUtils]: 17: Hoare triple {616#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616#false} is VALID [2022-04-07 22:59:47,538 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:59:47,538 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:47,538 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635369341] [2022-04-07 22:59:47,538 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1635369341] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 22:59:47,538 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 22:59:47,538 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 22:59:47,539 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1223044747] [2022-04-07 22:59:47,539 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:59:47,540 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 22:59:47,540 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:47,540 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,554 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:47,554 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 22:59:47,555 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:47,555 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 22:59:47,555 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:59:47,555 INFO L87 Difference]: Start difference. First operand 32 states and 43 transitions. Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,664 INFO L93 Difference]: Finished difference Result 40 states and 51 transitions. [2022-04-07 22:59:47,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 22:59:47,665 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-07 22:59:47,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:47,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 35 transitions. [2022-04-07 22:59:47,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 35 transitions. [2022-04-07 22:59:47,667 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 35 transitions. [2022-04-07 22:59:47,694 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:47,695 INFO L225 Difference]: With dead ends: 40 [2022-04-07 22:59:47,695 INFO L226 Difference]: Without dead ends: 28 [2022-04-07 22:59:47,695 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-07 22:59:47,697 INFO L913 BasicCegarLoop]: 19 mSDtfsCounter, 18 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:47,697 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 31 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:59:47,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2022-04-07 22:59:47,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2022-04-07 22:59:47,709 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:47,709 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,709 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,710 INFO L87 Difference]: Start difference. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,712 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2022-04-07 22:59:47,712 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 37 transitions. [2022-04-07 22:59:47,713 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:47,713 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:47,713 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 28 states. [2022-04-07 22:59:47,714 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 28 states. [2022-04-07 22:59:47,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:47,715 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2022-04-07 22:59:47,715 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 37 transitions. [2022-04-07 22:59:47,716 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:47,716 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:47,716 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:47,716 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:47,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.434782608695652) internal successors, (33), 23 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 37 transitions. [2022-04-07 22:59:47,719 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 37 transitions. Word has length 18 [2022-04-07 22:59:47,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:47,719 INFO L478 AbstractCegarLoop]: Abstraction has 28 states and 37 transitions. [2022-04-07 22:59:47,719 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.8) internal successors, (14), 4 states have internal predecessors, (14), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:47,719 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 37 transitions. [2022-04-07 22:59:47,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:59:47,723 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:47,724 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:47,725 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-07 22:59:47,725 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:47,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:47,725 INFO L85 PathProgramCache]: Analyzing trace with hash -1893166358, now seen corresponding path program 1 times [2022-04-07 22:59:47,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:47,726 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737675666] [2022-04-07 22:59:47,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:47,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:47,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,809 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:47,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,815 INFO L290 TraceCheckUtils]: 0: Hoare triple {785#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {777#true} is VALID [2022-04-07 22:59:47,815 INFO L290 TraceCheckUtils]: 1: Hoare triple {777#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:47,815 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {777#true} {777#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:47,816 INFO L272 TraceCheckUtils]: 0: Hoare triple {777#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {785#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:47,816 INFO L290 TraceCheckUtils]: 1: Hoare triple {785#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {777#true} is VALID [2022-04-07 22:59:47,816 INFO L290 TraceCheckUtils]: 2: Hoare triple {777#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:47,816 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {777#true} {777#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:47,816 INFO L272 TraceCheckUtils]: 4: Hoare triple {777#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:47,817 INFO L290 TraceCheckUtils]: 5: Hoare triple {777#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {782#(= main_~y~0 0)} is VALID [2022-04-07 22:59:47,817 INFO L290 TraceCheckUtils]: 6: Hoare triple {782#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:47,818 INFO L290 TraceCheckUtils]: 7: Hoare triple {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:47,819 INFO L290 TraceCheckUtils]: 8: Hoare triple {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {784#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:47,819 INFO L290 TraceCheckUtils]: 9: Hoare triple {784#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:47,819 INFO L290 TraceCheckUtils]: 10: Hoare triple {778#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {778#false} is VALID [2022-04-07 22:59:47,820 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:47,820 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:47,820 INFO L290 TraceCheckUtils]: 13: Hoare triple {778#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {778#false} is VALID [2022-04-07 22:59:47,820 INFO L290 TraceCheckUtils]: 14: Hoare triple {778#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:47,820 INFO L272 TraceCheckUtils]: 15: Hoare triple {778#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {778#false} is VALID [2022-04-07 22:59:47,820 INFO L290 TraceCheckUtils]: 16: Hoare triple {778#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {778#false} is VALID [2022-04-07 22:59:47,821 INFO L290 TraceCheckUtils]: 17: Hoare triple {778#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:47,821 INFO L290 TraceCheckUtils]: 18: Hoare triple {778#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:47,821 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:47,821 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:47,821 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737675666] [2022-04-07 22:59:47,821 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1737675666] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:47,822 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [8152950] [2022-04-07 22:59:47,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:47,822 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:47,822 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:47,823 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:47,834 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 22:59:47,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,875 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 22:59:47,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:47,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:48,084 INFO L272 TraceCheckUtils]: 0: Hoare triple {777#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {777#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {777#true} is VALID [2022-04-07 22:59:48,084 INFO L290 TraceCheckUtils]: 2: Hoare triple {777#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,084 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {777#true} {777#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,085 INFO L272 TraceCheckUtils]: 4: Hoare triple {777#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,085 INFO L290 TraceCheckUtils]: 5: Hoare triple {777#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {782#(= main_~y~0 0)} is VALID [2022-04-07 22:59:48,086 INFO L290 TraceCheckUtils]: 6: Hoare triple {782#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:48,086 INFO L290 TraceCheckUtils]: 7: Hoare triple {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:48,086 INFO L290 TraceCheckUtils]: 8: Hoare triple {783#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {813#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:48,100 INFO L290 TraceCheckUtils]: 9: Hoare triple {813#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,100 INFO L290 TraceCheckUtils]: 10: Hoare triple {778#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {778#false} is VALID [2022-04-07 22:59:48,100 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,100 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,100 INFO L290 TraceCheckUtils]: 13: Hoare triple {778#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {778#false} is VALID [2022-04-07 22:59:48,101 INFO L290 TraceCheckUtils]: 14: Hoare triple {778#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,101 INFO L272 TraceCheckUtils]: 15: Hoare triple {778#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {778#false} is VALID [2022-04-07 22:59:48,101 INFO L290 TraceCheckUtils]: 16: Hoare triple {778#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {778#false} is VALID [2022-04-07 22:59:48,101 INFO L290 TraceCheckUtils]: 17: Hoare triple {778#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,101 INFO L290 TraceCheckUtils]: 18: Hoare triple {778#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,101 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:48,102 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:48,198 INFO L290 TraceCheckUtils]: 18: Hoare triple {778#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,198 INFO L290 TraceCheckUtils]: 17: Hoare triple {778#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,199 INFO L290 TraceCheckUtils]: 16: Hoare triple {778#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {778#false} is VALID [2022-04-07 22:59:48,199 INFO L272 TraceCheckUtils]: 15: Hoare triple {778#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {778#false} is VALID [2022-04-07 22:59:48,199 INFO L290 TraceCheckUtils]: 14: Hoare triple {778#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,201 INFO L290 TraceCheckUtils]: 13: Hoare triple {778#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {778#false} is VALID [2022-04-07 22:59:48,201 INFO L290 TraceCheckUtils]: 12: Hoare triple {778#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,201 INFO L290 TraceCheckUtils]: 11: Hoare triple {778#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {778#false} is VALID [2022-04-07 22:59:48,202 INFO L290 TraceCheckUtils]: 10: Hoare triple {868#(not (< 0 (mod main_~y~0 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {778#false} is VALID [2022-04-07 22:59:48,202 INFO L290 TraceCheckUtils]: 9: Hoare triple {872#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {868#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:59:48,203 INFO L290 TraceCheckUtils]: 8: Hoare triple {777#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {872#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 22:59:48,203 INFO L290 TraceCheckUtils]: 7: Hoare triple {777#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,203 INFO L290 TraceCheckUtils]: 6: Hoare triple {777#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {777#true} is VALID [2022-04-07 22:59:48,203 INFO L290 TraceCheckUtils]: 5: Hoare triple {777#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {777#true} is VALID [2022-04-07 22:59:48,203 INFO L272 TraceCheckUtils]: 4: Hoare triple {777#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,203 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {777#true} {777#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,204 INFO L290 TraceCheckUtils]: 2: Hoare triple {777#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {777#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {777#true} is VALID [2022-04-07 22:59:48,204 INFO L272 TraceCheckUtils]: 0: Hoare triple {777#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {777#true} is VALID [2022-04-07 22:59:48,204 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:48,204 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [8152950] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:48,204 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-07 22:59:48,205 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6, 5] total 9 [2022-04-07 22:59:48,205 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1324284092] [2022-04-07 22:59:48,205 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:59:48,205 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:59:48,205 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:48,206 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,220 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:48,220 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 22:59:48,220 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:48,220 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 22:59:48,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-07 22:59:48,221 INFO L87 Difference]: Start difference. First operand 28 states and 37 transitions. Second operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:48,278 INFO L93 Difference]: Finished difference Result 35 states and 44 transitions. [2022-04-07 22:59:48,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 22:59:48,278 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:59:48,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:48,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 37 transitions. [2022-04-07 22:59:48,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 37 transitions. [2022-04-07 22:59:48,284 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 37 transitions. [2022-04-07 22:59:48,313 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:48,315 INFO L225 Difference]: With dead ends: 35 [2022-04-07 22:59:48,315 INFO L226 Difference]: Without dead ends: 25 [2022-04-07 22:59:48,315 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-07 22:59:48,317 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 3 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:48,318 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 27 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:59:48,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-07 22:59:48,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2022-04-07 22:59:48,331 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:48,332 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,332 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,332 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:48,333 INFO L93 Difference]: Finished difference Result 25 states and 32 transitions. [2022-04-07 22:59:48,333 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 32 transitions. [2022-04-07 22:59:48,334 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:48,334 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:48,335 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-07 22:59:48,335 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 25 states. [2022-04-07 22:59:48,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:48,336 INFO L93 Difference]: Finished difference Result 25 states and 32 transitions. [2022-04-07 22:59:48,336 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 32 transitions. [2022-04-07 22:59:48,336 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:48,336 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:48,336 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:48,336 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:48,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.4) internal successors, (28), 20 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 32 transitions. [2022-04-07 22:59:48,339 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 32 transitions. Word has length 19 [2022-04-07 22:59:48,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:48,340 INFO L478 AbstractCegarLoop]: Abstraction has 25 states and 32 transitions. [2022-04-07 22:59:48,340 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,340 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 32 transitions. [2022-04-07 22:59:48,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 22:59:48,341 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:48,342 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:48,368 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:48,554 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-04-07 22:59:48,555 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:48,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:48,555 INFO L85 PathProgramCache]: Analyzing trace with hash 1618157770, now seen corresponding path program 1 times [2022-04-07 22:59:48,555 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:48,555 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221547527] [2022-04-07 22:59:48,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:48,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:48,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:48,622 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:48,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:48,630 INFO L290 TraceCheckUtils]: 0: Hoare triple {1041#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-07 22:59:48,631 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,631 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,635 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1041#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:48,635 INFO L290 TraceCheckUtils]: 1: Hoare triple {1041#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-07 22:59:48,636 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,636 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,636 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,636 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1039#(= main_~y~0 0)} is VALID [2022-04-07 22:59:48,637 INFO L290 TraceCheckUtils]: 6: Hoare triple {1039#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-07 22:59:48,637 INFO L290 TraceCheckUtils]: 7: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-07 22:59:48,638 INFO L290 TraceCheckUtils]: 8: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-07 22:59:48,638 INFO L290 TraceCheckUtils]: 9: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-07 22:59:48,639 INFO L290 TraceCheckUtils]: 10: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-07 22:59:48,651 INFO L290 TraceCheckUtils]: 11: Hoare triple {1040#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,652 INFO L290 TraceCheckUtils]: 12: Hoare triple {1035#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1035#false} is VALID [2022-04-07 22:59:48,652 INFO L290 TraceCheckUtils]: 13: Hoare triple {1035#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,652 INFO L290 TraceCheckUtils]: 14: Hoare triple {1035#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,652 INFO L272 TraceCheckUtils]: 15: Hoare triple {1035#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1035#false} is VALID [2022-04-07 22:59:48,652 INFO L290 TraceCheckUtils]: 16: Hoare triple {1035#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1035#false} is VALID [2022-04-07 22:59:48,652 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,653 INFO L290 TraceCheckUtils]: 18: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,653 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:48,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:48,653 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221547527] [2022-04-07 22:59:48,653 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [221547527] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:48,653 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [183311684] [2022-04-07 22:59:48,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:48,654 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:48,654 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:48,656 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:48,689 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 22:59:48,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:48,697 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 22:59:48,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:48,702 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:48,784 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,785 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-07 22:59:48,785 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,785 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,785 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,786 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1039#(= main_~y~0 0)} is VALID [2022-04-07 22:59:48,786 INFO L290 TraceCheckUtils]: 6: Hoare triple {1039#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1063#(= main_~y~0 1)} is VALID [2022-04-07 22:59:48,789 INFO L290 TraceCheckUtils]: 7: Hoare triple {1063#(= main_~y~0 1)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1063#(= main_~y~0 1)} is VALID [2022-04-07 22:59:48,789 INFO L290 TraceCheckUtils]: 8: Hoare triple {1063#(= main_~y~0 1)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1070#(and (= main_~z~0 main_~y~0) (= main_~y~0 1))} is VALID [2022-04-07 22:59:48,790 INFO L290 TraceCheckUtils]: 9: Hoare triple {1070#(and (= main_~z~0 main_~y~0) (= main_~y~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1063#(= main_~y~0 1)} is VALID [2022-04-07 22:59:48,790 INFO L290 TraceCheckUtils]: 10: Hoare triple {1063#(= main_~y~0 1)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1063#(= main_~y~0 1)} is VALID [2022-04-07 22:59:48,791 INFO L290 TraceCheckUtils]: 11: Hoare triple {1063#(= main_~y~0 1)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,791 INFO L290 TraceCheckUtils]: 12: Hoare triple {1035#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1035#false} is VALID [2022-04-07 22:59:48,791 INFO L290 TraceCheckUtils]: 13: Hoare triple {1035#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,791 INFO L290 TraceCheckUtils]: 14: Hoare triple {1035#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,791 INFO L272 TraceCheckUtils]: 15: Hoare triple {1035#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1035#false} is VALID [2022-04-07 22:59:48,791 INFO L290 TraceCheckUtils]: 16: Hoare triple {1035#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1035#false} is VALID [2022-04-07 22:59:48,791 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,792 INFO L290 TraceCheckUtils]: 18: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,792 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:59:48,792 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:48,887 INFO L290 TraceCheckUtils]: 18: Hoare triple {1035#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,887 INFO L290 TraceCheckUtils]: 17: Hoare triple {1035#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,888 INFO L290 TraceCheckUtils]: 16: Hoare triple {1035#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1035#false} is VALID [2022-04-07 22:59:48,888 INFO L272 TraceCheckUtils]: 15: Hoare triple {1035#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1035#false} is VALID [2022-04-07 22:59:48,888 INFO L290 TraceCheckUtils]: 14: Hoare triple {1035#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,889 INFO L290 TraceCheckUtils]: 13: Hoare triple {1035#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,890 INFO L290 TraceCheckUtils]: 12: Hoare triple {1035#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1035#false} is VALID [2022-04-07 22:59:48,890 INFO L290 TraceCheckUtils]: 11: Hoare triple {1122#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1035#false} is VALID [2022-04-07 22:59:48,890 INFO L290 TraceCheckUtils]: 10: Hoare triple {1122#(< 0 (mod main_~y~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1122#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:59:48,891 INFO L290 TraceCheckUtils]: 9: Hoare triple {1129#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1122#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 22:59:48,891 INFO L290 TraceCheckUtils]: 8: Hoare triple {1034#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1129#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:59:48,892 INFO L290 TraceCheckUtils]: 7: Hoare triple {1034#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,892 INFO L290 TraceCheckUtils]: 6: Hoare triple {1034#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1034#true} is VALID [2022-04-07 22:59:48,892 INFO L290 TraceCheckUtils]: 5: Hoare triple {1034#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1034#true} is VALID [2022-04-07 22:59:48,892 INFO L272 TraceCheckUtils]: 4: Hoare triple {1034#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,892 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1034#true} {1034#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,892 INFO L290 TraceCheckUtils]: 2: Hoare triple {1034#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,892 INFO L290 TraceCheckUtils]: 1: Hoare triple {1034#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1034#true} is VALID [2022-04-07 22:59:48,893 INFO L272 TraceCheckUtils]: 0: Hoare triple {1034#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1034#true} is VALID [2022-04-07 22:59:48,893 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:48,893 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [183311684] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:48,894 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-07 22:59:48,894 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [5, 5] total 9 [2022-04-07 22:59:48,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13691774] [2022-04-07 22:59:48,894 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 22:59:48,894 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:59:48,894 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:48,895 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,908 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 19 edges. 19 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:48,908 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 22:59:48,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:48,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 22:59:48,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-04-07 22:59:48,909 INFO L87 Difference]: Start difference. First operand 25 states and 32 transitions. Second operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:48,972 INFO L93 Difference]: Finished difference Result 30 states and 36 transitions. [2022-04-07 22:59:48,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 22:59:48,972 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 22:59:48,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:48,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 31 transitions. [2022-04-07 22:59:48,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:48,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 31 transitions. [2022-04-07 22:59:48,976 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 31 transitions. [2022-04-07 22:59:49,004 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:49,006 INFO L225 Difference]: With dead ends: 30 [2022-04-07 22:59:49,006 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 22:59:49,006 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-04-07 22:59:49,007 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 1 mSDsluCounter, 21 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:49,007 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1 Valid, 41 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:59:49,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 22:59:49,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-07 22:59:49,018 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:49,018 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:49,019 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:49,019 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:49,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:49,020 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 22:59:49,020 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 22:59:49,020 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:49,020 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:49,021 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-07 22:59:49,021 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-07 22:59:49,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:49,022 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-07 22:59:49,022 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 22:59:49,023 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:49,023 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:49,023 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:49,023 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:49,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:49,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2022-04-07 22:59:49,024 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 27 transitions. Word has length 19 [2022-04-07 22:59:49,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:49,024 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 27 transitions. [2022-04-07 22:59:49,024 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:49,025 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-07 22:59:49,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-07 22:59:49,025 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:49,025 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:49,049 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:49,239 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-04-07 22:59:49,239 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:49,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:49,240 INFO L85 PathProgramCache]: Analyzing trace with hash -1538757236, now seen corresponding path program 1 times [2022-04-07 22:59:49,240 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:49,240 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1099977722] [2022-04-07 22:59:49,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:49,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:49,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:49,324 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:49,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:49,328 INFO L290 TraceCheckUtils]: 0: Hoare triple {1284#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1277#true} is VALID [2022-04-07 22:59:49,329 INFO L290 TraceCheckUtils]: 1: Hoare triple {1277#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,329 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1277#true} {1277#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,329 INFO L272 TraceCheckUtils]: 0: Hoare triple {1277#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1284#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:49,330 INFO L290 TraceCheckUtils]: 1: Hoare triple {1284#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1277#true} is VALID [2022-04-07 22:59:49,330 INFO L290 TraceCheckUtils]: 2: Hoare triple {1277#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,330 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1277#true} {1277#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,330 INFO L272 TraceCheckUtils]: 4: Hoare triple {1277#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,330 INFO L290 TraceCheckUtils]: 5: Hoare triple {1277#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1277#true} is VALID [2022-04-07 22:59:49,331 INFO L290 TraceCheckUtils]: 6: Hoare triple {1277#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,332 INFO L290 TraceCheckUtils]: 7: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,332 INFO L290 TraceCheckUtils]: 8: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,333 INFO L290 TraceCheckUtils]: 9: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,334 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,334 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,335 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,335 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,335 INFO L290 TraceCheckUtils]: 14: Hoare triple {1278#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1278#false} is VALID [2022-04-07 22:59:49,335 INFO L290 TraceCheckUtils]: 15: Hoare triple {1278#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,336 INFO L272 TraceCheckUtils]: 16: Hoare triple {1278#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1278#false} is VALID [2022-04-07 22:59:49,336 INFO L290 TraceCheckUtils]: 17: Hoare triple {1278#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1278#false} is VALID [2022-04-07 22:59:49,336 INFO L290 TraceCheckUtils]: 18: Hoare triple {1278#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,336 INFO L290 TraceCheckUtils]: 19: Hoare triple {1278#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,336 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:49,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:49,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1099977722] [2022-04-07 22:59:49,337 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1099977722] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:49,337 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [701023509] [2022-04-07 22:59:49,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:49,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:49,337 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:49,338 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:49,339 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 22:59:49,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:49,376 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-07 22:59:49,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:49,393 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:49,682 INFO L272 TraceCheckUtils]: 0: Hoare triple {1277#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,682 INFO L290 TraceCheckUtils]: 1: Hoare triple {1277#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1277#true} is VALID [2022-04-07 22:59:49,682 INFO L290 TraceCheckUtils]: 2: Hoare triple {1277#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,683 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1277#true} {1277#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,683 INFO L272 TraceCheckUtils]: 4: Hoare triple {1277#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,683 INFO L290 TraceCheckUtils]: 5: Hoare triple {1277#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1277#true} is VALID [2022-04-07 22:59:49,684 INFO L290 TraceCheckUtils]: 6: Hoare triple {1277#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,687 INFO L290 TraceCheckUtils]: 7: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,688 INFO L290 TraceCheckUtils]: 8: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,695 INFO L290 TraceCheckUtils]: 9: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,696 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,697 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,698 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,700 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,701 INFO L290 TraceCheckUtils]: 14: Hoare triple {1278#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1278#false} is VALID [2022-04-07 22:59:49,701 INFO L290 TraceCheckUtils]: 15: Hoare triple {1278#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,701 INFO L272 TraceCheckUtils]: 16: Hoare triple {1278#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1278#false} is VALID [2022-04-07 22:59:49,701 INFO L290 TraceCheckUtils]: 17: Hoare triple {1278#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1278#false} is VALID [2022-04-07 22:59:49,701 INFO L290 TraceCheckUtils]: 18: Hoare triple {1278#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,701 INFO L290 TraceCheckUtils]: 19: Hoare triple {1278#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,702 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:49,702 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:49,970 INFO L290 TraceCheckUtils]: 19: Hoare triple {1278#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,970 INFO L290 TraceCheckUtils]: 18: Hoare triple {1278#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,970 INFO L290 TraceCheckUtils]: 17: Hoare triple {1278#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1278#false} is VALID [2022-04-07 22:59:49,970 INFO L272 TraceCheckUtils]: 16: Hoare triple {1278#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1278#false} is VALID [2022-04-07 22:59:49,970 INFO L290 TraceCheckUtils]: 15: Hoare triple {1278#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,971 INFO L290 TraceCheckUtils]: 14: Hoare triple {1278#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1278#false} is VALID [2022-04-07 22:59:49,972 INFO L290 TraceCheckUtils]: 13: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1278#false} is VALID [2022-04-07 22:59:49,972 INFO L290 TraceCheckUtils]: 12: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,973 INFO L290 TraceCheckUtils]: 11: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,973 INFO L290 TraceCheckUtils]: 10: Hoare triple {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,974 INFO L290 TraceCheckUtils]: 9: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1283#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-07 22:59:49,976 INFO L290 TraceCheckUtils]: 8: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,976 INFO L290 TraceCheckUtils]: 7: Hoare triple {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,977 INFO L290 TraceCheckUtils]: 6: Hoare triple {1277#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1282#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 22:59:49,977 INFO L290 TraceCheckUtils]: 5: Hoare triple {1277#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1277#true} is VALID [2022-04-07 22:59:49,977 INFO L272 TraceCheckUtils]: 4: Hoare triple {1277#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,977 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1277#true} {1277#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,978 INFO L290 TraceCheckUtils]: 2: Hoare triple {1277#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,978 INFO L290 TraceCheckUtils]: 1: Hoare triple {1277#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1277#true} is VALID [2022-04-07 22:59:49,978 INFO L272 TraceCheckUtils]: 0: Hoare triple {1277#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1277#true} is VALID [2022-04-07 22:59:49,979 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:49,980 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [701023509] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:49,980 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:49,980 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-07 22:59:49,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82225557] [2022-04-07 22:59:49,980 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:49,981 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 22:59:49,981 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:49,981 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,000 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:50,000 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 22:59:50,000 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:50,001 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 22:59:50,001 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:59:50,001 INFO L87 Difference]: Start difference. First operand 22 states and 27 transitions. Second operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:50,179 INFO L93 Difference]: Finished difference Result 33 states and 41 transitions. [2022-04-07 22:59:50,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 22:59:50,179 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 22:59:50,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:50,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 37 transitions. [2022-04-07 22:59:50,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 37 transitions. [2022-04-07 22:59:50,181 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 37 transitions. [2022-04-07 22:59:50,220 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:50,220 INFO L225 Difference]: With dead ends: 33 [2022-04-07 22:59:50,220 INFO L226 Difference]: Without dead ends: 26 [2022-04-07 22:59:50,221 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 38 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-07 22:59:50,221 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 22 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:50,221 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 29 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:59:50,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-07 22:59:50,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2022-04-07 22:59:50,240 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:50,240 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,240 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,240 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:50,241 INFO L93 Difference]: Finished difference Result 26 states and 33 transitions. [2022-04-07 22:59:50,241 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 33 transitions. [2022-04-07 22:59:50,241 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:50,241 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:50,242 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-07 22:59:50,242 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-07 22:59:50,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:50,243 INFO L93 Difference]: Finished difference Result 26 states and 33 transitions. [2022-04-07 22:59:50,243 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 33 transitions. [2022-04-07 22:59:50,243 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:50,243 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:50,243 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:50,243 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:50,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.380952380952381) internal successors, (29), 21 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 33 transitions. [2022-04-07 22:59:50,244 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 33 transitions. Word has length 20 [2022-04-07 22:59:50,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:50,244 INFO L478 AbstractCegarLoop]: Abstraction has 26 states and 33 transitions. [2022-04-07 22:59:50,245 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:50,245 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 33 transitions. [2022-04-07 22:59:50,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-07 22:59:50,245 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:50,245 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:50,268 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:50,451 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:50,452 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:50,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:50,452 INFO L85 PathProgramCache]: Analyzing trace with hash -765770159, now seen corresponding path program 1 times [2022-04-07 22:59:50,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:50,452 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593111176] [2022-04-07 22:59:50,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:50,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:50,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:50,548 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:50,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:50,553 INFO L290 TraceCheckUtils]: 0: Hoare triple {1553#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1543#true} is VALID [2022-04-07 22:59:50,553 INFO L290 TraceCheckUtils]: 1: Hoare triple {1543#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,554 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1543#true} {1543#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,559 INFO L272 TraceCheckUtils]: 0: Hoare triple {1543#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1553#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:50,559 INFO L290 TraceCheckUtils]: 1: Hoare triple {1553#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1543#true} is VALID [2022-04-07 22:59:50,559 INFO L290 TraceCheckUtils]: 2: Hoare triple {1543#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,560 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1543#true} {1543#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,560 INFO L272 TraceCheckUtils]: 4: Hoare triple {1543#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,560 INFO L290 TraceCheckUtils]: 5: Hoare triple {1543#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1548#(= main_~y~0 0)} is VALID [2022-04-07 22:59:50,561 INFO L290 TraceCheckUtils]: 6: Hoare triple {1548#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:50,561 INFO L290 TraceCheckUtils]: 7: Hoare triple {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:50,561 INFO L290 TraceCheckUtils]: 8: Hoare triple {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,562 INFO L290 TraceCheckUtils]: 9: Hoare triple {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1551#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 22:59:50,563 INFO L290 TraceCheckUtils]: 10: Hoare triple {1551#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1551#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 22:59:50,563 INFO L290 TraceCheckUtils]: 11: Hoare triple {1551#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,564 INFO L290 TraceCheckUtils]: 12: Hoare triple {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,564 INFO L290 TraceCheckUtils]: 13: Hoare triple {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,565 INFO L290 TraceCheckUtils]: 14: Hoare triple {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,565 INFO L290 TraceCheckUtils]: 15: Hoare triple {1552#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:50,565 INFO L272 TraceCheckUtils]: 16: Hoare triple {1544#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1544#false} is VALID [2022-04-07 22:59:50,565 INFO L290 TraceCheckUtils]: 17: Hoare triple {1544#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1544#false} is VALID [2022-04-07 22:59:50,566 INFO L290 TraceCheckUtils]: 18: Hoare triple {1544#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:50,566 INFO L290 TraceCheckUtils]: 19: Hoare triple {1544#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:50,566 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:59:50,566 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:50,566 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593111176] [2022-04-07 22:59:50,566 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [593111176] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:50,566 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1019868218] [2022-04-07 22:59:50,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:50,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:50,567 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:50,568 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:50,587 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 22:59:50,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:50,613 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-07 22:59:50,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:50,620 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:50,907 INFO L272 TraceCheckUtils]: 0: Hoare triple {1543#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,908 INFO L290 TraceCheckUtils]: 1: Hoare triple {1543#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1543#true} is VALID [2022-04-07 22:59:50,908 INFO L290 TraceCheckUtils]: 2: Hoare triple {1543#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,908 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1543#true} {1543#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,908 INFO L272 TraceCheckUtils]: 4: Hoare triple {1543#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:50,908 INFO L290 TraceCheckUtils]: 5: Hoare triple {1543#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1548#(= main_~y~0 0)} is VALID [2022-04-07 22:59:50,909 INFO L290 TraceCheckUtils]: 6: Hoare triple {1548#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:50,909 INFO L290 TraceCheckUtils]: 7: Hoare triple {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:50,910 INFO L290 TraceCheckUtils]: 8: Hoare triple {1549#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1581#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:50,911 INFO L290 TraceCheckUtils]: 9: Hoare triple {1581#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1585#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:50,911 INFO L290 TraceCheckUtils]: 10: Hoare triple {1585#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1585#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:50,912 INFO L290 TraceCheckUtils]: 11: Hoare triple {1585#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1592#(and (<= main_~z~0 1) (= main_~z~0 (+ main_~y~0 1)) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,912 INFO L290 TraceCheckUtils]: 12: Hoare triple {1592#(and (<= main_~z~0 1) (= main_~z~0 (+ main_~y~0 1)) (<= 1 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1592#(and (<= main_~z~0 1) (= main_~z~0 (+ main_~y~0 1)) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,913 INFO L290 TraceCheckUtils]: 13: Hoare triple {1592#(and (<= main_~z~0 1) (= main_~z~0 (+ main_~y~0 1)) (<= 1 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,913 INFO L290 TraceCheckUtils]: 14: Hoare triple {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:50,914 INFO L290 TraceCheckUtils]: 15: Hoare triple {1550#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:50,914 INFO L272 TraceCheckUtils]: 16: Hoare triple {1544#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1544#false} is VALID [2022-04-07 22:59:50,914 INFO L290 TraceCheckUtils]: 17: Hoare triple {1544#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1544#false} is VALID [2022-04-07 22:59:50,914 INFO L290 TraceCheckUtils]: 18: Hoare triple {1544#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:50,915 INFO L290 TraceCheckUtils]: 19: Hoare triple {1544#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:50,915 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:50,915 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:51,001 INFO L290 TraceCheckUtils]: 19: Hoare triple {1544#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:51,001 INFO L290 TraceCheckUtils]: 18: Hoare triple {1544#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:51,002 INFO L290 TraceCheckUtils]: 17: Hoare triple {1544#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1544#false} is VALID [2022-04-07 22:59:51,002 INFO L272 TraceCheckUtils]: 16: Hoare triple {1544#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1544#false} is VALID [2022-04-07 22:59:51,002 INFO L290 TraceCheckUtils]: 15: Hoare triple {1629#(< 0 (mod main_~z~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1544#false} is VALID [2022-04-07 22:59:51,003 INFO L290 TraceCheckUtils]: 14: Hoare triple {1629#(< 0 (mod main_~z~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1629#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:59:51,003 INFO L290 TraceCheckUtils]: 13: Hoare triple {1629#(< 0 (mod main_~z~0 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1629#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:59:51,003 INFO L290 TraceCheckUtils]: 12: Hoare triple {1629#(< 0 (mod main_~z~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1629#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:59:51,004 INFO L290 TraceCheckUtils]: 11: Hoare triple {1642#(< 0 (mod (+ main_~z~0 1) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1629#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 22:59:51,005 INFO L290 TraceCheckUtils]: 10: Hoare triple {1642#(< 0 (mod (+ main_~z~0 1) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1642#(< 0 (mod (+ main_~z~0 1) 4294967296))} is VALID [2022-04-07 22:59:51,008 INFO L290 TraceCheckUtils]: 9: Hoare triple {1543#true} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1642#(< 0 (mod (+ main_~z~0 1) 4294967296))} is VALID [2022-04-07 22:59:51,008 INFO L290 TraceCheckUtils]: 8: Hoare triple {1543#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1543#true} is VALID [2022-04-07 22:59:51,008 INFO L290 TraceCheckUtils]: 7: Hoare triple {1543#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:51,008 INFO L290 TraceCheckUtils]: 6: Hoare triple {1543#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1543#true} is VALID [2022-04-07 22:59:51,008 INFO L290 TraceCheckUtils]: 5: Hoare triple {1543#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1543#true} is VALID [2022-04-07 22:59:51,008 INFO L272 TraceCheckUtils]: 4: Hoare triple {1543#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:51,008 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1543#true} {1543#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:51,009 INFO L290 TraceCheckUtils]: 2: Hoare triple {1543#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:51,009 INFO L290 TraceCheckUtils]: 1: Hoare triple {1543#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1543#true} is VALID [2022-04-07 22:59:51,009 INFO L272 TraceCheckUtils]: 0: Hoare triple {1543#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1543#true} is VALID [2022-04-07 22:59:51,009 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 22:59:51,009 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1019868218] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:51,009 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:51,009 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 4] total 13 [2022-04-07 22:59:51,010 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51481752] [2022-04-07 22:59:51,010 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:51,011 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 22:59:51,011 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:51,011 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,044 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:51,044 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-07 22:59:51,044 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:51,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-07 22:59:51,045 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-07 22:59:51,045 INFO L87 Difference]: Start difference. First operand 26 states and 33 transitions. Second operand has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:51,486 INFO L93 Difference]: Finished difference Result 63 states and 90 transitions. [2022-04-07 22:59:51,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-07 22:59:51,486 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-07 22:59:51,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:51,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 68 transitions. [2022-04-07 22:59:51,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 68 transitions. [2022-04-07 22:59:51,490 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 68 transitions. [2022-04-07 22:59:51,559 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:51,561 INFO L225 Difference]: With dead ends: 63 [2022-04-07 22:59:51,561 INFO L226 Difference]: Without dead ends: 49 [2022-04-07 22:59:51,561 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=389, Unknown=0, NotChecked=0, Total=506 [2022-04-07 22:59:51,562 INFO L913 BasicCegarLoop]: 12 mSDtfsCounter, 44 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:51,562 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [44 Valid, 39 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 22:59:51,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-07 22:59:51,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 40. [2022-04-07 22:59:51,586 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:51,587 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,587 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,587 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:51,591 INFO L93 Difference]: Finished difference Result 49 states and 64 transitions. [2022-04-07 22:59:51,591 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 64 transitions. [2022-04-07 22:59:51,591 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:51,591 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:51,592 INFO L74 IsIncluded]: Start isIncluded. First operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-07 22:59:51,592 INFO L87 Difference]: Start difference. First operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-07 22:59:51,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:51,593 INFO L93 Difference]: Finished difference Result 49 states and 64 transitions. [2022-04-07 22:59:51,593 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 64 transitions. [2022-04-07 22:59:51,593 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:51,593 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:51,593 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:51,594 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:51,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.3714285714285714) internal successors, (48), 35 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 52 transitions. [2022-04-07 22:59:51,595 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 52 transitions. Word has length 20 [2022-04-07 22:59:51,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:51,595 INFO L478 AbstractCegarLoop]: Abstraction has 40 states and 52 transitions. [2022-04-07 22:59:51,595 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.769230769230769) internal successors, (36), 12 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:51,595 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 52 transitions. [2022-04-07 22:59:51,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-07 22:59:51,595 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:51,596 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:51,620 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:51,818 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:51,818 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:51,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:51,818 INFO L85 PathProgramCache]: Analyzing trace with hash 2057649504, now seen corresponding path program 1 times [2022-04-07 22:59:51,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:51,819 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150847574] [2022-04-07 22:59:51,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:51,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:51,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:51,904 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:51,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:51,912 INFO L290 TraceCheckUtils]: 0: Hoare triple {1943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1933#true} is VALID [2022-04-07 22:59:51,912 INFO L290 TraceCheckUtils]: 1: Hoare triple {1933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:51,912 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1933#true} {1933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:51,913 INFO L272 TraceCheckUtils]: 0: Hoare triple {1933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:51,913 INFO L290 TraceCheckUtils]: 1: Hoare triple {1943#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1933#true} is VALID [2022-04-07 22:59:51,913 INFO L290 TraceCheckUtils]: 2: Hoare triple {1933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:51,913 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1933#true} {1933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:51,913 INFO L272 TraceCheckUtils]: 4: Hoare triple {1933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:51,914 INFO L290 TraceCheckUtils]: 5: Hoare triple {1933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1938#(= main_~y~0 0)} is VALID [2022-04-07 22:59:51,914 INFO L290 TraceCheckUtils]: 6: Hoare triple {1938#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:51,915 INFO L290 TraceCheckUtils]: 7: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:51,915 INFO L290 TraceCheckUtils]: 8: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:51,916 INFO L290 TraceCheckUtils]: 9: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:51,916 INFO L290 TraceCheckUtils]: 10: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:51,917 INFO L290 TraceCheckUtils]: 11: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1938#(= main_~y~0 0)} is VALID [2022-04-07 22:59:51,917 INFO L290 TraceCheckUtils]: 12: Hoare triple {1938#(= main_~y~0 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1938#(= main_~y~0 0)} is VALID [2022-04-07 22:59:51,917 INFO L290 TraceCheckUtils]: 13: Hoare triple {1938#(= main_~y~0 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:51,918 INFO L290 TraceCheckUtils]: 14: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:51,919 INFO L290 TraceCheckUtils]: 15: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1940#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 22:59:51,919 INFO L290 TraceCheckUtils]: 16: Hoare triple {1940#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1940#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 22:59:51,937 INFO L272 TraceCheckUtils]: 17: Hoare triple {1940#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1941#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:59:51,938 INFO L290 TraceCheckUtils]: 18: Hoare triple {1941#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1942#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:59:51,939 INFO L290 TraceCheckUtils]: 19: Hoare triple {1942#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-07 22:59:51,939 INFO L290 TraceCheckUtils]: 20: Hoare triple {1934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-07 22:59:51,939 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:59:51,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:51,940 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150847574] [2022-04-07 22:59:51,940 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1150847574] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:51,940 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [400118559] [2022-04-07 22:59:51,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:51,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:51,940 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:51,943 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:51,960 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 22:59:51,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:51,983 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 22:59:51,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:51,994 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:52,142 INFO L272 TraceCheckUtils]: 0: Hoare triple {1933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,142 INFO L290 TraceCheckUtils]: 1: Hoare triple {1933#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1933#true} is VALID [2022-04-07 22:59:52,143 INFO L290 TraceCheckUtils]: 2: Hoare triple {1933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,143 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1933#true} {1933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,143 INFO L272 TraceCheckUtils]: 4: Hoare triple {1933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,143 INFO L290 TraceCheckUtils]: 5: Hoare triple {1933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1938#(= main_~y~0 0)} is VALID [2022-04-07 22:59:52,144 INFO L290 TraceCheckUtils]: 6: Hoare triple {1938#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:52,144 INFO L290 TraceCheckUtils]: 7: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:52,146 INFO L290 TraceCheckUtils]: 8: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:52,148 INFO L290 TraceCheckUtils]: 9: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:52,149 INFO L290 TraceCheckUtils]: 10: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:52,149 INFO L290 TraceCheckUtils]: 11: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1938#(= main_~y~0 0)} is VALID [2022-04-07 22:59:52,150 INFO L290 TraceCheckUtils]: 12: Hoare triple {1938#(= main_~y~0 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1938#(= main_~y~0 0)} is VALID [2022-04-07 22:59:52,150 INFO L290 TraceCheckUtils]: 13: Hoare triple {1938#(= main_~y~0 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:52,151 INFO L290 TraceCheckUtils]: 14: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:52,151 INFO L290 TraceCheckUtils]: 15: Hoare triple {1939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {1938#(= main_~y~0 0)} is VALID [2022-04-07 22:59:52,152 INFO L290 TraceCheckUtils]: 16: Hoare triple {1938#(= main_~y~0 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1938#(= main_~y~0 0)} is VALID [2022-04-07 22:59:52,152 INFO L272 TraceCheckUtils]: 17: Hoare triple {1938#(= main_~y~0 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1998#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:59:52,153 INFO L290 TraceCheckUtils]: 18: Hoare triple {1998#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2002#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:59:52,153 INFO L290 TraceCheckUtils]: 19: Hoare triple {2002#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-07 22:59:52,153 INFO L290 TraceCheckUtils]: 20: Hoare triple {1934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-07 22:59:52,153 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 22:59:52,154 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:52,267 INFO L290 TraceCheckUtils]: 20: Hoare triple {1934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-07 22:59:52,267 INFO L290 TraceCheckUtils]: 19: Hoare triple {2002#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1934#false} is VALID [2022-04-07 22:59:52,268 INFO L290 TraceCheckUtils]: 18: Hoare triple {1998#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2002#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:59:52,268 INFO L272 TraceCheckUtils]: 17: Hoare triple {2018#(= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {1998#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:59:52,269 INFO L290 TraceCheckUtils]: 16: Hoare triple {2018#(= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2018#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 22:59:52,270 INFO L290 TraceCheckUtils]: 15: Hoare triple {2025#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2018#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 22:59:52,270 INFO L290 TraceCheckUtils]: 14: Hoare triple {2025#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2025#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-07 22:59:52,271 INFO L290 TraceCheckUtils]: 13: Hoare triple {2018#(= (mod main_~y~0 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2025#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-07 22:59:52,271 INFO L290 TraceCheckUtils]: 12: Hoare triple {1933#true} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2018#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 22:59:52,272 INFO L290 TraceCheckUtils]: 11: Hoare triple {1933#true} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1933#true} is VALID [2022-04-07 22:59:52,272 INFO L290 TraceCheckUtils]: 10: Hoare triple {1933#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,272 INFO L290 TraceCheckUtils]: 9: Hoare triple {1933#true} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1933#true} is VALID [2022-04-07 22:59:52,272 INFO L290 TraceCheckUtils]: 8: Hoare triple {1933#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1933#true} is VALID [2022-04-07 22:59:52,272 INFO L290 TraceCheckUtils]: 7: Hoare triple {1933#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,272 INFO L290 TraceCheckUtils]: 6: Hoare triple {1933#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1933#true} is VALID [2022-04-07 22:59:52,272 INFO L290 TraceCheckUtils]: 5: Hoare triple {1933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1933#true} is VALID [2022-04-07 22:59:52,273 INFO L272 TraceCheckUtils]: 4: Hoare triple {1933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,273 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1933#true} {1933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,273 INFO L290 TraceCheckUtils]: 2: Hoare triple {1933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,273 INFO L290 TraceCheckUtils]: 1: Hoare triple {1933#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1933#true} is VALID [2022-04-07 22:59:52,273 INFO L272 TraceCheckUtils]: 0: Hoare triple {1933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1933#true} is VALID [2022-04-07 22:59:52,273 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:59:52,273 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [400118559] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:52,274 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:52,274 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 12 [2022-04-07 22:59:52,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [374618344] [2022-04-07 22:59:52,274 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:52,275 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:59:52,275 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:52,275 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,306 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:52,306 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-07 22:59:52,306 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:52,307 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-07 22:59:52,307 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2022-04-07 22:59:52,307 INFO L87 Difference]: Start difference. First operand 40 states and 52 transitions. Second operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:52,783 INFO L93 Difference]: Finished difference Result 57 states and 74 transitions. [2022-04-07 22:59:52,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-07 22:59:52,783 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-07 22:59:52,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:52,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-07 22:59:52,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 48 transitions. [2022-04-07 22:59:52,786 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 48 transitions. [2022-04-07 22:59:52,826 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:52,827 INFO L225 Difference]: With dead ends: 57 [2022-04-07 22:59:52,827 INFO L226 Difference]: Without dead ends: 49 [2022-04-07 22:59:52,827 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 38 SyntacticMatches, 6 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=245, Unknown=0, NotChecked=0, Total=306 [2022-04-07 22:59:52,828 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 31 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 59 SdHoareTripleChecker+Invalid, 200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:52,828 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 59 Invalid, 200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 22:59:52,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-07 22:59:52,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 46. [2022-04-07 22:59:52,864 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:52,864 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,864 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,865 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:52,866 INFO L93 Difference]: Finished difference Result 49 states and 65 transitions. [2022-04-07 22:59:52,866 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 65 transitions. [2022-04-07 22:59:52,866 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:52,866 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:52,866 INFO L74 IsIncluded]: Start isIncluded. First operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-07 22:59:52,867 INFO L87 Difference]: Start difference. First operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-07 22:59:52,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:52,868 INFO L93 Difference]: Finished difference Result 49 states and 65 transitions. [2022-04-07 22:59:52,868 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 65 transitions. [2022-04-07 22:59:52,868 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:52,868 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:52,868 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:52,868 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:52,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 41 states have (on average 1.4146341463414633) internal successors, (58), 41 states have internal predecessors, (58), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 62 transitions. [2022-04-07 22:59:52,869 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 62 transitions. Word has length 21 [2022-04-07 22:59:52,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:52,870 INFO L478 AbstractCegarLoop]: Abstraction has 46 states and 62 transitions. [2022-04-07 22:59:52,870 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 9 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:52,870 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 62 transitions. [2022-04-07 22:59:52,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-07 22:59:52,870 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:52,870 INFO L499 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:52,897 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:53,091 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-07 22:59:53,092 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:53,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:53,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1877108748, now seen corresponding path program 2 times [2022-04-07 22:59:53,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:53,092 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2055748690] [2022-04-07 22:59:53,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:53,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:53,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:53,142 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:53,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:53,147 INFO L290 TraceCheckUtils]: 0: Hoare triple {2327#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2320#true} is VALID [2022-04-07 22:59:53,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {2320#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,147 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2320#true} {2320#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,148 INFO L272 TraceCheckUtils]: 0: Hoare triple {2320#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2327#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:53,148 INFO L290 TraceCheckUtils]: 1: Hoare triple {2327#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2320#true} is VALID [2022-04-07 22:59:53,148 INFO L290 TraceCheckUtils]: 2: Hoare triple {2320#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,148 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2320#true} {2320#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,148 INFO L272 TraceCheckUtils]: 4: Hoare triple {2320#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,148 INFO L290 TraceCheckUtils]: 5: Hoare triple {2320#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2320#true} is VALID [2022-04-07 22:59:53,148 INFO L290 TraceCheckUtils]: 6: Hoare triple {2320#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2320#true} is VALID [2022-04-07 22:59:53,149 INFO L290 TraceCheckUtils]: 7: Hoare triple {2320#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,149 INFO L290 TraceCheckUtils]: 8: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,150 INFO L290 TraceCheckUtils]: 9: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,150 INFO L290 TraceCheckUtils]: 10: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,150 INFO L290 TraceCheckUtils]: 11: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,151 INFO L290 TraceCheckUtils]: 12: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,152 INFO L290 TraceCheckUtils]: 13: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,152 INFO L290 TraceCheckUtils]: 14: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2321#false} is VALID [2022-04-07 22:59:53,152 INFO L290 TraceCheckUtils]: 15: Hoare triple {2321#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,152 INFO L290 TraceCheckUtils]: 16: Hoare triple {2321#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2321#false} is VALID [2022-04-07 22:59:53,153 INFO L290 TraceCheckUtils]: 17: Hoare triple {2321#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,153 INFO L272 TraceCheckUtils]: 18: Hoare triple {2321#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2321#false} is VALID [2022-04-07 22:59:53,153 INFO L290 TraceCheckUtils]: 19: Hoare triple {2321#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2321#false} is VALID [2022-04-07 22:59:53,153 INFO L290 TraceCheckUtils]: 20: Hoare triple {2321#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,153 INFO L290 TraceCheckUtils]: 21: Hoare triple {2321#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,153 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:59:53,153 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:53,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2055748690] [2022-04-07 22:59:53,153 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2055748690] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:53,153 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1378235312] [2022-04-07 22:59:53,153 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:59:53,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:53,154 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:53,154 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:53,155 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 22:59:53,187 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:59:53,187 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:53,187 INFO L263 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 6 conjunts are in the unsatisfiable core [2022-04-07 22:59:53,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:53,193 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:53,482 INFO L272 TraceCheckUtils]: 0: Hoare triple {2320#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,483 INFO L290 TraceCheckUtils]: 1: Hoare triple {2320#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2320#true} is VALID [2022-04-07 22:59:53,483 INFO L290 TraceCheckUtils]: 2: Hoare triple {2320#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,483 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2320#true} {2320#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,483 INFO L272 TraceCheckUtils]: 4: Hoare triple {2320#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,483 INFO L290 TraceCheckUtils]: 5: Hoare triple {2320#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2320#true} is VALID [2022-04-07 22:59:53,483 INFO L290 TraceCheckUtils]: 6: Hoare triple {2320#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2320#true} is VALID [2022-04-07 22:59:53,484 INFO L290 TraceCheckUtils]: 7: Hoare triple {2320#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,484 INFO L290 TraceCheckUtils]: 8: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,485 INFO L290 TraceCheckUtils]: 9: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,486 INFO L290 TraceCheckUtils]: 10: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,486 INFO L290 TraceCheckUtils]: 11: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,486 INFO L290 TraceCheckUtils]: 12: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,487 INFO L290 TraceCheckUtils]: 13: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,488 INFO L290 TraceCheckUtils]: 14: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2321#false} is VALID [2022-04-07 22:59:53,488 INFO L290 TraceCheckUtils]: 15: Hoare triple {2321#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,488 INFO L290 TraceCheckUtils]: 16: Hoare triple {2321#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2321#false} is VALID [2022-04-07 22:59:53,488 INFO L290 TraceCheckUtils]: 17: Hoare triple {2321#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,488 INFO L272 TraceCheckUtils]: 18: Hoare triple {2321#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2321#false} is VALID [2022-04-07 22:59:53,488 INFO L290 TraceCheckUtils]: 19: Hoare triple {2321#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2321#false} is VALID [2022-04-07 22:59:53,489 INFO L290 TraceCheckUtils]: 20: Hoare triple {2321#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,489 INFO L290 TraceCheckUtils]: 21: Hoare triple {2321#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,489 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:59:53,489 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:53,703 INFO L290 TraceCheckUtils]: 21: Hoare triple {2321#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,703 INFO L290 TraceCheckUtils]: 20: Hoare triple {2321#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,704 INFO L290 TraceCheckUtils]: 19: Hoare triple {2321#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2321#false} is VALID [2022-04-07 22:59:53,704 INFO L272 TraceCheckUtils]: 18: Hoare triple {2321#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2321#false} is VALID [2022-04-07 22:59:53,704 INFO L290 TraceCheckUtils]: 17: Hoare triple {2321#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,704 INFO L290 TraceCheckUtils]: 16: Hoare triple {2321#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {2321#false} is VALID [2022-04-07 22:59:53,704 INFO L290 TraceCheckUtils]: 15: Hoare triple {2321#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2321#false} is VALID [2022-04-07 22:59:53,705 INFO L290 TraceCheckUtils]: 14: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2321#false} is VALID [2022-04-07 22:59:53,706 INFO L290 TraceCheckUtils]: 13: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,706 INFO L290 TraceCheckUtils]: 12: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,706 INFO L290 TraceCheckUtils]: 11: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,707 INFO L290 TraceCheckUtils]: 10: Hoare triple {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,708 INFO L290 TraceCheckUtils]: 9: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2326#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 22:59:53,708 INFO L290 TraceCheckUtils]: 8: Hoare triple {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,708 INFO L290 TraceCheckUtils]: 7: Hoare triple {2320#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2325#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 22:59:53,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {2320#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2320#true} is VALID [2022-04-07 22:59:53,709 INFO L290 TraceCheckUtils]: 5: Hoare triple {2320#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2320#true} is VALID [2022-04-07 22:59:53,709 INFO L272 TraceCheckUtils]: 4: Hoare triple {2320#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,709 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2320#true} {2320#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,709 INFO L290 TraceCheckUtils]: 2: Hoare triple {2320#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {2320#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2320#true} is VALID [2022-04-07 22:59:53,709 INFO L272 TraceCheckUtils]: 0: Hoare triple {2320#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2320#true} is VALID [2022-04-07 22:59:53,709 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:59:53,710 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1378235312] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:53,710 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:53,710 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-07 22:59:53,712 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775703875] [2022-04-07 22:59:53,712 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:53,713 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 22:59:53,713 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:53,713 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,732 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:53,732 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 22:59:53,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:53,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 22:59:53,732 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 22:59:53,733 INFO L87 Difference]: Start difference. First operand 46 states and 62 transitions. Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:53,862 INFO L93 Difference]: Finished difference Result 57 states and 77 transitions. [2022-04-07 22:59:53,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 22:59:53,863 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 22:59:53,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:53,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 37 transitions. [2022-04-07 22:59:53,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 37 transitions. [2022-04-07 22:59:53,866 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 37 transitions. [2022-04-07 22:59:53,900 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:53,901 INFO L225 Difference]: With dead ends: 57 [2022-04-07 22:59:53,901 INFO L226 Difference]: Without dead ends: 38 [2022-04-07 22:59:53,901 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-07 22:59:53,902 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 22 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:53,902 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 30 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 22:59:53,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-07 22:59:53,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2022-04-07 22:59:53,920 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:53,920 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,920 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,920 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:53,921 INFO L93 Difference]: Finished difference Result 38 states and 52 transitions. [2022-04-07 22:59:53,921 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 52 transitions. [2022-04-07 22:59:53,922 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:53,922 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:53,922 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-07 22:59:53,922 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-07 22:59:53,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:53,923 INFO L93 Difference]: Finished difference Result 38 states and 52 transitions. [2022-04-07 22:59:53,923 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 52 transitions. [2022-04-07 22:59:53,923 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:53,923 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:53,923 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:53,923 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:53,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 52 transitions. [2022-04-07 22:59:53,924 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 52 transitions. Word has length 22 [2022-04-07 22:59:53,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:53,925 INFO L478 AbstractCegarLoop]: Abstraction has 38 states and 52 transitions. [2022-04-07 22:59:53,925 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.8) internal successors, (19), 4 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:53,925 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 52 transitions. [2022-04-07 22:59:53,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-07 22:59:53,925 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:53,925 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:53,950 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:54,139 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:54,140 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:54,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:54,140 INFO L85 PathProgramCache]: Analyzing trace with hash -1264431284, now seen corresponding path program 2 times [2022-04-07 22:59:54,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:54,140 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198788091] [2022-04-07 22:59:54,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:54,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:54,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:54,246 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:54,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:54,252 INFO L290 TraceCheckUtils]: 0: Hoare triple {2672#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2662#true} is VALID [2022-04-07 22:59:54,252 INFO L290 TraceCheckUtils]: 1: Hoare triple {2662#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,252 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2662#true} {2662#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,253 INFO L272 TraceCheckUtils]: 0: Hoare triple {2662#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2672#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:54,253 INFO L290 TraceCheckUtils]: 1: Hoare triple {2672#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2662#true} is VALID [2022-04-07 22:59:54,253 INFO L290 TraceCheckUtils]: 2: Hoare triple {2662#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,253 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2662#true} {2662#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,253 INFO L272 TraceCheckUtils]: 4: Hoare triple {2662#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,254 INFO L290 TraceCheckUtils]: 5: Hoare triple {2662#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2667#(= main_~y~0 0)} is VALID [2022-04-07 22:59:54,254 INFO L290 TraceCheckUtils]: 6: Hoare triple {2667#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2668#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:54,255 INFO L290 TraceCheckUtils]: 7: Hoare triple {2668#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:54,255 INFO L290 TraceCheckUtils]: 8: Hoare triple {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:54,256 INFO L290 TraceCheckUtils]: 9: Hoare triple {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2670#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:54,256 INFO L290 TraceCheckUtils]: 10: Hoare triple {2670#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2671#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:54,257 INFO L290 TraceCheckUtils]: 11: Hoare triple {2671#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,257 INFO L290 TraceCheckUtils]: 12: Hoare triple {2663#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2663#false} is VALID [2022-04-07 22:59:54,257 INFO L290 TraceCheckUtils]: 13: Hoare triple {2663#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2663#false} is VALID [2022-04-07 22:59:54,257 INFO L290 TraceCheckUtils]: 14: Hoare triple {2663#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,257 INFO L290 TraceCheckUtils]: 15: Hoare triple {2663#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2663#false} is VALID [2022-04-07 22:59:54,257 INFO L290 TraceCheckUtils]: 16: Hoare triple {2663#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,258 INFO L290 TraceCheckUtils]: 17: Hoare triple {2663#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,258 INFO L272 TraceCheckUtils]: 18: Hoare triple {2663#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2663#false} is VALID [2022-04-07 22:59:54,258 INFO L290 TraceCheckUtils]: 19: Hoare triple {2663#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2663#false} is VALID [2022-04-07 22:59:54,258 INFO L290 TraceCheckUtils]: 20: Hoare triple {2663#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,258 INFO L290 TraceCheckUtils]: 21: Hoare triple {2663#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,258 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:59:54,258 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:54,258 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198788091] [2022-04-07 22:59:54,259 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [198788091] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:54,259 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [320364121] [2022-04-07 22:59:54,259 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:59:54,259 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:54,259 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:54,263 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:54,289 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 22:59:54,307 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:59:54,307 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:54,308 INFO L263 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-07 22:59:54,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:54,314 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:54,421 INFO L272 TraceCheckUtils]: 0: Hoare triple {2662#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {2662#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2662#true} is VALID [2022-04-07 22:59:54,421 INFO L290 TraceCheckUtils]: 2: Hoare triple {2662#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,421 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2662#true} {2662#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,421 INFO L272 TraceCheckUtils]: 4: Hoare triple {2662#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,422 INFO L290 TraceCheckUtils]: 5: Hoare triple {2662#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2667#(= main_~y~0 0)} is VALID [2022-04-07 22:59:54,422 INFO L290 TraceCheckUtils]: 6: Hoare triple {2667#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2668#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:54,423 INFO L290 TraceCheckUtils]: 7: Hoare triple {2668#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:54,424 INFO L290 TraceCheckUtils]: 8: Hoare triple {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:54,424 INFO L290 TraceCheckUtils]: 9: Hoare triple {2669#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2703#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:54,424 INFO L290 TraceCheckUtils]: 10: Hoare triple {2703#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2707#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 22:59:54,425 INFO L290 TraceCheckUtils]: 11: Hoare triple {2707#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,425 INFO L290 TraceCheckUtils]: 12: Hoare triple {2663#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2663#false} is VALID [2022-04-07 22:59:54,425 INFO L290 TraceCheckUtils]: 13: Hoare triple {2663#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2663#false} is VALID [2022-04-07 22:59:54,425 INFO L290 TraceCheckUtils]: 14: Hoare triple {2663#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,426 INFO L290 TraceCheckUtils]: 15: Hoare triple {2663#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2663#false} is VALID [2022-04-07 22:59:54,426 INFO L290 TraceCheckUtils]: 16: Hoare triple {2663#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,426 INFO L290 TraceCheckUtils]: 17: Hoare triple {2663#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,426 INFO L272 TraceCheckUtils]: 18: Hoare triple {2663#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2663#false} is VALID [2022-04-07 22:59:54,426 INFO L290 TraceCheckUtils]: 19: Hoare triple {2663#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2663#false} is VALID [2022-04-07 22:59:54,426 INFO L290 TraceCheckUtils]: 20: Hoare triple {2663#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,426 INFO L290 TraceCheckUtils]: 21: Hoare triple {2663#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,426 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:59:54,426 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:54,626 INFO L290 TraceCheckUtils]: 21: Hoare triple {2663#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,626 INFO L290 TraceCheckUtils]: 20: Hoare triple {2744#(not (<= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2663#false} is VALID [2022-04-07 22:59:54,627 INFO L290 TraceCheckUtils]: 19: Hoare triple {2748#(< 0 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2744#(not (<= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:59:54,627 INFO L272 TraceCheckUtils]: 18: Hoare triple {2752#(= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {2748#(< 0 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:59:54,627 INFO L290 TraceCheckUtils]: 17: Hoare triple {2752#(= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2752#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 22:59:54,628 INFO L290 TraceCheckUtils]: 16: Hoare triple {2752#(= (mod main_~y~0 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2752#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 22:59:54,628 INFO L290 TraceCheckUtils]: 15: Hoare triple {2762#(= (mod (+ main_~y~0 1) 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2752#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 22:59:54,629 INFO L290 TraceCheckUtils]: 14: Hoare triple {2762#(= (mod (+ main_~y~0 1) 4294967296) 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2762#(= (mod (+ main_~y~0 1) 4294967296) 0)} is VALID [2022-04-07 22:59:54,629 INFO L290 TraceCheckUtils]: 13: Hoare triple {2752#(= (mod main_~y~0 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2762#(= (mod (+ main_~y~0 1) 4294967296) 0)} is VALID [2022-04-07 22:59:54,630 INFO L290 TraceCheckUtils]: 12: Hoare triple {2772#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2752#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 22:59:54,631 INFO L290 TraceCheckUtils]: 11: Hoare triple {2776#(or (= (mod (+ main_~y~0 4294967295) 4294967296) 0) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2772#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-07 22:59:54,636 INFO L290 TraceCheckUtils]: 10: Hoare triple {2780#(or (= (mod (+ main_~y~0 4294967295) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2776#(or (= (mod (+ main_~y~0 4294967295) 4294967296) 0) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 22:59:54,636 INFO L290 TraceCheckUtils]: 9: Hoare triple {2662#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2780#(or (= (mod (+ main_~y~0 4294967295) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:59:54,636 INFO L290 TraceCheckUtils]: 8: Hoare triple {2662#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,636 INFO L290 TraceCheckUtils]: 7: Hoare triple {2662#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2662#true} is VALID [2022-04-07 22:59:54,637 INFO L290 TraceCheckUtils]: 6: Hoare triple {2662#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2662#true} is VALID [2022-04-07 22:59:54,637 INFO L290 TraceCheckUtils]: 5: Hoare triple {2662#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2662#true} is VALID [2022-04-07 22:59:54,637 INFO L272 TraceCheckUtils]: 4: Hoare triple {2662#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,637 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2662#true} {2662#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,637 INFO L290 TraceCheckUtils]: 2: Hoare triple {2662#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,637 INFO L290 TraceCheckUtils]: 1: Hoare triple {2662#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2662#true} is VALID [2022-04-07 22:59:54,637 INFO L272 TraceCheckUtils]: 0: Hoare triple {2662#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2662#true} is VALID [2022-04-07 22:59:54,637 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 22:59:54,638 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [320364121] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:54,638 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:54,638 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 9] total 17 [2022-04-07 22:59:54,638 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005738931] [2022-04-07 22:59:54,638 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:54,638 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 22:59:54,639 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:54,639 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:54,671 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:54,671 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-07 22:59:54,671 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:54,671 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-07 22:59:54,672 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2022-04-07 22:59:54,672 INFO L87 Difference]: Start difference. First operand 38 states and 52 transitions. Second operand has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:55,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:55,554 INFO L93 Difference]: Finished difference Result 87 states and 126 transitions. [2022-04-07 22:59:55,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-07 22:59:55,554 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-07 22:59:55,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:55,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:55,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 85 transitions. [2022-04-07 22:59:55,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:55,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 85 transitions. [2022-04-07 22:59:55,557 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 85 transitions. [2022-04-07 22:59:55,632 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:55,633 INFO L225 Difference]: With dead ends: 87 [2022-04-07 22:59:55,633 INFO L226 Difference]: Without dead ends: 59 [2022-04-07 22:59:55,634 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=157, Invalid=899, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 22:59:55,634 INFO L913 BasicCegarLoop]: 22 mSDtfsCounter, 47 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 313 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 313 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:55,634 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [47 Valid, 64 Invalid, 366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 313 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 22:59:55,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-04-07 22:59:55,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 49. [2022-04-07 22:59:55,678 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:55,679 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:55,679 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:55,679 INFO L87 Difference]: Start difference. First operand 59 states. Second operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:55,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:55,680 INFO L93 Difference]: Finished difference Result 59 states and 81 transitions. [2022-04-07 22:59:55,681 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 81 transitions. [2022-04-07 22:59:55,681 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:55,681 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:55,681 INFO L74 IsIncluded]: Start isIncluded. First operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-07 22:59:55,681 INFO L87 Difference]: Start difference. First operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-07 22:59:55,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:55,682 INFO L93 Difference]: Finished difference Result 59 states and 81 transitions. [2022-04-07 22:59:55,682 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 81 transitions. [2022-04-07 22:59:55,683 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:55,683 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:55,683 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:55,683 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:55,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 44 states have (on average 1.4545454545454546) internal successors, (64), 44 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:55,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 68 transitions. [2022-04-07 22:59:55,684 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 68 transitions. Word has length 22 [2022-04-07 22:59:55,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:55,684 INFO L478 AbstractCegarLoop]: Abstraction has 49 states and 68 transitions. [2022-04-07 22:59:55,684 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 15 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:55,684 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 68 transitions. [2022-04-07 22:59:55,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 22:59:55,685 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:55,685 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:55,704 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:55,899 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:55,899 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:55,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:55,900 INFO L85 PathProgramCache]: Analyzing trace with hash -1977751131, now seen corresponding path program 2 times [2022-04-07 22:59:55,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:55,900 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1651881052] [2022-04-07 22:59:55,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:55,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:55,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:56,021 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:56,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:56,027 INFO L290 TraceCheckUtils]: 0: Hoare triple {3158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3146#true} is VALID [2022-04-07 22:59:56,027 INFO L290 TraceCheckUtils]: 1: Hoare triple {3146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,028 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3146#true} {3146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,028 INFO L272 TraceCheckUtils]: 0: Hoare triple {3146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:56,028 INFO L290 TraceCheckUtils]: 1: Hoare triple {3158#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3146#true} is VALID [2022-04-07 22:59:56,028 INFO L290 TraceCheckUtils]: 2: Hoare triple {3146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,028 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3146#true} {3146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,028 INFO L272 TraceCheckUtils]: 4: Hoare triple {3146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,029 INFO L290 TraceCheckUtils]: 5: Hoare triple {3146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3151#(= main_~y~0 0)} is VALID [2022-04-07 22:59:56,029 INFO L290 TraceCheckUtils]: 6: Hoare triple {3151#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3152#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:56,030 INFO L290 TraceCheckUtils]: 7: Hoare triple {3152#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3153#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:56,030 INFO L290 TraceCheckUtils]: 8: Hoare triple {3153#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3153#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:56,030 INFO L290 TraceCheckUtils]: 9: Hoare triple {3153#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:56,031 INFO L290 TraceCheckUtils]: 10: Hoare triple {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3155#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:56,031 INFO L290 TraceCheckUtils]: 11: Hoare triple {3155#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3156#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 22:59:56,032 INFO L290 TraceCheckUtils]: 12: Hoare triple {3156#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3156#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 22:59:56,032 INFO L290 TraceCheckUtils]: 13: Hoare triple {3156#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3155#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:56,039 INFO L290 TraceCheckUtils]: 14: Hoare triple {3155#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:56,040 INFO L290 TraceCheckUtils]: 15: Hoare triple {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:56,040 INFO L290 TraceCheckUtils]: 16: Hoare triple {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:56,041 INFO L290 TraceCheckUtils]: 17: Hoare triple {3154#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3157#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 22:59:56,042 INFO L290 TraceCheckUtils]: 18: Hoare triple {3157#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,042 INFO L272 TraceCheckUtils]: 19: Hoare triple {3147#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3147#false} is VALID [2022-04-07 22:59:56,042 INFO L290 TraceCheckUtils]: 20: Hoare triple {3147#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3147#false} is VALID [2022-04-07 22:59:56,042 INFO L290 TraceCheckUtils]: 21: Hoare triple {3147#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,042 INFO L290 TraceCheckUtils]: 22: Hoare triple {3147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,042 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 22:59:56,042 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:56,042 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1651881052] [2022-04-07 22:59:56,042 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1651881052] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:56,042 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1363385220] [2022-04-07 22:59:56,043 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:59:56,043 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:56,043 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:56,043 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:56,044 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 22:59:56,077 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:59:56,077 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:56,078 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-07 22:59:56,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:56,087 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:56,196 INFO L272 TraceCheckUtils]: 0: Hoare triple {3146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,196 INFO L290 TraceCheckUtils]: 1: Hoare triple {3146#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3146#true} is VALID [2022-04-07 22:59:56,197 INFO L290 TraceCheckUtils]: 2: Hoare triple {3146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,197 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3146#true} {3146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,197 INFO L272 TraceCheckUtils]: 4: Hoare triple {3146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,197 INFO L290 TraceCheckUtils]: 5: Hoare triple {3146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3146#true} is VALID [2022-04-07 22:59:56,198 INFO L290 TraceCheckUtils]: 6: Hoare triple {3146#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 22:59:56,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 22:59:56,199 INFO L290 TraceCheckUtils]: 8: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 22:59:56,199 INFO L290 TraceCheckUtils]: 9: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 22:59:56,200 INFO L290 TraceCheckUtils]: 10: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 22:59:56,201 INFO L290 TraceCheckUtils]: 11: Hoare triple {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,201 INFO L290 TraceCheckUtils]: 12: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,202 INFO L290 TraceCheckUtils]: 13: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,202 INFO L290 TraceCheckUtils]: 14: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,203 INFO L290 TraceCheckUtils]: 15: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,203 INFO L290 TraceCheckUtils]: 16: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,203 INFO L290 TraceCheckUtils]: 17: Hoare triple {3147#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3147#false} is VALID [2022-04-07 22:59:56,203 INFO L290 TraceCheckUtils]: 18: Hoare triple {3147#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,203 INFO L272 TraceCheckUtils]: 19: Hoare triple {3147#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3147#false} is VALID [2022-04-07 22:59:56,203 INFO L290 TraceCheckUtils]: 20: Hoare triple {3147#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3147#false} is VALID [2022-04-07 22:59:56,204 INFO L290 TraceCheckUtils]: 21: Hoare triple {3147#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,204 INFO L290 TraceCheckUtils]: 22: Hoare triple {3147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,204 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:59:56,204 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:56,281 INFO L290 TraceCheckUtils]: 22: Hoare triple {3147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,281 INFO L290 TraceCheckUtils]: 21: Hoare triple {3147#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,281 INFO L290 TraceCheckUtils]: 20: Hoare triple {3147#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3147#false} is VALID [2022-04-07 22:59:56,281 INFO L272 TraceCheckUtils]: 19: Hoare triple {3147#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3147#false} is VALID [2022-04-07 22:59:56,281 INFO L290 TraceCheckUtils]: 18: Hoare triple {3147#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,281 INFO L290 TraceCheckUtils]: 17: Hoare triple {3147#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3147#false} is VALID [2022-04-07 22:59:56,281 INFO L290 TraceCheckUtils]: 16: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3147#false} is VALID [2022-04-07 22:59:56,282 INFO L290 TraceCheckUtils]: 15: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,282 INFO L290 TraceCheckUtils]: 14: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,282 INFO L290 TraceCheckUtils]: 13: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,283 INFO L290 TraceCheckUtils]: 12: Hoare triple {3197#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,288 INFO L290 TraceCheckUtils]: 11: Hoare triple {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3197#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 22:59:56,288 INFO L290 TraceCheckUtils]: 10: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 22:59:56,289 INFO L290 TraceCheckUtils]: 9: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 22:59:56,289 INFO L290 TraceCheckUtils]: 8: Hoare triple {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 22:59:56,289 INFO L290 TraceCheckUtils]: 7: Hoare triple {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3184#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 22:59:56,290 INFO L290 TraceCheckUtils]: 6: Hoare triple {3146#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3180#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 22:59:56,290 INFO L290 TraceCheckUtils]: 5: Hoare triple {3146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3146#true} is VALID [2022-04-07 22:59:56,290 INFO L272 TraceCheckUtils]: 4: Hoare triple {3146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,290 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3146#true} {3146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,290 INFO L290 TraceCheckUtils]: 2: Hoare triple {3146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,290 INFO L290 TraceCheckUtils]: 1: Hoare triple {3146#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3146#true} is VALID [2022-04-07 22:59:56,291 INFO L272 TraceCheckUtils]: 0: Hoare triple {3146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3146#true} is VALID [2022-04-07 22:59:56,291 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 22:59:56,291 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1363385220] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:56,291 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:56,291 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5, 5] total 13 [2022-04-07 22:59:56,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2084698214] [2022-04-07 22:59:56,291 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:56,292 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:59:56,292 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:56,292 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:56,317 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:56,317 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-07 22:59:56,317 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:56,318 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-07 22:59:56,318 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2022-04-07 22:59:56,318 INFO L87 Difference]: Start difference. First operand 49 states and 68 transitions. Second operand has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:57,359 INFO L93 Difference]: Finished difference Result 80 states and 116 transitions. [2022-04-07 22:59:57,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-07 22:59:57,360 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 22:59:57,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:59:57,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 84 transitions. [2022-04-07 22:59:57,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 84 transitions. [2022-04-07 22:59:57,363 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 84 transitions. [2022-04-07 22:59:57,437 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 84 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:57,438 INFO L225 Difference]: With dead ends: 80 [2022-04-07 22:59:57,438 INFO L226 Difference]: Without dead ends: 59 [2022-04-07 22:59:57,439 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=194, Invalid=862, Unknown=0, NotChecked=0, Total=1056 [2022-04-07 22:59:57,439 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 52 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 284 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 340 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 284 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 22:59:57,440 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [52 Valid, 68 Invalid, 340 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 284 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 22:59:57,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-04-07 22:59:57,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 56. [2022-04-07 22:59:57,492 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:59:57,492 INFO L82 GeneralOperation]: Start isEquivalent. First operand 59 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,492 INFO L74 IsIncluded]: Start isIncluded. First operand 59 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,492 INFO L87 Difference]: Start difference. First operand 59 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:57,495 INFO L93 Difference]: Finished difference Result 59 states and 77 transitions. [2022-04-07 22:59:57,495 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 77 transitions. [2022-04-07 22:59:57,495 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:57,496 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:57,496 INFO L74 IsIncluded]: Start isIncluded. First operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-07 22:59:57,496 INFO L87 Difference]: Start difference. First operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 59 states. [2022-04-07 22:59:57,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:59:57,497 INFO L93 Difference]: Finished difference Result 59 states and 77 transitions. [2022-04-07 22:59:57,497 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 77 transitions. [2022-04-07 22:59:57,497 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:59:57,497 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:59:57,497 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:59:57,498 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:59:57,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 74 transitions. [2022-04-07 22:59:57,499 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 74 transitions. Word has length 23 [2022-04-07 22:59:57,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:59:57,499 INFO L478 AbstractCegarLoop]: Abstraction has 56 states and 74 transitions. [2022-04-07 22:59:57,499 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:57,499 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 74 transitions. [2022-04-07 22:59:57,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-07 22:59:57,500 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:59:57,500 INFO L499 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:59:57,520 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-07 22:59:57,712 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-07 22:59:57,713 INFO L403 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:59:57,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:59:57,713 INFO L85 PathProgramCache]: Analyzing trace with hash -1606353935, now seen corresponding path program 3 times [2022-04-07 22:59:57,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:59:57,713 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901932495] [2022-04-07 22:59:57,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:59:57,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:59:57,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:57,812 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:59:57,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:57,817 INFO L290 TraceCheckUtils]: 0: Hoare triple {3643#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3632#true} is VALID [2022-04-07 22:59:57,817 INFO L290 TraceCheckUtils]: 1: Hoare triple {3632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:57,817 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3632#true} {3632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:57,817 INFO L272 TraceCheckUtils]: 0: Hoare triple {3632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3643#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:59:57,818 INFO L290 TraceCheckUtils]: 1: Hoare triple {3643#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3632#true} is VALID [2022-04-07 22:59:57,818 INFO L290 TraceCheckUtils]: 2: Hoare triple {3632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:57,818 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3632#true} {3632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:57,818 INFO L272 TraceCheckUtils]: 4: Hoare triple {3632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:57,818 INFO L290 TraceCheckUtils]: 5: Hoare triple {3632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3637#(= main_~y~0 0)} is VALID [2022-04-07 22:59:57,819 INFO L290 TraceCheckUtils]: 6: Hoare triple {3637#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3638#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 22:59:57,819 INFO L290 TraceCheckUtils]: 7: Hoare triple {3638#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3639#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 22:59:57,820 INFO L290 TraceCheckUtils]: 8: Hoare triple {3639#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:57,821 INFO L290 TraceCheckUtils]: 9: Hoare triple {3640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 22:59:57,821 INFO L290 TraceCheckUtils]: 10: Hoare triple {3640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3641#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 22:59:57,822 INFO L290 TraceCheckUtils]: 11: Hoare triple {3641#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3642#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-07 22:59:57,822 INFO L290 TraceCheckUtils]: 12: Hoare triple {3642#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:57,822 INFO L290 TraceCheckUtils]: 13: Hoare triple {3633#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3633#false} is VALID [2022-04-07 22:59:57,822 INFO L290 TraceCheckUtils]: 14: Hoare triple {3633#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L290 TraceCheckUtils]: 15: Hoare triple {3633#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L290 TraceCheckUtils]: 16: Hoare triple {3633#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L290 TraceCheckUtils]: 17: Hoare triple {3633#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L290 TraceCheckUtils]: 18: Hoare triple {3633#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L290 TraceCheckUtils]: 19: Hoare triple {3633#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L272 TraceCheckUtils]: 20: Hoare triple {3633#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L290 TraceCheckUtils]: 21: Hoare triple {3633#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L290 TraceCheckUtils]: 22: Hoare triple {3633#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:57,823 INFO L290 TraceCheckUtils]: 23: Hoare triple {3633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:57,824 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-04-07 22:59:57,824 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:59:57,824 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901932495] [2022-04-07 22:59:57,824 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1901932495] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:59:57,824 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [82582696] [2022-04-07 22:59:57,824 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:59:57,825 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:59:57,825 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:59:57,827 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:59:57,873 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-07 22:59:57,892 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-07 22:59:57,892 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:59:57,893 INFO L263 TraceCheckSpWp]: Trace formula consists of 96 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-07 22:59:57,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:59:57,901 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:59:58,137 INFO L272 TraceCheckUtils]: 0: Hoare triple {3632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {3632#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3632#true} is VALID [2022-04-07 22:59:58,138 INFO L290 TraceCheckUtils]: 2: Hoare triple {3632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,138 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3632#true} {3632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,138 INFO L272 TraceCheckUtils]: 4: Hoare triple {3632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,138 INFO L290 TraceCheckUtils]: 5: Hoare triple {3632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3632#true} is VALID [2022-04-07 22:59:58,138 INFO L290 TraceCheckUtils]: 6: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-07 22:59:58,138 INFO L290 TraceCheckUtils]: 7: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-07 22:59:58,138 INFO L290 TraceCheckUtils]: 8: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-07 22:59:58,138 INFO L290 TraceCheckUtils]: 9: Hoare triple {3632#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,139 INFO L290 TraceCheckUtils]: 10: Hoare triple {3632#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 22:59:58,139 INFO L290 TraceCheckUtils]: 11: Hoare triple {3677#(= main_~z~0 main_~y~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3681#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-07 22:59:58,140 INFO L290 TraceCheckUtils]: 12: Hoare triple {3681#(= main_~y~0 (+ main_~z~0 1))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3681#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-07 22:59:58,140 INFO L290 TraceCheckUtils]: 13: Hoare triple {3681#(= main_~y~0 (+ main_~z~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3688#(= main_~z~0 (+ main_~y~0 1))} is VALID [2022-04-07 22:59:58,141 INFO L290 TraceCheckUtils]: 14: Hoare triple {3688#(= main_~z~0 (+ main_~y~0 1))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3688#(= main_~z~0 (+ main_~y~0 1))} is VALID [2022-04-07 22:59:58,141 INFO L290 TraceCheckUtils]: 15: Hoare triple {3688#(= main_~z~0 (+ main_~y~0 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 22:59:58,142 INFO L290 TraceCheckUtils]: 16: Hoare triple {3677#(= main_~z~0 main_~y~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 22:59:58,142 INFO L290 TraceCheckUtils]: 17: Hoare triple {3677#(= main_~z~0 main_~y~0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 22:59:58,143 INFO L290 TraceCheckUtils]: 18: Hoare triple {3677#(= main_~z~0 main_~y~0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3677#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 22:59:58,143 INFO L290 TraceCheckUtils]: 19: Hoare triple {3677#(= main_~z~0 main_~y~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3707#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:59:58,144 INFO L272 TraceCheckUtils]: 20: Hoare triple {3707#(not (< 0 (mod main_~y~0 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3711#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:59:58,144 INFO L290 TraceCheckUtils]: 21: Hoare triple {3711#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3715#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:59:58,145 INFO L290 TraceCheckUtils]: 22: Hoare triple {3715#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:58,145 INFO L290 TraceCheckUtils]: 23: Hoare triple {3633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:58,145 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 22:59:58,145 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:59:58,424 INFO L290 TraceCheckUtils]: 23: Hoare triple {3633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:58,425 INFO L290 TraceCheckUtils]: 22: Hoare triple {3715#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3633#false} is VALID [2022-04-07 22:59:58,425 INFO L290 TraceCheckUtils]: 21: Hoare triple {3711#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3715#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:59:58,426 INFO L272 TraceCheckUtils]: 20: Hoare triple {3707#(not (< 0 (mod main_~y~0 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {3711#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:59:58,426 INFO L290 TraceCheckUtils]: 19: Hoare triple {3734#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3707#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 22:59:58,428 INFO L290 TraceCheckUtils]: 18: Hoare triple {3738#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3734#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 22:59:58,430 INFO L290 TraceCheckUtils]: 17: Hoare triple {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {3738#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:59:58,430 INFO L290 TraceCheckUtils]: 16: Hoare triple {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:59:58,431 INFO L290 TraceCheckUtils]: 15: Hoare triple {3749#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:59:58,432 INFO L290 TraceCheckUtils]: 14: Hoare triple {3749#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3749#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:59:58,433 INFO L290 TraceCheckUtils]: 13: Hoare triple {3756#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3749#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-07 22:59:58,434 INFO L290 TraceCheckUtils]: 12: Hoare triple {3756#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3756#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:59:58,435 INFO L290 TraceCheckUtils]: 11: Hoare triple {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3756#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:59:58,435 INFO L290 TraceCheckUtils]: 10: Hoare triple {3632#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3742#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-07 22:59:58,435 INFO L290 TraceCheckUtils]: 9: Hoare triple {3632#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,436 INFO L290 TraceCheckUtils]: 8: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-07 22:59:58,436 INFO L290 TraceCheckUtils]: 7: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-07 22:59:58,436 INFO L290 TraceCheckUtils]: 6: Hoare triple {3632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3632#true} is VALID [2022-04-07 22:59:58,436 INFO L290 TraceCheckUtils]: 5: Hoare triple {3632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3632#true} is VALID [2022-04-07 22:59:58,436 INFO L272 TraceCheckUtils]: 4: Hoare triple {3632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,436 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3632#true} {3632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,436 INFO L290 TraceCheckUtils]: 2: Hoare triple {3632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {3632#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3632#true} is VALID [2022-04-07 22:59:58,437 INFO L272 TraceCheckUtils]: 0: Hoare triple {3632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3632#true} is VALID [2022-04-07 22:59:58,437 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 22:59:58,437 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [82582696] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:59:58,437 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:59:58,437 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 10] total 20 [2022-04-07 22:59:58,437 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1966485973] [2022-04-07 22:59:58,437 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:59:58,438 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 22:59:58,438 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:59:58,438 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:59:58,481 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:59:58,481 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-07 22:59:58,481 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:59:58,482 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-07 22:59:58,482 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=322, Unknown=0, NotChecked=0, Total=380 [2022-04-07 22:59:58,482 INFO L87 Difference]: Start difference. First operand 56 states and 74 transitions. Second operand has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:01,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:01,267 INFO L93 Difference]: Finished difference Result 133 states and 188 transitions. [2022-04-07 23:00:01,267 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-04-07 23:00:01,268 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-07 23:00:01,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:01,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:01,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 130 transitions. [2022-04-07 23:00:01,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:01,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 130 transitions. [2022-04-07 23:00:01,272 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 130 transitions. [2022-04-07 23:00:01,401 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:01,403 INFO L225 Difference]: With dead ends: 133 [2022-04-07 23:00:01,403 INFO L226 Difference]: Without dead ends: 94 [2022-04-07 23:00:01,404 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 40 SyntacticMatches, 4 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 789 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=518, Invalid=3022, Unknown=0, NotChecked=0, Total=3540 [2022-04-07 23:00:01,404 INFO L913 BasicCegarLoop]: 29 mSDtfsCounter, 73 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 722 mSolverCounterSat, 130 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 852 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 130 IncrementalHoareTripleChecker+Valid, 722 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:01,405 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [73 Valid, 91 Invalid, 852 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [130 Valid, 722 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-07 23:00:01,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-07 23:00:01,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 73. [2022-04-07 23:00:01,478 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:01,479 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:01,479 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:01,479 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:01,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:01,481 INFO L93 Difference]: Finished difference Result 94 states and 128 transitions. [2022-04-07 23:00:01,481 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 128 transitions. [2022-04-07 23:00:01,481 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:01,481 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:01,482 INFO L74 IsIncluded]: Start isIncluded. First operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-07 23:00:01,482 INFO L87 Difference]: Start difference. First operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-07 23:00:01,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:01,484 INFO L93 Difference]: Finished difference Result 94 states and 128 transitions. [2022-04-07 23:00:01,484 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 128 transitions. [2022-04-07 23:00:01,484 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:01,484 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:01,484 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:01,484 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:01,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 68 states have (on average 1.411764705882353) internal successors, (96), 68 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:01,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 100 transitions. [2022-04-07 23:00:01,486 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 100 transitions. Word has length 24 [2022-04-07 23:00:01,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:01,486 INFO L478 AbstractCegarLoop]: Abstraction has 73 states and 100 transitions. [2022-04-07 23:00:01,486 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 2.3157894736842106) internal successors, (44), 18 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:01,486 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 100 transitions. [2022-04-07 23:00:01,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 23:00:01,486 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:01,486 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:01,503 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-04-07 23:00:01,691 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-07 23:00:01,691 INFO L403 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:01,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:01,692 INFO L85 PathProgramCache]: Analyzing trace with hash -1576992246, now seen corresponding path program 4 times [2022-04-07 23:00:01,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:01,692 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273838794] [2022-04-07 23:00:01,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:01,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:01,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:01,766 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:01,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:01,770 INFO L290 TraceCheckUtils]: 0: Hoare triple {4341#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4333#true} is VALID [2022-04-07 23:00:01,770 INFO L290 TraceCheckUtils]: 1: Hoare triple {4333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:01,770 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4333#true} {4333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:01,771 INFO L272 TraceCheckUtils]: 0: Hoare triple {4333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4341#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:01,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {4341#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4333#true} is VALID [2022-04-07 23:00:01,771 INFO L290 TraceCheckUtils]: 2: Hoare triple {4333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:01,771 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4333#true} {4333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:01,771 INFO L272 TraceCheckUtils]: 4: Hoare triple {4333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:01,771 INFO L290 TraceCheckUtils]: 5: Hoare triple {4333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4333#true} is VALID [2022-04-07 23:00:01,771 INFO L290 TraceCheckUtils]: 6: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4333#true} is VALID [2022-04-07 23:00:01,772 INFO L290 TraceCheckUtils]: 7: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:01,773 INFO L290 TraceCheckUtils]: 8: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:01,773 INFO L290 TraceCheckUtils]: 9: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:01,774 INFO L290 TraceCheckUtils]: 10: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:01,775 INFO L290 TraceCheckUtils]: 11: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:01,775 INFO L290 TraceCheckUtils]: 12: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:01,775 INFO L290 TraceCheckUtils]: 13: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:01,776 INFO L290 TraceCheckUtils]: 14: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:01,776 INFO L290 TraceCheckUtils]: 15: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:01,777 INFO L290 TraceCheckUtils]: 16: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:01,778 INFO L290 TraceCheckUtils]: 17: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:01,778 INFO L290 TraceCheckUtils]: 18: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-07 23:00:01,778 INFO L290 TraceCheckUtils]: 19: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-07 23:00:01,779 INFO L290 TraceCheckUtils]: 20: Hoare triple {4334#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:01,779 INFO L272 TraceCheckUtils]: 21: Hoare triple {4334#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4334#false} is VALID [2022-04-07 23:00:01,779 INFO L290 TraceCheckUtils]: 22: Hoare triple {4334#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4334#false} is VALID [2022-04-07 23:00:01,779 INFO L290 TraceCheckUtils]: 23: Hoare triple {4334#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:01,779 INFO L290 TraceCheckUtils]: 24: Hoare triple {4334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:01,779 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-07 23:00:01,779 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:01,779 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273838794] [2022-04-07 23:00:01,779 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1273838794] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:01,780 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [416608407] [2022-04-07 23:00:01,780 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:00:01,780 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:01,780 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:01,781 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:01,782 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-07 23:00:01,817 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:00:01,817 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:01,817 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-07 23:00:01,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:01,829 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:02,041 INFO L272 TraceCheckUtils]: 0: Hoare triple {4333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:02,042 INFO L290 TraceCheckUtils]: 1: Hoare triple {4333#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4333#true} is VALID [2022-04-07 23:00:02,042 INFO L290 TraceCheckUtils]: 2: Hoare triple {4333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:02,042 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4333#true} {4333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:02,042 INFO L272 TraceCheckUtils]: 4: Hoare triple {4333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:02,042 INFO L290 TraceCheckUtils]: 5: Hoare triple {4333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4333#true} is VALID [2022-04-07 23:00:02,042 INFO L290 TraceCheckUtils]: 6: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4333#true} is VALID [2022-04-07 23:00:02,043 INFO L290 TraceCheckUtils]: 7: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:02,043 INFO L290 TraceCheckUtils]: 8: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:02,043 INFO L290 TraceCheckUtils]: 9: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:02,044 INFO L290 TraceCheckUtils]: 10: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,045 INFO L290 TraceCheckUtils]: 11: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,045 INFO L290 TraceCheckUtils]: 12: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,045 INFO L290 TraceCheckUtils]: 13: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,046 INFO L290 TraceCheckUtils]: 14: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,046 INFO L290 TraceCheckUtils]: 15: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,047 INFO L290 TraceCheckUtils]: 16: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,047 INFO L290 TraceCheckUtils]: 17: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:02,047 INFO L290 TraceCheckUtils]: 18: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-07 23:00:02,048 INFO L290 TraceCheckUtils]: 19: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-07 23:00:02,048 INFO L290 TraceCheckUtils]: 20: Hoare triple {4334#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:02,048 INFO L272 TraceCheckUtils]: 21: Hoare triple {4334#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4334#false} is VALID [2022-04-07 23:00:02,048 INFO L290 TraceCheckUtils]: 22: Hoare triple {4334#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4334#false} is VALID [2022-04-07 23:00:02,048 INFO L290 TraceCheckUtils]: 23: Hoare triple {4334#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:02,048 INFO L290 TraceCheckUtils]: 24: Hoare triple {4334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:02,048 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-07 23:00:02,048 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:02,148 INFO L290 TraceCheckUtils]: 24: Hoare triple {4334#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:02,148 INFO L290 TraceCheckUtils]: 23: Hoare triple {4334#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:02,148 INFO L290 TraceCheckUtils]: 22: Hoare triple {4334#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4334#false} is VALID [2022-04-07 23:00:02,148 INFO L272 TraceCheckUtils]: 21: Hoare triple {4334#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4334#false} is VALID [2022-04-07 23:00:02,149 INFO L290 TraceCheckUtils]: 20: Hoare triple {4334#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:02,149 INFO L290 TraceCheckUtils]: 19: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-07 23:00:02,149 INFO L290 TraceCheckUtils]: 18: Hoare triple {4334#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4334#false} is VALID [2022-04-07 23:00:02,149 INFO L290 TraceCheckUtils]: 17: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4334#false} is VALID [2022-04-07 23:00:02,151 INFO L290 TraceCheckUtils]: 16: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,151 INFO L290 TraceCheckUtils]: 15: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,151 INFO L290 TraceCheckUtils]: 14: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,151 INFO L290 TraceCheckUtils]: 13: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,152 INFO L290 TraceCheckUtils]: 12: Hoare triple {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,153 INFO L290 TraceCheckUtils]: 11: Hoare triple {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4340#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,153 INFO L290 TraceCheckUtils]: 10: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4339#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:02,154 INFO L290 TraceCheckUtils]: 9: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:02,154 INFO L290 TraceCheckUtils]: 8: Hoare triple {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:02,155 INFO L290 TraceCheckUtils]: 7: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4338#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:02,155 INFO L290 TraceCheckUtils]: 6: Hoare triple {4333#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4333#true} is VALID [2022-04-07 23:00:02,155 INFO L290 TraceCheckUtils]: 5: Hoare triple {4333#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4333#true} is VALID [2022-04-07 23:00:02,155 INFO L272 TraceCheckUtils]: 4: Hoare triple {4333#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:02,155 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4333#true} {4333#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:02,155 INFO L290 TraceCheckUtils]: 2: Hoare triple {4333#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:02,156 INFO L290 TraceCheckUtils]: 1: Hoare triple {4333#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4333#true} is VALID [2022-04-07 23:00:02,156 INFO L272 TraceCheckUtils]: 0: Hoare triple {4333#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4333#true} is VALID [2022-04-07 23:00:02,156 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-07 23:00:02,156 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [416608407] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:02,156 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:02,156 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 6 [2022-04-07 23:00:02,156 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400452971] [2022-04-07 23:00:02,156 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:02,157 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 23:00:02,157 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:02,157 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,177 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:02,178 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 23:00:02,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:02,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 23:00:02,178 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-07 23:00:02,178 INFO L87 Difference]: Start difference. First operand 73 states and 100 transitions. Second operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:02,428 INFO L93 Difference]: Finished difference Result 88 states and 118 transitions. [2022-04-07 23:00:02,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-07 23:00:02,429 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 23:00:02,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:02,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 39 transitions. [2022-04-07 23:00:02,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 39 transitions. [2022-04-07 23:00:02,431 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 39 transitions. [2022-04-07 23:00:02,478 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:02,479 INFO L225 Difference]: With dead ends: 88 [2022-04-07 23:00:02,479 INFO L226 Difference]: Without dead ends: 75 [2022-04-07 23:00:02,479 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 51 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-04-07 23:00:02,480 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 23 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:02,480 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 35 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 23:00:02,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-04-07 23:00:02,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2022-04-07 23:00:02,562 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:02,562 INFO L82 GeneralOperation]: Start isEquivalent. First operand 75 states. Second operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,562 INFO L74 IsIncluded]: Start isIncluded. First operand 75 states. Second operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,562 INFO L87 Difference]: Start difference. First operand 75 states. Second operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:02,564 INFO L93 Difference]: Finished difference Result 75 states and 101 transitions. [2022-04-07 23:00:02,564 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 101 transitions. [2022-04-07 23:00:02,564 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:02,564 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:02,564 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 75 states. [2022-04-07 23:00:02,565 INFO L87 Difference]: Start difference. First operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 75 states. [2022-04-07 23:00:02,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:02,566 INFO L93 Difference]: Finished difference Result 75 states and 101 transitions. [2022-04-07 23:00:02,566 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 101 transitions. [2022-04-07 23:00:02,566 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:02,566 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:02,566 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:02,566 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:02,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 70 states have (on average 1.3857142857142857) internal successors, (97), 70 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 101 transitions. [2022-04-07 23:00:02,568 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 101 transitions. Word has length 25 [2022-04-07 23:00:02,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:02,568 INFO L478 AbstractCegarLoop]: Abstraction has 75 states and 101 transitions. [2022-04-07 23:00:02,568 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:02,568 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 101 transitions. [2022-04-07 23:00:02,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-07 23:00:02,569 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:02,569 INFO L499 BasicCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:02,592 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:02,783 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-07 23:00:02,783 INFO L403 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:02,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:02,784 INFO L85 PathProgramCache]: Analyzing trace with hash 504396842, now seen corresponding path program 3 times [2022-04-07 23:00:02,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:02,784 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1301189096] [2022-04-07 23:00:02,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:02,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:02,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:02,915 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:02,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:02,922 INFO L290 TraceCheckUtils]: 0: Hoare triple {4879#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4865#true} is VALID [2022-04-07 23:00:02,922 INFO L290 TraceCheckUtils]: 1: Hoare triple {4865#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:02,922 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4865#true} {4865#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:02,923 INFO L272 TraceCheckUtils]: 0: Hoare triple {4865#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4879#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:02,923 INFO L290 TraceCheckUtils]: 1: Hoare triple {4879#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4865#true} is VALID [2022-04-07 23:00:02,923 INFO L290 TraceCheckUtils]: 2: Hoare triple {4865#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:02,923 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4865#true} {4865#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:02,923 INFO L272 TraceCheckUtils]: 4: Hoare triple {4865#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:02,923 INFO L290 TraceCheckUtils]: 5: Hoare triple {4865#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4870#(= main_~y~0 0)} is VALID [2022-04-07 23:00:02,924 INFO L290 TraceCheckUtils]: 6: Hoare triple {4870#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4871#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:02,925 INFO L290 TraceCheckUtils]: 7: Hoare triple {4871#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4872#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:02,925 INFO L290 TraceCheckUtils]: 8: Hoare triple {4872#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4873#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:02,926 INFO L290 TraceCheckUtils]: 9: Hoare triple {4873#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:02,926 INFO L290 TraceCheckUtils]: 10: Hoare triple {4874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:02,927 INFO L290 TraceCheckUtils]: 11: Hoare triple {4874#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4875#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:02,927 INFO L290 TraceCheckUtils]: 12: Hoare triple {4875#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4876#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:00:02,928 INFO L290 TraceCheckUtils]: 13: Hoare triple {4876#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4877#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:02,929 INFO L290 TraceCheckUtils]: 14: Hoare triple {4877#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4878#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-07 23:00:02,929 INFO L290 TraceCheckUtils]: 15: Hoare triple {4878#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:02,929 INFO L290 TraceCheckUtils]: 16: Hoare triple {4866#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4866#false} is VALID [2022-04-07 23:00:02,930 INFO L290 TraceCheckUtils]: 17: Hoare triple {4866#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:02,930 INFO L290 TraceCheckUtils]: 18: Hoare triple {4866#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:02,930 INFO L290 TraceCheckUtils]: 19: Hoare triple {4866#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4866#false} is VALID [2022-04-07 23:00:02,930 INFO L290 TraceCheckUtils]: 20: Hoare triple {4866#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:02,930 INFO L272 TraceCheckUtils]: 21: Hoare triple {4866#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4866#false} is VALID [2022-04-07 23:00:02,930 INFO L290 TraceCheckUtils]: 22: Hoare triple {4866#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4866#false} is VALID [2022-04-07 23:00:02,930 INFO L290 TraceCheckUtils]: 23: Hoare triple {4866#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:02,930 INFO L290 TraceCheckUtils]: 24: Hoare triple {4866#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:02,931 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-07 23:00:02,931 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:02,931 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1301189096] [2022-04-07 23:00:02,931 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1301189096] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:02,931 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1206666287] [2022-04-07 23:00:02,931 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:00:02,933 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:02,933 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:02,936 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:02,958 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-07 23:00:02,996 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 23:00:02,996 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:02,997 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 23:00:03,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:03,004 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:03,125 INFO L272 TraceCheckUtils]: 0: Hoare triple {4865#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:03,126 INFO L290 TraceCheckUtils]: 1: Hoare triple {4865#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4865#true} is VALID [2022-04-07 23:00:03,126 INFO L290 TraceCheckUtils]: 2: Hoare triple {4865#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:03,126 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4865#true} {4865#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:03,126 INFO L272 TraceCheckUtils]: 4: Hoare triple {4865#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:03,126 INFO L290 TraceCheckUtils]: 5: Hoare triple {4865#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4865#true} is VALID [2022-04-07 23:00:03,126 INFO L290 TraceCheckUtils]: 6: Hoare triple {4865#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4865#true} is VALID [2022-04-07 23:00:03,127 INFO L290 TraceCheckUtils]: 7: Hoare triple {4865#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:03,128 INFO L290 TraceCheckUtils]: 8: Hoare triple {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:03,129 INFO L290 TraceCheckUtils]: 9: Hoare triple {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:03,129 INFO L290 TraceCheckUtils]: 10: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:03,130 INFO L290 TraceCheckUtils]: 11: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:03,130 INFO L290 TraceCheckUtils]: 12: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:03,131 INFO L290 TraceCheckUtils]: 13: Hoare triple {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:03,132 INFO L290 TraceCheckUtils]: 14: Hoare triple {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:03,132 INFO L290 TraceCheckUtils]: 15: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:03,133 INFO L290 TraceCheckUtils]: 16: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:03,133 INFO L290 TraceCheckUtils]: 17: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:03,134 INFO L290 TraceCheckUtils]: 18: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:03,134 INFO L290 TraceCheckUtils]: 19: Hoare triple {4866#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4866#false} is VALID [2022-04-07 23:00:03,134 INFO L290 TraceCheckUtils]: 20: Hoare triple {4866#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:03,134 INFO L272 TraceCheckUtils]: 21: Hoare triple {4866#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4866#false} is VALID [2022-04-07 23:00:03,134 INFO L290 TraceCheckUtils]: 22: Hoare triple {4866#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4866#false} is VALID [2022-04-07 23:00:03,134 INFO L290 TraceCheckUtils]: 23: Hoare triple {4866#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:03,134 INFO L290 TraceCheckUtils]: 24: Hoare triple {4866#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:03,135 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 23:00:03,135 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:03,232 INFO L290 TraceCheckUtils]: 24: Hoare triple {4866#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:03,232 INFO L290 TraceCheckUtils]: 23: Hoare triple {4866#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:03,232 INFO L290 TraceCheckUtils]: 22: Hoare triple {4866#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4866#false} is VALID [2022-04-07 23:00:03,232 INFO L272 TraceCheckUtils]: 21: Hoare triple {4866#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {4866#false} is VALID [2022-04-07 23:00:03,232 INFO L290 TraceCheckUtils]: 20: Hoare triple {4866#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:03,232 INFO L290 TraceCheckUtils]: 19: Hoare triple {4866#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {4866#false} is VALID [2022-04-07 23:00:03,233 INFO L290 TraceCheckUtils]: 18: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4866#false} is VALID [2022-04-07 23:00:03,233 INFO L290 TraceCheckUtils]: 17: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:03,233 INFO L290 TraceCheckUtils]: 16: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:03,234 INFO L290 TraceCheckUtils]: 15: Hoare triple {4928#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:03,234 INFO L290 TraceCheckUtils]: 14: Hoare triple {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4928#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:03,235 INFO L290 TraceCheckUtils]: 13: Hoare triple {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:03,235 INFO L290 TraceCheckUtils]: 12: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:03,236 INFO L290 TraceCheckUtils]: 11: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:03,236 INFO L290 TraceCheckUtils]: 10: Hoare triple {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:03,237 INFO L290 TraceCheckUtils]: 9: Hoare triple {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4912#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:03,237 INFO L290 TraceCheckUtils]: 8: Hoare triple {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4908#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:03,238 INFO L290 TraceCheckUtils]: 7: Hoare triple {4865#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4904#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:03,238 INFO L290 TraceCheckUtils]: 6: Hoare triple {4865#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4865#true} is VALID [2022-04-07 23:00:03,238 INFO L290 TraceCheckUtils]: 5: Hoare triple {4865#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4865#true} is VALID [2022-04-07 23:00:03,238 INFO L272 TraceCheckUtils]: 4: Hoare triple {4865#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:03,238 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4865#true} {4865#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:03,238 INFO L290 TraceCheckUtils]: 2: Hoare triple {4865#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:03,238 INFO L290 TraceCheckUtils]: 1: Hoare triple {4865#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4865#true} is VALID [2022-04-07 23:00:03,238 INFO L272 TraceCheckUtils]: 0: Hoare triple {4865#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4865#true} is VALID [2022-04-07 23:00:03,239 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-07 23:00:03,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1206666287] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:03,239 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:03,239 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 16 [2022-04-07 23:00:03,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168158221] [2022-04-07 23:00:03,239 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:03,240 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 23:00:03,240 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:03,240 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:03,267 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:03,267 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 23:00:03,268 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:03,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 23:00:03,268 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2022-04-07 23:00:03,268 INFO L87 Difference]: Start difference. First operand 75 states and 101 transitions. Second operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:05,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:05,815 INFO L93 Difference]: Finished difference Result 155 states and 224 transitions. [2022-04-07 23:00:05,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-07 23:00:05,815 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-07 23:00:05,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:05,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:05,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 125 transitions. [2022-04-07 23:00:05,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:05,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 125 transitions. [2022-04-07 23:00:05,819 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 125 transitions. [2022-04-07 23:00:05,959 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:05,961 INFO L225 Difference]: With dead ends: 155 [2022-04-07 23:00:05,961 INFO L226 Difference]: Without dead ends: 126 [2022-04-07 23:00:05,962 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 604 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=363, Invalid=2187, Unknown=0, NotChecked=0, Total=2550 [2022-04-07 23:00:05,962 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 109 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 600 mSolverCounterSat, 132 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 732 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 132 IncrementalHoareTripleChecker+Valid, 600 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:05,962 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [109 Valid, 90 Invalid, 732 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [132 Valid, 600 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-07 23:00:05,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-04-07 23:00:06,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 98. [2022-04-07 23:00:06,077 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:06,077 INFO L82 GeneralOperation]: Start isEquivalent. First operand 126 states. Second operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:06,077 INFO L74 IsIncluded]: Start isIncluded. First operand 126 states. Second operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:06,077 INFO L87 Difference]: Start difference. First operand 126 states. Second operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:06,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:06,079 INFO L93 Difference]: Finished difference Result 126 states and 173 transitions. [2022-04-07 23:00:06,079 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 173 transitions. [2022-04-07 23:00:06,080 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:06,080 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:06,080 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 126 states. [2022-04-07 23:00:06,080 INFO L87 Difference]: Start difference. First operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 126 states. [2022-04-07 23:00:06,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:06,082 INFO L93 Difference]: Finished difference Result 126 states and 173 transitions. [2022-04-07 23:00:06,082 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 173 transitions. [2022-04-07 23:00:06,082 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:06,082 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:06,083 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:06,083 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:06,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 93 states have internal predecessors, (125), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:06,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 129 transitions. [2022-04-07 23:00:06,085 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 129 transitions. Word has length 25 [2022-04-07 23:00:06,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:06,085 INFO L478 AbstractCegarLoop]: Abstraction has 98 states and 129 transitions. [2022-04-07 23:00:06,085 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:06,085 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 129 transitions. [2022-04-07 23:00:06,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-07 23:00:06,086 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:06,086 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:06,102 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:06,287 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-07 23:00:06,287 INFO L403 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:06,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:06,288 INFO L85 PathProgramCache]: Analyzing trace with hash 681498865, now seen corresponding path program 3 times [2022-04-07 23:00:06,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:06,288 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508093232] [2022-04-07 23:00:06,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:06,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:06,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:06,438 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:06,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:06,443 INFO L290 TraceCheckUtils]: 0: Hoare triple {5697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5683#true} is VALID [2022-04-07 23:00:06,443 INFO L290 TraceCheckUtils]: 1: Hoare triple {5683#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,443 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5683#true} {5683#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,443 INFO L272 TraceCheckUtils]: 0: Hoare triple {5683#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:06,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {5697#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5683#true} is VALID [2022-04-07 23:00:06,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {5683#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5683#true} {5683#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,444 INFO L272 TraceCheckUtils]: 4: Hoare triple {5683#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,444 INFO L290 TraceCheckUtils]: 5: Hoare triple {5683#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5688#(= main_~y~0 0)} is VALID [2022-04-07 23:00:06,445 INFO L290 TraceCheckUtils]: 6: Hoare triple {5688#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5689#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:06,445 INFO L290 TraceCheckUtils]: 7: Hoare triple {5689#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5690#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:06,446 INFO L290 TraceCheckUtils]: 8: Hoare triple {5690#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5691#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:06,446 INFO L290 TraceCheckUtils]: 9: Hoare triple {5691#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5691#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:06,446 INFO L290 TraceCheckUtils]: 10: Hoare triple {5691#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5692#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:00:06,447 INFO L290 TraceCheckUtils]: 11: Hoare triple {5692#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5693#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:06,447 INFO L290 TraceCheckUtils]: 12: Hoare triple {5693#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5694#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:00:06,448 INFO L290 TraceCheckUtils]: 13: Hoare triple {5694#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5695#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:00:06,448 INFO L290 TraceCheckUtils]: 14: Hoare triple {5695#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5695#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:00:06,449 INFO L290 TraceCheckUtils]: 15: Hoare triple {5695#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5694#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:00:06,449 INFO L290 TraceCheckUtils]: 16: Hoare triple {5694#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5693#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:06,450 INFO L290 TraceCheckUtils]: 17: Hoare triple {5693#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:06,450 INFO L290 TraceCheckUtils]: 18: Hoare triple {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:06,451 INFO L290 TraceCheckUtils]: 19: Hoare triple {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:06,451 INFO L290 TraceCheckUtils]: 20: Hoare triple {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:06,451 INFO L290 TraceCheckUtils]: 21: Hoare triple {5696#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,451 INFO L272 TraceCheckUtils]: 22: Hoare triple {5684#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {5684#false} is VALID [2022-04-07 23:00:06,452 INFO L290 TraceCheckUtils]: 23: Hoare triple {5684#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5684#false} is VALID [2022-04-07 23:00:06,452 INFO L290 TraceCheckUtils]: 24: Hoare triple {5684#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,452 INFO L290 TraceCheckUtils]: 25: Hoare triple {5684#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,452 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 23:00:06,452 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:06,452 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508093232] [2022-04-07 23:00:06,452 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [508093232] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:06,452 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [771041261] [2022-04-07 23:00:06,452 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:00:06,452 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:06,452 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:06,453 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:06,454 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-07 23:00:06,491 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 23:00:06,491 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:06,492 INFO L263 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 23:00:06,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:06,498 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:06,625 INFO L272 TraceCheckUtils]: 0: Hoare triple {5683#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,626 INFO L290 TraceCheckUtils]: 1: Hoare triple {5683#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5683#true} is VALID [2022-04-07 23:00:06,626 INFO L290 TraceCheckUtils]: 2: Hoare triple {5683#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,626 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5683#true} {5683#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,626 INFO L272 TraceCheckUtils]: 4: Hoare triple {5683#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,626 INFO L290 TraceCheckUtils]: 5: Hoare triple {5683#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5683#true} is VALID [2022-04-07 23:00:06,626 INFO L290 TraceCheckUtils]: 6: Hoare triple {5683#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5683#true} is VALID [2022-04-07 23:00:06,627 INFO L290 TraceCheckUtils]: 7: Hoare triple {5683#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:06,628 INFO L290 TraceCheckUtils]: 8: Hoare triple {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:06,628 INFO L290 TraceCheckUtils]: 9: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:06,629 INFO L290 TraceCheckUtils]: 10: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:06,630 INFO L290 TraceCheckUtils]: 11: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:06,630 INFO L290 TraceCheckUtils]: 12: Hoare triple {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5739#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:06,631 INFO L290 TraceCheckUtils]: 13: Hoare triple {5739#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,632 INFO L290 TraceCheckUtils]: 14: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,632 INFO L290 TraceCheckUtils]: 15: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,633 INFO L290 TraceCheckUtils]: 16: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,633 INFO L290 TraceCheckUtils]: 17: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,634 INFO L290 TraceCheckUtils]: 18: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,637 INFO L290 TraceCheckUtils]: 19: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5739#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:06,638 INFO L290 TraceCheckUtils]: 20: Hoare triple {5739#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,638 INFO L290 TraceCheckUtils]: 21: Hoare triple {5684#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,639 INFO L272 TraceCheckUtils]: 22: Hoare triple {5684#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {5684#false} is VALID [2022-04-07 23:00:06,639 INFO L290 TraceCheckUtils]: 23: Hoare triple {5684#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5684#false} is VALID [2022-04-07 23:00:06,639 INFO L290 TraceCheckUtils]: 24: Hoare triple {5684#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,639 INFO L290 TraceCheckUtils]: 25: Hoare triple {5684#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,639 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-07 23:00:06,639 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:06,741 INFO L290 TraceCheckUtils]: 25: Hoare triple {5684#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,741 INFO L290 TraceCheckUtils]: 24: Hoare triple {5684#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,742 INFO L290 TraceCheckUtils]: 23: Hoare triple {5684#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5684#false} is VALID [2022-04-07 23:00:06,742 INFO L272 TraceCheckUtils]: 22: Hoare triple {5684#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {5684#false} is VALID [2022-04-07 23:00:06,742 INFO L290 TraceCheckUtils]: 21: Hoare triple {5684#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,743 INFO L290 TraceCheckUtils]: 20: Hoare triple {5739#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5684#false} is VALID [2022-04-07 23:00:06,744 INFO L290 TraceCheckUtils]: 19: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5739#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:06,744 INFO L290 TraceCheckUtils]: 18: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,745 INFO L290 TraceCheckUtils]: 17: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,745 INFO L290 TraceCheckUtils]: 16: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,746 INFO L290 TraceCheckUtils]: 15: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,746 INFO L290 TraceCheckUtils]: 14: Hoare triple {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,747 INFO L290 TraceCheckUtils]: 13: Hoare triple {5739#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5743#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:06,748 INFO L290 TraceCheckUtils]: 12: Hoare triple {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5739#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:06,749 INFO L290 TraceCheckUtils]: 11: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:06,749 INFO L290 TraceCheckUtils]: 10: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:06,750 INFO L290 TraceCheckUtils]: 9: Hoare triple {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:06,750 INFO L290 TraceCheckUtils]: 8: Hoare triple {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5726#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:06,751 INFO L290 TraceCheckUtils]: 7: Hoare triple {5683#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5722#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:06,751 INFO L290 TraceCheckUtils]: 6: Hoare triple {5683#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5683#true} is VALID [2022-04-07 23:00:06,751 INFO L290 TraceCheckUtils]: 5: Hoare triple {5683#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5683#true} is VALID [2022-04-07 23:00:06,751 INFO L272 TraceCheckUtils]: 4: Hoare triple {5683#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,751 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5683#true} {5683#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,751 INFO L290 TraceCheckUtils]: 2: Hoare triple {5683#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,752 INFO L290 TraceCheckUtils]: 1: Hoare triple {5683#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5683#true} is VALID [2022-04-07 23:00:06,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {5683#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5683#true} is VALID [2022-04-07 23:00:06,752 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-07 23:00:06,752 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [771041261] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:06,752 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:06,752 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 16 [2022-04-07 23:00:06,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353595480] [2022-04-07 23:00:06,752 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:06,753 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 23:00:06,753 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:06,753 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:06,782 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:06,782 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-07 23:00:06,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:06,783 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-07 23:00:06,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=210, Unknown=0, NotChecked=0, Total=240 [2022-04-07 23:00:06,783 INFO L87 Difference]: Start difference. First operand 98 states and 129 transitions. Second operand has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:08,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:08,968 INFO L93 Difference]: Finished difference Result 133 states and 183 transitions. [2022-04-07 23:00:08,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2022-04-07 23:00:08,968 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-07 23:00:08,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:08,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:08,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 115 transitions. [2022-04-07 23:00:08,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:08,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 115 transitions. [2022-04-07 23:00:08,971 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 47 states and 115 transitions. [2022-04-07 23:00:09,129 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 115 edges. 115 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:09,130 INFO L225 Difference]: With dead ends: 133 [2022-04-07 23:00:09,130 INFO L226 Difference]: Without dead ends: 106 [2022-04-07 23:00:09,131 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 912 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=489, Invalid=3051, Unknown=0, NotChecked=0, Total=3540 [2022-04-07 23:00:09,132 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 79 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 123 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 72 SdHoareTripleChecker+Invalid, 583 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 123 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:09,132 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [79 Valid, 72 Invalid, 583 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [123 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-07 23:00:09,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-04-07 23:00:09,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 87. [2022-04-07 23:00:09,253 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:09,253 INFO L82 GeneralOperation]: Start isEquivalent. First operand 106 states. Second operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,253 INFO L74 IsIncluded]: Start isIncluded. First operand 106 states. Second operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,254 INFO L87 Difference]: Start difference. First operand 106 states. Second operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:09,255 INFO L93 Difference]: Finished difference Result 106 states and 133 transitions. [2022-04-07 23:00:09,255 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 133 transitions. [2022-04-07 23:00:09,256 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:09,256 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:09,256 INFO L74 IsIncluded]: Start isIncluded. First operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-07 23:00:09,256 INFO L87 Difference]: Start difference. First operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-07 23:00:09,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:09,258 INFO L93 Difference]: Finished difference Result 106 states and 133 transitions. [2022-04-07 23:00:09,258 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 133 transitions. [2022-04-07 23:00:09,258 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:09,259 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:09,259 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:09,259 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:09,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 82 states have (on average 1.3048780487804879) internal successors, (107), 82 states have internal predecessors, (107), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 111 transitions. [2022-04-07 23:00:09,260 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 111 transitions. Word has length 26 [2022-04-07 23:00:09,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:09,260 INFO L478 AbstractCegarLoop]: Abstraction has 87 states and 111 transitions. [2022-04-07 23:00:09,261 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.375) internal successors, (38), 15 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,261 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 111 transitions. [2022-04-07 23:00:09,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 23:00:09,261 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:09,261 INFO L499 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:09,286 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:09,461 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-07 23:00:09,462 INFO L403 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:09,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:09,462 INFO L85 PathProgramCache]: Analyzing trace with hash -256423350, now seen corresponding path program 5 times [2022-04-07 23:00:09,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:09,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612776068] [2022-04-07 23:00:09,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:09,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:09,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:09,547 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:09,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:09,552 INFO L290 TraceCheckUtils]: 0: Hoare triple {6450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6442#true} is VALID [2022-04-07 23:00:09,552 INFO L290 TraceCheckUtils]: 1: Hoare triple {6442#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,552 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6442#true} {6442#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,553 INFO L272 TraceCheckUtils]: 0: Hoare triple {6442#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:09,553 INFO L290 TraceCheckUtils]: 1: Hoare triple {6450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6442#true} is VALID [2022-04-07 23:00:09,553 INFO L290 TraceCheckUtils]: 2: Hoare triple {6442#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,553 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6442#true} {6442#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,553 INFO L272 TraceCheckUtils]: 4: Hoare triple {6442#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,553 INFO L290 TraceCheckUtils]: 5: Hoare triple {6442#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6442#true} is VALID [2022-04-07 23:00:09,553 INFO L290 TraceCheckUtils]: 6: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-07 23:00:09,553 INFO L290 TraceCheckUtils]: 7: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-07 23:00:09,554 INFO L290 TraceCheckUtils]: 8: Hoare triple {6442#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,554 INFO L290 TraceCheckUtils]: 9: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,555 INFO L290 TraceCheckUtils]: 10: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:09,555 INFO L290 TraceCheckUtils]: 11: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,556 INFO L290 TraceCheckUtils]: 12: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,556 INFO L290 TraceCheckUtils]: 13: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,556 INFO L290 TraceCheckUtils]: 14: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,556 INFO L290 TraceCheckUtils]: 15: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,557 INFO L290 TraceCheckUtils]: 16: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:09,558 INFO L290 TraceCheckUtils]: 17: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,558 INFO L290 TraceCheckUtils]: 18: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6443#false} is VALID [2022-04-07 23:00:09,558 INFO L290 TraceCheckUtils]: 19: Hoare triple {6443#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,558 INFO L290 TraceCheckUtils]: 20: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-07 23:00:09,558 INFO L290 TraceCheckUtils]: 21: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-07 23:00:09,558 INFO L290 TraceCheckUtils]: 22: Hoare triple {6443#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,559 INFO L272 TraceCheckUtils]: 23: Hoare triple {6443#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {6443#false} is VALID [2022-04-07 23:00:09,559 INFO L290 TraceCheckUtils]: 24: Hoare triple {6443#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6443#false} is VALID [2022-04-07 23:00:09,559 INFO L290 TraceCheckUtils]: 25: Hoare triple {6443#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,559 INFO L290 TraceCheckUtils]: 26: Hoare triple {6443#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,559 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 23:00:09,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:09,559 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612776068] [2022-04-07 23:00:09,559 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612776068] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:09,560 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1846020350] [2022-04-07 23:00:09,560 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 23:00:09,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:09,560 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:09,560 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:09,561 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-07 23:00:09,603 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-07 23:00:09,604 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:09,604 INFO L263 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-07 23:00:09,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:09,616 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:09,835 INFO L272 TraceCheckUtils]: 0: Hoare triple {6442#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,836 INFO L290 TraceCheckUtils]: 1: Hoare triple {6442#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6442#true} is VALID [2022-04-07 23:00:09,836 INFO L290 TraceCheckUtils]: 2: Hoare triple {6442#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,836 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6442#true} {6442#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,836 INFO L272 TraceCheckUtils]: 4: Hoare triple {6442#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,836 INFO L290 TraceCheckUtils]: 5: Hoare triple {6442#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6442#true} is VALID [2022-04-07 23:00:09,836 INFO L290 TraceCheckUtils]: 6: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-07 23:00:09,836 INFO L290 TraceCheckUtils]: 7: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-07 23:00:09,837 INFO L290 TraceCheckUtils]: 8: Hoare triple {6442#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,837 INFO L290 TraceCheckUtils]: 9: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,838 INFO L290 TraceCheckUtils]: 10: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:09,838 INFO L290 TraceCheckUtils]: 11: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,839 INFO L290 TraceCheckUtils]: 12: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,839 INFO L290 TraceCheckUtils]: 13: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,839 INFO L290 TraceCheckUtils]: 14: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,839 INFO L290 TraceCheckUtils]: 15: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,840 INFO L290 TraceCheckUtils]: 16: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:09,841 INFO L290 TraceCheckUtils]: 17: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,841 INFO L290 TraceCheckUtils]: 18: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L290 TraceCheckUtils]: 19: Hoare triple {6443#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L290 TraceCheckUtils]: 20: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L290 TraceCheckUtils]: 21: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L290 TraceCheckUtils]: 22: Hoare triple {6443#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L272 TraceCheckUtils]: 23: Hoare triple {6443#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L290 TraceCheckUtils]: 24: Hoare triple {6443#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L290 TraceCheckUtils]: 25: Hoare triple {6443#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L290 TraceCheckUtils]: 26: Hoare triple {6443#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,842 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 23:00:09,842 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:09,933 INFO L290 TraceCheckUtils]: 26: Hoare triple {6443#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,934 INFO L290 TraceCheckUtils]: 25: Hoare triple {6443#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,934 INFO L290 TraceCheckUtils]: 24: Hoare triple {6443#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6443#false} is VALID [2022-04-07 23:00:09,934 INFO L272 TraceCheckUtils]: 23: Hoare triple {6443#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {6443#false} is VALID [2022-04-07 23:00:09,934 INFO L290 TraceCheckUtils]: 22: Hoare triple {6443#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,934 INFO L290 TraceCheckUtils]: 21: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-07 23:00:09,934 INFO L290 TraceCheckUtils]: 20: Hoare triple {6443#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {6443#false} is VALID [2022-04-07 23:00:09,934 INFO L290 TraceCheckUtils]: 19: Hoare triple {6443#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6443#false} is VALID [2022-04-07 23:00:09,935 INFO L290 TraceCheckUtils]: 18: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6443#false} is VALID [2022-04-07 23:00:09,936 INFO L290 TraceCheckUtils]: 17: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,937 INFO L290 TraceCheckUtils]: 16: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:09,937 INFO L290 TraceCheckUtils]: 15: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,937 INFO L290 TraceCheckUtils]: 14: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,938 INFO L290 TraceCheckUtils]: 13: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,938 INFO L290 TraceCheckUtils]: 12: Hoare triple {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,938 INFO L290 TraceCheckUtils]: 11: Hoare triple {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6449#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:09,939 INFO L290 TraceCheckUtils]: 10: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6448#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:09,939 INFO L290 TraceCheckUtils]: 9: Hoare triple {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,940 INFO L290 TraceCheckUtils]: 8: Hoare triple {6442#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6447#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:09,940 INFO L290 TraceCheckUtils]: 7: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-07 23:00:09,940 INFO L290 TraceCheckUtils]: 6: Hoare triple {6442#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6442#true} is VALID [2022-04-07 23:00:09,940 INFO L290 TraceCheckUtils]: 5: Hoare triple {6442#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6442#true} is VALID [2022-04-07 23:00:09,940 INFO L272 TraceCheckUtils]: 4: Hoare triple {6442#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,940 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6442#true} {6442#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,941 INFO L290 TraceCheckUtils]: 2: Hoare triple {6442#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,941 INFO L290 TraceCheckUtils]: 1: Hoare triple {6442#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6442#true} is VALID [2022-04-07 23:00:09,941 INFO L272 TraceCheckUtils]: 0: Hoare triple {6442#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6442#true} is VALID [2022-04-07 23:00:09,941 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-07 23:00:09,941 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1846020350] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:09,941 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:09,941 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 6 [2022-04-07 23:00:09,941 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [395727748] [2022-04-07 23:00:09,942 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:09,942 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 23:00:09,942 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:09,942 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:09,960 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:09,960 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-07 23:00:09,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:09,961 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-07 23:00:09,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-07 23:00:09,961 INFO L87 Difference]: Start difference. First operand 87 states and 111 transitions. Second operand has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:10,237 INFO L93 Difference]: Finished difference Result 110 states and 141 transitions. [2022-04-07 23:00:10,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-07 23:00:10,237 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 23:00:10,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:10,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 39 transitions. [2022-04-07 23:00:10,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 39 transitions. [2022-04-07 23:00:10,239 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 39 transitions. [2022-04-07 23:00:10,291 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:10,292 INFO L225 Difference]: With dead ends: 110 [2022-04-07 23:00:10,292 INFO L226 Difference]: Without dead ends: 85 [2022-04-07 23:00:10,292 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2022-04-07 23:00:10,293 INFO L913 BasicCegarLoop]: 18 mSDtfsCounter, 22 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:10,293 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 35 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 23:00:10,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-07 23:00:10,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2022-04-07 23:00:10,402 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:10,403 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,403 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,404 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:10,406 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-07 23:00:10,406 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-07 23:00:10,406 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:10,406 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:10,407 INFO L74 IsIncluded]: Start isIncluded. First operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-07 23:00:10,407 INFO L87 Difference]: Start difference. First operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-07 23:00:10,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:10,408 INFO L93 Difference]: Finished difference Result 85 states and 109 transitions. [2022-04-07 23:00:10,408 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-07 23:00:10,409 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:10,409 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:10,409 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:10,409 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:10,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 80 states have (on average 1.3125) internal successors, (105), 80 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 109 transitions. [2022-04-07 23:00:10,412 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 109 transitions. Word has length 27 [2022-04-07 23:00:10,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:10,414 INFO L478 AbstractCegarLoop]: Abstraction has 85 states and 109 transitions. [2022-04-07 23:00:10,414 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.5) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:10,414 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 109 transitions. [2022-04-07 23:00:10,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-07 23:00:10,415 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:10,415 INFO L499 BasicCegarLoop]: trace histogram [5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:10,443 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:10,641 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-07 23:00:10,642 INFO L403 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:10,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:10,642 INFO L85 PathProgramCache]: Analyzing trace with hash 399846058, now seen corresponding path program 6 times [2022-04-07 23:00:10,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:10,642 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600416750] [2022-04-07 23:00:10,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:10,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:10,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:10,778 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:10,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:10,788 INFO L290 TraceCheckUtils]: 0: Hoare triple {7054#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7040#true} is VALID [2022-04-07 23:00:10,788 INFO L290 TraceCheckUtils]: 1: Hoare triple {7040#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,792 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7040#true} {7040#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,793 INFO L272 TraceCheckUtils]: 0: Hoare triple {7040#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7054#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:10,793 INFO L290 TraceCheckUtils]: 1: Hoare triple {7054#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7040#true} is VALID [2022-04-07 23:00:10,793 INFO L290 TraceCheckUtils]: 2: Hoare triple {7040#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,793 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7040#true} {7040#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,793 INFO L272 TraceCheckUtils]: 4: Hoare triple {7040#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,794 INFO L290 TraceCheckUtils]: 5: Hoare triple {7040#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7045#(= main_~y~0 0)} is VALID [2022-04-07 23:00:10,794 INFO L290 TraceCheckUtils]: 6: Hoare triple {7045#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7046#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:10,795 INFO L290 TraceCheckUtils]: 7: Hoare triple {7046#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7047#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:10,796 INFO L290 TraceCheckUtils]: 8: Hoare triple {7047#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7048#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:10,796 INFO L290 TraceCheckUtils]: 9: Hoare triple {7048#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7049#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:10,797 INFO L290 TraceCheckUtils]: 10: Hoare triple {7049#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7050#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:10,798 INFO L290 TraceCheckUtils]: 11: Hoare triple {7050#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7050#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:10,798 INFO L290 TraceCheckUtils]: 12: Hoare triple {7050#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7051#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:10,799 INFO L290 TraceCheckUtils]: 13: Hoare triple {7051#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7052#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:10,799 INFO L290 TraceCheckUtils]: 14: Hoare triple {7052#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7053#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:10,800 INFO L290 TraceCheckUtils]: 15: Hoare triple {7053#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,800 INFO L290 TraceCheckUtils]: 16: Hoare triple {7041#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7041#false} is VALID [2022-04-07 23:00:10,800 INFO L290 TraceCheckUtils]: 17: Hoare triple {7041#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,800 INFO L290 TraceCheckUtils]: 18: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-07 23:00:10,801 INFO L290 TraceCheckUtils]: 19: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-07 23:00:10,801 INFO L290 TraceCheckUtils]: 20: Hoare triple {7041#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,801 INFO L290 TraceCheckUtils]: 21: Hoare triple {7041#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {7041#false} is VALID [2022-04-07 23:00:10,801 INFO L290 TraceCheckUtils]: 22: Hoare triple {7041#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,801 INFO L272 TraceCheckUtils]: 23: Hoare triple {7041#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7041#false} is VALID [2022-04-07 23:00:10,801 INFO L290 TraceCheckUtils]: 24: Hoare triple {7041#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7041#false} is VALID [2022-04-07 23:00:10,801 INFO L290 TraceCheckUtils]: 25: Hoare triple {7041#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,801 INFO L290 TraceCheckUtils]: 26: Hoare triple {7041#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,802 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-04-07 23:00:10,802 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:10,802 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600416750] [2022-04-07 23:00:10,802 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1600416750] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:10,802 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2108825967] [2022-04-07 23:00:10,802 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 23:00:10,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:10,802 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:10,803 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:10,831 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-07 23:00:10,859 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-07 23:00:10,860 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:10,860 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-07 23:00:10,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:10,868 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:10,986 INFO L272 TraceCheckUtils]: 0: Hoare triple {7040#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,986 INFO L290 TraceCheckUtils]: 1: Hoare triple {7040#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7040#true} is VALID [2022-04-07 23:00:10,986 INFO L290 TraceCheckUtils]: 2: Hoare triple {7040#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7040#true} {7040#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L272 TraceCheckUtils]: 4: Hoare triple {7040#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 5: Hoare triple {7040#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 6: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 7: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 8: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 9: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 10: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:10,987 INFO L290 TraceCheckUtils]: 11: Hoare triple {7040#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:10,988 INFO L290 TraceCheckUtils]: 12: Hoare triple {7040#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7094#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 23:00:10,988 INFO L290 TraceCheckUtils]: 13: Hoare triple {7094#(= main_~z~0 main_~y~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7098#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-07 23:00:10,989 INFO L290 TraceCheckUtils]: 14: Hoare triple {7098#(= main_~y~0 (+ main_~z~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:10,990 INFO L290 TraceCheckUtils]: 15: Hoare triple {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:10,991 INFO L290 TraceCheckUtils]: 16: Hoare triple {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7109#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:00:10,991 INFO L290 TraceCheckUtils]: 17: Hoare triple {7109#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,991 INFO L290 TraceCheckUtils]: 18: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-07 23:00:10,991 INFO L290 TraceCheckUtils]: 19: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-07 23:00:10,991 INFO L290 TraceCheckUtils]: 20: Hoare triple {7041#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,991 INFO L290 TraceCheckUtils]: 21: Hoare triple {7041#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {7041#false} is VALID [2022-04-07 23:00:10,992 INFO L290 TraceCheckUtils]: 22: Hoare triple {7041#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,992 INFO L272 TraceCheckUtils]: 23: Hoare triple {7041#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7041#false} is VALID [2022-04-07 23:00:10,992 INFO L290 TraceCheckUtils]: 24: Hoare triple {7041#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7041#false} is VALID [2022-04-07 23:00:10,992 INFO L290 TraceCheckUtils]: 25: Hoare triple {7041#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,992 INFO L290 TraceCheckUtils]: 26: Hoare triple {7041#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:10,992 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-04-07 23:00:10,992 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:11,112 INFO L290 TraceCheckUtils]: 26: Hoare triple {7041#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:11,112 INFO L290 TraceCheckUtils]: 25: Hoare triple {7041#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:11,112 INFO L290 TraceCheckUtils]: 24: Hoare triple {7041#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7041#false} is VALID [2022-04-07 23:00:11,112 INFO L272 TraceCheckUtils]: 23: Hoare triple {7041#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7041#false} is VALID [2022-04-07 23:00:11,112 INFO L290 TraceCheckUtils]: 22: Hoare triple {7041#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:11,112 INFO L290 TraceCheckUtils]: 21: Hoare triple {7041#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {7041#false} is VALID [2022-04-07 23:00:11,113 INFO L290 TraceCheckUtils]: 20: Hoare triple {7041#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:11,113 INFO L290 TraceCheckUtils]: 19: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-07 23:00:11,113 INFO L290 TraceCheckUtils]: 18: Hoare triple {7041#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7041#false} is VALID [2022-04-07 23:00:11,113 INFO L290 TraceCheckUtils]: 17: Hoare triple {7109#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7041#false} is VALID [2022-04-07 23:00:11,116 INFO L290 TraceCheckUtils]: 16: Hoare triple {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7109#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:00:11,116 INFO L290 TraceCheckUtils]: 15: Hoare triple {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:11,117 INFO L290 TraceCheckUtils]: 14: Hoare triple {7176#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7102#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:11,118 INFO L290 TraceCheckUtils]: 13: Hoare triple {7180#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7176#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-07 23:00:11,118 INFO L290 TraceCheckUtils]: 12: Hoare triple {7040#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7180#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:00:11,118 INFO L290 TraceCheckUtils]: 11: Hoare triple {7040#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L290 TraceCheckUtils]: 10: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L290 TraceCheckUtils]: 9: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L290 TraceCheckUtils]: 8: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L290 TraceCheckUtils]: 7: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L290 TraceCheckUtils]: 6: Hoare triple {7040#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L290 TraceCheckUtils]: 5: Hoare triple {7040#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L272 TraceCheckUtils]: 4: Hoare triple {7040#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7040#true} {7040#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:11,119 INFO L290 TraceCheckUtils]: 2: Hoare triple {7040#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:11,120 INFO L290 TraceCheckUtils]: 1: Hoare triple {7040#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7040#true} is VALID [2022-04-07 23:00:11,120 INFO L272 TraceCheckUtils]: 0: Hoare triple {7040#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7040#true} is VALID [2022-04-07 23:00:11,120 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-04-07 23:00:11,120 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2108825967] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:11,120 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:11,120 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 18 [2022-04-07 23:00:11,120 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446649258] [2022-04-07 23:00:11,121 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:11,121 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 23:00:11,121 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:11,121 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:11,148 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:11,148 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-07 23:00:11,148 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:11,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-07 23:00:11,148 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2022-04-07 23:00:11,148 INFO L87 Difference]: Start difference. First operand 85 states and 109 transitions. Second operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:12,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:12,887 INFO L93 Difference]: Finished difference Result 185 states and 258 transitions. [2022-04-07 23:00:12,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-07 23:00:12,888 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-07 23:00:12,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:12,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:12,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 125 transitions. [2022-04-07 23:00:12,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:12,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 125 transitions. [2022-04-07 23:00:12,892 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 125 transitions. [2022-04-07 23:00:13,018 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 125 edges. 125 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:13,020 INFO L225 Difference]: With dead ends: 185 [2022-04-07 23:00:13,020 INFO L226 Difference]: Without dead ends: 151 [2022-04-07 23:00:13,021 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 309 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=352, Invalid=1370, Unknown=0, NotChecked=0, Total=1722 [2022-04-07 23:00:13,021 INFO L913 BasicCegarLoop]: 37 mSDtfsCounter, 126 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 538 mSolverCounterSat, 157 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 695 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 157 IncrementalHoareTripleChecker+Valid, 538 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:13,022 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [126 Valid, 64 Invalid, 695 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [157 Valid, 538 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-07 23:00:13,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2022-04-07 23:00:13,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 88. [2022-04-07 23:00:13,131 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:13,131 INFO L82 GeneralOperation]: Start isEquivalent. First operand 151 states. Second operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,131 INFO L74 IsIncluded]: Start isIncluded. First operand 151 states. Second operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,132 INFO L87 Difference]: Start difference. First operand 151 states. Second operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:13,134 INFO L93 Difference]: Finished difference Result 151 states and 197 transitions. [2022-04-07 23:00:13,134 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 197 transitions. [2022-04-07 23:00:13,135 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:13,135 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:13,135 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 151 states. [2022-04-07 23:00:13,135 INFO L87 Difference]: Start difference. First operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 151 states. [2022-04-07 23:00:13,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:13,138 INFO L93 Difference]: Finished difference Result 151 states and 197 transitions. [2022-04-07 23:00:13,138 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 197 transitions. [2022-04-07 23:00:13,138 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:13,138 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:13,138 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:13,138 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:13,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 83 states have (on average 1.2650602409638554) internal successors, (105), 83 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 109 transitions. [2022-04-07 23:00:13,140 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 109 transitions. Word has length 27 [2022-04-07 23:00:13,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:13,140 INFO L478 AbstractCegarLoop]: Abstraction has 88 states and 109 transitions. [2022-04-07 23:00:13,141 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:13,141 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 109 transitions. [2022-04-07 23:00:13,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-07 23:00:13,141 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:13,141 INFO L499 BasicCegarLoop]: trace histogram [6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:13,167 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-04-07 23:00:13,367 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:13,367 INFO L403 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:13,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:13,368 INFO L85 PathProgramCache]: Analyzing trace with hash 1567225004, now seen corresponding path program 4 times [2022-04-07 23:00:13,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:13,368 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [903847012] [2022-04-07 23:00:13,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:13,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:13,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:13,535 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:13,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:13,541 INFO L290 TraceCheckUtils]: 0: Hoare triple {7948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7933#true} is VALID [2022-04-07 23:00:13,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {7933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,541 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7933#true} {7933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,541 INFO L272 TraceCheckUtils]: 0: Hoare triple {7933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:13,542 INFO L290 TraceCheckUtils]: 1: Hoare triple {7948#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7933#true} is VALID [2022-04-07 23:00:13,542 INFO L290 TraceCheckUtils]: 2: Hoare triple {7933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,542 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7933#true} {7933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,542 INFO L272 TraceCheckUtils]: 4: Hoare triple {7933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,542 INFO L290 TraceCheckUtils]: 5: Hoare triple {7933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7938#(= main_~y~0 0)} is VALID [2022-04-07 23:00:13,543 INFO L290 TraceCheckUtils]: 6: Hoare triple {7938#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:13,543 INFO L290 TraceCheckUtils]: 7: Hoare triple {7939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7940#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:13,544 INFO L290 TraceCheckUtils]: 8: Hoare triple {7940#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7941#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:13,545 INFO L290 TraceCheckUtils]: 9: Hoare triple {7941#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7942#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:13,545 INFO L290 TraceCheckUtils]: 10: Hoare triple {7942#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7943#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:13,546 INFO L290 TraceCheckUtils]: 11: Hoare triple {7943#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:00:13,546 INFO L290 TraceCheckUtils]: 12: Hoare triple {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:00:13,547 INFO L290 TraceCheckUtils]: 13: Hoare triple {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7945#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:00:13,548 INFO L290 TraceCheckUtils]: 14: Hoare triple {7945#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7946#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:13,548 INFO L290 TraceCheckUtils]: 15: Hoare triple {7946#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7947#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:13,549 INFO L290 TraceCheckUtils]: 16: Hoare triple {7947#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,549 INFO L290 TraceCheckUtils]: 17: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-07 23:00:13,549 INFO L290 TraceCheckUtils]: 18: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-07 23:00:13,549 INFO L290 TraceCheckUtils]: 19: Hoare triple {7934#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,549 INFO L290 TraceCheckUtils]: 20: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-07 23:00:13,549 INFO L290 TraceCheckUtils]: 21: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-07 23:00:13,549 INFO L290 TraceCheckUtils]: 22: Hoare triple {7934#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,550 INFO L290 TraceCheckUtils]: 23: Hoare triple {7934#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,550 INFO L272 TraceCheckUtils]: 24: Hoare triple {7934#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7934#false} is VALID [2022-04-07 23:00:13,550 INFO L290 TraceCheckUtils]: 25: Hoare triple {7934#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7934#false} is VALID [2022-04-07 23:00:13,550 INFO L290 TraceCheckUtils]: 26: Hoare triple {7934#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,550 INFO L290 TraceCheckUtils]: 27: Hoare triple {7934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,550 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:00:13,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:13,550 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [903847012] [2022-04-07 23:00:13,551 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [903847012] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:13,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2070299247] [2022-04-07 23:00:13,551 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:00:13,551 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:13,551 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:13,556 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:13,558 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-07 23:00:13,600 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:00:13,600 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:13,601 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-07 23:00:13,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:13,609 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:13,852 INFO L272 TraceCheckUtils]: 0: Hoare triple {7933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,853 INFO L290 TraceCheckUtils]: 1: Hoare triple {7933#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7933#true} is VALID [2022-04-07 23:00:13,853 INFO L290 TraceCheckUtils]: 2: Hoare triple {7933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,853 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7933#true} {7933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,853 INFO L272 TraceCheckUtils]: 4: Hoare triple {7933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:13,853 INFO L290 TraceCheckUtils]: 5: Hoare triple {7933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7938#(= main_~y~0 0)} is VALID [2022-04-07 23:00:13,854 INFO L290 TraceCheckUtils]: 6: Hoare triple {7938#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:13,855 INFO L290 TraceCheckUtils]: 7: Hoare triple {7939#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7940#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:13,855 INFO L290 TraceCheckUtils]: 8: Hoare triple {7940#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7941#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:13,856 INFO L290 TraceCheckUtils]: 9: Hoare triple {7941#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7942#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:13,857 INFO L290 TraceCheckUtils]: 10: Hoare triple {7942#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7943#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:13,858 INFO L290 TraceCheckUtils]: 11: Hoare triple {7943#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:00:13,858 INFO L290 TraceCheckUtils]: 12: Hoare triple {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:00:13,859 INFO L290 TraceCheckUtils]: 13: Hoare triple {7944#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7945#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:00:13,859 INFO L290 TraceCheckUtils]: 14: Hoare triple {7945#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7946#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:13,860 INFO L290 TraceCheckUtils]: 15: Hoare triple {7946#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7997#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:13,860 INFO L290 TraceCheckUtils]: 16: Hoare triple {7997#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L290 TraceCheckUtils]: 17: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L290 TraceCheckUtils]: 18: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L290 TraceCheckUtils]: 19: Hoare triple {7934#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L290 TraceCheckUtils]: 20: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L290 TraceCheckUtils]: 21: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L290 TraceCheckUtils]: 22: Hoare triple {7934#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L290 TraceCheckUtils]: 23: Hoare triple {7934#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L272 TraceCheckUtils]: 24: Hoare triple {7934#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7934#false} is VALID [2022-04-07 23:00:13,861 INFO L290 TraceCheckUtils]: 25: Hoare triple {7934#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7934#false} is VALID [2022-04-07 23:00:13,862 INFO L290 TraceCheckUtils]: 26: Hoare triple {7934#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,862 INFO L290 TraceCheckUtils]: 27: Hoare triple {7934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:13,862 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:00:13,862 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 27: Hoare triple {7934#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 26: Hoare triple {7934#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 25: Hoare triple {7934#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L272 TraceCheckUtils]: 24: Hoare triple {7934#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 23: Hoare triple {7934#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 22: Hoare triple {7934#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 21: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 20: Hoare triple {7934#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 19: Hoare triple {7934#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 18: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-07 23:00:14,094 INFO L290 TraceCheckUtils]: 17: Hoare triple {7934#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7934#false} is VALID [2022-04-07 23:00:14,095 INFO L290 TraceCheckUtils]: 16: Hoare triple {8067#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7934#false} is VALID [2022-04-07 23:00:14,096 INFO L290 TraceCheckUtils]: 15: Hoare triple {8071#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8067#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 23:00:14,096 INFO L290 TraceCheckUtils]: 14: Hoare triple {8075#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8071#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:14,097 INFO L290 TraceCheckUtils]: 13: Hoare triple {8079#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8075#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-07 23:00:14,097 INFO L290 TraceCheckUtils]: 12: Hoare triple {8079#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8079#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:00:14,098 INFO L290 TraceCheckUtils]: 11: Hoare triple {8086#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8079#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:00:14,098 INFO L290 TraceCheckUtils]: 10: Hoare triple {8090#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8086#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:14,099 INFO L290 TraceCheckUtils]: 9: Hoare triple {8094#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8090#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:00:14,099 INFO L290 TraceCheckUtils]: 8: Hoare triple {8098#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8094#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:00:14,100 INFO L290 TraceCheckUtils]: 7: Hoare triple {8102#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8098#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:00:14,101 INFO L290 TraceCheckUtils]: 6: Hoare triple {8106#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8102#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:00:14,101 INFO L290 TraceCheckUtils]: 5: Hoare triple {7933#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8106#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:00:14,101 INFO L272 TraceCheckUtils]: 4: Hoare triple {7933#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:14,101 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7933#true} {7933#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:14,101 INFO L290 TraceCheckUtils]: 2: Hoare triple {7933#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:14,101 INFO L290 TraceCheckUtils]: 1: Hoare triple {7933#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7933#true} is VALID [2022-04-07 23:00:14,101 INFO L272 TraceCheckUtils]: 0: Hoare triple {7933#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7933#true} is VALID [2022-04-07 23:00:14,102 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:00:14,102 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2070299247] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:14,102 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:14,102 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 24 [2022-04-07 23:00:14,102 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879620071] [2022-04-07 23:00:14,102 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:14,103 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 23:00:14,103 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:14,103 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:14,130 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:14,130 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-07 23:00:14,130 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:14,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-07 23:00:14,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=446, Unknown=0, NotChecked=0, Total=552 [2022-04-07 23:00:14,131 INFO L87 Difference]: Start difference. First operand 88 states and 109 transitions. Second operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:28,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:28,529 INFO L93 Difference]: Finished difference Result 382 states and 535 transitions. [2022-04-07 23:00:28,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 144 states. [2022-04-07 23:00:28,530 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-07 23:00:28,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:28,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:28,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 353 transitions. [2022-04-07 23:00:28,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:28,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 353 transitions. [2022-04-07 23:00:28,548 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 144 states and 353 transitions. [2022-04-07 23:00:29,448 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 353 edges. 353 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:29,456 INFO L225 Difference]: With dead ends: 382 [2022-04-07 23:00:29,456 INFO L226 Difference]: Without dead ends: 343 [2022-04-07 23:00:29,461 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 163 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11603 ImplicationChecksByTransitivity, 10.1s TimeCoverageRelationStatistics Valid=5490, Invalid=21570, Unknown=0, NotChecked=0, Total=27060 [2022-04-07 23:00:29,461 INFO L913 BasicCegarLoop]: 42 mSDtfsCounter, 400 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 910 mSolverCounterSat, 669 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 400 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 1579 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 669 IncrementalHoareTripleChecker+Valid, 910 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:29,462 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [400 Valid, 109 Invalid, 1579 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [669 Valid, 910 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2022-04-07 23:00:29,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2022-04-07 23:00:29,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 108. [2022-04-07 23:00:29,704 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:29,704 INFO L82 GeneralOperation]: Start isEquivalent. First operand 343 states. Second operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:29,704 INFO L74 IsIncluded]: Start isIncluded. First operand 343 states. Second operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:29,705 INFO L87 Difference]: Start difference. First operand 343 states. Second operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:29,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:29,712 INFO L93 Difference]: Finished difference Result 343 states and 463 transitions. [2022-04-07 23:00:29,712 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 463 transitions. [2022-04-07 23:00:29,713 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:29,713 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:29,713 INFO L74 IsIncluded]: Start isIncluded. First operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 343 states. [2022-04-07 23:00:29,713 INFO L87 Difference]: Start difference. First operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 343 states. [2022-04-07 23:00:29,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:29,721 INFO L93 Difference]: Finished difference Result 343 states and 463 transitions. [2022-04-07 23:00:29,721 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 463 transitions. [2022-04-07 23:00:29,722 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:29,722 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:29,722 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:29,722 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:29,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 103 states have (on average 1.3106796116504855) internal successors, (135), 103 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:29,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 139 transitions. [2022-04-07 23:00:29,724 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 139 transitions. Word has length 28 [2022-04-07 23:00:29,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:29,725 INFO L478 AbstractCegarLoop]: Abstraction has 108 states and 139 transitions. [2022-04-07 23:00:29,725 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:29,725 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 139 transitions. [2022-04-07 23:00:29,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 23:00:29,725 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:29,725 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:29,757 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:29,948 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:29,948 INFO L403 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:29,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:29,948 INFO L85 PathProgramCache]: Analyzing trace with hash 408042245, now seen corresponding path program 4 times [2022-04-07 23:00:29,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:29,949 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332771136] [2022-04-07 23:00:29,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:29,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:29,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:30,160 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:30,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:30,164 INFO L290 TraceCheckUtils]: 0: Hoare triple {9784#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9768#true} is VALID [2022-04-07 23:00:30,164 INFO L290 TraceCheckUtils]: 1: Hoare triple {9768#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,164 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9768#true} {9768#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,165 INFO L272 TraceCheckUtils]: 0: Hoare triple {9768#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9784#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:30,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {9784#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9768#true} is VALID [2022-04-07 23:00:30,165 INFO L290 TraceCheckUtils]: 2: Hoare triple {9768#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,165 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9768#true} {9768#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,165 INFO L272 TraceCheckUtils]: 4: Hoare triple {9768#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,166 INFO L290 TraceCheckUtils]: 5: Hoare triple {9768#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9773#(= main_~y~0 0)} is VALID [2022-04-07 23:00:30,166 INFO L290 TraceCheckUtils]: 6: Hoare triple {9773#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9774#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:30,167 INFO L290 TraceCheckUtils]: 7: Hoare triple {9774#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9775#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:30,168 INFO L290 TraceCheckUtils]: 8: Hoare triple {9775#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9776#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:30,168 INFO L290 TraceCheckUtils]: 9: Hoare triple {9776#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9777#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:30,169 INFO L290 TraceCheckUtils]: 10: Hoare triple {9777#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9777#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:30,169 INFO L290 TraceCheckUtils]: 11: Hoare triple {9777#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:30,170 INFO L290 TraceCheckUtils]: 12: Hoare triple {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9779#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:00:30,170 INFO L290 TraceCheckUtils]: 13: Hoare triple {9779#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9780#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:30,171 INFO L290 TraceCheckUtils]: 14: Hoare triple {9780#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9781#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:00:30,172 INFO L290 TraceCheckUtils]: 15: Hoare triple {9781#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9782#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:00:30,172 INFO L290 TraceCheckUtils]: 16: Hoare triple {9782#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9782#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:00:30,172 INFO L290 TraceCheckUtils]: 17: Hoare triple {9782#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9781#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:00:30,173 INFO L290 TraceCheckUtils]: 18: Hoare triple {9781#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9780#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:30,173 INFO L290 TraceCheckUtils]: 19: Hoare triple {9780#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9779#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:00:30,174 INFO L290 TraceCheckUtils]: 20: Hoare triple {9779#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:30,174 INFO L290 TraceCheckUtils]: 21: Hoare triple {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:30,175 INFO L290 TraceCheckUtils]: 22: Hoare triple {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:30,175 INFO L290 TraceCheckUtils]: 23: Hoare triple {9778#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {9783#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:30,176 INFO L290 TraceCheckUtils]: 24: Hoare triple {9783#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,176 INFO L272 TraceCheckUtils]: 25: Hoare triple {9769#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {9769#false} is VALID [2022-04-07 23:00:30,176 INFO L290 TraceCheckUtils]: 26: Hoare triple {9769#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9769#false} is VALID [2022-04-07 23:00:30,176 INFO L290 TraceCheckUtils]: 27: Hoare triple {9769#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,176 INFO L290 TraceCheckUtils]: 28: Hoare triple {9769#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,176 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:00:30,176 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:30,176 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332771136] [2022-04-07 23:00:30,176 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [332771136] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:30,176 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1411984043] [2022-04-07 23:00:30,177 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:00:30,177 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:30,177 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:30,177 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:30,178 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-07 23:00:30,213 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:00:30,214 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:30,214 INFO L263 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 23:00:30,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:30,222 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:30,398 INFO L272 TraceCheckUtils]: 0: Hoare triple {9768#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,398 INFO L290 TraceCheckUtils]: 1: Hoare triple {9768#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9768#true} is VALID [2022-04-07 23:00:30,398 INFO L290 TraceCheckUtils]: 2: Hoare triple {9768#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,398 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9768#true} {9768#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,398 INFO L272 TraceCheckUtils]: 4: Hoare triple {9768#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,398 INFO L290 TraceCheckUtils]: 5: Hoare triple {9768#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9768#true} is VALID [2022-04-07 23:00:30,399 INFO L290 TraceCheckUtils]: 6: Hoare triple {9768#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:30,400 INFO L290 TraceCheckUtils]: 7: Hoare triple {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:30,400 INFO L290 TraceCheckUtils]: 8: Hoare triple {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:30,401 INFO L290 TraceCheckUtils]: 9: Hoare triple {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:30,401 INFO L290 TraceCheckUtils]: 10: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:30,402 INFO L290 TraceCheckUtils]: 11: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:30,402 INFO L290 TraceCheckUtils]: 12: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:30,403 INFO L290 TraceCheckUtils]: 13: Hoare triple {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:30,403 INFO L290 TraceCheckUtils]: 14: Hoare triple {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:30,404 INFO L290 TraceCheckUtils]: 15: Hoare triple {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,404 INFO L290 TraceCheckUtils]: 16: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,405 INFO L290 TraceCheckUtils]: 17: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,405 INFO L290 TraceCheckUtils]: 18: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,405 INFO L290 TraceCheckUtils]: 19: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,405 INFO L290 TraceCheckUtils]: 20: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,406 INFO L290 TraceCheckUtils]: 21: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,406 INFO L290 TraceCheckUtils]: 22: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,406 INFO L290 TraceCheckUtils]: 23: Hoare triple {9769#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {9769#false} is VALID [2022-04-07 23:00:30,406 INFO L290 TraceCheckUtils]: 24: Hoare triple {9769#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,406 INFO L272 TraceCheckUtils]: 25: Hoare triple {9769#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {9769#false} is VALID [2022-04-07 23:00:30,406 INFO L290 TraceCheckUtils]: 26: Hoare triple {9769#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9769#false} is VALID [2022-04-07 23:00:30,406 INFO L290 TraceCheckUtils]: 27: Hoare triple {9769#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,407 INFO L290 TraceCheckUtils]: 28: Hoare triple {9769#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,407 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-07 23:00:30,407 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:30,497 INFO L290 TraceCheckUtils]: 28: Hoare triple {9769#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,497 INFO L290 TraceCheckUtils]: 27: Hoare triple {9769#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,497 INFO L290 TraceCheckUtils]: 26: Hoare triple {9769#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9769#false} is VALID [2022-04-07 23:00:30,497 INFO L272 TraceCheckUtils]: 25: Hoare triple {9769#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {9769#false} is VALID [2022-04-07 23:00:30,497 INFO L290 TraceCheckUtils]: 24: Hoare triple {9769#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,498 INFO L290 TraceCheckUtils]: 23: Hoare triple {9769#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {9769#false} is VALID [2022-04-07 23:00:30,499 INFO L290 TraceCheckUtils]: 22: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9769#false} is VALID [2022-04-07 23:00:30,500 INFO L290 TraceCheckUtils]: 21: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,500 INFO L290 TraceCheckUtils]: 20: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,500 INFO L290 TraceCheckUtils]: 19: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,501 INFO L290 TraceCheckUtils]: 18: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,501 INFO L290 TraceCheckUtils]: 17: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,502 INFO L290 TraceCheckUtils]: 16: Hoare triple {9837#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,502 INFO L290 TraceCheckUtils]: 15: Hoare triple {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9837#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:30,503 INFO L290 TraceCheckUtils]: 14: Hoare triple {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:30,504 INFO L290 TraceCheckUtils]: 13: Hoare triple {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:30,505 INFO L290 TraceCheckUtils]: 12: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:30,505 INFO L290 TraceCheckUtils]: 11: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:30,506 INFO L290 TraceCheckUtils]: 10: Hoare triple {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:30,507 INFO L290 TraceCheckUtils]: 9: Hoare triple {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9818#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:30,508 INFO L290 TraceCheckUtils]: 8: Hoare triple {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9814#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:30,509 INFO L290 TraceCheckUtils]: 7: Hoare triple {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9810#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:30,509 INFO L290 TraceCheckUtils]: 6: Hoare triple {9768#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9806#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:30,509 INFO L290 TraceCheckUtils]: 5: Hoare triple {9768#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9768#true} is VALID [2022-04-07 23:00:30,510 INFO L272 TraceCheckUtils]: 4: Hoare triple {9768#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,510 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9768#true} {9768#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,510 INFO L290 TraceCheckUtils]: 2: Hoare triple {9768#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,510 INFO L290 TraceCheckUtils]: 1: Hoare triple {9768#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9768#true} is VALID [2022-04-07 23:00:30,510 INFO L272 TraceCheckUtils]: 0: Hoare triple {9768#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9768#true} is VALID [2022-04-07 23:00:30,510 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-07 23:00:30,510 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1411984043] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:30,510 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:30,511 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 7, 7] total 19 [2022-04-07 23:00:30,511 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195013856] [2022-04-07 23:00:30,511 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:30,511 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 23:00:30,511 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:30,512 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:30,549 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:30,549 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 23:00:30,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:30,550 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 23:00:30,550 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=305, Unknown=0, NotChecked=0, Total=342 [2022-04-07 23:00:30,550 INFO L87 Difference]: Start difference. First operand 108 states and 139 transitions. Second operand has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:35,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:35,682 INFO L93 Difference]: Finished difference Result 177 states and 245 transitions. [2022-04-07 23:00:35,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2022-04-07 23:00:35,682 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 23:00:35,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:35,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:35,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 151 transitions. [2022-04-07 23:00:35,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:35,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 151 transitions. [2022-04-07 23:00:35,686 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 59 states and 151 transitions. [2022-04-07 23:00:35,954 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 151 edges. 151 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:35,956 INFO L225 Difference]: With dead ends: 177 [2022-04-07 23:00:35,956 INFO L226 Difference]: Without dead ends: 158 [2022-04-07 23:00:35,957 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1529 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=710, Invalid=4840, Unknown=0, NotChecked=0, Total=5550 [2022-04-07 23:00:35,958 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 112 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 864 mSolverCounterSat, 223 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 92 SdHoareTripleChecker+Invalid, 1087 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 223 IncrementalHoareTripleChecker+Valid, 864 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:35,958 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [112 Valid, 92 Invalid, 1087 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [223 Valid, 864 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-07 23:00:35,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2022-04-07 23:00:36,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 123. [2022-04-07 23:00:36,193 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:36,194 INFO L82 GeneralOperation]: Start isEquivalent. First operand 158 states. Second operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:36,194 INFO L74 IsIncluded]: Start isIncluded. First operand 158 states. Second operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:36,194 INFO L87 Difference]: Start difference. First operand 158 states. Second operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:36,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:36,197 INFO L93 Difference]: Finished difference Result 158 states and 199 transitions. [2022-04-07 23:00:36,197 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 199 transitions. [2022-04-07 23:00:36,197 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:36,197 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:36,197 INFO L74 IsIncluded]: Start isIncluded. First operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 158 states. [2022-04-07 23:00:36,198 INFO L87 Difference]: Start difference. First operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 158 states. [2022-04-07 23:00:36,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:36,200 INFO L93 Difference]: Finished difference Result 158 states and 199 transitions. [2022-04-07 23:00:36,201 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 199 transitions. [2022-04-07 23:00:36,201 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:36,201 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:36,201 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:36,201 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:36,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 118 states have (on average 1.2966101694915255) internal successors, (153), 118 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:36,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 157 transitions. [2022-04-07 23:00:36,203 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 157 transitions. Word has length 29 [2022-04-07 23:00:36,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:36,203 INFO L478 AbstractCegarLoop]: Abstraction has 123 states and 157 transitions. [2022-04-07 23:00:36,204 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.263157894736842) internal successors, (43), 18 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:36,204 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 157 transitions. [2022-04-07 23:00:36,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-07 23:00:36,204 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:36,204 INFO L499 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:36,227 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:36,426 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:36,426 INFO L403 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:36,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:36,427 INFO L85 PathProgramCache]: Analyzing trace with hash -1025963572, now seen corresponding path program 7 times [2022-04-07 23:00:36,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:36,427 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240912049] [2022-04-07 23:00:36,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:36,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:36,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:36,529 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:36,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:36,534 INFO L290 TraceCheckUtils]: 0: Hoare triple {10816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10807#true} is VALID [2022-04-07 23:00:36,534 INFO L290 TraceCheckUtils]: 1: Hoare triple {10807#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,534 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10807#true} {10807#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,535 INFO L272 TraceCheckUtils]: 0: Hoare triple {10807#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:36,535 INFO L290 TraceCheckUtils]: 1: Hoare triple {10816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10807#true} is VALID [2022-04-07 23:00:36,535 INFO L290 TraceCheckUtils]: 2: Hoare triple {10807#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,535 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10807#true} {10807#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,535 INFO L272 TraceCheckUtils]: 4: Hoare triple {10807#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,536 INFO L290 TraceCheckUtils]: 5: Hoare triple {10807#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10807#true} is VALID [2022-04-07 23:00:36,536 INFO L290 TraceCheckUtils]: 6: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-07 23:00:36,536 INFO L290 TraceCheckUtils]: 7: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-07 23:00:36,537 INFO L290 TraceCheckUtils]: 8: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,537 INFO L290 TraceCheckUtils]: 9: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,538 INFO L290 TraceCheckUtils]: 10: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,539 INFO L290 TraceCheckUtils]: 11: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,539 INFO L290 TraceCheckUtils]: 12: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,540 INFO L290 TraceCheckUtils]: 13: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,541 INFO L290 TraceCheckUtils]: 14: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,541 INFO L290 TraceCheckUtils]: 15: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,542 INFO L290 TraceCheckUtils]: 16: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,542 INFO L290 TraceCheckUtils]: 17: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,543 INFO L290 TraceCheckUtils]: 18: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,544 INFO L290 TraceCheckUtils]: 19: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,545 INFO L290 TraceCheckUtils]: 20: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,546 INFO L290 TraceCheckUtils]: 21: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,546 INFO L290 TraceCheckUtils]: 22: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,546 INFO L290 TraceCheckUtils]: 23: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,546 INFO L290 TraceCheckUtils]: 24: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,546 INFO L290 TraceCheckUtils]: 25: Hoare triple {10808#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,546 INFO L272 TraceCheckUtils]: 26: Hoare triple {10808#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {10808#false} is VALID [2022-04-07 23:00:36,546 INFO L290 TraceCheckUtils]: 27: Hoare triple {10808#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10808#false} is VALID [2022-04-07 23:00:36,546 INFO L290 TraceCheckUtils]: 28: Hoare triple {10808#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,547 INFO L290 TraceCheckUtils]: 29: Hoare triple {10808#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,548 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:36,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:36,548 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240912049] [2022-04-07 23:00:36,548 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [240912049] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:36,548 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [645951186] [2022-04-07 23:00:36,548 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 23:00:36,549 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:36,549 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:36,551 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:36,575 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-07 23:00:36,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:36,602 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 23:00:36,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:36,610 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:36,816 INFO L272 TraceCheckUtils]: 0: Hoare triple {10807#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,817 INFO L290 TraceCheckUtils]: 1: Hoare triple {10807#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10807#true} is VALID [2022-04-07 23:00:36,817 INFO L290 TraceCheckUtils]: 2: Hoare triple {10807#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,817 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10807#true} {10807#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,817 INFO L272 TraceCheckUtils]: 4: Hoare triple {10807#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,817 INFO L290 TraceCheckUtils]: 5: Hoare triple {10807#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10807#true} is VALID [2022-04-07 23:00:36,817 INFO L290 TraceCheckUtils]: 6: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-07 23:00:36,817 INFO L290 TraceCheckUtils]: 7: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-07 23:00:36,818 INFO L290 TraceCheckUtils]: 8: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,818 INFO L290 TraceCheckUtils]: 9: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,819 INFO L290 TraceCheckUtils]: 10: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,819 INFO L290 TraceCheckUtils]: 11: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,820 INFO L290 TraceCheckUtils]: 12: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,821 INFO L290 TraceCheckUtils]: 13: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,821 INFO L290 TraceCheckUtils]: 14: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,821 INFO L290 TraceCheckUtils]: 15: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,822 INFO L290 TraceCheckUtils]: 16: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,822 INFO L290 TraceCheckUtils]: 17: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,822 INFO L290 TraceCheckUtils]: 18: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,823 INFO L290 TraceCheckUtils]: 19: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,824 INFO L290 TraceCheckUtils]: 20: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,825 INFO L290 TraceCheckUtils]: 21: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,825 INFO L290 TraceCheckUtils]: 22: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,825 INFO L290 TraceCheckUtils]: 23: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,825 INFO L290 TraceCheckUtils]: 24: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,825 INFO L290 TraceCheckUtils]: 25: Hoare triple {10808#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,825 INFO L272 TraceCheckUtils]: 26: Hoare triple {10808#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {10808#false} is VALID [2022-04-07 23:00:36,825 INFO L290 TraceCheckUtils]: 27: Hoare triple {10808#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10808#false} is VALID [2022-04-07 23:00:36,825 INFO L290 TraceCheckUtils]: 28: Hoare triple {10808#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,825 INFO L290 TraceCheckUtils]: 29: Hoare triple {10808#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,826 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:36,826 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:36,936 INFO L290 TraceCheckUtils]: 29: Hoare triple {10808#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,936 INFO L290 TraceCheckUtils]: 28: Hoare triple {10808#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,936 INFO L290 TraceCheckUtils]: 27: Hoare triple {10808#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10808#false} is VALID [2022-04-07 23:00:36,936 INFO L272 TraceCheckUtils]: 26: Hoare triple {10808#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {10808#false} is VALID [2022-04-07 23:00:36,936 INFO L290 TraceCheckUtils]: 25: Hoare triple {10808#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,937 INFO L290 TraceCheckUtils]: 24: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,937 INFO L290 TraceCheckUtils]: 23: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,937 INFO L290 TraceCheckUtils]: 22: Hoare triple {10808#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {10808#false} is VALID [2022-04-07 23:00:36,940 INFO L290 TraceCheckUtils]: 21: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10808#false} is VALID [2022-04-07 23:00:36,941 INFO L290 TraceCheckUtils]: 20: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,942 INFO L290 TraceCheckUtils]: 19: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,942 INFO L290 TraceCheckUtils]: 18: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,943 INFO L290 TraceCheckUtils]: 17: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,943 INFO L290 TraceCheckUtils]: 16: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,944 INFO L290 TraceCheckUtils]: 15: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,944 INFO L290 TraceCheckUtils]: 14: Hoare triple {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,945 INFO L290 TraceCheckUtils]: 13: Hoare triple {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10815#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,946 INFO L290 TraceCheckUtils]: 12: Hoare triple {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10814#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,947 INFO L290 TraceCheckUtils]: 11: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10813#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:36,947 INFO L290 TraceCheckUtils]: 10: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,948 INFO L290 TraceCheckUtils]: 9: Hoare triple {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,949 INFO L290 TraceCheckUtils]: 8: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:00:36,949 INFO L290 TraceCheckUtils]: 7: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-07 23:00:36,949 INFO L290 TraceCheckUtils]: 6: Hoare triple {10807#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10807#true} is VALID [2022-04-07 23:00:36,949 INFO L290 TraceCheckUtils]: 5: Hoare triple {10807#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10807#true} is VALID [2022-04-07 23:00:36,949 INFO L272 TraceCheckUtils]: 4: Hoare triple {10807#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,949 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10807#true} {10807#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,949 INFO L290 TraceCheckUtils]: 2: Hoare triple {10807#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,950 INFO L290 TraceCheckUtils]: 1: Hoare triple {10807#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10807#true} is VALID [2022-04-07 23:00:36,950 INFO L272 TraceCheckUtils]: 0: Hoare triple {10807#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10807#true} is VALID [2022-04-07 23:00:36,950 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-07 23:00:36,950 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [645951186] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:36,950 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:36,950 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-07 23:00:36,950 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450526478] [2022-04-07 23:00:36,950 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:36,951 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:00:36,951 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:36,951 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:36,975 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:36,975 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 23:00:36,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:36,975 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 23:00:36,976 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-07 23:00:36,976 INFO L87 Difference]: Start difference. First operand 123 states and 157 transitions. Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:37,470 INFO L93 Difference]: Finished difference Result 137 states and 174 transitions. [2022-04-07 23:00:37,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 23:00:37,470 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-07 23:00:37,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:37,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-07 23:00:37,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 45 transitions. [2022-04-07 23:00:37,472 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 45 transitions. [2022-04-07 23:00:37,522 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:37,523 INFO L225 Difference]: With dead ends: 137 [2022-04-07 23:00:37,523 INFO L226 Difference]: Without dead ends: 124 [2022-04-07 23:00:37,524 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 62 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2022-04-07 23:00:37,527 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 31 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 42 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:37,527 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 42 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 23:00:37,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2022-04-07 23:00:37,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2022-04-07 23:00:37,782 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:37,782 INFO L82 GeneralOperation]: Start isEquivalent. First operand 124 states. Second operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,782 INFO L74 IsIncluded]: Start isIncluded. First operand 124 states. Second operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,782 INFO L87 Difference]: Start difference. First operand 124 states. Second operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:37,784 INFO L93 Difference]: Finished difference Result 124 states and 157 transitions. [2022-04-07 23:00:37,784 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 157 transitions. [2022-04-07 23:00:37,784 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:37,785 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:37,785 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 124 states. [2022-04-07 23:00:37,785 INFO L87 Difference]: Start difference. First operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 124 states. [2022-04-07 23:00:37,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:37,787 INFO L93 Difference]: Finished difference Result 124 states and 157 transitions. [2022-04-07 23:00:37,787 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 157 transitions. [2022-04-07 23:00:37,787 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:37,787 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:37,787 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:37,787 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:37,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 119 states have (on average 1.2857142857142858) internal successors, (153), 119 states have internal predecessors, (153), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 157 transitions. [2022-04-07 23:00:37,789 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 157 transitions. Word has length 30 [2022-04-07 23:00:37,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:37,789 INFO L478 AbstractCegarLoop]: Abstraction has 124 states and 157 transitions. [2022-04-07 23:00:37,789 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:37,790 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 157 transitions. [2022-04-07 23:00:37,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-07 23:00:37,790 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:37,790 INFO L499 BasicCegarLoop]: trace histogram [7, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:37,816 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:38,007 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:38,007 INFO L403 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:38,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:38,008 INFO L85 PathProgramCache]: Analyzing trace with hash -1105068913, now seen corresponding path program 5 times [2022-04-07 23:00:38,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:38,008 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188435304] [2022-04-07 23:00:38,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:38,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:38,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:38,199 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:38,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:38,204 INFO L290 TraceCheckUtils]: 0: Hoare triple {11650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11632#true} is VALID [2022-04-07 23:00:38,204 INFO L290 TraceCheckUtils]: 1: Hoare triple {11632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,204 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11632#true} {11632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,205 INFO L272 TraceCheckUtils]: 0: Hoare triple {11632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:38,205 INFO L290 TraceCheckUtils]: 1: Hoare triple {11650#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11632#true} is VALID [2022-04-07 23:00:38,205 INFO L290 TraceCheckUtils]: 2: Hoare triple {11632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,205 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11632#true} {11632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,205 INFO L272 TraceCheckUtils]: 4: Hoare triple {11632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,205 INFO L290 TraceCheckUtils]: 5: Hoare triple {11632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11637#(= main_~y~0 0)} is VALID [2022-04-07 23:00:38,206 INFO L290 TraceCheckUtils]: 6: Hoare triple {11637#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11638#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:38,206 INFO L290 TraceCheckUtils]: 7: Hoare triple {11638#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11639#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:38,207 INFO L290 TraceCheckUtils]: 8: Hoare triple {11639#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:38,207 INFO L290 TraceCheckUtils]: 9: Hoare triple {11640#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11641#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:38,208 INFO L290 TraceCheckUtils]: 10: Hoare triple {11641#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11642#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:38,208 INFO L290 TraceCheckUtils]: 11: Hoare triple {11642#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11643#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:00:38,209 INFO L290 TraceCheckUtils]: 12: Hoare triple {11643#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11644#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:00:38,209 INFO L290 TraceCheckUtils]: 13: Hoare triple {11644#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11644#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:00:38,209 INFO L290 TraceCheckUtils]: 14: Hoare triple {11644#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11645#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:00:38,210 INFO L290 TraceCheckUtils]: 15: Hoare triple {11645#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11646#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:00:38,210 INFO L290 TraceCheckUtils]: 16: Hoare triple {11646#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11647#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:38,211 INFO L290 TraceCheckUtils]: 17: Hoare triple {11647#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11648#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 18: Hoare triple {11648#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11649#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 19: Hoare triple {11649#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 20: Hoare triple {11633#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11633#false} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 21: Hoare triple {11633#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11633#false} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 22: Hoare triple {11633#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11633#false} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 23: Hoare triple {11633#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 24: Hoare triple {11633#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {11633#false} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 25: Hoare triple {11633#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,212 INFO L290 TraceCheckUtils]: 26: Hoare triple {11633#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,213 INFO L272 TraceCheckUtils]: 27: Hoare triple {11633#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {11633#false} is VALID [2022-04-07 23:00:38,213 INFO L290 TraceCheckUtils]: 28: Hoare triple {11633#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11633#false} is VALID [2022-04-07 23:00:38,213 INFO L290 TraceCheckUtils]: 29: Hoare triple {11633#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,213 INFO L290 TraceCheckUtils]: 30: Hoare triple {11633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,213 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-07 23:00:38,213 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:38,213 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188435304] [2022-04-07 23:00:38,213 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [188435304] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:38,213 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [199622354] [2022-04-07 23:00:38,213 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 23:00:38,213 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:38,213 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:38,214 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:38,215 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-07 23:00:38,462 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-07 23:00:38,462 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:38,463 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-07 23:00:38,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:38,474 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:38,628 INFO L272 TraceCheckUtils]: 0: Hoare triple {11632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,628 INFO L290 TraceCheckUtils]: 1: Hoare triple {11632#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11632#true} is VALID [2022-04-07 23:00:38,628 INFO L290 TraceCheckUtils]: 2: Hoare triple {11632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,628 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11632#true} {11632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,628 INFO L272 TraceCheckUtils]: 4: Hoare triple {11632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,628 INFO L290 TraceCheckUtils]: 5: Hoare triple {11632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11632#true} is VALID [2022-04-07 23:00:38,628 INFO L290 TraceCheckUtils]: 6: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-07 23:00:38,628 INFO L290 TraceCheckUtils]: 7: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-07 23:00:38,628 INFO L290 TraceCheckUtils]: 8: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-07 23:00:38,629 INFO L290 TraceCheckUtils]: 9: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-07 23:00:38,629 INFO L290 TraceCheckUtils]: 10: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:38,630 INFO L290 TraceCheckUtils]: 11: Hoare triple {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:38,630 INFO L290 TraceCheckUtils]: 12: Hoare triple {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:38,631 INFO L290 TraceCheckUtils]: 13: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:38,632 INFO L290 TraceCheckUtils]: 14: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:38,632 INFO L290 TraceCheckUtils]: 15: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:38,633 INFO L290 TraceCheckUtils]: 16: Hoare triple {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:38,634 INFO L290 TraceCheckUtils]: 17: Hoare triple {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11708#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:38,635 INFO L290 TraceCheckUtils]: 18: Hoare triple {11708#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,635 INFO L290 TraceCheckUtils]: 19: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,635 INFO L290 TraceCheckUtils]: 20: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,636 INFO L290 TraceCheckUtils]: 21: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,636 INFO L290 TraceCheckUtils]: 22: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,636 INFO L290 TraceCheckUtils]: 23: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,638 INFO L290 TraceCheckUtils]: 24: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {11708#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:38,638 INFO L290 TraceCheckUtils]: 25: Hoare triple {11708#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,638 INFO L290 TraceCheckUtils]: 26: Hoare triple {11633#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,638 INFO L272 TraceCheckUtils]: 27: Hoare triple {11633#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {11633#false} is VALID [2022-04-07 23:00:38,638 INFO L290 TraceCheckUtils]: 28: Hoare triple {11633#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11633#false} is VALID [2022-04-07 23:00:38,638 INFO L290 TraceCheckUtils]: 29: Hoare triple {11633#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,638 INFO L290 TraceCheckUtils]: 30: Hoare triple {11633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,638 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-07 23:00:38,638 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:38,733 INFO L290 TraceCheckUtils]: 30: Hoare triple {11633#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,733 INFO L290 TraceCheckUtils]: 29: Hoare triple {11633#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,733 INFO L290 TraceCheckUtils]: 28: Hoare triple {11633#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11633#false} is VALID [2022-04-07 23:00:38,733 INFO L272 TraceCheckUtils]: 27: Hoare triple {11633#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {11633#false} is VALID [2022-04-07 23:00:38,733 INFO L290 TraceCheckUtils]: 26: Hoare triple {11633#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,733 INFO L290 TraceCheckUtils]: 25: Hoare triple {11708#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11633#false} is VALID [2022-04-07 23:00:38,734 INFO L290 TraceCheckUtils]: 24: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {11708#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:38,734 INFO L290 TraceCheckUtils]: 23: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,735 INFO L290 TraceCheckUtils]: 22: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,735 INFO L290 TraceCheckUtils]: 21: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,736 INFO L290 TraceCheckUtils]: 20: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,736 INFO L290 TraceCheckUtils]: 19: Hoare triple {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,737 INFO L290 TraceCheckUtils]: 18: Hoare triple {11708#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11712#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:00:38,737 INFO L290 TraceCheckUtils]: 17: Hoare triple {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11708#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:38,738 INFO L290 TraceCheckUtils]: 16: Hoare triple {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:38,738 INFO L290 TraceCheckUtils]: 15: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:38,739 INFO L290 TraceCheckUtils]: 14: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:38,739 INFO L290 TraceCheckUtils]: 13: Hoare triple {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:38,740 INFO L290 TraceCheckUtils]: 12: Hoare triple {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11692#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:38,740 INFO L290 TraceCheckUtils]: 11: Hoare triple {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11688#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:38,741 INFO L290 TraceCheckUtils]: 10: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11684#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:38,741 INFO L290 TraceCheckUtils]: 9: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-07 23:00:38,741 INFO L290 TraceCheckUtils]: 8: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-07 23:00:38,741 INFO L290 TraceCheckUtils]: 7: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-07 23:00:38,741 INFO L290 TraceCheckUtils]: 6: Hoare triple {11632#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11632#true} is VALID [2022-04-07 23:00:38,741 INFO L290 TraceCheckUtils]: 5: Hoare triple {11632#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11632#true} is VALID [2022-04-07 23:00:38,741 INFO L272 TraceCheckUtils]: 4: Hoare triple {11632#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,741 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11632#true} {11632#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,741 INFO L290 TraceCheckUtils]: 2: Hoare triple {11632#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {11632#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11632#true} is VALID [2022-04-07 23:00:38,742 INFO L272 TraceCheckUtils]: 0: Hoare triple {11632#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11632#true} is VALID [2022-04-07 23:00:38,742 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 15 proven. 14 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-07 23:00:38,742 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [199622354] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:38,742 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:38,742 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 7, 7] total 21 [2022-04-07 23:00:38,742 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524572168] [2022-04-07 23:00:38,742 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:38,743 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:00:38,743 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:38,743 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:38,776 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:38,776 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-07 23:00:38,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:38,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-07 23:00:38,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=377, Unknown=0, NotChecked=0, Total=420 [2022-04-07 23:00:38,777 INFO L87 Difference]: Start difference. First operand 124 states and 157 transitions. Second operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:44,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:44,668 INFO L93 Difference]: Finished difference Result 240 states and 320 transitions. [2022-04-07 23:00:44,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2022-04-07 23:00:44,668 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-07 23:00:44,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:44,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:44,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 173 transitions. [2022-04-07 23:00:44,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:44,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 173 transitions. [2022-04-07 23:00:44,672 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 67 states and 173 transitions. [2022-04-07 23:00:44,911 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:44,913 INFO L225 Difference]: With dead ends: 240 [2022-04-07 23:00:44,913 INFO L226 Difference]: Without dead ends: 209 [2022-04-07 23:00:44,915 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2053 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=726, Invalid=6414, Unknown=0, NotChecked=0, Total=7140 [2022-04-07 23:00:44,915 INFO L913 BasicCegarLoop]: 34 mSDtfsCounter, 154 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 1306 mSolverCounterSat, 238 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 116 SdHoareTripleChecker+Invalid, 1544 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 238 IncrementalHoareTripleChecker+Valid, 1306 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:44,915 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [154 Valid, 116 Invalid, 1544 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [238 Valid, 1306 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2022-04-07 23:00:44,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2022-04-07 23:00:45,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 134. [2022-04-07 23:00:45,227 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:45,228 INFO L82 GeneralOperation]: Start isEquivalent. First operand 209 states. Second operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:45,228 INFO L74 IsIncluded]: Start isIncluded. First operand 209 states. Second operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:45,228 INFO L87 Difference]: Start difference. First operand 209 states. Second operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:45,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:45,231 INFO L93 Difference]: Finished difference Result 209 states and 271 transitions. [2022-04-07 23:00:45,231 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 271 transitions. [2022-04-07 23:00:45,232 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:45,232 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:45,232 INFO L74 IsIncluded]: Start isIncluded. First operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 209 states. [2022-04-07 23:00:45,232 INFO L87 Difference]: Start difference. First operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 209 states. [2022-04-07 23:00:45,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:45,236 INFO L93 Difference]: Finished difference Result 209 states and 271 transitions. [2022-04-07 23:00:45,236 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 271 transitions. [2022-04-07 23:00:45,236 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:45,236 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:45,236 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:45,236 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:45,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 129 states have (on average 1.2713178294573644) internal successors, (164), 129 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:45,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 168 transitions. [2022-04-07 23:00:45,238 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 168 transitions. Word has length 31 [2022-04-07 23:00:45,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:45,239 INFO L478 AbstractCegarLoop]: Abstraction has 134 states and 168 transitions. [2022-04-07 23:00:45,239 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.0) internal successors, (42), 20 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:45,239 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 168 transitions. [2022-04-07 23:00:45,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 23:00:45,239 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:45,239 INFO L499 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:45,249 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:45,444 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:45,444 INFO L403 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:45,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:45,444 INFO L85 PathProgramCache]: Analyzing trace with hash 179018828, now seen corresponding path program 8 times [2022-04-07 23:00:45,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:45,444 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103358820] [2022-04-07 23:00:45,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:45,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:45,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:45,535 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:45,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:45,543 INFO L290 TraceCheckUtils]: 0: Hoare triple {12911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12902#true} is VALID [2022-04-07 23:00:45,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {12902#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,544 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12902#true} {12902#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,544 INFO L272 TraceCheckUtils]: 0: Hoare triple {12902#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:45,545 INFO L290 TraceCheckUtils]: 1: Hoare triple {12911#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12902#true} is VALID [2022-04-07 23:00:45,545 INFO L290 TraceCheckUtils]: 2: Hoare triple {12902#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,545 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12902#true} {12902#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,545 INFO L272 TraceCheckUtils]: 4: Hoare triple {12902#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,545 INFO L290 TraceCheckUtils]: 5: Hoare triple {12902#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12902#true} is VALID [2022-04-07 23:00:45,545 INFO L290 TraceCheckUtils]: 6: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:45,545 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:45,545 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:45,546 INFO L290 TraceCheckUtils]: 9: Hoare triple {12902#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:45,546 INFO L290 TraceCheckUtils]: 10: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:45,547 INFO L290 TraceCheckUtils]: 11: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:45,548 INFO L290 TraceCheckUtils]: 12: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,548 INFO L290 TraceCheckUtils]: 13: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,549 INFO L290 TraceCheckUtils]: 14: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,549 INFO L290 TraceCheckUtils]: 15: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,550 INFO L290 TraceCheckUtils]: 16: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,550 INFO L290 TraceCheckUtils]: 17: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,551 INFO L290 TraceCheckUtils]: 18: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,552 INFO L290 TraceCheckUtils]: 19: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,553 INFO L290 TraceCheckUtils]: 20: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:45,554 INFO L290 TraceCheckUtils]: 21: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:45,554 INFO L290 TraceCheckUtils]: 22: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12903#false} is VALID [2022-04-07 23:00:45,554 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L290 TraceCheckUtils]: 26: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L290 TraceCheckUtils]: 27: Hoare triple {12903#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L272 TraceCheckUtils]: 28: Hoare triple {12903#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L290 TraceCheckUtils]: 29: Hoare triple {12903#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L290 TraceCheckUtils]: 30: Hoare triple {12903#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L290 TraceCheckUtils]: 31: Hoare triple {12903#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:45,555 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-07 23:00:45,556 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:45,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103358820] [2022-04-07 23:00:45,556 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [103358820] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:45,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1643881681] [2022-04-07 23:00:45,556 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 23:00:45,556 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:45,556 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:45,560 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:45,588 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-07 23:00:45,616 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 23:00:45,616 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:45,617 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-07 23:00:45,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:45,625 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:45,837 INFO L272 TraceCheckUtils]: 0: Hoare triple {12902#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {12902#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12902#true} is VALID [2022-04-07 23:00:45,837 INFO L290 TraceCheckUtils]: 2: Hoare triple {12902#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,837 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12902#true} {12902#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,838 INFO L272 TraceCheckUtils]: 4: Hoare triple {12902#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:45,838 INFO L290 TraceCheckUtils]: 5: Hoare triple {12902#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12902#true} is VALID [2022-04-07 23:00:45,838 INFO L290 TraceCheckUtils]: 6: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:45,838 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:45,838 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:45,839 INFO L290 TraceCheckUtils]: 9: Hoare triple {12902#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:45,839 INFO L290 TraceCheckUtils]: 10: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:45,840 INFO L290 TraceCheckUtils]: 11: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:45,841 INFO L290 TraceCheckUtils]: 12: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,842 INFO L290 TraceCheckUtils]: 13: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,842 INFO L290 TraceCheckUtils]: 14: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,842 INFO L290 TraceCheckUtils]: 15: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,843 INFO L290 TraceCheckUtils]: 16: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,843 INFO L290 TraceCheckUtils]: 17: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,844 INFO L290 TraceCheckUtils]: 18: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,845 INFO L290 TraceCheckUtils]: 19: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:45,846 INFO L290 TraceCheckUtils]: 20: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:45,847 INFO L290 TraceCheckUtils]: 21: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:45,848 INFO L290 TraceCheckUtils]: 22: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12903#false} is VALID [2022-04-07 23:00:45,848 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:45,848 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:45,848 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:45,848 INFO L290 TraceCheckUtils]: 26: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:45,848 INFO L290 TraceCheckUtils]: 27: Hoare triple {12903#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:45,848 INFO L272 TraceCheckUtils]: 28: Hoare triple {12903#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {12903#false} is VALID [2022-04-07 23:00:45,848 INFO L290 TraceCheckUtils]: 29: Hoare triple {12903#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12903#false} is VALID [2022-04-07 23:00:45,848 INFO L290 TraceCheckUtils]: 30: Hoare triple {12903#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:45,849 INFO L290 TraceCheckUtils]: 31: Hoare triple {12903#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:45,849 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-07 23:00:45,849 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:46,052 INFO L290 TraceCheckUtils]: 31: Hoare triple {12903#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:46,052 INFO L290 TraceCheckUtils]: 30: Hoare triple {12903#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:46,052 INFO L290 TraceCheckUtils]: 29: Hoare triple {12903#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12903#false} is VALID [2022-04-07 23:00:46,052 INFO L272 TraceCheckUtils]: 28: Hoare triple {12903#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {12903#false} is VALID [2022-04-07 23:00:46,052 INFO L290 TraceCheckUtils]: 27: Hoare triple {12903#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:46,052 INFO L290 TraceCheckUtils]: 26: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:46,052 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:46,052 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {12903#false} is VALID [2022-04-07 23:00:46,052 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12903#false} is VALID [2022-04-07 23:00:46,053 INFO L290 TraceCheckUtils]: 22: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12903#false} is VALID [2022-04-07 23:00:46,054 INFO L290 TraceCheckUtils]: 21: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:46,054 INFO L290 TraceCheckUtils]: 20: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:46,055 INFO L290 TraceCheckUtils]: 19: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:46,055 INFO L290 TraceCheckUtils]: 18: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:46,056 INFO L290 TraceCheckUtils]: 17: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:46,067 INFO L290 TraceCheckUtils]: 16: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:46,068 INFO L290 TraceCheckUtils]: 15: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:46,068 INFO L290 TraceCheckUtils]: 14: Hoare triple {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:46,069 INFO L290 TraceCheckUtils]: 13: Hoare triple {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12910#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:46,070 INFO L290 TraceCheckUtils]: 12: Hoare triple {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12909#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:00:46,071 INFO L290 TraceCheckUtils]: 11: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12908#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-07 23:00:46,071 INFO L290 TraceCheckUtils]: 10: Hoare triple {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:46,072 INFO L290 TraceCheckUtils]: 9: Hoare triple {12902#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12907#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-07 23:00:46,072 INFO L290 TraceCheckUtils]: 8: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:46,072 INFO L290 TraceCheckUtils]: 7: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:46,072 INFO L290 TraceCheckUtils]: 6: Hoare triple {12902#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12902#true} is VALID [2022-04-07 23:00:46,072 INFO L290 TraceCheckUtils]: 5: Hoare triple {12902#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12902#true} is VALID [2022-04-07 23:00:46,072 INFO L272 TraceCheckUtils]: 4: Hoare triple {12902#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:46,073 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12902#true} {12902#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:46,073 INFO L290 TraceCheckUtils]: 2: Hoare triple {12902#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:46,073 INFO L290 TraceCheckUtils]: 1: Hoare triple {12902#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12902#true} is VALID [2022-04-07 23:00:46,073 INFO L272 TraceCheckUtils]: 0: Hoare triple {12902#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12902#true} is VALID [2022-04-07 23:00:46,073 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-07 23:00:46,073 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1643881681] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:46,073 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:46,073 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-07 23:00:46,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636570392] [2022-04-07 23:00:46,074 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:46,074 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:00:46,074 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:46,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,096 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:46,096 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-07 23:00:46,096 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:46,096 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-07 23:00:46,096 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-07 23:00:46,096 INFO L87 Difference]: Start difference. First operand 134 states and 168 transitions. Second operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:46,619 INFO L93 Difference]: Finished difference Result 146 states and 182 transitions. [2022-04-07 23:00:46,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-07 23:00:46,619 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:00:46,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:46,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 44 transitions. [2022-04-07 23:00:46,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 44 transitions. [2022-04-07 23:00:46,620 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 44 transitions. [2022-04-07 23:00:46,654 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:46,655 INFO L225 Difference]: With dead ends: 146 [2022-04-07 23:00:46,655 INFO L226 Difference]: Without dead ends: 121 [2022-04-07 23:00:46,656 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 67 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-04-07 23:00:46,656 INFO L913 BasicCegarLoop]: 22 mSDtfsCounter, 23 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:46,656 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 44 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 23:00:46,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2022-04-07 23:00:46,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2022-04-07 23:00:46,926 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:46,926 INFO L82 GeneralOperation]: Start isEquivalent. First operand 121 states. Second operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,926 INFO L74 IsIncluded]: Start isIncluded. First operand 121 states. Second operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,926 INFO L87 Difference]: Start difference. First operand 121 states. Second operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:46,928 INFO L93 Difference]: Finished difference Result 121 states and 153 transitions. [2022-04-07 23:00:46,928 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 153 transitions. [2022-04-07 23:00:46,928 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:46,929 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:46,929 INFO L74 IsIncluded]: Start isIncluded. First operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 121 states. [2022-04-07 23:00:46,929 INFO L87 Difference]: Start difference. First operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 121 states. [2022-04-07 23:00:46,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:46,931 INFO L93 Difference]: Finished difference Result 121 states and 153 transitions. [2022-04-07 23:00:46,931 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 153 transitions. [2022-04-07 23:00:46,931 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:46,931 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:46,931 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:46,931 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:46,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 116 states have (on average 1.2844827586206897) internal successors, (149), 116 states have internal predecessors, (149), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 153 transitions. [2022-04-07 23:00:46,933 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 153 transitions. Word has length 32 [2022-04-07 23:00:46,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:46,933 INFO L478 AbstractCegarLoop]: Abstraction has 121 states and 153 transitions. [2022-04-07 23:00:46,933 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:46,933 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 153 transitions. [2022-04-07 23:00:46,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-07 23:00:46,934 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:46,934 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:46,959 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-07 23:00:47,148 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:47,148 INFO L403 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:00:47,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:00:47,149 INFO L85 PathProgramCache]: Analyzing trace with hash 28691148, now seen corresponding path program 5 times [2022-04-07 23:00:47,149 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:00:47,149 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855438763] [2022-04-07 23:00:47,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:00:47,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:00:47,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:47,381 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:00:47,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:47,384 INFO L290 TraceCheckUtils]: 0: Hoare triple {13758#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13740#true} is VALID [2022-04-07 23:00:47,385 INFO L290 TraceCheckUtils]: 1: Hoare triple {13740#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,385 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13740#true} {13740#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {13740#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13758#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:00:47,386 INFO L290 TraceCheckUtils]: 1: Hoare triple {13758#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13740#true} is VALID [2022-04-07 23:00:47,386 INFO L290 TraceCheckUtils]: 2: Hoare triple {13740#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,386 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13740#true} {13740#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,386 INFO L272 TraceCheckUtils]: 4: Hoare triple {13740#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,386 INFO L290 TraceCheckUtils]: 5: Hoare triple {13740#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13745#(= main_~y~0 0)} is VALID [2022-04-07 23:00:47,387 INFO L290 TraceCheckUtils]: 6: Hoare triple {13745#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13746#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:00:47,387 INFO L290 TraceCheckUtils]: 7: Hoare triple {13746#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13747#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:00:47,388 INFO L290 TraceCheckUtils]: 8: Hoare triple {13747#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13748#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:00:47,389 INFO L290 TraceCheckUtils]: 9: Hoare triple {13748#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13749#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:00:47,390 INFO L290 TraceCheckUtils]: 10: Hoare triple {13749#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13750#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:47,390 INFO L290 TraceCheckUtils]: 11: Hoare triple {13750#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13750#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:00:47,391 INFO L290 TraceCheckUtils]: 12: Hoare triple {13750#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:47,391 INFO L290 TraceCheckUtils]: 13: Hoare triple {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13752#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:47,392 INFO L290 TraceCheckUtils]: 14: Hoare triple {13752#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13753#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:00:47,393 INFO L290 TraceCheckUtils]: 15: Hoare triple {13753#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13754#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:47,393 INFO L290 TraceCheckUtils]: 16: Hoare triple {13754#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13755#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:00:47,394 INFO L290 TraceCheckUtils]: 17: Hoare triple {13755#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13756#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:00:47,394 INFO L290 TraceCheckUtils]: 18: Hoare triple {13756#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13756#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:00:47,395 INFO L290 TraceCheckUtils]: 19: Hoare triple {13756#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13755#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:00:47,396 INFO L290 TraceCheckUtils]: 20: Hoare triple {13755#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13754#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:00:47,397 INFO L290 TraceCheckUtils]: 21: Hoare triple {13754#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13753#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:00:47,397 INFO L290 TraceCheckUtils]: 22: Hoare triple {13753#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13752#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:00:47,398 INFO L290 TraceCheckUtils]: 23: Hoare triple {13752#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:47,398 INFO L290 TraceCheckUtils]: 24: Hoare triple {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:47,399 INFO L290 TraceCheckUtils]: 25: Hoare triple {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:00:47,400 INFO L290 TraceCheckUtils]: 26: Hoare triple {13751#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {13757#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:00:47,400 INFO L290 TraceCheckUtils]: 27: Hoare triple {13757#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,400 INFO L272 TraceCheckUtils]: 28: Hoare triple {13741#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {13741#false} is VALID [2022-04-07 23:00:47,400 INFO L290 TraceCheckUtils]: 29: Hoare triple {13741#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13741#false} is VALID [2022-04-07 23:00:47,400 INFO L290 TraceCheckUtils]: 30: Hoare triple {13741#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,401 INFO L290 TraceCheckUtils]: 31: Hoare triple {13741#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,401 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:00:47,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:00:47,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855438763] [2022-04-07 23:00:47,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [855438763] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:00:47,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2058066484] [2022-04-07 23:00:47,401 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 23:00:47,401 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:00:47,402 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:00:47,403 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:00:47,413 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-07 23:00:47,552 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 23:00:47,552 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:00:47,553 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-07 23:00:47,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:00:47,561 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:00:47,741 INFO L272 TraceCheckUtils]: 0: Hoare triple {13740#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,741 INFO L290 TraceCheckUtils]: 1: Hoare triple {13740#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13740#true} is VALID [2022-04-07 23:00:47,741 INFO L290 TraceCheckUtils]: 2: Hoare triple {13740#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,741 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13740#true} {13740#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,741 INFO L272 TraceCheckUtils]: 4: Hoare triple {13740#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,741 INFO L290 TraceCheckUtils]: 5: Hoare triple {13740#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13740#true} is VALID [2022-04-07 23:00:47,742 INFO L290 TraceCheckUtils]: 6: Hoare triple {13740#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:47,743 INFO L290 TraceCheckUtils]: 7: Hoare triple {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:47,743 INFO L290 TraceCheckUtils]: 8: Hoare triple {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:47,744 INFO L290 TraceCheckUtils]: 9: Hoare triple {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:47,745 INFO L290 TraceCheckUtils]: 10: Hoare triple {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:00:47,745 INFO L290 TraceCheckUtils]: 11: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:00:47,745 INFO L290 TraceCheckUtils]: 12: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:00:47,746 INFO L290 TraceCheckUtils]: 13: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:47,746 INFO L290 TraceCheckUtils]: 14: Hoare triple {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:47,747 INFO L290 TraceCheckUtils]: 15: Hoare triple {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:47,748 INFO L290 TraceCheckUtils]: 16: Hoare triple {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:47,748 INFO L290 TraceCheckUtils]: 17: Hoare triple {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,748 INFO L290 TraceCheckUtils]: 18: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,749 INFO L290 TraceCheckUtils]: 19: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,749 INFO L290 TraceCheckUtils]: 20: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,749 INFO L290 TraceCheckUtils]: 21: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,749 INFO L290 TraceCheckUtils]: 22: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,750 INFO L290 TraceCheckUtils]: 23: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,750 INFO L290 TraceCheckUtils]: 24: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,750 INFO L290 TraceCheckUtils]: 25: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,750 INFO L290 TraceCheckUtils]: 26: Hoare triple {13741#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {13741#false} is VALID [2022-04-07 23:00:47,750 INFO L290 TraceCheckUtils]: 27: Hoare triple {13741#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,751 INFO L272 TraceCheckUtils]: 28: Hoare triple {13741#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {13741#false} is VALID [2022-04-07 23:00:47,751 INFO L290 TraceCheckUtils]: 29: Hoare triple {13741#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13741#false} is VALID [2022-04-07 23:00:47,751 INFO L290 TraceCheckUtils]: 30: Hoare triple {13741#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,751 INFO L290 TraceCheckUtils]: 31: Hoare triple {13741#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,751 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-07 23:00:47,751 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:00:47,852 INFO L290 TraceCheckUtils]: 31: Hoare triple {13741#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,852 INFO L290 TraceCheckUtils]: 30: Hoare triple {13741#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,852 INFO L290 TraceCheckUtils]: 29: Hoare triple {13741#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13741#false} is VALID [2022-04-07 23:00:47,852 INFO L272 TraceCheckUtils]: 28: Hoare triple {13741#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {13741#false} is VALID [2022-04-07 23:00:47,852 INFO L290 TraceCheckUtils]: 27: Hoare triple {13741#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,852 INFO L290 TraceCheckUtils]: 26: Hoare triple {13741#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {13741#false} is VALID [2022-04-07 23:00:47,852 INFO L290 TraceCheckUtils]: 25: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13741#false} is VALID [2022-04-07 23:00:47,853 INFO L290 TraceCheckUtils]: 24: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,853 INFO L290 TraceCheckUtils]: 23: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,853 INFO L290 TraceCheckUtils]: 22: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,854 INFO L290 TraceCheckUtils]: 21: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,854 INFO L290 TraceCheckUtils]: 20: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,854 INFO L290 TraceCheckUtils]: 19: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,854 INFO L290 TraceCheckUtils]: 18: Hoare triple {13818#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,855 INFO L290 TraceCheckUtils]: 17: Hoare triple {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13818#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:00:47,856 INFO L290 TraceCheckUtils]: 16: Hoare triple {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:47,856 INFO L290 TraceCheckUtils]: 15: Hoare triple {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:47,857 INFO L290 TraceCheckUtils]: 14: Hoare triple {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:47,857 INFO L290 TraceCheckUtils]: 13: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:47,858 INFO L290 TraceCheckUtils]: 12: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:00:47,858 INFO L290 TraceCheckUtils]: 11: Hoare triple {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:00:47,859 INFO L290 TraceCheckUtils]: 10: Hoare triple {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13796#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:00:47,859 INFO L290 TraceCheckUtils]: 9: Hoare triple {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13792#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:00:47,860 INFO L290 TraceCheckUtils]: 8: Hoare triple {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13788#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:00:47,861 INFO L290 TraceCheckUtils]: 7: Hoare triple {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13784#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:00:47,861 INFO L290 TraceCheckUtils]: 6: Hoare triple {13740#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13780#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:00:47,861 INFO L290 TraceCheckUtils]: 5: Hoare triple {13740#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13740#true} is VALID [2022-04-07 23:00:47,861 INFO L272 TraceCheckUtils]: 4: Hoare triple {13740#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,861 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13740#true} {13740#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,862 INFO L290 TraceCheckUtils]: 2: Hoare triple {13740#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,862 INFO L290 TraceCheckUtils]: 1: Hoare triple {13740#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13740#true} is VALID [2022-04-07 23:00:47,862 INFO L272 TraceCheckUtils]: 0: Hoare triple {13740#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13740#true} is VALID [2022-04-07 23:00:47,862 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-07 23:00:47,862 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2058066484] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:00:47,862 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:00:47,862 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8, 8] total 22 [2022-04-07 23:00:47,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1728504956] [2022-04-07 23:00:47,862 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:00:47,863 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:00:47,863 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:00:47,863 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:47,908 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:47,908 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-07 23:00:47,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:00:47,908 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-07 23:00:47,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2022-04-07 23:00:47,909 INFO L87 Difference]: Start difference. First operand 121 states and 153 transitions. Second operand has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:59,290 INFO L93 Difference]: Finished difference Result 223 states and 305 transitions. [2022-04-07 23:00:59,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2022-04-07 23:00:59,290 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-07 23:00:59,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:00:59,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 183 transitions. [2022-04-07 23:00:59,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 183 transitions. [2022-04-07 23:00:59,293 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 76 states and 183 transitions. [2022-04-07 23:00:59,661 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:00:59,663 INFO L225 Difference]: With dead ends: 223 [2022-04-07 23:00:59,663 INFO L226 Difference]: Without dead ends: 203 [2022-04-07 23:00:59,665 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2590 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=1028, Invalid=7902, Unknown=0, NotChecked=0, Total=8930 [2022-04-07 23:00:59,665 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 145 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 1418 mSolverCounterSat, 277 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 1695 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 277 IncrementalHoareTripleChecker+Valid, 1418 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.3s IncrementalHoareTripleChecker+Time [2022-04-07 23:00:59,665 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [145 Valid, 117 Invalid, 1695 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [277 Valid, 1418 Invalid, 0 Unknown, 0 Unchecked, 3.3s Time] [2022-04-07 23:00:59,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2022-04-07 23:00:59,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 146. [2022-04-07 23:00:59,965 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:00:59,966 INFO L82 GeneralOperation]: Start isEquivalent. First operand 203 states. Second operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,966 INFO L74 IsIncluded]: Start isIncluded. First operand 203 states. Second operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,966 INFO L87 Difference]: Start difference. First operand 203 states. Second operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:59,968 INFO L93 Difference]: Finished difference Result 203 states and 251 transitions. [2022-04-07 23:00:59,968 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 251 transitions. [2022-04-07 23:00:59,968 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:59,968 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:59,969 INFO L74 IsIncluded]: Start isIncluded. First operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 203 states. [2022-04-07 23:00:59,969 INFO L87 Difference]: Start difference. First operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 203 states. [2022-04-07 23:00:59,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:00:59,972 INFO L93 Difference]: Finished difference Result 203 states and 251 transitions. [2022-04-07 23:00:59,972 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 251 transitions. [2022-04-07 23:00:59,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:00:59,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:00:59,972 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:00:59,972 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:00:59,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 146 states, 141 states have (on average 1.2624113475177305) internal successors, (178), 141 states have internal predecessors, (178), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 182 transitions. [2022-04-07 23:00:59,975 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 182 transitions. Word has length 32 [2022-04-07 23:00:59,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:00:59,975 INFO L478 AbstractCegarLoop]: Abstraction has 146 states and 182 transitions. [2022-04-07 23:00:59,975 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.1818181818181817) internal successors, (48), 21 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:00:59,975 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 182 transitions. [2022-04-07 23:00:59,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-07 23:00:59,975 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:00:59,976 INFO L499 BasicCegarLoop]: trace histogram [8, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:00:59,983 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-07 23:01:00,183 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-04-07 23:01:00,183 INFO L403 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:01:00,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:01:00,184 INFO L85 PathProgramCache]: Analyzing trace with hash -1317090289, now seen corresponding path program 6 times [2022-04-07 23:01:00,184 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:01:00,184 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [343525096] [2022-04-07 23:01:00,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:01:00,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:01:00,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:00,385 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:01:00,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:00,389 INFO L290 TraceCheckUtils]: 0: Hoare triple {15021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15003#true} is VALID [2022-04-07 23:01:00,389 INFO L290 TraceCheckUtils]: 1: Hoare triple {15003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,389 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15003#true} {15003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,390 INFO L272 TraceCheckUtils]: 0: Hoare triple {15003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:01:00,390 INFO L290 TraceCheckUtils]: 1: Hoare triple {15021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15003#true} is VALID [2022-04-07 23:01:00,390 INFO L290 TraceCheckUtils]: 2: Hoare triple {15003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,390 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15003#true} {15003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,390 INFO L272 TraceCheckUtils]: 4: Hoare triple {15003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,390 INFO L290 TraceCheckUtils]: 5: Hoare triple {15003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15008#(= main_~y~0 0)} is VALID [2022-04-07 23:01:00,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {15008#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15009#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:01:00,391 INFO L290 TraceCheckUtils]: 7: Hoare triple {15009#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15010#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:01:00,392 INFO L290 TraceCheckUtils]: 8: Hoare triple {15010#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15011#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:01:00,392 INFO L290 TraceCheckUtils]: 9: Hoare triple {15011#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15012#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:01:00,393 INFO L290 TraceCheckUtils]: 10: Hoare triple {15012#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:01:00,393 INFO L290 TraceCheckUtils]: 11: Hoare triple {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:01:00,394 INFO L290 TraceCheckUtils]: 12: Hoare triple {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:01:00,394 INFO L290 TraceCheckUtils]: 13: Hoare triple {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,395 INFO L290 TraceCheckUtils]: 14: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,395 INFO L290 TraceCheckUtils]: 15: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {15017#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:01:00,396 INFO L290 TraceCheckUtils]: 16: Hoare triple {15017#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15018#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:01:00,396 INFO L290 TraceCheckUtils]: 17: Hoare triple {15018#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15019#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:01:00,397 INFO L290 TraceCheckUtils]: 18: Hoare triple {15019#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15020#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:01:00,397 INFO L290 TraceCheckUtils]: 19: Hoare triple {15020#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,397 INFO L290 TraceCheckUtils]: 20: Hoare triple {15004#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15004#false} is VALID [2022-04-07 23:01:00,397 INFO L290 TraceCheckUtils]: 21: Hoare triple {15004#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15004#false} is VALID [2022-04-07 23:01:00,397 INFO L290 TraceCheckUtils]: 22: Hoare triple {15004#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15004#false} is VALID [2022-04-07 23:01:00,397 INFO L290 TraceCheckUtils]: 23: Hoare triple {15004#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,397 INFO L290 TraceCheckUtils]: 24: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L290 TraceCheckUtils]: 25: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L290 TraceCheckUtils]: 26: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L290 TraceCheckUtils]: 27: Hoare triple {15004#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L290 TraceCheckUtils]: 28: Hoare triple {15004#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L272 TraceCheckUtils]: 29: Hoare triple {15004#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L290 TraceCheckUtils]: 30: Hoare triple {15004#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L290 TraceCheckUtils]: 31: Hoare triple {15004#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L290 TraceCheckUtils]: 32: Hoare triple {15004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,398 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 23:01:00,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:01:00,398 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [343525096] [2022-04-07 23:01:00,398 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [343525096] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:01:00,399 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [312018285] [2022-04-07 23:01:00,399 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 23:01:00,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:01:00,399 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:01:00,399 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:01:00,400 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-07 23:01:00,459 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-07 23:01:00,459 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:01:00,460 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-07 23:01:00,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:00,467 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:01:00,704 INFO L272 TraceCheckUtils]: 0: Hoare triple {15003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {15003#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15003#true} is VALID [2022-04-07 23:01:00,705 INFO L290 TraceCheckUtils]: 2: Hoare triple {15003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,705 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15003#true} {15003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,705 INFO L272 TraceCheckUtils]: 4: Hoare triple {15003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,705 INFO L290 TraceCheckUtils]: 5: Hoare triple {15003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15008#(= main_~y~0 0)} is VALID [2022-04-07 23:01:00,705 INFO L290 TraceCheckUtils]: 6: Hoare triple {15008#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15009#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:01:00,706 INFO L290 TraceCheckUtils]: 7: Hoare triple {15009#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15010#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:01:00,706 INFO L290 TraceCheckUtils]: 8: Hoare triple {15010#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15011#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:01:00,707 INFO L290 TraceCheckUtils]: 9: Hoare triple {15011#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15012#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:01:00,707 INFO L290 TraceCheckUtils]: 10: Hoare triple {15012#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:01:00,708 INFO L290 TraceCheckUtils]: 11: Hoare triple {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:01:00,708 INFO L290 TraceCheckUtils]: 12: Hoare triple {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:01:00,709 INFO L290 TraceCheckUtils]: 13: Hoare triple {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,709 INFO L290 TraceCheckUtils]: 14: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,710 INFO L290 TraceCheckUtils]: 15: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,710 INFO L290 TraceCheckUtils]: 16: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,710 INFO L290 TraceCheckUtils]: 17: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,711 INFO L290 TraceCheckUtils]: 18: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,711 INFO L290 TraceCheckUtils]: 19: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:00,711 INFO L290 TraceCheckUtils]: 20: Hoare triple {15016#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:01:00,712 INFO L290 TraceCheckUtils]: 21: Hoare triple {15015#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:01:00,712 INFO L290 TraceCheckUtils]: 22: Hoare triple {15014#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:01:00,713 INFO L290 TraceCheckUtils]: 23: Hoare triple {15013#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,713 INFO L290 TraceCheckUtils]: 24: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,713 INFO L290 TraceCheckUtils]: 25: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,713 INFO L290 TraceCheckUtils]: 26: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,713 INFO L290 TraceCheckUtils]: 27: Hoare triple {15004#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,713 INFO L290 TraceCheckUtils]: 28: Hoare triple {15004#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,713 INFO L272 TraceCheckUtils]: 29: Hoare triple {15004#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {15004#false} is VALID [2022-04-07 23:01:00,713 INFO L290 TraceCheckUtils]: 30: Hoare triple {15004#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15004#false} is VALID [2022-04-07 23:01:00,713 INFO L290 TraceCheckUtils]: 31: Hoare triple {15004#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,714 INFO L290 TraceCheckUtils]: 32: Hoare triple {15004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,714 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 23:01:00,714 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:01:00,958 INFO L290 TraceCheckUtils]: 32: Hoare triple {15004#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L290 TraceCheckUtils]: 31: Hoare triple {15004#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L290 TraceCheckUtils]: 30: Hoare triple {15004#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L272 TraceCheckUtils]: 29: Hoare triple {15004#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L290 TraceCheckUtils]: 28: Hoare triple {15004#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L290 TraceCheckUtils]: 27: Hoare triple {15004#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L290 TraceCheckUtils]: 26: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L290 TraceCheckUtils]: 25: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L290 TraceCheckUtils]: 24: Hoare triple {15004#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {15004#false} is VALID [2022-04-07 23:01:00,959 INFO L290 TraceCheckUtils]: 23: Hoare triple {15148#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15004#false} is VALID [2022-04-07 23:01:00,960 INFO L290 TraceCheckUtils]: 22: Hoare triple {15152#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15148#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:01:00,961 INFO L290 TraceCheckUtils]: 21: Hoare triple {15156#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15152#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:00,961 INFO L290 TraceCheckUtils]: 20: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {15156#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:00,962 INFO L290 TraceCheckUtils]: 19: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:00,962 INFO L290 TraceCheckUtils]: 18: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:00,962 INFO L290 TraceCheckUtils]: 17: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:00,963 INFO L290 TraceCheckUtils]: 16: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:00,963 INFO L290 TraceCheckUtils]: 15: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:00,963 INFO L290 TraceCheckUtils]: 14: Hoare triple {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:00,964 INFO L290 TraceCheckUtils]: 13: Hoare triple {15156#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15160#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:00,965 INFO L290 TraceCheckUtils]: 12: Hoare triple {15152#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15156#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:00,965 INFO L290 TraceCheckUtils]: 11: Hoare triple {15148#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15152#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:00,966 INFO L290 TraceCheckUtils]: 10: Hoare triple {15191#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15148#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:01:00,966 INFO L290 TraceCheckUtils]: 9: Hoare triple {15195#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15191#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:01:00,967 INFO L290 TraceCheckUtils]: 8: Hoare triple {15199#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15195#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:01:00,968 INFO L290 TraceCheckUtils]: 7: Hoare triple {15203#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15199#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:01:00,968 INFO L290 TraceCheckUtils]: 6: Hoare triple {15207#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15203#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:01:00,968 INFO L290 TraceCheckUtils]: 5: Hoare triple {15003#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15207#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 23:01:00,969 INFO L272 TraceCheckUtils]: 4: Hoare triple {15003#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,969 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15003#true} {15003#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,969 INFO L290 TraceCheckUtils]: 2: Hoare triple {15003#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {15003#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15003#true} is VALID [2022-04-07 23:01:00,969 INFO L272 TraceCheckUtils]: 0: Hoare triple {15003#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15003#true} is VALID [2022-04-07 23:01:00,969 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-04-07 23:01:00,969 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [312018285] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:01:00,969 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:01:00,969 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 11, 11] total 25 [2022-04-07 23:01:00,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1191494800] [2022-04-07 23:01:00,969 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:01:00,970 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:01:00,970 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:01:00,970 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:01,011 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:01:01,011 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-07 23:01:01,011 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:01:01,011 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-07 23:01:01,012 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=473, Unknown=0, NotChecked=0, Total=600 [2022-04-07 23:01:01,012 INFO L87 Difference]: Start difference. First operand 146 states and 182 transitions. Second operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:15,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:15,867 INFO L93 Difference]: Finished difference Result 727 states and 998 transitions. [2022-04-07 23:01:15,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2022-04-07 23:01:15,867 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-07 23:01:15,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:01:15,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:15,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 434 transitions. [2022-04-07 23:01:15,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:15,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 434 transitions. [2022-04-07 23:01:15,882 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 92 states and 434 transitions. [2022-04-07 23:01:17,346 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 434 edges. 434 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:01:17,362 INFO L225 Difference]: With dead ends: 727 [2022-04-07 23:01:17,362 INFO L226 Difference]: Without dead ends: 697 [2022-04-07 23:01:17,363 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 59 SyntacticMatches, 1 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4703 ImplicationChecksByTransitivity, 7.8s TimeCoverageRelationStatistics Valid=3039, Invalid=9843, Unknown=0, NotChecked=0, Total=12882 [2022-04-07 23:01:17,364 INFO L913 BasicCegarLoop]: 57 mSDtfsCounter, 693 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 1285 mSolverCounterSat, 677 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 693 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 1962 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 677 IncrementalHoareTripleChecker+Valid, 1285 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2022-04-07 23:01:17,364 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [693 Valid, 124 Invalid, 1962 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [677 Valid, 1285 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time] [2022-04-07 23:01:17,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2022-04-07 23:01:17,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 202. [2022-04-07 23:01:17,803 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:01:17,804 INFO L82 GeneralOperation]: Start isEquivalent. First operand 697 states. Second operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:17,804 INFO L74 IsIncluded]: Start isIncluded. First operand 697 states. Second operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:17,804 INFO L87 Difference]: Start difference. First operand 697 states. Second operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:17,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:17,820 INFO L93 Difference]: Finished difference Result 697 states and 921 transitions. [2022-04-07 23:01:17,820 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 921 transitions. [2022-04-07 23:01:17,822 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:01:17,822 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:01:17,822 INFO L74 IsIncluded]: Start isIncluded. First operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 697 states. [2022-04-07 23:01:17,823 INFO L87 Difference]: Start difference. First operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 697 states. [2022-04-07 23:01:17,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:17,844 INFO L93 Difference]: Finished difference Result 697 states and 921 transitions. [2022-04-07 23:01:17,844 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 921 transitions. [2022-04-07 23:01:17,845 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:01:17,845 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:01:17,846 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:01:17,846 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:01:17,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 202 states, 197 states have (on average 1.2791878172588833) internal successors, (252), 197 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:17,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 256 transitions. [2022-04-07 23:01:17,849 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 256 transitions. Word has length 33 [2022-04-07 23:01:17,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:01:17,849 INFO L478 AbstractCegarLoop]: Abstraction has 202 states and 256 transitions. [2022-04-07 23:01:17,849 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.0) internal successors, (50), 24 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:17,850 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 256 transitions. [2022-04-07 23:01:17,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-07 23:01:17,850 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:01:17,850 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:01:17,874 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-04-07 23:01:18,071 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-07 23:01:18,072 INFO L403 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:01:18,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:01:18,072 INFO L85 PathProgramCache]: Analyzing trace with hash -1824944628, now seen corresponding path program 9 times [2022-04-07 23:01:18,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:01:18,072 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [819321668] [2022-04-07 23:01:18,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:01:18,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:01:18,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:18,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:01:18,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:18,215 INFO L290 TraceCheckUtils]: 0: Hoare triple {18024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18012#true} is VALID [2022-04-07 23:01:18,215 INFO L290 TraceCheckUtils]: 1: Hoare triple {18012#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,215 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {18012#true} {18012#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,215 INFO L272 TraceCheckUtils]: 0: Hoare triple {18012#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:01:18,216 INFO L290 TraceCheckUtils]: 1: Hoare triple {18024#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18012#true} is VALID [2022-04-07 23:01:18,216 INFO L290 TraceCheckUtils]: 2: Hoare triple {18012#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,216 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18012#true} {18012#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,216 INFO L272 TraceCheckUtils]: 4: Hoare triple {18012#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,216 INFO L290 TraceCheckUtils]: 5: Hoare triple {18012#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18012#true} is VALID [2022-04-07 23:01:18,216 INFO L290 TraceCheckUtils]: 6: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-07 23:01:18,216 INFO L290 TraceCheckUtils]: 7: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-07 23:01:18,216 INFO L290 TraceCheckUtils]: 8: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-07 23:01:18,216 INFO L290 TraceCheckUtils]: 9: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-07 23:01:18,217 INFO L290 TraceCheckUtils]: 10: Hoare triple {18012#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18017#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:01:18,218 INFO L290 TraceCheckUtils]: 11: Hoare triple {18017#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18017#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-07 23:01:18,219 INFO L290 TraceCheckUtils]: 12: Hoare triple {18017#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18018#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-07 23:01:18,219 INFO L290 TraceCheckUtils]: 13: Hoare triple {18018#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18019#(<= (+ 2 (* (div (+ main_~x~0 4294967293) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:01:18,220 INFO L290 TraceCheckUtils]: 14: Hoare triple {18019#(<= (+ 2 (* (div (+ main_~x~0 4294967293) 4294967296) 4294967296)) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18020#(<= (+ 3 (* (div (+ 4294967292 main_~x~0) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-07 23:01:18,221 INFO L290 TraceCheckUtils]: 15: Hoare triple {18020#(<= (+ 3 (* (div (+ 4294967292 main_~x~0) 4294967296) 4294967296)) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:01:18,222 INFO L290 TraceCheckUtils]: 16: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:01:18,222 INFO L290 TraceCheckUtils]: 17: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:01:18,223 INFO L290 TraceCheckUtils]: 18: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:01:18,223 INFO L290 TraceCheckUtils]: 19: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:01:18,223 INFO L290 TraceCheckUtils]: 20: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:01:18,224 INFO L290 TraceCheckUtils]: 21: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-07 23:01:18,225 INFO L290 TraceCheckUtils]: 22: Hoare triple {18021#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18022#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:01:18,226 INFO L290 TraceCheckUtils]: 23: Hoare triple {18022#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18023#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-07 23:01:18,227 INFO L290 TraceCheckUtils]: 24: Hoare triple {18023#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,227 INFO L290 TraceCheckUtils]: 25: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,227 INFO L290 TraceCheckUtils]: 26: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,227 INFO L290 TraceCheckUtils]: 27: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,227 INFO L290 TraceCheckUtils]: 28: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,227 INFO L290 TraceCheckUtils]: 29: Hoare triple {18013#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,227 INFO L272 TraceCheckUtils]: 30: Hoare triple {18013#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {18013#false} is VALID [2022-04-07 23:01:18,227 INFO L290 TraceCheckUtils]: 31: Hoare triple {18013#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18013#false} is VALID [2022-04-07 23:01:18,228 INFO L290 TraceCheckUtils]: 32: Hoare triple {18013#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,228 INFO L290 TraceCheckUtils]: 33: Hoare triple {18013#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,228 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-04-07 23:01:18,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:01:18,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [819321668] [2022-04-07 23:01:18,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [819321668] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:01:18,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [988596319] [2022-04-07 23:01:18,228 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:01:18,229 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:01:18,229 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:01:18,232 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:01:18,236 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-07 23:01:18,299 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 23:01:18,300 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:01:18,301 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-07 23:01:18,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:18,309 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:01:18,476 INFO L272 TraceCheckUtils]: 0: Hoare triple {18012#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,477 INFO L290 TraceCheckUtils]: 1: Hoare triple {18012#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18012#true} is VALID [2022-04-07 23:01:18,477 INFO L290 TraceCheckUtils]: 2: Hoare triple {18012#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,477 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18012#true} {18012#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,477 INFO L272 TraceCheckUtils]: 4: Hoare triple {18012#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,477 INFO L290 TraceCheckUtils]: 5: Hoare triple {18012#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18012#true} is VALID [2022-04-07 23:01:18,477 INFO L290 TraceCheckUtils]: 6: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-07 23:01:18,477 INFO L290 TraceCheckUtils]: 7: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-07 23:01:18,478 INFO L290 TraceCheckUtils]: 8: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:01:18,479 INFO L290 TraceCheckUtils]: 9: Hoare triple {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:01:18,479 INFO L290 TraceCheckUtils]: 10: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:01:18,480 INFO L290 TraceCheckUtils]: 11: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:01:18,481 INFO L290 TraceCheckUtils]: 12: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:01:18,481 INFO L290 TraceCheckUtils]: 13: Hoare triple {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18069#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:01:18,482 INFO L290 TraceCheckUtils]: 14: Hoare triple {18069#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:18,483 INFO L290 TraceCheckUtils]: 15: Hoare triple {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,484 INFO L290 TraceCheckUtils]: 16: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,484 INFO L290 TraceCheckUtils]: 17: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,485 INFO L290 TraceCheckUtils]: 18: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,485 INFO L290 TraceCheckUtils]: 19: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,485 INFO L290 TraceCheckUtils]: 20: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,486 INFO L290 TraceCheckUtils]: 21: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,487 INFO L290 TraceCheckUtils]: 22: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:18,488 INFO L290 TraceCheckUtils]: 23: Hoare triple {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18069#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:01:18,488 INFO L290 TraceCheckUtils]: 24: Hoare triple {18069#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,488 INFO L290 TraceCheckUtils]: 25: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,488 INFO L290 TraceCheckUtils]: 26: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,488 INFO L290 TraceCheckUtils]: 27: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,489 INFO L290 TraceCheckUtils]: 28: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,489 INFO L290 TraceCheckUtils]: 29: Hoare triple {18013#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,489 INFO L272 TraceCheckUtils]: 30: Hoare triple {18013#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {18013#false} is VALID [2022-04-07 23:01:18,489 INFO L290 TraceCheckUtils]: 31: Hoare triple {18013#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18013#false} is VALID [2022-04-07 23:01:18,489 INFO L290 TraceCheckUtils]: 32: Hoare triple {18013#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,489 INFO L290 TraceCheckUtils]: 33: Hoare triple {18013#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,489 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-04-07 23:01:18,489 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:01:18,606 INFO L290 TraceCheckUtils]: 33: Hoare triple {18013#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,607 INFO L290 TraceCheckUtils]: 32: Hoare triple {18013#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,607 INFO L290 TraceCheckUtils]: 31: Hoare triple {18013#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {18013#false} is VALID [2022-04-07 23:01:18,607 INFO L272 TraceCheckUtils]: 30: Hoare triple {18013#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {18013#false} is VALID [2022-04-07 23:01:18,607 INFO L290 TraceCheckUtils]: 29: Hoare triple {18013#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,607 INFO L290 TraceCheckUtils]: 28: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,607 INFO L290 TraceCheckUtils]: 27: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,607 INFO L290 TraceCheckUtils]: 26: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,607 INFO L290 TraceCheckUtils]: 25: Hoare triple {18013#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {18013#false} is VALID [2022-04-07 23:01:18,611 INFO L290 TraceCheckUtils]: 24: Hoare triple {18069#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {18013#false} is VALID [2022-04-07 23:01:18,612 INFO L290 TraceCheckUtils]: 23: Hoare triple {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18069#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:01:18,613 INFO L290 TraceCheckUtils]: 22: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:18,614 INFO L290 TraceCheckUtils]: 21: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,614 INFO L290 TraceCheckUtils]: 20: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,614 INFO L290 TraceCheckUtils]: 19: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,615 INFO L290 TraceCheckUtils]: 18: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,615 INFO L290 TraceCheckUtils]: 17: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,616 INFO L290 TraceCheckUtils]: 16: Hoare triple {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,617 INFO L290 TraceCheckUtils]: 15: Hoare triple {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18077#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:18,618 INFO L290 TraceCheckUtils]: 14: Hoare triple {18069#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18073#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:18,618 INFO L290 TraceCheckUtils]: 13: Hoare triple {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18069#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:01:18,619 INFO L290 TraceCheckUtils]: 12: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:01:18,619 INFO L290 TraceCheckUtils]: 11: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:01:18,620 INFO L290 TraceCheckUtils]: 10: Hoare triple {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:01:18,621 INFO L290 TraceCheckUtils]: 9: Hoare triple {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18056#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:01:18,621 INFO L290 TraceCheckUtils]: 8: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18052#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:01:18,622 INFO L290 TraceCheckUtils]: 7: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-07 23:01:18,622 INFO L290 TraceCheckUtils]: 6: Hoare triple {18012#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18012#true} is VALID [2022-04-07 23:01:18,622 INFO L290 TraceCheckUtils]: 5: Hoare triple {18012#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {18012#true} is VALID [2022-04-07 23:01:18,622 INFO L272 TraceCheckUtils]: 4: Hoare triple {18012#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,622 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {18012#true} {18012#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,622 INFO L290 TraceCheckUtils]: 2: Hoare triple {18012#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,622 INFO L290 TraceCheckUtils]: 1: Hoare triple {18012#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {18012#true} is VALID [2022-04-07 23:01:18,622 INFO L272 TraceCheckUtils]: 0: Hoare triple {18012#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {18012#true} is VALID [2022-04-07 23:01:18,623 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-04-07 23:01:18,623 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [988596319] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:01:18,623 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:01:18,623 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 7] total 15 [2022-04-07 23:01:18,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901688304] [2022-04-07 23:01:18,623 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:01:18,624 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 23:01:18,624 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:01:18,624 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:18,660 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:01:18,660 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-07 23:01:18,660 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:01:18,661 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-07 23:01:18,661 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=150, Unknown=0, NotChecked=0, Total=210 [2022-04-07 23:01:18,661 INFO L87 Difference]: Start difference. First operand 202 states and 256 transitions. Second operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:19,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:19,943 INFO L93 Difference]: Finished difference Result 326 states and 431 transitions. [2022-04-07 23:01:19,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-07 23:01:19,944 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-07 23:01:19,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:01:19,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:19,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 94 transitions. [2022-04-07 23:01:19,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:19,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 94 transitions. [2022-04-07 23:01:19,945 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 94 transitions. [2022-04-07 23:01:20,052 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:01:20,056 INFO L225 Difference]: With dead ends: 326 [2022-04-07 23:01:20,056 INFO L226 Difference]: Without dead ends: 309 [2022-04-07 23:01:20,056 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=245, Invalid=685, Unknown=0, NotChecked=0, Total=930 [2022-04-07 23:01:20,057 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 117 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 82 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 117 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 210 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 82 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 23:01:20,057 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [117 Valid, 50 Invalid, 210 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [82 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 23:01:20,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2022-04-07 23:01:20,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 268. [2022-04-07 23:01:20,640 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:01:20,640 INFO L82 GeneralOperation]: Start isEquivalent. First operand 309 states. Second operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:20,641 INFO L74 IsIncluded]: Start isIncluded. First operand 309 states. Second operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:20,641 INFO L87 Difference]: Start difference. First operand 309 states. Second operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:20,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:20,644 INFO L93 Difference]: Finished difference Result 309 states and 397 transitions. [2022-04-07 23:01:20,644 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 397 transitions. [2022-04-07 23:01:20,645 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:01:20,645 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:01:20,645 INFO L74 IsIncluded]: Start isIncluded. First operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 309 states. [2022-04-07 23:01:20,645 INFO L87 Difference]: Start difference. First operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 309 states. [2022-04-07 23:01:20,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:01:20,648 INFO L93 Difference]: Finished difference Result 309 states and 397 transitions. [2022-04-07 23:01:20,649 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 397 transitions. [2022-04-07 23:01:20,649 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:01:20,649 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:01:20,649 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:01:20,649 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:01:20,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 263 states have (on average 1.3231939163498099) internal successors, (348), 263 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:20,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 352 transitions. [2022-04-07 23:01:20,654 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 352 transitions. Word has length 34 [2022-04-07 23:01:20,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:01:20,655 INFO L478 AbstractCegarLoop]: Abstraction has 268 states and 352 transitions. [2022-04-07 23:01:20,655 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:20,655 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 352 transitions. [2022-04-07 23:01:20,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-07 23:01:20,655 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:01:20,655 INFO L499 BasicCegarLoop]: trace histogram [9, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:01:20,680 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-07 23:01:20,877 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-07 23:01:20,877 INFO L403 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:01:20,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:01:20,877 INFO L85 PathProgramCache]: Analyzing trace with hash 145125386, now seen corresponding path program 7 times [2022-04-07 23:01:20,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:01:20,878 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529980111] [2022-04-07 23:01:20,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:01:20,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:01:20,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:21,117 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:01:21,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:21,122 INFO L290 TraceCheckUtils]: 0: Hoare triple {19710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19691#true} is VALID [2022-04-07 23:01:21,122 INFO L290 TraceCheckUtils]: 1: Hoare triple {19691#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,122 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19691#true} {19691#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,123 INFO L272 TraceCheckUtils]: 0: Hoare triple {19691#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:01:21,123 INFO L290 TraceCheckUtils]: 1: Hoare triple {19710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19691#true} is VALID [2022-04-07 23:01:21,123 INFO L290 TraceCheckUtils]: 2: Hoare triple {19691#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,123 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19691#true} {19691#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,123 INFO L272 TraceCheckUtils]: 4: Hoare triple {19691#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,124 INFO L290 TraceCheckUtils]: 5: Hoare triple {19691#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19696#(= main_~y~0 0)} is VALID [2022-04-07 23:01:21,124 INFO L290 TraceCheckUtils]: 6: Hoare triple {19696#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19697#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:01:21,125 INFO L290 TraceCheckUtils]: 7: Hoare triple {19697#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19698#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:01:21,125 INFO L290 TraceCheckUtils]: 8: Hoare triple {19698#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19699#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:01:21,126 INFO L290 TraceCheckUtils]: 9: Hoare triple {19699#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19700#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:01:21,127 INFO L290 TraceCheckUtils]: 10: Hoare triple {19700#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19701#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:01:21,127 INFO L290 TraceCheckUtils]: 11: Hoare triple {19701#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19702#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:01:21,128 INFO L290 TraceCheckUtils]: 12: Hoare triple {19702#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19703#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:01:21,129 INFO L290 TraceCheckUtils]: 13: Hoare triple {19703#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19704#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:21,129 INFO L290 TraceCheckUtils]: 14: Hoare triple {19704#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:01:21,130 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:01:21,130 INFO L290 TraceCheckUtils]: 16: Hoare triple {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19706#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-07 23:01:21,131 INFO L290 TraceCheckUtils]: 17: Hoare triple {19706#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19707#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:01:21,132 INFO L290 TraceCheckUtils]: 18: Hoare triple {19707#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19708#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:01:21,132 INFO L290 TraceCheckUtils]: 19: Hoare triple {19708#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19709#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-07 23:01:21,133 INFO L290 TraceCheckUtils]: 20: Hoare triple {19709#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,133 INFO L290 TraceCheckUtils]: 21: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,133 INFO L290 TraceCheckUtils]: 22: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,133 INFO L290 TraceCheckUtils]: 23: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,133 INFO L290 TraceCheckUtils]: 24: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,133 INFO L290 TraceCheckUtils]: 25: Hoare triple {19692#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,133 INFO L290 TraceCheckUtils]: 26: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,134 INFO L290 TraceCheckUtils]: 27: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,134 INFO L290 TraceCheckUtils]: 28: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,134 INFO L290 TraceCheckUtils]: 29: Hoare triple {19692#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,134 INFO L290 TraceCheckUtils]: 30: Hoare triple {19692#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,134 INFO L272 TraceCheckUtils]: 31: Hoare triple {19692#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {19692#false} is VALID [2022-04-07 23:01:21,134 INFO L290 TraceCheckUtils]: 32: Hoare triple {19692#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19692#false} is VALID [2022-04-07 23:01:21,134 INFO L290 TraceCheckUtils]: 33: Hoare triple {19692#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,134 INFO L290 TraceCheckUtils]: 34: Hoare triple {19692#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,135 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-07 23:01:21,135 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:01:21,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1529980111] [2022-04-07 23:01:21,135 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1529980111] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:01:21,135 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [224247761] [2022-04-07 23:01:21,135 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 23:01:21,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:01:21,136 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:01:21,136 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:01:21,138 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-07 23:01:21,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:21,188 INFO L263 TraceCheckSpWp]: Trace formula consists of 156 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-07 23:01:21,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:01:21,198 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:01:21,480 INFO L272 TraceCheckUtils]: 0: Hoare triple {19691#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,481 INFO L290 TraceCheckUtils]: 1: Hoare triple {19691#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19691#true} is VALID [2022-04-07 23:01:21,481 INFO L290 TraceCheckUtils]: 2: Hoare triple {19691#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,481 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19691#true} {19691#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,481 INFO L272 TraceCheckUtils]: 4: Hoare triple {19691#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,481 INFO L290 TraceCheckUtils]: 5: Hoare triple {19691#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19696#(= main_~y~0 0)} is VALID [2022-04-07 23:01:21,481 INFO L290 TraceCheckUtils]: 6: Hoare triple {19696#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19697#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:01:21,482 INFO L290 TraceCheckUtils]: 7: Hoare triple {19697#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19698#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:01:21,482 INFO L290 TraceCheckUtils]: 8: Hoare triple {19698#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19699#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:01:21,483 INFO L290 TraceCheckUtils]: 9: Hoare triple {19699#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19700#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:01:21,483 INFO L290 TraceCheckUtils]: 10: Hoare triple {19700#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19701#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:01:21,484 INFO L290 TraceCheckUtils]: 11: Hoare triple {19701#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19702#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:01:21,484 INFO L290 TraceCheckUtils]: 12: Hoare triple {19702#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19703#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:01:21,485 INFO L290 TraceCheckUtils]: 13: Hoare triple {19703#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19704#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:01:21,485 INFO L290 TraceCheckUtils]: 14: Hoare triple {19704#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:01:21,486 INFO L290 TraceCheckUtils]: 15: Hoare triple {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:01:21,486 INFO L290 TraceCheckUtils]: 16: Hoare triple {19705#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19706#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-07 23:01:21,487 INFO L290 TraceCheckUtils]: 17: Hoare triple {19706#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19707#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:01:21,487 INFO L290 TraceCheckUtils]: 18: Hoare triple {19707#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19708#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:01:21,488 INFO L290 TraceCheckUtils]: 19: Hoare triple {19708#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19771#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:01:21,488 INFO L290 TraceCheckUtils]: 20: Hoare triple {19771#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,488 INFO L290 TraceCheckUtils]: 21: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,488 INFO L290 TraceCheckUtils]: 22: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,488 INFO L290 TraceCheckUtils]: 23: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,488 INFO L290 TraceCheckUtils]: 24: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 25: Hoare triple {19692#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 26: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 27: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 28: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 29: Hoare triple {19692#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 30: Hoare triple {19692#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L272 TraceCheckUtils]: 31: Hoare triple {19692#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 32: Hoare triple {19692#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 33: Hoare triple {19692#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L290 TraceCheckUtils]: 34: Hoare triple {19692#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,489 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-07 23:01:21,489 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:01:21,839 INFO L290 TraceCheckUtils]: 34: Hoare triple {19692#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,839 INFO L290 TraceCheckUtils]: 33: Hoare triple {19692#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,839 INFO L290 TraceCheckUtils]: 32: Hoare triple {19692#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19692#false} is VALID [2022-04-07 23:01:21,839 INFO L272 TraceCheckUtils]: 31: Hoare triple {19692#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {19692#false} is VALID [2022-04-07 23:01:21,839 INFO L290 TraceCheckUtils]: 30: Hoare triple {19692#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,839 INFO L290 TraceCheckUtils]: 29: Hoare triple {19692#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,840 INFO L290 TraceCheckUtils]: 28: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,840 INFO L290 TraceCheckUtils]: 27: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,840 INFO L290 TraceCheckUtils]: 26: Hoare triple {19692#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19692#false} is VALID [2022-04-07 23:01:21,840 INFO L290 TraceCheckUtils]: 25: Hoare triple {19692#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,840 INFO L290 TraceCheckUtils]: 24: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,840 INFO L290 TraceCheckUtils]: 23: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,840 INFO L290 TraceCheckUtils]: 22: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,840 INFO L290 TraceCheckUtils]: 21: Hoare triple {19692#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19692#false} is VALID [2022-04-07 23:01:21,841 INFO L290 TraceCheckUtils]: 20: Hoare triple {19859#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19692#false} is VALID [2022-04-07 23:01:21,842 INFO L290 TraceCheckUtils]: 19: Hoare triple {19863#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19859#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 23:01:21,843 INFO L290 TraceCheckUtils]: 18: Hoare triple {19867#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19863#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:21,843 INFO L290 TraceCheckUtils]: 17: Hoare triple {19871#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19867#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:21,844 INFO L290 TraceCheckUtils]: 16: Hoare triple {19875#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19871#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:21,844 INFO L290 TraceCheckUtils]: 15: Hoare triple {19875#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19875#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:21,845 INFO L290 TraceCheckUtils]: 14: Hoare triple {19882#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19875#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:01:21,845 INFO L290 TraceCheckUtils]: 13: Hoare triple {19886#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19882#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:01:21,846 INFO L290 TraceCheckUtils]: 12: Hoare triple {19890#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19886#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:01:21,847 INFO L290 TraceCheckUtils]: 11: Hoare triple {19894#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19890#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-07 23:01:21,847 INFO L290 TraceCheckUtils]: 10: Hoare triple {19898#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19894#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-07 23:01:21,848 INFO L290 TraceCheckUtils]: 9: Hoare triple {19902#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19898#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-07 23:01:21,849 INFO L290 TraceCheckUtils]: 8: Hoare triple {19906#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19902#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-07 23:01:21,849 INFO L290 TraceCheckUtils]: 7: Hoare triple {19910#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19906#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-07 23:01:21,850 INFO L290 TraceCheckUtils]: 6: Hoare triple {19914#(< 0 (mod (+ main_~y~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19910#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-07 23:01:21,850 INFO L290 TraceCheckUtils]: 5: Hoare triple {19691#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19914#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-07 23:01:21,850 INFO L272 TraceCheckUtils]: 4: Hoare triple {19691#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,850 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19691#true} {19691#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,850 INFO L290 TraceCheckUtils]: 2: Hoare triple {19691#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,851 INFO L290 TraceCheckUtils]: 1: Hoare triple {19691#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19691#true} is VALID [2022-04-07 23:01:21,851 INFO L272 TraceCheckUtils]: 0: Hoare triple {19691#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19691#true} is VALID [2022-04-07 23:01:21,851 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-07 23:01:21,851 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [224247761] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:01:21,851 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:01:21,851 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 32 [2022-04-07 23:01:21,851 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1029027153] [2022-04-07 23:01:21,851 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:01:21,852 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:01:21,852 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:01:21,852 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:21,883 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:01:21,883 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-07 23:01:21,883 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:01:21,884 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-07 23:01:21,884 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=811, Unknown=0, NotChecked=0, Total=992 [2022-04-07 23:01:21,884 INFO L87 Difference]: Start difference. First operand 268 states and 352 transitions. Second operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:01:33,874 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~z~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 4294967294 c_main_~z~0) 4294967296)) (< 0 (mod c_main_~y~0 4294967296)) (< 0 (mod (+ 4294967294 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 4294967293) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~z~0 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-04-07 23:03:07,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:07,560 INFO L93 Difference]: Finished difference Result 1052 states and 1477 transitions. [2022-04-07 23:03:07,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 326 states. [2022-04-07 23:03:07,560 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 23:03:07,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:03:07,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:07,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 704 transitions. [2022-04-07 23:03:07,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:07,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 704 transitions. [2022-04-07 23:03:07,608 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 326 states and 704 transitions. [2022-04-07 23:03:11,287 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 704 edges. 704 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:03:11,325 INFO L225 Difference]: With dead ends: 1052 [2022-04-07 23:03:11,325 INFO L226 Difference]: Without dead ends: 978 [2022-04-07 23:03:11,335 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 411 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 353 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 59177 ImplicationChecksByTransitivity, 85.7s TimeCoverageRelationStatistics Valid=21462, Invalid=103503, Unknown=1, NotChecked=704, Total=125670 [2022-04-07 23:03:11,335 INFO L913 BasicCegarLoop]: 58 mSDtfsCounter, 864 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 2013 mSolverCounterSat, 1450 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 8.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 864 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 3464 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1450 IncrementalHoareTripleChecker+Valid, 2013 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1 IncrementalHoareTripleChecker+Unchecked, 8.1s IncrementalHoareTripleChecker+Time [2022-04-07 23:03:11,335 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [864 Valid, 135 Invalid, 3464 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1450 Valid, 2013 Invalid, 0 Unknown, 1 Unchecked, 8.1s Time] [2022-04-07 23:03:11,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 978 states. [2022-04-07 23:03:12,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 978 to 308. [2022-04-07 23:03:12,031 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:03:12,031 INFO L82 GeneralOperation]: Start isEquivalent. First operand 978 states. Second operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:12,031 INFO L74 IsIncluded]: Start isIncluded. First operand 978 states. Second operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:12,032 INFO L87 Difference]: Start difference. First operand 978 states. Second operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:12,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:12,066 INFO L93 Difference]: Finished difference Result 978 states and 1316 transitions. [2022-04-07 23:03:12,066 INFO L276 IsEmpty]: Start isEmpty. Operand 978 states and 1316 transitions. [2022-04-07 23:03:12,067 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:03:12,067 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:03:12,068 INFO L74 IsIncluded]: Start isIncluded. First operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 978 states. [2022-04-07 23:03:12,068 INFO L87 Difference]: Start difference. First operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 978 states. [2022-04-07 23:03:12,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:12,110 INFO L93 Difference]: Finished difference Result 978 states and 1316 transitions. [2022-04-07 23:03:12,110 INFO L276 IsEmpty]: Start isEmpty. Operand 978 states and 1316 transitions. [2022-04-07 23:03:12,111 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:03:12,111 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:03:12,111 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:03:12,111 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:03:12,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 308 states, 303 states have (on average 1.33003300330033) internal successors, (403), 303 states have internal predecessors, (403), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:12,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 407 transitions. [2022-04-07 23:03:12,118 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 407 transitions. Word has length 35 [2022-04-07 23:03:12,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:03:12,118 INFO L478 AbstractCegarLoop]: Abstraction has 308 states and 407 transitions. [2022-04-07 23:03:12,118 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 31 states have internal predecessors, (45), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:12,118 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 407 transitions. [2022-04-07 23:03:12,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-07 23:03:12,119 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:03:12,119 INFO L499 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:03:12,145 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-07 23:03:12,335 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:03:12,335 INFO L403 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:03:12,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:03:12,336 INFO L85 PathProgramCache]: Analyzing trace with hash 1440953804, now seen corresponding path program 10 times [2022-04-07 23:03:12,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:03:12,336 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029503644] [2022-04-07 23:03:12,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:03:12,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:03:12,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:12,530 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:03:12,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:12,540 INFO L290 TraceCheckUtils]: 0: Hoare triple {24318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24305#true} is VALID [2022-04-07 23:03:12,540 INFO L290 TraceCheckUtils]: 1: Hoare triple {24305#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:12,540 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24305#true} {24305#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:12,540 INFO L272 TraceCheckUtils]: 0: Hoare triple {24305#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:03:12,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {24318#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24305#true} is VALID [2022-04-07 23:03:12,541 INFO L290 TraceCheckUtils]: 2: Hoare triple {24305#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:12,541 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24305#true} {24305#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:12,541 INFO L272 TraceCheckUtils]: 4: Hoare triple {24305#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:12,541 INFO L290 TraceCheckUtils]: 5: Hoare triple {24305#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24310#(= main_~y~0 0)} is VALID [2022-04-07 23:03:12,542 INFO L290 TraceCheckUtils]: 6: Hoare triple {24310#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:12,542 INFO L290 TraceCheckUtils]: 7: Hoare triple {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:12,543 INFO L290 TraceCheckUtils]: 8: Hoare triple {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:12,544 INFO L290 TraceCheckUtils]: 9: Hoare triple {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,544 INFO L290 TraceCheckUtils]: 10: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,545 INFO L290 TraceCheckUtils]: 11: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,545 INFO L290 TraceCheckUtils]: 12: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,546 INFO L290 TraceCheckUtils]: 13: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,546 INFO L290 TraceCheckUtils]: 14: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,547 INFO L290 TraceCheckUtils]: 15: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,547 INFO L290 TraceCheckUtils]: 16: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,548 INFO L290 TraceCheckUtils]: 17: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:12,548 INFO L290 TraceCheckUtils]: 18: Hoare triple {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:12,549 INFO L290 TraceCheckUtils]: 19: Hoare triple {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:12,550 INFO L290 TraceCheckUtils]: 20: Hoare triple {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24310#(= main_~y~0 0)} is VALID [2022-04-07 23:03:12,550 INFO L290 TraceCheckUtils]: 21: Hoare triple {24310#(= main_~y~0 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24310#(= main_~y~0 0)} is VALID [2022-04-07 23:03:12,551 INFO L290 TraceCheckUtils]: 22: Hoare triple {24310#(= main_~y~0 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:12,551 INFO L290 TraceCheckUtils]: 23: Hoare triple {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:12,552 INFO L290 TraceCheckUtils]: 24: Hoare triple {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:12,553 INFO L290 TraceCheckUtils]: 25: Hoare triple {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,553 INFO L290 TraceCheckUtils]: 26: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:12,554 INFO L290 TraceCheckUtils]: 27: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:12,554 INFO L290 TraceCheckUtils]: 28: Hoare triple {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:12,555 INFO L290 TraceCheckUtils]: 29: Hoare triple {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:12,556 INFO L290 TraceCheckUtils]: 30: Hoare triple {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24315#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 23:03:12,557 INFO L290 TraceCheckUtils]: 31: Hoare triple {24315#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {24315#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} is VALID [2022-04-07 23:03:12,557 INFO L272 TraceCheckUtils]: 32: Hoare triple {24315#(and (<= main_~y~0 (* (div main_~y~0 4294967296) 4294967296)) (not (<= (+ (div main_~y~0 4294967296) 1) 0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {24316#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 23:03:12,558 INFO L290 TraceCheckUtils]: 33: Hoare triple {24316#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24317#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 23:03:12,558 INFO L290 TraceCheckUtils]: 34: Hoare triple {24317#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {24306#false} is VALID [2022-04-07 23:03:12,558 INFO L290 TraceCheckUtils]: 35: Hoare triple {24306#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24306#false} is VALID [2022-04-07 23:03:12,559 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:03:12,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:03:12,559 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1029503644] [2022-04-07 23:03:12,559 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1029503644] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:03:12,559 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1885102876] [2022-04-07 23:03:12,559 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 23:03:12,559 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:03:12,559 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:03:12,560 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:03:12,589 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-07 23:03:12,624 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 23:03:12,625 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:03:12,626 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-07 23:03:12,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:12,636 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:03:13,001 INFO L272 TraceCheckUtils]: 0: Hoare triple {24305#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,001 INFO L290 TraceCheckUtils]: 1: Hoare triple {24305#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24305#true} is VALID [2022-04-07 23:03:13,001 INFO L290 TraceCheckUtils]: 2: Hoare triple {24305#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,001 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24305#true} {24305#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,001 INFO L272 TraceCheckUtils]: 4: Hoare triple {24305#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,001 INFO L290 TraceCheckUtils]: 5: Hoare triple {24305#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24310#(= main_~y~0 0)} is VALID [2022-04-07 23:03:13,002 INFO L290 TraceCheckUtils]: 6: Hoare triple {24310#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:13,002 INFO L290 TraceCheckUtils]: 7: Hoare triple {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:13,003 INFO L290 TraceCheckUtils]: 8: Hoare triple {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:13,003 INFO L290 TraceCheckUtils]: 9: Hoare triple {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,004 INFO L290 TraceCheckUtils]: 10: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,004 INFO L290 TraceCheckUtils]: 11: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24355#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,004 INFO L290 TraceCheckUtils]: 12: Hoare triple {24355#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24359#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:03:13,005 INFO L290 TraceCheckUtils]: 13: Hoare triple {24359#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24363#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,006 INFO L290 TraceCheckUtils]: 14: Hoare triple {24363#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24367#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,006 INFO L290 TraceCheckUtils]: 15: Hoare triple {24367#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24371#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,007 INFO L290 TraceCheckUtils]: 16: Hoare triple {24371#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= main_~y~0 4) (<= 4 main_~y~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,007 INFO L290 TraceCheckUtils]: 17: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:13,008 INFO L290 TraceCheckUtils]: 18: Hoare triple {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:13,008 INFO L290 TraceCheckUtils]: 19: Hoare triple {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:13,009 INFO L290 TraceCheckUtils]: 20: Hoare triple {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24310#(= main_~y~0 0)} is VALID [2022-04-07 23:03:13,009 INFO L290 TraceCheckUtils]: 21: Hoare triple {24310#(= main_~y~0 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24310#(= main_~y~0 0)} is VALID [2022-04-07 23:03:13,010 INFO L290 TraceCheckUtils]: 22: Hoare triple {24310#(= main_~y~0 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:13,012 INFO L290 TraceCheckUtils]: 23: Hoare triple {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:13,013 INFO L290 TraceCheckUtils]: 24: Hoare triple {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:13,031 INFO L290 TraceCheckUtils]: 25: Hoare triple {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,033 INFO L290 TraceCheckUtils]: 26: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:13,036 INFO L290 TraceCheckUtils]: 27: Hoare triple {24314#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:13,039 INFO L290 TraceCheckUtils]: 28: Hoare triple {24313#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:13,040 INFO L290 TraceCheckUtils]: 29: Hoare triple {24312#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:13,040 INFO L290 TraceCheckUtils]: 30: Hoare triple {24311#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24310#(= main_~y~0 0)} is VALID [2022-04-07 23:03:13,041 INFO L290 TraceCheckUtils]: 31: Hoare triple {24310#(= main_~y~0 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {24310#(= main_~y~0 0)} is VALID [2022-04-07 23:03:13,041 INFO L272 TraceCheckUtils]: 32: Hoare triple {24310#(= main_~y~0 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {24423#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:03:13,041 INFO L290 TraceCheckUtils]: 33: Hoare triple {24423#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24427#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:03:13,042 INFO L290 TraceCheckUtils]: 34: Hoare triple {24427#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {24306#false} is VALID [2022-04-07 23:03:13,042 INFO L290 TraceCheckUtils]: 35: Hoare triple {24306#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24306#false} is VALID [2022-04-07 23:03:13,042 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:03:13,042 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:03:13,356 INFO L290 TraceCheckUtils]: 35: Hoare triple {24306#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24306#false} is VALID [2022-04-07 23:03:13,356 INFO L290 TraceCheckUtils]: 34: Hoare triple {24427#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {24306#false} is VALID [2022-04-07 23:03:13,356 INFO L290 TraceCheckUtils]: 33: Hoare triple {24423#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24427#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:03:13,357 INFO L272 TraceCheckUtils]: 32: Hoare triple {24443#(= (mod main_~y~0 4294967296) 0)} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {24423#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:03:13,357 INFO L290 TraceCheckUtils]: 31: Hoare triple {24443#(= (mod main_~y~0 4294967296) 0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {24443#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 23:03:13,358 INFO L290 TraceCheckUtils]: 30: Hoare triple {24450#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24443#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 23:03:13,359 INFO L290 TraceCheckUtils]: 29: Hoare triple {24454#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24450#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-07 23:03:13,359 INFO L290 TraceCheckUtils]: 28: Hoare triple {24458#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24454#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} is VALID [2022-04-07 23:03:13,360 INFO L290 TraceCheckUtils]: 27: Hoare triple {24462#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {24458#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} is VALID [2022-04-07 23:03:13,360 INFO L290 TraceCheckUtils]: 26: Hoare triple {24462#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24462#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} is VALID [2022-04-07 23:03:13,361 INFO L290 TraceCheckUtils]: 25: Hoare triple {24458#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24462#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} is VALID [2022-04-07 23:03:13,361 INFO L290 TraceCheckUtils]: 24: Hoare triple {24454#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24458#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} is VALID [2022-04-07 23:03:13,362 INFO L290 TraceCheckUtils]: 23: Hoare triple {24450#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24454#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} is VALID [2022-04-07 23:03:13,363 INFO L290 TraceCheckUtils]: 22: Hoare triple {24443#(= (mod main_~y~0 4294967296) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {24450#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-07 23:03:13,363 INFO L290 TraceCheckUtils]: 21: Hoare triple {24443#(= (mod main_~y~0 4294967296) 0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24443#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 23:03:13,364 INFO L290 TraceCheckUtils]: 20: Hoare triple {24450#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24443#(= (mod main_~y~0 4294967296) 0)} is VALID [2022-04-07 23:03:13,365 INFO L290 TraceCheckUtils]: 19: Hoare triple {24454#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24450#(= (mod (+ main_~y~0 4294967295) 4294967296) 0)} is VALID [2022-04-07 23:03:13,365 INFO L290 TraceCheckUtils]: 18: Hoare triple {24458#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24454#(= (mod (+ main_~y~0 4294967294) 4294967296) 0)} is VALID [2022-04-07 23:03:13,366 INFO L290 TraceCheckUtils]: 17: Hoare triple {24462#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24458#(= (mod (+ main_~y~0 4294967293) 4294967296) 0)} is VALID [2022-04-07 23:03:13,366 INFO L290 TraceCheckUtils]: 16: Hoare triple {24496#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod main_~z~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24462#(= (mod (+ 4294967292 main_~y~0) 4294967296) 0)} is VALID [2022-04-07 23:03:13,367 INFO L290 TraceCheckUtils]: 15: Hoare triple {24500#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24496#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 23:03:13,368 INFO L290 TraceCheckUtils]: 14: Hoare triple {24504#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24500#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:03:13,369 INFO L290 TraceCheckUtils]: 13: Hoare triple {24508#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24504#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:03:13,370 INFO L290 TraceCheckUtils]: 12: Hoare triple {24512#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24508#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:03:13,370 INFO L290 TraceCheckUtils]: 11: Hoare triple {24305#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24512#(or (= (mod (+ 4294967292 main_~y~0) 4294967296) 0) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-07 23:03:13,370 INFO L290 TraceCheckUtils]: 10: Hoare triple {24305#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,370 INFO L290 TraceCheckUtils]: 9: Hoare triple {24305#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24305#true} is VALID [2022-04-07 23:03:13,370 INFO L290 TraceCheckUtils]: 8: Hoare triple {24305#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24305#true} is VALID [2022-04-07 23:03:13,370 INFO L290 TraceCheckUtils]: 7: Hoare triple {24305#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24305#true} is VALID [2022-04-07 23:03:13,370 INFO L290 TraceCheckUtils]: 6: Hoare triple {24305#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24305#true} is VALID [2022-04-07 23:03:13,371 INFO L290 TraceCheckUtils]: 5: Hoare triple {24305#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24305#true} is VALID [2022-04-07 23:03:13,371 INFO L272 TraceCheckUtils]: 4: Hoare triple {24305#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,371 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24305#true} {24305#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,371 INFO L290 TraceCheckUtils]: 2: Hoare triple {24305#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,371 INFO L290 TraceCheckUtils]: 1: Hoare triple {24305#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24305#true} is VALID [2022-04-07 23:03:13,371 INFO L272 TraceCheckUtils]: 0: Hoare triple {24305#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24305#true} is VALID [2022-04-07 23:03:13,371 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-07 23:03:13,371 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1885102876] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:03:13,371 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:03:13,371 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 14, 14] total 28 [2022-04-07 23:03:13,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1295187520] [2022-04-07 23:03:13,372 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:03:13,372 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-07 23:03:13,372 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:03:13,372 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:13,427 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:03:13,427 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-07 23:03:13,427 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:03:13,427 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-07 23:03:13,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=649, Unknown=0, NotChecked=0, Total=756 [2022-04-07 23:03:13,428 INFO L87 Difference]: Start difference. First operand 308 states and 407 transitions. Second operand has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:16,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:16,875 INFO L93 Difference]: Finished difference Result 385 states and 506 transitions. [2022-04-07 23:03:16,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-04-07 23:03:16,875 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-07 23:03:16,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:03:16,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:16,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 103 transitions. [2022-04-07 23:03:16,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:16,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 103 transitions. [2022-04-07 23:03:16,877 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 38 states and 103 transitions. [2022-04-07 23:03:16,972 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 103 edges. 103 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:03:16,978 INFO L225 Difference]: With dead ends: 385 [2022-04-07 23:03:16,979 INFO L226 Difference]: Without dead ends: 339 [2022-04-07 23:03:16,979 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 67 SyntacticMatches, 6 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 946 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=472, Invalid=3434, Unknown=0, NotChecked=0, Total=3906 [2022-04-07 23:03:16,980 INFO L913 BasicCegarLoop]: 24 mSDtfsCounter, 57 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 643 mSolverCounterSat, 99 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 742 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 99 IncrementalHoareTripleChecker+Valid, 643 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-07 23:03:16,980 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [57 Valid, 91 Invalid, 742 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [99 Valid, 643 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-07 23:03:16,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states. [2022-04-07 23:03:17,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 290. [2022-04-07 23:03:17,663 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:03:17,663 INFO L82 GeneralOperation]: Start isEquivalent. First operand 339 states. Second operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:17,663 INFO L74 IsIncluded]: Start isIncluded. First operand 339 states. Second operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:17,664 INFO L87 Difference]: Start difference. First operand 339 states. Second operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:17,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:17,669 INFO L93 Difference]: Finished difference Result 339 states and 450 transitions. [2022-04-07 23:03:17,669 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 450 transitions. [2022-04-07 23:03:17,670 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:03:17,670 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:03:17,670 INFO L74 IsIncluded]: Start isIncluded. First operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 339 states. [2022-04-07 23:03:17,671 INFO L87 Difference]: Start difference. First operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 339 states. [2022-04-07 23:03:17,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:17,677 INFO L93 Difference]: Finished difference Result 339 states and 450 transitions. [2022-04-07 23:03:17,677 INFO L276 IsEmpty]: Start isEmpty. Operand 339 states and 450 transitions. [2022-04-07 23:03:17,677 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:03:17,677 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:03:17,677 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:03:17,678 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:03:17,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 285 states have (on average 1.3543859649122807) internal successors, (386), 285 states have internal predecessors, (386), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:17,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 390 transitions. [2022-04-07 23:03:17,683 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 390 transitions. Word has length 36 [2022-04-07 23:03:17,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:03:17,684 INFO L478 AbstractCegarLoop]: Abstraction has 290 states and 390 transitions. [2022-04-07 23:03:17,684 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 2.2857142857142856) internal successors, (64), 25 states have internal predecessors, (64), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:17,684 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 390 transitions. [2022-04-07 23:03:17,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-07 23:03:17,684 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:03:17,684 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 6, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:03:17,707 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-07 23:03:17,907 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-07 23:03:17,907 INFO L403 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:03:17,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:03:17,908 INFO L85 PathProgramCache]: Analyzing trace with hash 1291441514, now seen corresponding path program 8 times [2022-04-07 23:03:17,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:03:17,908 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2080026829] [2022-04-07 23:03:17,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:03:17,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:03:17,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:18,194 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:03:18,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:18,199 INFO L290 TraceCheckUtils]: 0: Hoare triple {26233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26213#true} is VALID [2022-04-07 23:03:18,199 INFO L290 TraceCheckUtils]: 1: Hoare triple {26213#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,200 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26213#true} {26213#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,200 INFO L272 TraceCheckUtils]: 0: Hoare triple {26213#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:03:18,200 INFO L290 TraceCheckUtils]: 1: Hoare triple {26233#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26213#true} is VALID [2022-04-07 23:03:18,200 INFO L290 TraceCheckUtils]: 2: Hoare triple {26213#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,200 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26213#true} {26213#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,200 INFO L272 TraceCheckUtils]: 4: Hoare triple {26213#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,201 INFO L290 TraceCheckUtils]: 5: Hoare triple {26213#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26218#(= main_~y~0 0)} is VALID [2022-04-07 23:03:18,201 INFO L290 TraceCheckUtils]: 6: Hoare triple {26218#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26219#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:18,202 INFO L290 TraceCheckUtils]: 7: Hoare triple {26219#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26220#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:18,203 INFO L290 TraceCheckUtils]: 8: Hoare triple {26220#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26221#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:18,203 INFO L290 TraceCheckUtils]: 9: Hoare triple {26221#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26222#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:18,204 INFO L290 TraceCheckUtils]: 10: Hoare triple {26222#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26223#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:03:18,205 INFO L290 TraceCheckUtils]: 11: Hoare triple {26223#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26224#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:03:18,205 INFO L290 TraceCheckUtils]: 12: Hoare triple {26224#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26224#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:03:18,206 INFO L290 TraceCheckUtils]: 13: Hoare triple {26224#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26225#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:03:18,206 INFO L290 TraceCheckUtils]: 14: Hoare triple {26225#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26226#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:03:18,207 INFO L290 TraceCheckUtils]: 15: Hoare triple {26226#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26227#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:03:18,208 INFO L290 TraceCheckUtils]: 16: Hoare triple {26227#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26228#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:03:18,208 INFO L290 TraceCheckUtils]: 17: Hoare triple {26228#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26229#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:03:18,209 INFO L290 TraceCheckUtils]: 18: Hoare triple {26229#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26230#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:03:18,210 INFO L290 TraceCheckUtils]: 19: Hoare triple {26230#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26231#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:03:18,210 INFO L290 TraceCheckUtils]: 20: Hoare triple {26231#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26231#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:03:18,211 INFO L290 TraceCheckUtils]: 21: Hoare triple {26231#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26230#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:03:18,212 INFO L290 TraceCheckUtils]: 22: Hoare triple {26230#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26229#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:03:18,212 INFO L290 TraceCheckUtils]: 23: Hoare triple {26229#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26228#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:03:18,213 INFO L290 TraceCheckUtils]: 24: Hoare triple {26228#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26227#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:03:18,214 INFO L290 TraceCheckUtils]: 25: Hoare triple {26227#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26226#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:03:18,214 INFO L290 TraceCheckUtils]: 26: Hoare triple {26226#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-07 23:03:18,215 INFO L290 TraceCheckUtils]: 27: Hoare triple {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-07 23:03:18,215 INFO L290 TraceCheckUtils]: 28: Hoare triple {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-07 23:03:18,216 INFO L290 TraceCheckUtils]: 29: Hoare triple {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-07 23:03:18,216 INFO L290 TraceCheckUtils]: 30: Hoare triple {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-07 23:03:18,217 INFO L290 TraceCheckUtils]: 31: Hoare triple {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-07 23:03:18,217 INFO L290 TraceCheckUtils]: 32: Hoare triple {26232#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,217 INFO L272 TraceCheckUtils]: 33: Hoare triple {26214#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {26214#false} is VALID [2022-04-07 23:03:18,218 INFO L290 TraceCheckUtils]: 34: Hoare triple {26214#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26214#false} is VALID [2022-04-07 23:03:18,218 INFO L290 TraceCheckUtils]: 35: Hoare triple {26214#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,218 INFO L290 TraceCheckUtils]: 36: Hoare triple {26214#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,218 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 23:03:18,218 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:03:18,218 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2080026829] [2022-04-07 23:03:18,218 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2080026829] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:03:18,218 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1308297887] [2022-04-07 23:03:18,219 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 23:03:18,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:03:18,219 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:03:18,222 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:03:18,223 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-07 23:03:18,269 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 23:03:18,269 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:03:18,270 INFO L263 TraceCheckSpWp]: Trace formula consists of 166 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-07 23:03:18,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:18,280 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:03:18,512 INFO L272 TraceCheckUtils]: 0: Hoare triple {26213#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,512 INFO L290 TraceCheckUtils]: 1: Hoare triple {26213#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26213#true} is VALID [2022-04-07 23:03:18,512 INFO L290 TraceCheckUtils]: 2: Hoare triple {26213#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,512 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26213#true} {26213#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,512 INFO L272 TraceCheckUtils]: 4: Hoare triple {26213#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,512 INFO L290 TraceCheckUtils]: 5: Hoare triple {26213#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26213#true} is VALID [2022-04-07 23:03:18,512 INFO L290 TraceCheckUtils]: 6: Hoare triple {26213#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26213#true} is VALID [2022-04-07 23:03:18,512 INFO L290 TraceCheckUtils]: 7: Hoare triple {26213#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26213#true} is VALID [2022-04-07 23:03:18,512 INFO L290 TraceCheckUtils]: 8: Hoare triple {26213#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26213#true} is VALID [2022-04-07 23:03:18,513 INFO L290 TraceCheckUtils]: 9: Hoare triple {26213#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26264#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:03:18,514 INFO L290 TraceCheckUtils]: 10: Hoare triple {26264#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26268#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:03:18,514 INFO L290 TraceCheckUtils]: 11: Hoare triple {26268#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:03:18,515 INFO L290 TraceCheckUtils]: 12: Hoare triple {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:03:18,516 INFO L290 TraceCheckUtils]: 13: Hoare triple {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:03:18,516 INFO L290 TraceCheckUtils]: 14: Hoare triple {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26268#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:03:18,517 INFO L290 TraceCheckUtils]: 15: Hoare triple {26268#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26264#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:03:18,518 INFO L290 TraceCheckUtils]: 16: Hoare triple {26264#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26288#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:03:18,518 INFO L290 TraceCheckUtils]: 17: Hoare triple {26288#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26292#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:03:18,519 INFO L290 TraceCheckUtils]: 18: Hoare triple {26292#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26296#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:03:18,520 INFO L290 TraceCheckUtils]: 19: Hoare triple {26296#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,520 INFO L290 TraceCheckUtils]: 20: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,520 INFO L290 TraceCheckUtils]: 21: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,521 INFO L290 TraceCheckUtils]: 22: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,521 INFO L290 TraceCheckUtils]: 23: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,521 INFO L290 TraceCheckUtils]: 24: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,521 INFO L290 TraceCheckUtils]: 25: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,522 INFO L290 TraceCheckUtils]: 26: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,522 INFO L290 TraceCheckUtils]: 27: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,523 INFO L290 TraceCheckUtils]: 28: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26296#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:03:18,523 INFO L290 TraceCheckUtils]: 29: Hoare triple {26296#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26292#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:03:18,524 INFO L290 TraceCheckUtils]: 30: Hoare triple {26292#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26288#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:03:18,524 INFO L290 TraceCheckUtils]: 31: Hoare triple {26288#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,524 INFO L290 TraceCheckUtils]: 32: Hoare triple {26214#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,524 INFO L272 TraceCheckUtils]: 33: Hoare triple {26214#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {26214#false} is VALID [2022-04-07 23:03:18,524 INFO L290 TraceCheckUtils]: 34: Hoare triple {26214#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26214#false} is VALID [2022-04-07 23:03:18,524 INFO L290 TraceCheckUtils]: 35: Hoare triple {26214#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,525 INFO L290 TraceCheckUtils]: 36: Hoare triple {26214#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,525 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 12 proven. 30 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-07 23:03:18,525 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:03:18,646 INFO L290 TraceCheckUtils]: 36: Hoare triple {26214#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,646 INFO L290 TraceCheckUtils]: 35: Hoare triple {26214#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,646 INFO L290 TraceCheckUtils]: 34: Hoare triple {26214#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26214#false} is VALID [2022-04-07 23:03:18,647 INFO L272 TraceCheckUtils]: 33: Hoare triple {26214#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {26214#false} is VALID [2022-04-07 23:03:18,647 INFO L290 TraceCheckUtils]: 32: Hoare triple {26214#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,648 INFO L290 TraceCheckUtils]: 31: Hoare triple {26288#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26214#false} is VALID [2022-04-07 23:03:18,649 INFO L290 TraceCheckUtils]: 30: Hoare triple {26292#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26288#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:03:18,650 INFO L290 TraceCheckUtils]: 29: Hoare triple {26296#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26292#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:03:18,650 INFO L290 TraceCheckUtils]: 28: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {26296#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:03:18,651 INFO L290 TraceCheckUtils]: 27: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,651 INFO L290 TraceCheckUtils]: 26: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,651 INFO L290 TraceCheckUtils]: 25: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,651 INFO L290 TraceCheckUtils]: 24: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,652 INFO L290 TraceCheckUtils]: 23: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,652 INFO L290 TraceCheckUtils]: 22: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,652 INFO L290 TraceCheckUtils]: 21: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,653 INFO L290 TraceCheckUtils]: 20: Hoare triple {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,653 INFO L290 TraceCheckUtils]: 19: Hoare triple {26296#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26300#(< 0 (mod (+ main_~x~0 4294967293) 4294967296))} is VALID [2022-04-07 23:03:18,654 INFO L290 TraceCheckUtils]: 18: Hoare triple {26292#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26296#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-07 23:03:18,654 INFO L290 TraceCheckUtils]: 17: Hoare triple {26288#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26292#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-07 23:03:18,655 INFO L290 TraceCheckUtils]: 16: Hoare triple {26264#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26288#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:03:18,656 INFO L290 TraceCheckUtils]: 15: Hoare triple {26268#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26264#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:03:18,656 INFO L290 TraceCheckUtils]: 14: Hoare triple {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26268#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:03:18,657 INFO L290 TraceCheckUtils]: 13: Hoare triple {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:03:18,657 INFO L290 TraceCheckUtils]: 12: Hoare triple {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:03:18,658 INFO L290 TraceCheckUtils]: 11: Hoare triple {26268#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26272#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:03:18,659 INFO L290 TraceCheckUtils]: 10: Hoare triple {26264#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26268#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:03:18,659 INFO L290 TraceCheckUtils]: 9: Hoare triple {26213#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26264#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:03:18,659 INFO L290 TraceCheckUtils]: 8: Hoare triple {26213#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26213#true} is VALID [2022-04-07 23:03:18,659 INFO L290 TraceCheckUtils]: 7: Hoare triple {26213#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26213#true} is VALID [2022-04-07 23:03:18,659 INFO L290 TraceCheckUtils]: 6: Hoare triple {26213#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26213#true} is VALID [2022-04-07 23:03:18,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {26213#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26213#true} is VALID [2022-04-07 23:03:18,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {26213#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,660 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26213#true} {26213#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,660 INFO L290 TraceCheckUtils]: 2: Hoare triple {26213#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,660 INFO L290 TraceCheckUtils]: 1: Hoare triple {26213#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26213#true} is VALID [2022-04-07 23:03:18,660 INFO L272 TraceCheckUtils]: 0: Hoare triple {26213#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26213#true} is VALID [2022-04-07 23:03:18,660 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 12 proven. 30 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-07 23:03:18,660 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1308297887] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:03:18,660 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:03:18,660 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 9, 9] total 25 [2022-04-07 23:03:18,661 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [941105709] [2022-04-07 23:03:18,661 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:03:18,661 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-07 23:03:18,661 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:03:18,661 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:18,724 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:03:18,724 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-07 23:03:18,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:03:18,724 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-07 23:03:18,724 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=552, Unknown=0, NotChecked=0, Total=600 [2022-04-07 23:03:18,725 INFO L87 Difference]: Start difference. First operand 290 states and 390 transitions. Second operand has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:34,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:34,754 INFO L93 Difference]: Finished difference Result 455 states and 609 transitions. [2022-04-07 23:03:34,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2022-04-07 23:03:34,754 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-07 23:03:34,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:03:34,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:34,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 199 transitions. [2022-04-07 23:03:34,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:34,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 199 transitions. [2022-04-07 23:03:34,758 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 99 states and 199 transitions. [2022-04-07 23:03:35,144 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 199 edges. 199 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:03:35,150 INFO L225 Difference]: With dead ends: 455 [2022-04-07 23:03:35,150 INFO L226 Difference]: Without dead ends: 394 [2022-04-07 23:03:35,151 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4540 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=1486, Invalid=13034, Unknown=0, NotChecked=0, Total=14520 [2022-04-07 23:03:35,151 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 135 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 1856 mSolverCounterSat, 330 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 2186 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 330 IncrementalHoareTripleChecker+Valid, 1856 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.4s IncrementalHoareTripleChecker+Time [2022-04-07 23:03:35,151 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [135 Valid, 135 Invalid, 2186 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [330 Valid, 1856 Invalid, 0 Unknown, 0 Unchecked, 4.4s Time] [2022-04-07 23:03:35,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2022-04-07 23:03:35,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 327. [2022-04-07 23:03:35,941 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:03:35,941 INFO L82 GeneralOperation]: Start isEquivalent. First operand 394 states. Second operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:35,942 INFO L74 IsIncluded]: Start isIncluded. First operand 394 states. Second operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:35,942 INFO L87 Difference]: Start difference. First operand 394 states. Second operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:35,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:35,947 INFO L93 Difference]: Finished difference Result 394 states and 502 transitions. [2022-04-07 23:03:35,947 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 502 transitions. [2022-04-07 23:03:35,948 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:03:35,948 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:03:35,948 INFO L74 IsIncluded]: Start isIncluded. First operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 394 states. [2022-04-07 23:03:35,948 INFO L87 Difference]: Start difference. First operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 394 states. [2022-04-07 23:03:35,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:03:35,954 INFO L93 Difference]: Finished difference Result 394 states and 502 transitions. [2022-04-07 23:03:35,954 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 502 transitions. [2022-04-07 23:03:35,955 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:03:35,955 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:03:35,955 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:03:35,955 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:03:35,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 327 states, 322 states have (on average 1.31055900621118) internal successors, (422), 322 states have internal predecessors, (422), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:35,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 426 transitions. [2022-04-07 23:03:35,960 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 426 transitions. Word has length 37 [2022-04-07 23:03:35,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:03:35,960 INFO L478 AbstractCegarLoop]: Abstraction has 327 states and 426 transitions. [2022-04-07 23:03:35,960 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.12) internal successors, (53), 24 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:35,960 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 426 transitions. [2022-04-07 23:03:35,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-07 23:03:35,961 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:03:35,961 INFO L499 BasicCegarLoop]: trace histogram [10, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:03:35,977 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-04-07 23:03:36,163 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:03:36,164 INFO L403 AbstractCegarLoop]: === Iteration 31 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:03:36,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:03:36,164 INFO L85 PathProgramCache]: Analyzing trace with hash 1823283916, now seen corresponding path program 9 times [2022-04-07 23:03:36,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:03:36,164 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293905760] [2022-04-07 23:03:36,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:03:36,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:03:36,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:36,455 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:03:36,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:36,458 INFO L290 TraceCheckUtils]: 0: Hoare triple {28467#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28446#true} is VALID [2022-04-07 23:03:36,458 INFO L290 TraceCheckUtils]: 1: Hoare triple {28446#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:36,459 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28446#true} {28446#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:36,459 INFO L272 TraceCheckUtils]: 0: Hoare triple {28446#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28467#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:03:36,459 INFO L290 TraceCheckUtils]: 1: Hoare triple {28467#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28446#true} is VALID [2022-04-07 23:03:36,459 INFO L290 TraceCheckUtils]: 2: Hoare triple {28446#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:36,459 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28446#true} {28446#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:36,460 INFO L272 TraceCheckUtils]: 4: Hoare triple {28446#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:36,460 INFO L290 TraceCheckUtils]: 5: Hoare triple {28446#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28451#(= main_~y~0 0)} is VALID [2022-04-07 23:03:36,460 INFO L290 TraceCheckUtils]: 6: Hoare triple {28451#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28452#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:03:36,461 INFO L290 TraceCheckUtils]: 7: Hoare triple {28452#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28453#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:03:36,462 INFO L290 TraceCheckUtils]: 8: Hoare triple {28453#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28454#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:03:36,462 INFO L290 TraceCheckUtils]: 9: Hoare triple {28454#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28455#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:03:36,463 INFO L290 TraceCheckUtils]: 10: Hoare triple {28455#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28456#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:03:36,464 INFO L290 TraceCheckUtils]: 11: Hoare triple {28456#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28457#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:03:36,464 INFO L290 TraceCheckUtils]: 12: Hoare triple {28457#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28458#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:03:36,465 INFO L290 TraceCheckUtils]: 13: Hoare triple {28458#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28459#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:03:36,466 INFO L290 TraceCheckUtils]: 14: Hoare triple {28459#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28460#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:03:36,466 INFO L290 TraceCheckUtils]: 15: Hoare triple {28460#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28461#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:03:36,467 INFO L290 TraceCheckUtils]: 16: Hoare triple {28461#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28461#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:03:36,467 INFO L290 TraceCheckUtils]: 17: Hoare triple {28461#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28462#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-07 23:03:36,468 INFO L290 TraceCheckUtils]: 18: Hoare triple {28462#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28463#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-07 23:03:36,469 INFO L290 TraceCheckUtils]: 19: Hoare triple {28463#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28464#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:03:36,469 INFO L290 TraceCheckUtils]: 20: Hoare triple {28464#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28465#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:03:36,470 INFO L290 TraceCheckUtils]: 21: Hoare triple {28465#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28466#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} is VALID [2022-04-07 23:03:36,470 INFO L290 TraceCheckUtils]: 22: Hoare triple {28466#(and (<= (div main_~z~0 4294967296) 0) (<= 6 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 23: Hoare triple {28447#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 24: Hoare triple {28447#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 25: Hoare triple {28447#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 26: Hoare triple {28447#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 27: Hoare triple {28447#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 28: Hoare triple {28447#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 29: Hoare triple {28447#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 30: Hoare triple {28447#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 31: Hoare triple {28447#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 32: Hoare triple {28447#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:36,471 INFO L290 TraceCheckUtils]: 33: Hoare triple {28447#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:36,472 INFO L272 TraceCheckUtils]: 34: Hoare triple {28447#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28447#false} is VALID [2022-04-07 23:03:36,472 INFO L290 TraceCheckUtils]: 35: Hoare triple {28447#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28447#false} is VALID [2022-04-07 23:03:36,472 INFO L290 TraceCheckUtils]: 36: Hoare triple {28447#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:36,472 INFO L290 TraceCheckUtils]: 37: Hoare triple {28447#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:36,472 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-04-07 23:03:36,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:03:36,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1293905760] [2022-04-07 23:03:36,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1293905760] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:03:36,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1836347535] [2022-04-07 23:03:36,473 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 23:03:36,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:03:36,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:03:36,474 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:03:36,475 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-04-07 23:03:36,538 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 23:03:36,538 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:03:36,539 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 38 conjunts are in the unsatisfiable core [2022-04-07 23:03:36,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:03:36,552 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:03:37,033 INFO L272 TraceCheckUtils]: 0: Hoare triple {28446#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,033 INFO L290 TraceCheckUtils]: 1: Hoare triple {28446#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28446#true} is VALID [2022-04-07 23:03:37,033 INFO L290 TraceCheckUtils]: 2: Hoare triple {28446#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,033 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28446#true} {28446#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,033 INFO L272 TraceCheckUtils]: 4: Hoare triple {28446#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,033 INFO L290 TraceCheckUtils]: 5: Hoare triple {28446#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28446#true} is VALID [2022-04-07 23:03:37,033 INFO L290 TraceCheckUtils]: 6: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,033 INFO L290 TraceCheckUtils]: 7: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 8: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 9: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 10: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 11: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 12: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 13: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 14: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 15: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 16: Hoare triple {28446#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,034 INFO L290 TraceCheckUtils]: 17: Hoare triple {28446#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28522#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 23:03:37,035 INFO L290 TraceCheckUtils]: 18: Hoare triple {28522#(= main_~z~0 main_~y~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28526#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-07 23:03:37,035 INFO L290 TraceCheckUtils]: 19: Hoare triple {28526#(= main_~y~0 (+ main_~z~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28530#(= main_~y~0 (+ main_~z~0 2))} is VALID [2022-04-07 23:03:37,036 INFO L290 TraceCheckUtils]: 20: Hoare triple {28530#(= main_~y~0 (+ main_~z~0 2))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28534#(= (+ (- 2) main_~y~0) (+ main_~z~0 1))} is VALID [2022-04-07 23:03:37,037 INFO L290 TraceCheckUtils]: 21: Hoare triple {28534#(= (+ (- 2) main_~y~0) (+ main_~z~0 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28538#(= (+ (- 2) main_~y~0) (+ main_~z~0 2))} is VALID [2022-04-07 23:03:37,037 INFO L290 TraceCheckUtils]: 22: Hoare triple {28538#(= (+ (- 2) main_~y~0) (+ main_~z~0 2))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28538#(= (+ (- 2) main_~y~0) (+ main_~z~0 2))} is VALID [2022-04-07 23:03:37,037 INFO L290 TraceCheckUtils]: 23: Hoare triple {28538#(= (+ (- 2) main_~y~0) (+ main_~z~0 2))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28530#(= main_~y~0 (+ main_~z~0 2))} is VALID [2022-04-07 23:03:37,038 INFO L290 TraceCheckUtils]: 24: Hoare triple {28530#(= main_~y~0 (+ main_~z~0 2))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28522#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 23:03:37,038 INFO L290 TraceCheckUtils]: 25: Hoare triple {28522#(= main_~z~0 main_~y~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28551#(= (+ main_~y~0 2) main_~z~0)} is VALID [2022-04-07 23:03:37,039 INFO L290 TraceCheckUtils]: 26: Hoare triple {28551#(= (+ main_~y~0 2) main_~z~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28555#(= (+ (- 1) main_~z~0) (+ main_~y~0 3))} is VALID [2022-04-07 23:03:37,039 INFO L290 TraceCheckUtils]: 27: Hoare triple {28555#(= (+ (- 1) main_~z~0) (+ main_~y~0 3))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28555#(= (+ (- 1) main_~z~0) (+ main_~y~0 3))} is VALID [2022-04-07 23:03:37,040 INFO L290 TraceCheckUtils]: 28: Hoare triple {28555#(= (+ (- 1) main_~z~0) (+ main_~y~0 3))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28562#(= main_~y~0 (+ main_~z~0 (- 3)))} is VALID [2022-04-07 23:03:37,040 INFO L290 TraceCheckUtils]: 29: Hoare triple {28562#(= main_~y~0 (+ main_~z~0 (- 3)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28551#(= (+ main_~y~0 2) main_~z~0)} is VALID [2022-04-07 23:03:37,041 INFO L290 TraceCheckUtils]: 30: Hoare triple {28551#(= (+ main_~y~0 2) main_~z~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28569#(= main_~z~0 (+ main_~y~0 1))} is VALID [2022-04-07 23:03:37,041 INFO L290 TraceCheckUtils]: 31: Hoare triple {28569#(= main_~z~0 (+ main_~y~0 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28522#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 23:03:37,042 INFO L290 TraceCheckUtils]: 32: Hoare triple {28522#(= main_~z~0 main_~y~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28522#(= main_~z~0 main_~y~0)} is VALID [2022-04-07 23:03:37,042 INFO L290 TraceCheckUtils]: 33: Hoare triple {28522#(= main_~z~0 main_~y~0)} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28579#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:03:37,043 INFO L272 TraceCheckUtils]: 34: Hoare triple {28579#(not (< 0 (mod main_~y~0 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28583#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:03:37,043 INFO L290 TraceCheckUtils]: 35: Hoare triple {28583#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28587#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:03:37,043 INFO L290 TraceCheckUtils]: 36: Hoare triple {28587#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:37,043 INFO L290 TraceCheckUtils]: 37: Hoare triple {28447#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:37,044 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2022-04-07 23:03:37,044 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:03:37,692 INFO L290 TraceCheckUtils]: 37: Hoare triple {28447#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:37,692 INFO L290 TraceCheckUtils]: 36: Hoare triple {28587#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28447#false} is VALID [2022-04-07 23:03:37,693 INFO L290 TraceCheckUtils]: 35: Hoare triple {28583#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28587#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 23:03:37,693 INFO L272 TraceCheckUtils]: 34: Hoare triple {28579#(not (< 0 (mod main_~y~0 4294967296)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {28583#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 23:03:37,694 INFO L290 TraceCheckUtils]: 33: Hoare triple {28606#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28579#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-07 23:03:37,694 INFO L290 TraceCheckUtils]: 32: Hoare triple {28606#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28606#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 23:03:37,695 INFO L290 TraceCheckUtils]: 31: Hoare triple {28613#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 1) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28606#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 23:03:37,696 INFO L290 TraceCheckUtils]: 30: Hoare triple {28617#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 2) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28613#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 1) 4294967296))))} is VALID [2022-04-07 23:03:37,696 INFO L290 TraceCheckUtils]: 29: Hoare triple {28621#(or (not (< 0 (mod (+ main_~y~0 3) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28617#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 2) 4294967296))))} is VALID [2022-04-07 23:03:37,697 INFO L290 TraceCheckUtils]: 28: Hoare triple {28625#(or (not (< 0 (mod (+ main_~y~0 4) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28621#(or (not (< 0 (mod (+ main_~y~0 3) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 23:03:37,697 INFO L290 TraceCheckUtils]: 27: Hoare triple {28625#(or (not (< 0 (mod (+ main_~y~0 4) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28625#(or (not (< 0 (mod (+ main_~y~0 4) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 23:03:37,698 INFO L290 TraceCheckUtils]: 26: Hoare triple {28632#(or (not (< 0 (mod (+ main_~y~0 3) 4294967296))) (< 0 (mod (+ main_~z~0 1) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28625#(or (not (< 0 (mod (+ main_~y~0 4) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 23:03:37,699 INFO L290 TraceCheckUtils]: 25: Hoare triple {28636#(or (< 0 (mod (+ main_~z~0 2) 4294967296)) (not (< 0 (mod (+ main_~y~0 2) 4294967296))))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28632#(or (not (< 0 (mod (+ main_~y~0 3) 4294967296))) (< 0 (mod (+ main_~z~0 1) 4294967296)))} is VALID [2022-04-07 23:03:37,700 INFO L290 TraceCheckUtils]: 24: Hoare triple {28640#(or (not (< 0 (mod (+ main_~y~0 1) 4294967296))) (< 0 (mod (+ main_~z~0 3) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28636#(or (< 0 (mod (+ main_~z~0 2) 4294967296)) (not (< 0 (mod (+ main_~y~0 2) 4294967296))))} is VALID [2022-04-07 23:03:37,701 INFO L290 TraceCheckUtils]: 23: Hoare triple {28644#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 4) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28640#(or (not (< 0 (mod (+ main_~y~0 1) 4294967296))) (< 0 (mod (+ main_~z~0 3) 4294967296)))} is VALID [2022-04-07 23:03:37,701 INFO L290 TraceCheckUtils]: 22: Hoare triple {28644#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 4) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28644#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 4) 4294967296)))} is VALID [2022-04-07 23:03:37,702 INFO L290 TraceCheckUtils]: 21: Hoare triple {28651#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 3) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28644#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 4) 4294967296)))} is VALID [2022-04-07 23:03:37,702 INFO L290 TraceCheckUtils]: 20: Hoare triple {28655#(or (< 0 (mod (+ main_~z~0 2) 4294967296)) (not (< 0 (mod main_~y~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28651#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 3) 4294967296)))} is VALID [2022-04-07 23:03:37,703 INFO L290 TraceCheckUtils]: 19: Hoare triple {28659#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 1) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28655#(or (< 0 (mod (+ main_~z~0 2) 4294967296)) (not (< 0 (mod main_~y~0 4294967296))))} is VALID [2022-04-07 23:03:37,704 INFO L290 TraceCheckUtils]: 18: Hoare triple {28606#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28659#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod (+ main_~z~0 1) 4294967296)))} is VALID [2022-04-07 23:03:37,704 INFO L290 TraceCheckUtils]: 17: Hoare triple {28446#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28606#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-07 23:03:37,704 INFO L290 TraceCheckUtils]: 16: Hoare triple {28446#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,704 INFO L290 TraceCheckUtils]: 15: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,704 INFO L290 TraceCheckUtils]: 14: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 13: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 12: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 11: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 10: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 9: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 8: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 7: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 6: Hoare triple {28446#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 5: Hoare triple {28446#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L272 TraceCheckUtils]: 4: Hoare triple {28446#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28446#true} {28446#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 2: Hoare triple {28446#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,705 INFO L290 TraceCheckUtils]: 1: Hoare triple {28446#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28446#true} is VALID [2022-04-07 23:03:37,706 INFO L272 TraceCheckUtils]: 0: Hoare triple {28446#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28446#true} is VALID [2022-04-07 23:03:37,706 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2022-04-07 23:03:37,706 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1836347535] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:03:37,706 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:03:37,706 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 14, 17] total 43 [2022-04-07 23:03:37,706 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650910689] [2022-04-07 23:03:37,706 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:03:37,706 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-07 23:03:37,707 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:03:37,707 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:03:37,759 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:03:37,759 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-04-07 23:03:37,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:03:37,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-04-07 23:03:37,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=1643, Unknown=0, NotChecked=0, Total=1806 [2022-04-07 23:03:37,760 INFO L87 Difference]: Start difference. First operand 327 states and 426 transitions. Second operand has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:10,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:10,625 INFO L93 Difference]: Finished difference Result 775 states and 1082 transitions. [2022-04-07 23:04:10,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 158 states. [2022-04-07 23:04:10,626 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-07 23:04:10,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:04:10,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:10,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 365 transitions. [2022-04-07 23:04:10,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:10,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 365 transitions. [2022-04-07 23:04:10,634 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 158 states and 365 transitions. [2022-04-07 23:04:11,194 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 365 edges. 365 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:11,209 INFO L225 Difference]: With dead ends: 775 [2022-04-07 23:04:11,209 INFO L226 Difference]: Without dead ends: 687 [2022-04-07 23:04:11,210 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 262 GetRequests, 62 SyntacticMatches, 4 SemanticMatches, 196 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11926 ImplicationChecksByTransitivity, 14.7s TimeCoverageRelationStatistics Valid=3458, Invalid=35548, Unknown=0, NotChecked=0, Total=39006 [2022-04-07 23:04:11,211 INFO L913 BasicCegarLoop]: 55 mSDtfsCounter, 256 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 6088 mSolverCounterSat, 973 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 8.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 256 SdHoareTripleChecker+Valid, 192 SdHoareTripleChecker+Invalid, 7061 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 973 IncrementalHoareTripleChecker+Valid, 6088 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.8s IncrementalHoareTripleChecker+Time [2022-04-07 23:04:11,211 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [256 Valid, 192 Invalid, 7061 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [973 Valid, 6088 Invalid, 0 Unknown, 0 Unchecked, 8.8s Time] [2022-04-07 23:04:11,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 687 states. [2022-04-07 23:04:12,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 687 to 406. [2022-04-07 23:04:12,096 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:04:12,096 INFO L82 GeneralOperation]: Start isEquivalent. First operand 687 states. Second operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,097 INFO L74 IsIncluded]: Start isIncluded. First operand 687 states. Second operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,097 INFO L87 Difference]: Start difference. First operand 687 states. Second operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:12,117 INFO L93 Difference]: Finished difference Result 687 states and 906 transitions. [2022-04-07 23:04:12,117 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 906 transitions. [2022-04-07 23:04:12,118 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:12,118 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:12,119 INFO L74 IsIncluded]: Start isIncluded. First operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 687 states. [2022-04-07 23:04:12,119 INFO L87 Difference]: Start difference. First operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 687 states. [2022-04-07 23:04:12,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:04:12,139 INFO L93 Difference]: Finished difference Result 687 states and 906 transitions. [2022-04-07 23:04:12,140 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 906 transitions. [2022-04-07 23:04:12,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:04:12,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:04:12,140 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:04:12,141 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:04:12,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 406 states, 401 states have (on average 1.3591022443890275) internal successors, (545), 401 states have internal predecessors, (545), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 549 transitions. [2022-04-07 23:04:12,150 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 549 transitions. Word has length 38 [2022-04-07 23:04:12,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:04:12,151 INFO L478 AbstractCegarLoop]: Abstraction has 406 states and 549 transitions. [2022-04-07 23:04:12,151 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 42 states have (on average 1.619047619047619) internal successors, (68), 41 states have internal predecessors, (68), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:12,151 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 549 transitions. [2022-04-07 23:04:12,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-04-07 23:04:12,151 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:04:12,151 INFO L499 BasicCegarLoop]: trace histogram [8, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:04:12,174 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-04-07 23:04:12,374 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable30 [2022-04-07 23:04:12,374 INFO L403 AbstractCegarLoop]: === Iteration 32 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:04:12,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:04:12,374 INFO L85 PathProgramCache]: Analyzing trace with hash 2108423050, now seen corresponding path program 6 times [2022-04-07 23:04:12,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:04:12,375 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [143328765] [2022-04-07 23:04:12,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:04:12,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:04:12,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:12,648 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:04:12,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:12,651 INFO L290 TraceCheckUtils]: 0: Hoare triple {31868#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31847#true} is VALID [2022-04-07 23:04:12,651 INFO L290 TraceCheckUtils]: 1: Hoare triple {31847#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:12,651 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31847#true} {31847#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:12,652 INFO L272 TraceCheckUtils]: 0: Hoare triple {31847#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31868#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:04:12,652 INFO L290 TraceCheckUtils]: 1: Hoare triple {31868#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31847#true} is VALID [2022-04-07 23:04:12,652 INFO L290 TraceCheckUtils]: 2: Hoare triple {31847#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:12,652 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31847#true} {31847#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:12,652 INFO L272 TraceCheckUtils]: 4: Hoare triple {31847#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:12,652 INFO L290 TraceCheckUtils]: 5: Hoare triple {31847#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {31852#(= main_~y~0 0)} is VALID [2022-04-07 23:04:12,653 INFO L290 TraceCheckUtils]: 6: Hoare triple {31852#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31853#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:04:12,654 INFO L290 TraceCheckUtils]: 7: Hoare triple {31853#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31854#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:04:12,654 INFO L290 TraceCheckUtils]: 8: Hoare triple {31854#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31855#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:04:12,655 INFO L290 TraceCheckUtils]: 9: Hoare triple {31855#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31856#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:04:12,655 INFO L290 TraceCheckUtils]: 10: Hoare triple {31856#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31857#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:04:12,656 INFO L290 TraceCheckUtils]: 11: Hoare triple {31857#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31858#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:12,657 INFO L290 TraceCheckUtils]: 12: Hoare triple {31858#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31859#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:12,657 INFO L290 TraceCheckUtils]: 13: Hoare triple {31859#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {31859#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:12,658 INFO L290 TraceCheckUtils]: 14: Hoare triple {31859#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {31860#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:04:12,658 INFO L290 TraceCheckUtils]: 15: Hoare triple {31860#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31861#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:04:12,659 INFO L290 TraceCheckUtils]: 16: Hoare triple {31861#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31862#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:04:12,660 INFO L290 TraceCheckUtils]: 17: Hoare triple {31862#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31863#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:04:12,660 INFO L290 TraceCheckUtils]: 18: Hoare triple {31863#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31864#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:04:12,661 INFO L290 TraceCheckUtils]: 19: Hoare triple {31864#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31865#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:04:12,661 INFO L290 TraceCheckUtils]: 20: Hoare triple {31865#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31866#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:04:12,662 INFO L290 TraceCheckUtils]: 21: Hoare triple {31866#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31867#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:04:12,663 INFO L290 TraceCheckUtils]: 22: Hoare triple {31867#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31848#false} is VALID [2022-04-07 23:04:12,663 INFO L290 TraceCheckUtils]: 23: Hoare triple {31848#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:12,663 INFO L290 TraceCheckUtils]: 24: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:12,663 INFO L290 TraceCheckUtils]: 25: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:12,663 INFO L290 TraceCheckUtils]: 26: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:12,663 INFO L290 TraceCheckUtils]: 27: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:12,663 INFO L290 TraceCheckUtils]: 28: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:12,663 INFO L290 TraceCheckUtils]: 29: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L290 TraceCheckUtils]: 30: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L290 TraceCheckUtils]: 31: Hoare triple {31848#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L290 TraceCheckUtils]: 32: Hoare triple {31848#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L290 TraceCheckUtils]: 33: Hoare triple {31848#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L290 TraceCheckUtils]: 34: Hoare triple {31848#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L272 TraceCheckUtils]: 35: Hoare triple {31848#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L290 TraceCheckUtils]: 36: Hoare triple {31848#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L290 TraceCheckUtils]: 37: Hoare triple {31848#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L290 TraceCheckUtils]: 38: Hoare triple {31848#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:12,664 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 8 proven. 56 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-07 23:04:12,665 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:04:12,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [143328765] [2022-04-07 23:04:12,665 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [143328765] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:04:12,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1423950802] [2022-04-07 23:04:12,665 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-07 23:04:12,665 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:04:12,665 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:04:12,667 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:04:12,691 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-04-07 23:04:12,813 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-07 23:04:12,813 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:04:12,814 INFO L263 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-07 23:04:12,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:04:12,825 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:04:13,126 INFO L272 TraceCheckUtils]: 0: Hoare triple {31847#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:13,126 INFO L290 TraceCheckUtils]: 1: Hoare triple {31847#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31847#true} is VALID [2022-04-07 23:04:13,126 INFO L290 TraceCheckUtils]: 2: Hoare triple {31847#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:13,126 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31847#true} {31847#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:13,126 INFO L272 TraceCheckUtils]: 4: Hoare triple {31847#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:13,127 INFO L290 TraceCheckUtils]: 5: Hoare triple {31847#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {31852#(= main_~y~0 0)} is VALID [2022-04-07 23:04:13,127 INFO L290 TraceCheckUtils]: 6: Hoare triple {31852#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31853#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:04:13,128 INFO L290 TraceCheckUtils]: 7: Hoare triple {31853#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31854#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:04:13,129 INFO L290 TraceCheckUtils]: 8: Hoare triple {31854#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31855#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:04:13,129 INFO L290 TraceCheckUtils]: 9: Hoare triple {31855#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31856#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:04:13,130 INFO L290 TraceCheckUtils]: 10: Hoare triple {31856#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31857#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:04:13,131 INFO L290 TraceCheckUtils]: 11: Hoare triple {31857#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31858#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:04:13,131 INFO L290 TraceCheckUtils]: 12: Hoare triple {31858#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {31859#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:13,132 INFO L290 TraceCheckUtils]: 13: Hoare triple {31859#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {31859#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:04:13,132 INFO L290 TraceCheckUtils]: 14: Hoare triple {31859#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {31860#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:04:13,133 INFO L290 TraceCheckUtils]: 15: Hoare triple {31860#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31861#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:04:13,133 INFO L290 TraceCheckUtils]: 16: Hoare triple {31861#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31862#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:04:13,134 INFO L290 TraceCheckUtils]: 17: Hoare triple {31862#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31863#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:04:13,135 INFO L290 TraceCheckUtils]: 18: Hoare triple {31863#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31864#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:04:13,135 INFO L290 TraceCheckUtils]: 19: Hoare triple {31864#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31865#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:04:13,136 INFO L290 TraceCheckUtils]: 20: Hoare triple {31865#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31866#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:04:13,137 INFO L290 TraceCheckUtils]: 21: Hoare triple {31866#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31867#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:04:13,137 INFO L290 TraceCheckUtils]: 22: Hoare triple {31867#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {31938#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-07 23:04:13,138 INFO L290 TraceCheckUtils]: 23: Hoare triple {31938#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,138 INFO L290 TraceCheckUtils]: 24: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,138 INFO L290 TraceCheckUtils]: 25: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,138 INFO L290 TraceCheckUtils]: 26: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,138 INFO L290 TraceCheckUtils]: 27: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,138 INFO L290 TraceCheckUtils]: 28: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,139 INFO L290 TraceCheckUtils]: 29: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,139 INFO L290 TraceCheckUtils]: 30: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,139 INFO L290 TraceCheckUtils]: 31: Hoare triple {31848#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,139 INFO L290 TraceCheckUtils]: 32: Hoare triple {31848#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,139 INFO L290 TraceCheckUtils]: 33: Hoare triple {31848#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {31848#false} is VALID [2022-04-07 23:04:13,139 INFO L290 TraceCheckUtils]: 34: Hoare triple {31848#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,139 INFO L272 TraceCheckUtils]: 35: Hoare triple {31848#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {31848#false} is VALID [2022-04-07 23:04:13,139 INFO L290 TraceCheckUtils]: 36: Hoare triple {31848#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31848#false} is VALID [2022-04-07 23:04:13,140 INFO L290 TraceCheckUtils]: 37: Hoare triple {31848#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,140 INFO L290 TraceCheckUtils]: 38: Hoare triple {31848#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,140 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-07 23:04:13,140 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:04:13,640 INFO L290 TraceCheckUtils]: 38: Hoare triple {31848#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,640 INFO L290 TraceCheckUtils]: 37: Hoare triple {31848#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,640 INFO L290 TraceCheckUtils]: 36: Hoare triple {31848#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31848#false} is VALID [2022-04-07 23:04:13,640 INFO L272 TraceCheckUtils]: 35: Hoare triple {31848#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {31848#false} is VALID [2022-04-07 23:04:13,640 INFO L290 TraceCheckUtils]: 34: Hoare triple {31848#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,640 INFO L290 TraceCheckUtils]: 33: Hoare triple {31848#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {31848#false} is VALID [2022-04-07 23:04:13,640 INFO L290 TraceCheckUtils]: 32: Hoare triple {31848#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,640 INFO L290 TraceCheckUtils]: 31: Hoare triple {31848#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,640 INFO L290 TraceCheckUtils]: 30: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,641 INFO L290 TraceCheckUtils]: 29: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,641 INFO L290 TraceCheckUtils]: 28: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,641 INFO L290 TraceCheckUtils]: 27: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,641 INFO L290 TraceCheckUtils]: 26: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,641 INFO L290 TraceCheckUtils]: 25: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,641 INFO L290 TraceCheckUtils]: 24: Hoare triple {31848#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {31848#false} is VALID [2022-04-07 23:04:13,641 INFO L290 TraceCheckUtils]: 23: Hoare triple {32032#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {31848#false} is VALID [2022-04-07 23:04:13,642 INFO L290 TraceCheckUtils]: 22: Hoare triple {32036#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32032#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-07 23:04:13,643 INFO L290 TraceCheckUtils]: 21: Hoare triple {32040#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32036#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-07 23:04:13,644 INFO L290 TraceCheckUtils]: 20: Hoare triple {32044#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32040#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-07 23:04:13,645 INFO L290 TraceCheckUtils]: 19: Hoare triple {32048#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32044#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-07 23:04:13,646 INFO L290 TraceCheckUtils]: 18: Hoare triple {32052#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32048#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-07 23:04:13,647 INFO L290 TraceCheckUtils]: 17: Hoare triple {32056#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32052#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-07 23:04:13,647 INFO L290 TraceCheckUtils]: 16: Hoare triple {32060#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32056#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-07 23:04:13,648 INFO L290 TraceCheckUtils]: 15: Hoare triple {32064#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32060#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-07 23:04:13,648 INFO L290 TraceCheckUtils]: 14: Hoare triple {32068#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32064#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-07 23:04:13,648 INFO L290 TraceCheckUtils]: 13: Hoare triple {32068#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32068#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:13,649 INFO L290 TraceCheckUtils]: 12: Hoare triple {32075#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32068#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:13,650 INFO L290 TraceCheckUtils]: 11: Hoare triple {32079#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32075#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-07 23:04:13,650 INFO L290 TraceCheckUtils]: 10: Hoare triple {32083#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32079#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:13,651 INFO L290 TraceCheckUtils]: 9: Hoare triple {32087#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32083#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:13,652 INFO L290 TraceCheckUtils]: 8: Hoare triple {32091#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32087#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-07 23:04:13,652 INFO L290 TraceCheckUtils]: 7: Hoare triple {32095#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32091#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-07 23:04:13,653 INFO L290 TraceCheckUtils]: 6: Hoare triple {32099#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32095#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-07 23:04:13,653 INFO L290 TraceCheckUtils]: 5: Hoare triple {31847#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32099#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-07 23:04:13,653 INFO L272 TraceCheckUtils]: 4: Hoare triple {31847#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:13,653 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31847#true} {31847#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:13,654 INFO L290 TraceCheckUtils]: 2: Hoare triple {31847#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:13,654 INFO L290 TraceCheckUtils]: 1: Hoare triple {31847#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31847#true} is VALID [2022-04-07 23:04:13,654 INFO L272 TraceCheckUtils]: 0: Hoare triple {31847#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31847#true} is VALID [2022-04-07 23:04:13,654 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-07 23:04:13,654 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1423950802] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:04:13,654 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:04:13,654 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19] total 37 [2022-04-07 23:04:13,654 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1587006790] [2022-04-07 23:04:13,654 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:04:13,655 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2022-04-07 23:04:13,655 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:04:13,655 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:04:13,707 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:04:13,707 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-07 23:04:13,707 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:04:13,707 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-07 23:04:13,708 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=201, Invalid=1131, Unknown=0, NotChecked=0, Total=1332 [2022-04-07 23:04:13,708 INFO L87 Difference]: Start difference. First operand 406 states and 549 transitions. Second operand has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:05:26,219 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.07s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-07 23:09:18,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:09:18,307 INFO L93 Difference]: Finished difference Result 1424 states and 2126 transitions. [2022-04-07 23:09:18,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 606 states. [2022-04-07 23:09:18,307 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2022-04-07 23:09:18,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:09:18,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:18,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1313 transitions. [2022-04-07 23:09:18,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:18,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 1313 transitions. [2022-04-07 23:09:18,384 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 606 states and 1313 transitions. [2022-04-07 23:09:32,914 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 1313 edges. 1313 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:09:32,972 INFO L225 Difference]: With dead ends: 1424 [2022-04-07 23:09:32,972 INFO L226 Difference]: Without dead ends: 1284 [2022-04-07 23:09:32,999 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 700 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 638 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196303 ImplicationChecksByTransitivity, 244.3s TimeCoverageRelationStatistics Valid=44975, Invalid=363985, Unknown=0, NotChecked=0, Total=408960 [2022-04-07 23:09:32,999 INFO L913 BasicCegarLoop]: 43 mSDtfsCounter, 1132 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 2730 mSolverCounterSat, 3109 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 31.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1132 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 5839 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3109 IncrementalHoareTripleChecker+Valid, 2730 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 31.0s IncrementalHoareTripleChecker+Time [2022-04-07 23:09:33,000 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1132 Valid, 150 Invalid, 5839 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3109 Valid, 2730 Invalid, 0 Unknown, 0 Unchecked, 31.0s Time] [2022-04-07 23:09:33,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1284 states. [2022-04-07 23:09:34,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1284 to 618. [2022-04-07 23:09:34,358 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:09:34,359 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1284 states. Second operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:34,360 INFO L74 IsIncluded]: Start isIncluded. First operand 1284 states. Second operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:34,360 INFO L87 Difference]: Start difference. First operand 1284 states. Second operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:34,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:09:34,404 INFO L93 Difference]: Finished difference Result 1284 states and 1811 transitions. [2022-04-07 23:09:34,404 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 1811 transitions. [2022-04-07 23:09:34,405 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:09:34,405 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:09:34,406 INFO L74 IsIncluded]: Start isIncluded. First operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1284 states. [2022-04-07 23:09:34,406 INFO L87 Difference]: Start difference. First operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1284 states. [2022-04-07 23:09:34,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:09:34,474 INFO L93 Difference]: Finished difference Result 1284 states and 1811 transitions. [2022-04-07 23:09:34,474 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 1811 transitions. [2022-04-07 23:09:34,476 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:09:34,476 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:09:34,476 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:09:34,476 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:09:34,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 618 states, 613 states have (on average 1.4143556280587275) internal successors, (867), 613 states have internal predecessors, (867), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:34,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 618 states to 618 states and 871 transitions. [2022-04-07 23:09:34,495 INFO L78 Accepts]: Start accepts. Automaton has 618 states and 871 transitions. Word has length 39 [2022-04-07 23:09:34,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:09:34,496 INFO L478 AbstractCegarLoop]: Abstraction has 618 states and 871 transitions. [2022-04-07 23:09:34,496 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 1.3783783783783783) internal successors, (51), 36 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:34,496 INFO L276 IsEmpty]: Start isEmpty. Operand 618 states and 871 transitions. [2022-04-07 23:09:34,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-04-07 23:09:34,497 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:09:34,497 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:09:34,521 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2022-04-07 23:09:34,711 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,28 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:09:34,711 INFO L403 AbstractCegarLoop]: === Iteration 33 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:09:34,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:09:34,712 INFO L85 PathProgramCache]: Analyzing trace with hash -1179511284, now seen corresponding path program 11 times [2022-04-07 23:09:34,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:09:34,712 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216580903] [2022-04-07 23:09:34,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:09:34,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:09:34,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:09:34,855 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:09:34,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:09:34,858 INFO L290 TraceCheckUtils]: 0: Hoare triple {38313#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38302#true} is VALID [2022-04-07 23:09:34,859 INFO L290 TraceCheckUtils]: 1: Hoare triple {38302#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:34,859 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {38302#true} {38302#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:34,859 INFO L272 TraceCheckUtils]: 0: Hoare triple {38302#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38313#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:09:34,859 INFO L290 TraceCheckUtils]: 1: Hoare triple {38313#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38302#true} is VALID [2022-04-07 23:09:34,859 INFO L290 TraceCheckUtils]: 2: Hoare triple {38302#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:34,860 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38302#true} {38302#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:34,860 INFO L272 TraceCheckUtils]: 4: Hoare triple {38302#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:34,860 INFO L290 TraceCheckUtils]: 5: Hoare triple {38302#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {38302#true} is VALID [2022-04-07 23:09:34,860 INFO L290 TraceCheckUtils]: 6: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:34,860 INFO L290 TraceCheckUtils]: 7: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:34,860 INFO L290 TraceCheckUtils]: 8: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:34,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:34,861 INFO L290 TraceCheckUtils]: 10: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:09:34,862 INFO L290 TraceCheckUtils]: 11: Hoare triple {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:09:34,862 INFO L290 TraceCheckUtils]: 12: Hoare triple {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:09:34,863 INFO L290 TraceCheckUtils]: 13: Hoare triple {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38308#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:34,864 INFO L290 TraceCheckUtils]: 14: Hoare triple {38308#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38309#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:34,865 INFO L290 TraceCheckUtils]: 15: Hoare triple {38309#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38310#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:34,866 INFO L290 TraceCheckUtils]: 16: Hoare triple {38310#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38311#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} is VALID [2022-04-07 23:09:34,867 INFO L290 TraceCheckUtils]: 17: Hoare triple {38311#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:34,867 INFO L290 TraceCheckUtils]: 18: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:34,868 INFO L290 TraceCheckUtils]: 19: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:34,868 INFO L290 TraceCheckUtils]: 20: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:34,869 INFO L290 TraceCheckUtils]: 21: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:34,869 INFO L290 TraceCheckUtils]: 22: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:34,870 INFO L290 TraceCheckUtils]: 23: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:34,870 INFO L290 TraceCheckUtils]: 24: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:34,871 INFO L290 TraceCheckUtils]: 25: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38311#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} is VALID [2022-04-07 23:09:34,872 INFO L290 TraceCheckUtils]: 26: Hoare triple {38311#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38310#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:34,873 INFO L290 TraceCheckUtils]: 27: Hoare triple {38310#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38309#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:34,874 INFO L290 TraceCheckUtils]: 28: Hoare triple {38309#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38308#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:34,875 INFO L290 TraceCheckUtils]: 29: Hoare triple {38308#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:34,875 INFO L290 TraceCheckUtils]: 30: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:34,875 INFO L290 TraceCheckUtils]: 31: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:34,875 INFO L290 TraceCheckUtils]: 32: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:34,875 INFO L290 TraceCheckUtils]: 33: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:34,875 INFO L290 TraceCheckUtils]: 34: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:34,875 INFO L290 TraceCheckUtils]: 35: Hoare triple {38303#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:34,876 INFO L272 TraceCheckUtils]: 36: Hoare triple {38303#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {38303#false} is VALID [2022-04-07 23:09:34,876 INFO L290 TraceCheckUtils]: 37: Hoare triple {38303#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {38303#false} is VALID [2022-04-07 23:09:34,876 INFO L290 TraceCheckUtils]: 38: Hoare triple {38303#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:34,876 INFO L290 TraceCheckUtils]: 39: Hoare triple {38303#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:34,876 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-04-07 23:09:34,876 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:09:34,876 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216580903] [2022-04-07 23:09:34,876 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [216580903] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:09:34,876 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1286224181] [2022-04-07 23:09:34,877 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-07 23:09:34,877 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:09:34,877 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:09:34,878 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:09:34,879 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-04-07 23:09:35,306 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-07 23:09:35,306 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:09:35,308 INFO L263 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-07 23:09:35,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:09:35,318 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:09:35,604 INFO L272 TraceCheckUtils]: 0: Hoare triple {38302#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L290 TraceCheckUtils]: 1: Hoare triple {38302#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L290 TraceCheckUtils]: 2: Hoare triple {38302#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38302#true} {38302#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L272 TraceCheckUtils]: 4: Hoare triple {38302#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L290 TraceCheckUtils]: 5: Hoare triple {38302#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L290 TraceCheckUtils]: 6: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L290 TraceCheckUtils]: 7: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L290 TraceCheckUtils]: 8: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L290 TraceCheckUtils]: 9: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,605 INFO L290 TraceCheckUtils]: 10: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,606 INFO L290 TraceCheckUtils]: 11: Hoare triple {38302#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {38350#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:09:35,606 INFO L290 TraceCheckUtils]: 12: Hoare triple {38350#(not (< 0 (mod main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {38350#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-07 23:09:35,607 INFO L290 TraceCheckUtils]: 13: Hoare triple {38350#(not (< 0 (mod main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38357#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:09:35,607 INFO L290 TraceCheckUtils]: 14: Hoare triple {38357#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38361#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:09:35,608 INFO L290 TraceCheckUtils]: 15: Hoare triple {38361#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38365#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:09:35,609 INFO L290 TraceCheckUtils]: 16: Hoare triple {38365#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38369#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,609 INFO L290 TraceCheckUtils]: 17: Hoare triple {38369#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,610 INFO L290 TraceCheckUtils]: 18: Hoare triple {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,610 INFO L290 TraceCheckUtils]: 19: Hoare triple {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,610 INFO L290 TraceCheckUtils]: 20: Hoare triple {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,610 INFO L290 TraceCheckUtils]: 21: Hoare triple {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,611 INFO L290 TraceCheckUtils]: 22: Hoare triple {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,611 INFO L290 TraceCheckUtils]: 23: Hoare triple {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,611 INFO L290 TraceCheckUtils]: 24: Hoare triple {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,612 INFO L290 TraceCheckUtils]: 25: Hoare triple {38373#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38369#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-07 23:09:35,613 INFO L290 TraceCheckUtils]: 26: Hoare triple {38369#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38365#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-07 23:09:35,613 INFO L290 TraceCheckUtils]: 27: Hoare triple {38365#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38361#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-07 23:09:35,614 INFO L290 TraceCheckUtils]: 28: Hoare triple {38361#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38357#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 29: Hoare triple {38357#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 30: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 31: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 32: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 33: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 34: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 35: Hoare triple {38303#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L272 TraceCheckUtils]: 36: Hoare triple {38303#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 37: Hoare triple {38303#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 38: Hoare triple {38303#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:35,615 INFO L290 TraceCheckUtils]: 39: Hoare triple {38303#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:35,616 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-07 23:09:35,616 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:09:35,839 INFO L290 TraceCheckUtils]: 39: Hoare triple {38303#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:35,839 INFO L290 TraceCheckUtils]: 38: Hoare triple {38303#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:35,839 INFO L290 TraceCheckUtils]: 37: Hoare triple {38303#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {38303#false} is VALID [2022-04-07 23:09:35,839 INFO L272 TraceCheckUtils]: 36: Hoare triple {38303#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {38303#false} is VALID [2022-04-07 23:09:35,839 INFO L290 TraceCheckUtils]: 35: Hoare triple {38303#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:35,839 INFO L290 TraceCheckUtils]: 34: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,840 INFO L290 TraceCheckUtils]: 33: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,840 INFO L290 TraceCheckUtils]: 32: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,840 INFO L290 TraceCheckUtils]: 31: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,840 INFO L290 TraceCheckUtils]: 30: Hoare triple {38303#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {38303#false} is VALID [2022-04-07 23:09:35,840 INFO L290 TraceCheckUtils]: 29: Hoare triple {38308#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {38303#false} is VALID [2022-04-07 23:09:35,841 INFO L290 TraceCheckUtils]: 28: Hoare triple {38309#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38308#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:35,842 INFO L290 TraceCheckUtils]: 27: Hoare triple {38310#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38309#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:35,843 INFO L290 TraceCheckUtils]: 26: Hoare triple {38311#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38310#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:35,844 INFO L290 TraceCheckUtils]: 25: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {38311#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} is VALID [2022-04-07 23:09:35,844 INFO L290 TraceCheckUtils]: 24: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:35,844 INFO L290 TraceCheckUtils]: 23: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:35,845 INFO L290 TraceCheckUtils]: 22: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:35,845 INFO L290 TraceCheckUtils]: 21: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:35,845 INFO L290 TraceCheckUtils]: 20: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:35,846 INFO L290 TraceCheckUtils]: 19: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:35,846 INFO L290 TraceCheckUtils]: 18: Hoare triple {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:35,847 INFO L290 TraceCheckUtils]: 17: Hoare triple {38311#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38312#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 4294967299))} is VALID [2022-04-07 23:09:35,848 INFO L290 TraceCheckUtils]: 16: Hoare triple {38310#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38311#(<= main_~x~0 (+ (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296) 4294967298))} is VALID [2022-04-07 23:09:35,848 INFO L290 TraceCheckUtils]: 15: Hoare triple {38309#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38310#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:35,885 INFO L290 TraceCheckUtils]: 14: Hoare triple {38308#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38309#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:35,886 INFO L290 TraceCheckUtils]: 13: Hoare triple {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {38308#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-07 23:09:35,887 INFO L290 TraceCheckUtils]: 12: Hoare triple {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:09:35,887 INFO L290 TraceCheckUtils]: 11: Hoare triple {38302#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {38307#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-07 23:09:35,887 INFO L290 TraceCheckUtils]: 10: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,887 INFO L290 TraceCheckUtils]: 9: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,887 INFO L290 TraceCheckUtils]: 8: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,887 INFO L290 TraceCheckUtils]: 7: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,888 INFO L290 TraceCheckUtils]: 6: Hoare triple {38302#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {38302#true} is VALID [2022-04-07 23:09:35,888 INFO L290 TraceCheckUtils]: 5: Hoare triple {38302#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {38302#true} is VALID [2022-04-07 23:09:35,888 INFO L272 TraceCheckUtils]: 4: Hoare triple {38302#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:35,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {38302#true} {38302#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:35,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {38302#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:35,888 INFO L290 TraceCheckUtils]: 1: Hoare triple {38302#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {38302#true} is VALID [2022-04-07 23:09:35,888 INFO L272 TraceCheckUtils]: 0: Hoare triple {38302#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {38302#true} is VALID [2022-04-07 23:09:35,888 INFO L134 CoverageAnalysis]: Checked inductivity of 70 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-07 23:09:35,888 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1286224181] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:09:35,888 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:09:35,888 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 15 [2022-04-07 23:09:35,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [950490862] [2022-04-07 23:09:35,889 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:09:35,889 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 40 [2022-04-07 23:09:35,889 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:09:35,889 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:35,927 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:09:35,927 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-07 23:09:35,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:09:35,927 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-07 23:09:35,927 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2022-04-07 23:09:35,928 INFO L87 Difference]: Start difference. First operand 618 states and 871 transitions. Second operand has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:38,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:09:38,948 INFO L93 Difference]: Finished difference Result 908 states and 1343 transitions. [2022-04-07 23:09:38,948 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-07 23:09:38,948 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 40 [2022-04-07 23:09:38,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:09:38,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:38,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 107 transitions. [2022-04-07 23:09:38,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:38,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 107 transitions. [2022-04-07 23:09:38,950 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 107 transitions. [2022-04-07 23:09:39,182 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 107 edges. 107 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:09:39,202 INFO L225 Difference]: With dead ends: 908 [2022-04-07 23:09:39,202 INFO L226 Difference]: Without dead ends: 797 [2022-04-07 23:09:39,203 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=339, Invalid=1067, Unknown=0, NotChecked=0, Total=1406 [2022-04-07 23:09:39,203 INFO L913 BasicCegarLoop]: 23 mSDtfsCounter, 117 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 239 mSolverCounterSat, 67 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 117 SdHoareTripleChecker+Valid, 70 SdHoareTripleChecker+Invalid, 306 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 67 IncrementalHoareTripleChecker+Valid, 239 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-07 23:09:39,203 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [117 Valid, 70 Invalid, 306 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [67 Valid, 239 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-07 23:09:39,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 797 states. [2022-04-07 23:09:40,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 797 to 749. [2022-04-07 23:09:40,799 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:09:40,799 INFO L82 GeneralOperation]: Start isEquivalent. First operand 797 states. Second operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:40,800 INFO L74 IsIncluded]: Start isIncluded. First operand 797 states. Second operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:40,800 INFO L87 Difference]: Start difference. First operand 797 states. Second operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:40,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:09:40,818 INFO L93 Difference]: Finished difference Result 797 states and 1136 transitions. [2022-04-07 23:09:40,818 INFO L276 IsEmpty]: Start isEmpty. Operand 797 states and 1136 transitions. [2022-04-07 23:09:40,819 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:09:40,819 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:09:40,819 INFO L74 IsIncluded]: Start isIncluded. First operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 797 states. [2022-04-07 23:09:40,820 INFO L87 Difference]: Start difference. First operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 797 states. [2022-04-07 23:09:40,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:09:40,848 INFO L93 Difference]: Finished difference Result 797 states and 1136 transitions. [2022-04-07 23:09:40,848 INFO L276 IsEmpty]: Start isEmpty. Operand 797 states and 1136 transitions. [2022-04-07 23:09:40,849 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:09:40,849 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:09:40,849 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:09:40,849 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:09:40,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 749 states, 744 states have (on average 1.446236559139785) internal successors, (1076), 744 states have internal predecessors, (1076), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:40,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 749 states to 749 states and 1080 transitions. [2022-04-07 23:09:40,872 INFO L78 Accepts]: Start accepts. Automaton has 749 states and 1080 transitions. Word has length 40 [2022-04-07 23:09:40,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:09:40,873 INFO L478 AbstractCegarLoop]: Abstraction has 749 states and 1080 transitions. [2022-04-07 23:09:40,873 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.8) internal successors, (42), 14 states have internal predecessors, (42), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:40,873 INFO L276 IsEmpty]: Start isEmpty. Operand 749 states and 1080 transitions. [2022-04-07 23:09:40,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-07 23:09:40,873 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:09:40,873 INFO L499 BasicCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:09:40,877 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Forceful destruction successful, exit code 0 [2022-04-07 23:09:41,074 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,29 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:09:41,074 INFO L403 AbstractCegarLoop]: === Iteration 34 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:09:41,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:09:41,075 INFO L85 PathProgramCache]: Analyzing trace with hash 287258053, now seen corresponding path program 7 times [2022-04-07 23:09:41,075 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:09:41,075 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1556479777] [2022-04-07 23:09:41,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:09:41,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:09:41,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:09:41,429 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:09:41,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:09:41,443 INFO L290 TraceCheckUtils]: 0: Hoare triple {42189#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42165#true} is VALID [2022-04-07 23:09:41,443 INFO L290 TraceCheckUtils]: 1: Hoare triple {42165#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,443 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {42165#true} {42165#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,443 INFO L272 TraceCheckUtils]: 0: Hoare triple {42165#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42189#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:09:41,444 INFO L290 TraceCheckUtils]: 1: Hoare triple {42189#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42165#true} is VALID [2022-04-07 23:09:41,444 INFO L290 TraceCheckUtils]: 2: Hoare triple {42165#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,444 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42165#true} {42165#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,444 INFO L272 TraceCheckUtils]: 4: Hoare triple {42165#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,444 INFO L290 TraceCheckUtils]: 5: Hoare triple {42165#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42170#(= main_~y~0 0)} is VALID [2022-04-07 23:09:41,445 INFO L290 TraceCheckUtils]: 6: Hoare triple {42170#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42171#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:09:41,445 INFO L290 TraceCheckUtils]: 7: Hoare triple {42171#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42172#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:09:41,446 INFO L290 TraceCheckUtils]: 8: Hoare triple {42172#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42173#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:09:41,447 INFO L290 TraceCheckUtils]: 9: Hoare triple {42173#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42174#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:09:41,448 INFO L290 TraceCheckUtils]: 10: Hoare triple {42174#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42175#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:09:41,448 INFO L290 TraceCheckUtils]: 11: Hoare triple {42175#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42176#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:09:41,449 INFO L290 TraceCheckUtils]: 12: Hoare triple {42176#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42177#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:09:41,450 INFO L290 TraceCheckUtils]: 13: Hoare triple {42177#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42178#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:09:41,450 INFO L290 TraceCheckUtils]: 14: Hoare triple {42178#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42178#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:09:41,450 INFO L290 TraceCheckUtils]: 15: Hoare triple {42178#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {42179#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:09:41,451 INFO L290 TraceCheckUtils]: 16: Hoare triple {42179#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42180#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:09:41,452 INFO L290 TraceCheckUtils]: 17: Hoare triple {42180#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42181#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:09:41,453 INFO L290 TraceCheckUtils]: 18: Hoare triple {42181#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42182#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:09:41,453 INFO L290 TraceCheckUtils]: 19: Hoare triple {42182#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42183#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:09:41,454 INFO L290 TraceCheckUtils]: 20: Hoare triple {42183#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42184#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:09:41,455 INFO L290 TraceCheckUtils]: 21: Hoare triple {42184#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42185#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:09:41,455 INFO L290 TraceCheckUtils]: 22: Hoare triple {42185#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42186#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:09:41,456 INFO L290 TraceCheckUtils]: 23: Hoare triple {42186#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42187#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:09:41,456 INFO L290 TraceCheckUtils]: 24: Hoare triple {42187#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {42187#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-07 23:09:41,457 INFO L290 TraceCheckUtils]: 25: Hoare triple {42187#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42186#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-07 23:09:41,458 INFO L290 TraceCheckUtils]: 26: Hoare triple {42186#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42185#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-07 23:09:41,458 INFO L290 TraceCheckUtils]: 27: Hoare triple {42185#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42184#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:09:41,459 INFO L290 TraceCheckUtils]: 28: Hoare triple {42184#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42183#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:09:41,460 INFO L290 TraceCheckUtils]: 29: Hoare triple {42183#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42182#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:09:41,460 INFO L290 TraceCheckUtils]: 30: Hoare triple {42182#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42181#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:09:41,461 INFO L290 TraceCheckUtils]: 31: Hoare triple {42181#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42180#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:09:41,462 INFO L290 TraceCheckUtils]: 32: Hoare triple {42180#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42179#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:09:41,462 INFO L290 TraceCheckUtils]: 33: Hoare triple {42179#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42179#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:09:41,462 INFO L290 TraceCheckUtils]: 34: Hoare triple {42179#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42179#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:09:41,463 INFO L290 TraceCheckUtils]: 35: Hoare triple {42179#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {42188#(and (<= 7 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-07 23:09:41,464 INFO L290 TraceCheckUtils]: 36: Hoare triple {42188#(and (<= 7 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:41,464 INFO L272 TraceCheckUtils]: 37: Hoare triple {42166#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {42166#false} is VALID [2022-04-07 23:09:41,464 INFO L290 TraceCheckUtils]: 38: Hoare triple {42166#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42166#false} is VALID [2022-04-07 23:09:41,464 INFO L290 TraceCheckUtils]: 39: Hoare triple {42166#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:41,464 INFO L290 TraceCheckUtils]: 40: Hoare triple {42166#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:41,464 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 109 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 23:09:41,465 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:09:41,465 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1556479777] [2022-04-07 23:09:41,465 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1556479777] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:09:41,465 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [593883870] [2022-04-07 23:09:41,465 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-07 23:09:41,465 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:09:41,465 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:09:41,467 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:09:41,495 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-04-07 23:09:41,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:09:41,537 INFO L263 TraceCheckSpWp]: Trace formula consists of 186 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-07 23:09:41,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:09:41,549 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:09:41,881 INFO L272 TraceCheckUtils]: 0: Hoare triple {42165#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,882 INFO L290 TraceCheckUtils]: 1: Hoare triple {42165#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42165#true} is VALID [2022-04-07 23:09:41,882 INFO L290 TraceCheckUtils]: 2: Hoare triple {42165#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,882 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42165#true} {42165#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,882 INFO L272 TraceCheckUtils]: 4: Hoare triple {42165#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:41,882 INFO L290 TraceCheckUtils]: 5: Hoare triple {42165#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42165#true} is VALID [2022-04-07 23:09:41,883 INFO L290 TraceCheckUtils]: 6: Hoare triple {42165#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42211#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:09:41,883 INFO L290 TraceCheckUtils]: 7: Hoare triple {42211#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42215#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:09:41,884 INFO L290 TraceCheckUtils]: 8: Hoare triple {42215#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42219#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:09:41,885 INFO L290 TraceCheckUtils]: 9: Hoare triple {42219#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42223#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:09:41,885 INFO L290 TraceCheckUtils]: 10: Hoare triple {42223#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42227#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:09:41,886 INFO L290 TraceCheckUtils]: 11: Hoare triple {42227#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42231#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-07 23:09:41,886 INFO L290 TraceCheckUtils]: 12: Hoare triple {42231#(< 0 (mod (+ main_~x~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42235#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-07 23:09:41,887 INFO L290 TraceCheckUtils]: 13: Hoare triple {42235#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:09:41,887 INFO L290 TraceCheckUtils]: 14: Hoare triple {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:09:41,888 INFO L290 TraceCheckUtils]: 15: Hoare triple {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:09:41,888 INFO L290 TraceCheckUtils]: 16: Hoare triple {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42235#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-07 23:09:41,889 INFO L290 TraceCheckUtils]: 17: Hoare triple {42235#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42231#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-07 23:09:41,890 INFO L290 TraceCheckUtils]: 18: Hoare triple {42231#(< 0 (mod (+ main_~x~0 6) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42227#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:09:41,890 INFO L290 TraceCheckUtils]: 19: Hoare triple {42227#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42223#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:09:41,891 INFO L290 TraceCheckUtils]: 20: Hoare triple {42223#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42219#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:09:41,892 INFO L290 TraceCheckUtils]: 21: Hoare triple {42219#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42215#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:09:41,892 INFO L290 TraceCheckUtils]: 22: Hoare triple {42215#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42211#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:09:41,893 INFO L290 TraceCheckUtils]: 23: Hoare triple {42211#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,893 INFO L290 TraceCheckUtils]: 24: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,893 INFO L290 TraceCheckUtils]: 25: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,894 INFO L290 TraceCheckUtils]: 26: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,894 INFO L290 TraceCheckUtils]: 27: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,894 INFO L290 TraceCheckUtils]: 28: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,894 INFO L290 TraceCheckUtils]: 29: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,895 INFO L290 TraceCheckUtils]: 30: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,895 INFO L290 TraceCheckUtils]: 31: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,895 INFO L290 TraceCheckUtils]: 32: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,896 INFO L290 TraceCheckUtils]: 33: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:41,896 INFO L290 TraceCheckUtils]: 34: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:41,896 INFO L290 TraceCheckUtils]: 35: Hoare triple {42166#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {42166#false} is VALID [2022-04-07 23:09:41,896 INFO L290 TraceCheckUtils]: 36: Hoare triple {42166#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:41,896 INFO L272 TraceCheckUtils]: 37: Hoare triple {42166#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {42166#false} is VALID [2022-04-07 23:09:41,896 INFO L290 TraceCheckUtils]: 38: Hoare triple {42166#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42166#false} is VALID [2022-04-07 23:09:41,896 INFO L290 TraceCheckUtils]: 39: Hoare triple {42166#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:41,896 INFO L290 TraceCheckUtils]: 40: Hoare triple {42166#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:41,897 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 8 proven. 64 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-07 23:09:41,897 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:09:42,033 INFO L290 TraceCheckUtils]: 40: Hoare triple {42166#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:42,033 INFO L290 TraceCheckUtils]: 39: Hoare triple {42166#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:42,033 INFO L290 TraceCheckUtils]: 38: Hoare triple {42166#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {42166#false} is VALID [2022-04-07 23:09:42,033 INFO L272 TraceCheckUtils]: 37: Hoare triple {42166#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {42166#false} is VALID [2022-04-07 23:09:42,033 INFO L290 TraceCheckUtils]: 36: Hoare triple {42166#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:42,034 INFO L290 TraceCheckUtils]: 35: Hoare triple {42166#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {42166#false} is VALID [2022-04-07 23:09:42,034 INFO L290 TraceCheckUtils]: 34: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {42166#false} is VALID [2022-04-07 23:09:42,034 INFO L290 TraceCheckUtils]: 33: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,034 INFO L290 TraceCheckUtils]: 32: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,035 INFO L290 TraceCheckUtils]: 31: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,035 INFO L290 TraceCheckUtils]: 30: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,035 INFO L290 TraceCheckUtils]: 29: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,035 INFO L290 TraceCheckUtils]: 28: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,036 INFO L290 TraceCheckUtils]: 27: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,036 INFO L290 TraceCheckUtils]: 26: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,036 INFO L290 TraceCheckUtils]: 25: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,037 INFO L290 TraceCheckUtils]: 24: Hoare triple {42270#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,037 INFO L290 TraceCheckUtils]: 23: Hoare triple {42211#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42270#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:09:42,038 INFO L290 TraceCheckUtils]: 22: Hoare triple {42215#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42211#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:09:42,039 INFO L290 TraceCheckUtils]: 21: Hoare triple {42219#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42215#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:09:42,039 INFO L290 TraceCheckUtils]: 20: Hoare triple {42223#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42219#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:09:42,040 INFO L290 TraceCheckUtils]: 19: Hoare triple {42227#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42223#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:09:42,040 INFO L290 TraceCheckUtils]: 18: Hoare triple {42231#(< 0 (mod (+ main_~x~0 6) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42227#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:09:42,041 INFO L290 TraceCheckUtils]: 17: Hoare triple {42235#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42231#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-07 23:09:42,042 INFO L290 TraceCheckUtils]: 16: Hoare triple {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {42235#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-07 23:09:42,042 INFO L290 TraceCheckUtils]: 15: Hoare triple {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:09:42,042 INFO L290 TraceCheckUtils]: 14: Hoare triple {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:09:42,044 INFO L290 TraceCheckUtils]: 13: Hoare triple {42235#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42239#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:09:42,044 INFO L290 TraceCheckUtils]: 12: Hoare triple {42231#(< 0 (mod (+ main_~x~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42235#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-07 23:09:42,045 INFO L290 TraceCheckUtils]: 11: Hoare triple {42227#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42231#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-07 23:09:42,046 INFO L290 TraceCheckUtils]: 10: Hoare triple {42223#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42227#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:09:42,046 INFO L290 TraceCheckUtils]: 9: Hoare triple {42219#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42223#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:09:42,047 INFO L290 TraceCheckUtils]: 8: Hoare triple {42215#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42219#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:09:42,048 INFO L290 TraceCheckUtils]: 7: Hoare triple {42211#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42215#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:09:42,049 INFO L290 TraceCheckUtils]: 6: Hoare triple {42165#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {42211#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:09:42,049 INFO L290 TraceCheckUtils]: 5: Hoare triple {42165#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {42165#true} is VALID [2022-04-07 23:09:42,049 INFO L272 TraceCheckUtils]: 4: Hoare triple {42165#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:42,049 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {42165#true} {42165#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:42,049 INFO L290 TraceCheckUtils]: 2: Hoare triple {42165#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:42,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {42165#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {42165#true} is VALID [2022-04-07 23:09:42,049 INFO L272 TraceCheckUtils]: 0: Hoare triple {42165#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {42165#true} is VALID [2022-04-07 23:09:42,049 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 8 proven. 64 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-07 23:09:42,049 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [593883870] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:09:42,049 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:09:42,050 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 11, 11] total 31 [2022-04-07 23:09:42,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [322690952] [2022-04-07 23:09:42,050 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:09:42,050 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-07 23:09:42,050 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:09:42,050 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:09:42,099 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:09:42,100 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-07 23:09:42,100 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:09:42,100 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-07 23:09:42,100 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=869, Unknown=0, NotChecked=0, Total=930 [2022-04-07 23:09:42,100 INFO L87 Difference]: Start difference. First operand 749 states and 1080 transitions. Second operand has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:41,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:11:41,329 INFO L93 Difference]: Finished difference Result 1062 states and 1539 transitions. [2022-04-07 23:11:41,329 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 144 states. [2022-04-07 23:11:41,329 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-07 23:11:41,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 23:11:41,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:41,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 283 transitions. [2022-04-07 23:11:41,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:41,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 283 transitions. [2022-04-07 23:11:41,334 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 144 states and 283 transitions. [2022-04-07 23:11:43,894 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 283 edges. 283 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:11:43,920 INFO L225 Difference]: With dead ends: 1062 [2022-04-07 23:11:43,920 INFO L226 Difference]: Without dead ends: 941 [2022-04-07 23:11:43,921 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 170 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9823 ImplicationChecksByTransitivity, 51.8s TimeCoverageRelationStatistics Valid=2556, Invalid=26856, Unknown=0, NotChecked=0, Total=29412 [2022-04-07 23:11:43,921 INFO L913 BasicCegarLoop]: 20 mSDtfsCounter, 190 mSDsluCounter, 132 mSDsCounter, 0 mSdLazyCounter, 3254 mSolverCounterSat, 406 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 30.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 152 SdHoareTripleChecker+Invalid, 3660 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 406 IncrementalHoareTripleChecker+Valid, 3254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 30.5s IncrementalHoareTripleChecker+Time [2022-04-07 23:11:43,922 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [190 Valid, 152 Invalid, 3660 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [406 Valid, 3254 Invalid, 0 Unknown, 0 Unchecked, 30.5s Time] [2022-04-07 23:11:43,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 941 states. [2022-04-07 23:11:45,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 941 to 731. [2022-04-07 23:11:45,673 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 23:11:45,674 INFO L82 GeneralOperation]: Start isEquivalent. First operand 941 states. Second operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:45,674 INFO L74 IsIncluded]: Start isIncluded. First operand 941 states. Second operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:45,674 INFO L87 Difference]: Start difference. First operand 941 states. Second operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:45,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:11:45,699 INFO L93 Difference]: Finished difference Result 941 states and 1300 transitions. [2022-04-07 23:11:45,699 INFO L276 IsEmpty]: Start isEmpty. Operand 941 states and 1300 transitions. [2022-04-07 23:11:45,700 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:11:45,700 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:11:45,701 INFO L74 IsIncluded]: Start isIncluded. First operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 941 states. [2022-04-07 23:11:45,701 INFO L87 Difference]: Start difference. First operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 941 states. [2022-04-07 23:11:45,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 23:11:45,725 INFO L93 Difference]: Finished difference Result 941 states and 1300 transitions. [2022-04-07 23:11:45,725 INFO L276 IsEmpty]: Start isEmpty. Operand 941 states and 1300 transitions. [2022-04-07 23:11:45,726 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 23:11:45,726 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 23:11:45,726 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 23:11:45,726 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 23:11:45,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 731 states, 726 states have (on average 1.4338842975206612) internal successors, (1041), 726 states have internal predecessors, (1041), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:45,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1045 transitions. [2022-04-07 23:11:45,749 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1045 transitions. Word has length 41 [2022-04-07 23:11:45,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 23:11:45,750 INFO L478 AbstractCegarLoop]: Abstraction has 731 states and 1045 transitions. [2022-04-07 23:11:45,750 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 2.032258064516129) internal successors, (63), 30 states have internal predecessors, (63), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:45,750 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1045 transitions. [2022-04-07 23:11:45,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-04-07 23:11:45,750 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 23:11:45,751 INFO L499 BasicCegarLoop]: trace histogram [11, 9, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 23:11:45,767 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Ended with exit code 0 [2022-04-07 23:11:45,952 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,30 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:11:45,953 INFO L403 AbstractCegarLoop]: === Iteration 35 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 23:11:45,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 23:11:45,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1409959931, now seen corresponding path program 8 times [2022-04-07 23:11:45,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 23:11:45,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638823778] [2022-04-07 23:11:45,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 23:11:45,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 23:11:45,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:11:46,409 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 23:11:46,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:11:46,414 INFO L290 TraceCheckUtils]: 0: Hoare triple {46729#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46702#true} is VALID [2022-04-07 23:11:46,414 INFO L290 TraceCheckUtils]: 1: Hoare triple {46702#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,414 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {46702#true} {46702#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,415 INFO L272 TraceCheckUtils]: 0: Hoare triple {46702#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46729#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 23:11:46,415 INFO L290 TraceCheckUtils]: 1: Hoare triple {46729#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46702#true} is VALID [2022-04-07 23:11:46,415 INFO L290 TraceCheckUtils]: 2: Hoare triple {46702#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,415 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46702#true} {46702#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,415 INFO L272 TraceCheckUtils]: 4: Hoare triple {46702#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,416 INFO L290 TraceCheckUtils]: 5: Hoare triple {46702#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46707#(= main_~y~0 0)} is VALID [2022-04-07 23:11:46,416 INFO L290 TraceCheckUtils]: 6: Hoare triple {46707#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46708#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-07 23:11:46,417 INFO L290 TraceCheckUtils]: 7: Hoare triple {46708#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46709#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-07 23:11:46,417 INFO L290 TraceCheckUtils]: 8: Hoare triple {46709#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46710#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-07 23:11:46,418 INFO L290 TraceCheckUtils]: 9: Hoare triple {46710#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46711#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-07 23:11:46,419 INFO L290 TraceCheckUtils]: 10: Hoare triple {46711#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46712#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-07 23:11:46,419 INFO L290 TraceCheckUtils]: 11: Hoare triple {46712#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46713#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-07 23:11:46,420 INFO L290 TraceCheckUtils]: 12: Hoare triple {46713#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46714#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-07 23:11:46,421 INFO L290 TraceCheckUtils]: 13: Hoare triple {46714#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46715#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-07 23:11:46,421 INFO L290 TraceCheckUtils]: 14: Hoare triple {46715#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46716#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-07 23:11:46,422 INFO L290 TraceCheckUtils]: 15: Hoare triple {46716#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46717#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-07 23:11:46,423 INFO L290 TraceCheckUtils]: 16: Hoare triple {46717#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46718#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:11:46,423 INFO L290 TraceCheckUtils]: 17: Hoare triple {46718#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46718#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-07 23:11:46,424 INFO L290 TraceCheckUtils]: 18: Hoare triple {46718#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {46719#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-07 23:11:46,424 INFO L290 TraceCheckUtils]: 19: Hoare triple {46719#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46720#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-07 23:11:46,425 INFO L290 TraceCheckUtils]: 20: Hoare triple {46720#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46721#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-07 23:11:46,426 INFO L290 TraceCheckUtils]: 21: Hoare triple {46721#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46722#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-07 23:11:46,426 INFO L290 TraceCheckUtils]: 22: Hoare triple {46722#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46723#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-07 23:11:46,427 INFO L290 TraceCheckUtils]: 23: Hoare triple {46723#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46724#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-07 23:11:46,427 INFO L290 TraceCheckUtils]: 24: Hoare triple {46724#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46725#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-07 23:11:46,428 INFO L290 TraceCheckUtils]: 25: Hoare triple {46725#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46726#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-07 23:11:46,429 INFO L290 TraceCheckUtils]: 26: Hoare triple {46726#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46727#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-07 23:11:46,429 INFO L290 TraceCheckUtils]: 27: Hoare triple {46727#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46728#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-07 23:11:46,430 INFO L290 TraceCheckUtils]: 28: Hoare triple {46728#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,430 INFO L290 TraceCheckUtils]: 29: Hoare triple {46703#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46703#false} is VALID [2022-04-07 23:11:46,430 INFO L290 TraceCheckUtils]: 30: Hoare triple {46703#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46703#false} is VALID [2022-04-07 23:11:46,430 INFO L290 TraceCheckUtils]: 31: Hoare triple {46703#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46703#false} is VALID [2022-04-07 23:11:46,430 INFO L290 TraceCheckUtils]: 32: Hoare triple {46703#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46703#false} is VALID [2022-04-07 23:11:46,430 INFO L290 TraceCheckUtils]: 33: Hoare triple {46703#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,431 INFO L290 TraceCheckUtils]: 34: Hoare triple {46703#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,431 INFO L290 TraceCheckUtils]: 35: Hoare triple {46703#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {46703#false} is VALID [2022-04-07 23:11:46,431 INFO L290 TraceCheckUtils]: 36: Hoare triple {46703#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,431 INFO L272 TraceCheckUtils]: 37: Hoare triple {46703#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {46703#false} is VALID [2022-04-07 23:11:46,431 INFO L290 TraceCheckUtils]: 38: Hoare triple {46703#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46703#false} is VALID [2022-04-07 23:11:46,431 INFO L290 TraceCheckUtils]: 39: Hoare triple {46703#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,431 INFO L290 TraceCheckUtils]: 40: Hoare triple {46703#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,431 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-07 23:11:46,432 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 23:11:46,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638823778] [2022-04-07 23:11:46,432 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1638823778] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 23:11:46,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [705728766] [2022-04-07 23:11:46,432 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 23:11:46,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 23:11:46,432 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 23:11:46,433 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 23:11:46,458 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-04-07 23:11:46,496 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 23:11:46,496 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 23:11:46,497 INFO L263 TraceCheckSpWp]: Trace formula consists of 186 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-07 23:11:46,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 23:11:46,510 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 23:11:46,949 INFO L272 TraceCheckUtils]: 0: Hoare triple {46702#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,950 INFO L290 TraceCheckUtils]: 1: Hoare triple {46702#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46702#true} is VALID [2022-04-07 23:11:46,950 INFO L290 TraceCheckUtils]: 2: Hoare triple {46702#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,950 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46702#true} {46702#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,950 INFO L272 TraceCheckUtils]: 4: Hoare triple {46702#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:46,950 INFO L290 TraceCheckUtils]: 5: Hoare triple {46702#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46702#true} is VALID [2022-04-07 23:11:46,950 INFO L290 TraceCheckUtils]: 6: Hoare triple {46702#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46702#true} is VALID [2022-04-07 23:11:46,950 INFO L290 TraceCheckUtils]: 7: Hoare triple {46702#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46702#true} is VALID [2022-04-07 23:11:46,951 INFO L290 TraceCheckUtils]: 8: Hoare triple {46702#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46757#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:11:46,952 INFO L290 TraceCheckUtils]: 9: Hoare triple {46757#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46761#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:11:46,953 INFO L290 TraceCheckUtils]: 10: Hoare triple {46761#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46765#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:11:46,953 INFO L290 TraceCheckUtils]: 11: Hoare triple {46765#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46769#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:11:46,954 INFO L290 TraceCheckUtils]: 12: Hoare triple {46769#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46773#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:11:46,955 INFO L290 TraceCheckUtils]: 13: Hoare triple {46773#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46777#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-07 23:11:46,955 INFO L290 TraceCheckUtils]: 14: Hoare triple {46777#(< 0 (mod (+ main_~x~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46781#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-07 23:11:46,956 INFO L290 TraceCheckUtils]: 15: Hoare triple {46781#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46785#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:11:46,957 INFO L290 TraceCheckUtils]: 16: Hoare triple {46785#(< 0 (mod (+ main_~x~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-07 23:11:46,957 INFO L290 TraceCheckUtils]: 17: Hoare triple {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-07 23:11:46,957 INFO L290 TraceCheckUtils]: 18: Hoare triple {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-07 23:11:46,958 INFO L290 TraceCheckUtils]: 19: Hoare triple {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46785#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:11:46,959 INFO L290 TraceCheckUtils]: 20: Hoare triple {46785#(< 0 (mod (+ main_~x~0 8) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46781#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-07 23:11:46,959 INFO L290 TraceCheckUtils]: 21: Hoare triple {46781#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46777#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-07 23:11:46,960 INFO L290 TraceCheckUtils]: 22: Hoare triple {46777#(< 0 (mod (+ main_~x~0 6) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46773#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:11:46,961 INFO L290 TraceCheckUtils]: 23: Hoare triple {46773#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46769#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:11:46,961 INFO L290 TraceCheckUtils]: 24: Hoare triple {46769#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46765#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:11:46,962 INFO L290 TraceCheckUtils]: 25: Hoare triple {46765#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46761#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:11:46,962 INFO L290 TraceCheckUtils]: 26: Hoare triple {46761#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46757#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:11:46,963 INFO L290 TraceCheckUtils]: 27: Hoare triple {46757#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:46,963 INFO L290 TraceCheckUtils]: 28: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:46,964 INFO L290 TraceCheckUtils]: 29: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:46,964 INFO L290 TraceCheckUtils]: 30: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:46,964 INFO L290 TraceCheckUtils]: 31: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:46,964 INFO L290 TraceCheckUtils]: 32: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:46,965 INFO L290 TraceCheckUtils]: 33: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:46,965 INFO L290 TraceCheckUtils]: 34: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,965 INFO L290 TraceCheckUtils]: 35: Hoare triple {46703#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {46703#false} is VALID [2022-04-07 23:11:46,965 INFO L290 TraceCheckUtils]: 36: Hoare triple {46703#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,965 INFO L272 TraceCheckUtils]: 37: Hoare triple {46703#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {46703#false} is VALID [2022-04-07 23:11:46,965 INFO L290 TraceCheckUtils]: 38: Hoare triple {46703#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46703#false} is VALID [2022-04-07 23:11:46,965 INFO L290 TraceCheckUtils]: 39: Hoare triple {46703#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,965 INFO L290 TraceCheckUtils]: 40: Hoare triple {46703#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:46,966 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 27 proven. 81 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-04-07 23:11:46,966 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 23:11:47,107 INFO L290 TraceCheckUtils]: 40: Hoare triple {46703#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:47,107 INFO L290 TraceCheckUtils]: 39: Hoare triple {46703#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:47,108 INFO L290 TraceCheckUtils]: 38: Hoare triple {46703#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {46703#false} is VALID [2022-04-07 23:11:47,108 INFO L272 TraceCheckUtils]: 37: Hoare triple {46703#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~y~0_13 4294967296) 0) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~y~0=v_main_~y~0_13} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0] {46703#false} is VALID [2022-04-07 23:11:47,108 INFO L290 TraceCheckUtils]: 36: Hoare triple {46703#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:47,108 INFO L290 TraceCheckUtils]: 35: Hoare triple {46703#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] {46703#false} is VALID [2022-04-07 23:11:47,108 INFO L290 TraceCheckUtils]: 34: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {46703#false} is VALID [2022-04-07 23:11:47,108 INFO L290 TraceCheckUtils]: 33: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:47,109 INFO L290 TraceCheckUtils]: 32: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:47,109 INFO L290 TraceCheckUtils]: 31: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:47,109 INFO L290 TraceCheckUtils]: 30: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:47,109 INFO L290 TraceCheckUtils]: 29: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:47,110 INFO L290 TraceCheckUtils]: 28: Hoare triple {46823#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:47,110 INFO L290 TraceCheckUtils]: 27: Hoare triple {46757#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46823#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-07 23:11:47,111 INFO L290 TraceCheckUtils]: 26: Hoare triple {46761#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46757#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:11:47,112 INFO L290 TraceCheckUtils]: 25: Hoare triple {46765#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46761#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:11:47,112 INFO L290 TraceCheckUtils]: 24: Hoare triple {46769#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46765#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:11:47,113 INFO L290 TraceCheckUtils]: 23: Hoare triple {46773#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46769#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:11:47,114 INFO L290 TraceCheckUtils]: 22: Hoare triple {46777#(< 0 (mod (+ main_~x~0 6) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46773#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:11:47,114 INFO L290 TraceCheckUtils]: 21: Hoare triple {46781#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46777#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-07 23:11:47,115 INFO L290 TraceCheckUtils]: 20: Hoare triple {46785#(< 0 (mod (+ main_~x~0 8) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46781#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-07 23:11:47,116 INFO L290 TraceCheckUtils]: 19: Hoare triple {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {46785#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:11:47,116 INFO L290 TraceCheckUtils]: 18: Hoare triple {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-07 23:11:47,116 INFO L290 TraceCheckUtils]: 17: Hoare triple {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-07 23:11:47,117 INFO L290 TraceCheckUtils]: 16: Hoare triple {46785#(< 0 (mod (+ main_~x~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46789#(< 0 (mod (+ main_~x~0 9) 4294967296))} is VALID [2022-04-07 23:11:47,118 INFO L290 TraceCheckUtils]: 15: Hoare triple {46781#(< 0 (mod (+ 7 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46785#(< 0 (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-07 23:11:47,118 INFO L290 TraceCheckUtils]: 14: Hoare triple {46777#(< 0 (mod (+ main_~x~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46781#(< 0 (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-07 23:11:47,119 INFO L290 TraceCheckUtils]: 13: Hoare triple {46773#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46777#(< 0 (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-07 23:11:47,120 INFO L290 TraceCheckUtils]: 12: Hoare triple {46769#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46773#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-07 23:11:47,121 INFO L290 TraceCheckUtils]: 11: Hoare triple {46765#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46769#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-07 23:11:47,121 INFO L290 TraceCheckUtils]: 10: Hoare triple {46761#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46765#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-07 23:11:47,122 INFO L290 TraceCheckUtils]: 9: Hoare triple {46757#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46761#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-07 23:11:47,122 INFO L290 TraceCheckUtils]: 8: Hoare triple {46702#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46757#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-07 23:11:47,123 INFO L290 TraceCheckUtils]: 7: Hoare triple {46702#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46702#true} is VALID [2022-04-07 23:11:47,123 INFO L290 TraceCheckUtils]: 6: Hoare triple {46702#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {46702#true} is VALID [2022-04-07 23:11:47,123 INFO L290 TraceCheckUtils]: 5: Hoare triple {46702#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {46702#true} is VALID [2022-04-07 23:11:47,123 INFO L272 TraceCheckUtils]: 4: Hoare triple {46702#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:47,123 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {46702#true} {46702#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:47,123 INFO L290 TraceCheckUtils]: 2: Hoare triple {46702#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:47,123 INFO L290 TraceCheckUtils]: 1: Hoare triple {46702#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {46702#true} is VALID [2022-04-07 23:11:47,123 INFO L272 TraceCheckUtils]: 0: Hoare triple {46702#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {46702#true} is VALID [2022-04-07 23:11:47,123 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 27 proven. 81 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-04-07 23:11:47,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [705728766] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 23:11:47,123 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 23:11:47,124 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 12, 12] total 35 [2022-04-07 23:11:47,124 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1352824811] [2022-04-07 23:11:47,124 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 23:11:47,124 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 1.7428571428571429) internal successors, (61), 34 states have internal predecessors, (61), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 41 [2022-04-07 23:11:47,124 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 23:11:47,125 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 35 states have (on average 1.7428571428571429) internal successors, (61), 34 states have internal predecessors, (61), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 23:11:47,177 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 23:11:47,178 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-07 23:11:47,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 23:11:47,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-07 23:11:47,178 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=1114, Unknown=0, NotChecked=0, Total=1190 [2022-04-07 23:11:47,178 INFO L87 Difference]: Start difference. First operand 731 states and 1045 transitions. Second operand has 35 states, 35 states have (on average 1.7428571428571429) internal successors, (61), 34 states have internal predecessors, (61), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)