/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops/invert_string-3.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-07 21:59:26,095 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-07 21:59:26,097 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-07 21:59:26,138 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-07 21:59:26,139 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-07 21:59:26,140 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-07 21:59:26,142 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-07 21:59:26,143 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-07 21:59:26,144 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-07 21:59:26,144 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-07 21:59:26,145 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-07 21:59:26,146 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-07 21:59:26,146 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-07 21:59:26,147 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-07 21:59:26,148 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-07 21:59:26,149 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-07 21:59:26,149 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-07 21:59:26,150 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-07 21:59:26,151 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-07 21:59:26,152 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-07 21:59:26,153 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-07 21:59:26,154 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-07 21:59:26,155 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-07 21:59:26,156 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-07 21:59:26,156 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-07 21:59:26,158 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-07 21:59:26,164 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-07 21:59:26,165 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-07 21:59:26,166 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-07 21:59:26,167 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-07 21:59:26,187 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-07 21:59:26,187 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-07 21:59:26,188 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-07 21:59:26,188 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-07 21:59:26,189 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-07 21:59:26,189 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-07 21:59:26,189 INFO L138 SettingsManager]: * Use SBE=true [2022-04-07 21:59:26,189 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-07 21:59:26,190 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-07 21:59:26,190 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-07 21:59:26,190 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-07 21:59:26,190 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-07 21:59:26,190 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-07 21:59:26,191 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-07 21:59:26,191 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-07 21:59:26,191 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-07 21:59:26,191 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-07 21:59:26,192 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-07 21:59:26,192 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-07 21:59:26,192 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 21:59:26,192 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-07 21:59:26,193 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-07 21:59:26,193 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-07 21:59:26,193 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-07 21:59:26,193 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-07 21:59:26,193 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-07 21:59:26,194 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-07 21:59:26,194 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-07 21:59:26,195 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-07 21:59:26,195 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-07 21:59:26,381 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-07 21:59:26,404 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-07 21:59:26,405 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-07 21:59:26,406 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-07 21:59:26,407 INFO L275 PluginConnector]: CDTParser initialized [2022-04-07 21:59:26,408 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/invert_string-3.c [2022-04-07 21:59:26,455 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f40611194/85289f47fb154a768296dcd82f48bc60/FLAG39dcc21d5 [2022-04-07 21:59:26,783 INFO L306 CDTParser]: Found 1 translation units. [2022-04-07 21:59:26,783 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c [2022-04-07 21:59:26,787 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f40611194/85289f47fb154a768296dcd82f48bc60/FLAG39dcc21d5 [2022-04-07 21:59:26,797 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f40611194/85289f47fb154a768296dcd82f48bc60 [2022-04-07 21:59:26,799 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-07 21:59:26,800 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-07 21:59:26,801 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-07 21:59:26,801 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-07 21:59:26,811 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-07 21:59:26,812 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 09:59:26" (1/1) ... [2022-04-07 21:59:26,813 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@790be96c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:26, skipping insertion in model container [2022-04-07 21:59:26,813 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.04 09:59:26" (1/1) ... [2022-04-07 21:59:26,817 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-07 21:59:26,828 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-07 21:59:26,967 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c[327,340] [2022-04-07 21:59:26,989 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 21:59:26,996 INFO L203 MainTranslator]: Completed pre-run [2022-04-07 21:59:27,006 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/invert_string-3.c[327,340] [2022-04-07 21:59:27,013 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-07 21:59:27,025 INFO L208 MainTranslator]: Completed translation [2022-04-07 21:59:27,026 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27 WrapperNode [2022-04-07 21:59:27,026 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-07 21:59:27,027 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-07 21:59:27,027 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-07 21:59:27,027 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-07 21:59:27,036 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,036 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,044 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,044 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,060 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,064 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,065 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,066 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-07 21:59:27,070 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-07 21:59:27,070 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-07 21:59:27,070 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-07 21:59:27,071 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,078 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-07 21:59:27,087 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 21:59:27,100 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-07 21:59:27,102 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-07 21:59:27,126 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-07 21:59:27,128 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-07 21:59:27,128 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-07 21:59:27,128 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-07 21:59:27,128 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-07 21:59:27,128 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-07 21:59:27,128 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-07 21:59:27,128 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-07 21:59:27,131 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-07 21:59:27,131 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-07 21:59:27,131 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-07 21:59:27,131 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-07 21:59:27,131 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-07 21:59:27,131 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-07 21:59:27,132 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-07 21:59:27,132 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-07 21:59:27,132 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-07 21:59:27,132 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-07 21:59:27,132 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-07 21:59:27,181 INFO L234 CfgBuilder]: Building ICFG [2022-04-07 21:59:27,183 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-07 21:59:27,319 INFO L275 CfgBuilder]: Performing block encoding [2022-04-07 21:59:27,325 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-07 21:59:27,325 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-07 21:59:27,327 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:59:27 BoogieIcfgContainer [2022-04-07 21:59:27,327 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-07 21:59:27,327 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-07 21:59:27,327 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-07 21:59:27,328 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-07 21:59:27,331 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:59:27" (1/1) ... [2022-04-07 21:59:27,333 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-07 21:59:27,359 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 09:59:27 BasicIcfg [2022-04-07 21:59:27,359 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-07 21:59:27,360 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-07 21:59:27,360 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-07 21:59:27,363 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-07 21:59:27,363 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.04 09:59:26" (1/4) ... [2022-04-07 21:59:27,364 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68ed0289 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 09:59:27, skipping insertion in model container [2022-04-07 21:59:27,364 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.04 09:59:27" (2/4) ... [2022-04-07 21:59:27,364 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68ed0289 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.04 09:59:27, skipping insertion in model container [2022-04-07 21:59:27,364 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.04 09:59:27" (3/4) ... [2022-04-07 21:59:27,365 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68ed0289 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.04 09:59:27, skipping insertion in model container [2022-04-07 21:59:27,365 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 07.04 09:59:27" (4/4) ... [2022-04-07 21:59:27,366 INFO L111 eAbstractionObserver]: Analyzing ICFG invert_string-3.cqvasr [2022-04-07 21:59:27,370 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-07 21:59:27,370 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-07 21:59:27,450 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-07 21:59:27,456 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-07 21:59:27,457 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-07 21:59:27,490 INFO L276 IsEmpty]: Start isEmpty. Operand has 27 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:27,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 21:59:27,496 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:59:27,496 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:59:27,497 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:59:27,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:59:27,508 INFO L85 PathProgramCache]: Analyzing trace with hash 677474136, now seen corresponding path program 1 times [2022-04-07 21:59:27,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:59:27,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641264796] [2022-04-07 21:59:27,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:59:27,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:59:27,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:27,768 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:59:27,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:27,792 INFO L290 TraceCheckUtils]: 0: Hoare triple {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30#true} is VALID [2022-04-07 21:59:27,792 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 21:59:27,792 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30#true} {30#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 21:59:27,797 INFO L272 TraceCheckUtils]: 0: Hoare triple {30#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:59:27,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {35#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30#true} is VALID [2022-04-07 21:59:27,798 INFO L290 TraceCheckUtils]: 2: Hoare triple {30#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 21:59:27,798 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30#true} {30#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 21:59:27,799 INFO L272 TraceCheckUtils]: 4: Hoare triple {30#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#true} is VALID [2022-04-07 21:59:27,799 INFO L290 TraceCheckUtils]: 5: Hoare triple {30#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {30#true} is VALID [2022-04-07 21:59:27,802 INFO L290 TraceCheckUtils]: 6: Hoare triple {30#true} [76] L18-3-->L18-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-07 21:59:27,802 INFO L290 TraceCheckUtils]: 7: Hoare triple {31#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {31#false} is VALID [2022-04-07 21:59:27,803 INFO L290 TraceCheckUtils]: 8: Hoare triple {31#false} [81] L26-3-->L26-4: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-07 21:59:27,803 INFO L290 TraceCheckUtils]: 9: Hoare triple {31#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {31#false} is VALID [2022-04-07 21:59:27,803 INFO L290 TraceCheckUtils]: 10: Hoare triple {31#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {31#false} is VALID [2022-04-07 21:59:27,803 INFO L272 TraceCheckUtils]: 11: Hoare triple {31#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {31#false} is VALID [2022-04-07 21:59:27,804 INFO L290 TraceCheckUtils]: 12: Hoare triple {31#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {31#false} is VALID [2022-04-07 21:59:27,804 INFO L290 TraceCheckUtils]: 13: Hoare triple {31#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-07 21:59:27,804 INFO L290 TraceCheckUtils]: 14: Hoare triple {31#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#false} is VALID [2022-04-07 21:59:27,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:59:27,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:59:27,805 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641264796] [2022-04-07 21:59:27,806 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641264796] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:59:27,806 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:59:27,806 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-07 21:59:27,808 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1633747207] [2022-04-07 21:59:27,809 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:59:27,813 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 21:59:27,815 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:59:27,818 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:27,847 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:27,847 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-07 21:59:27,848 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:59:27,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-07 21:59:27,877 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 21:59:27,879 INFO L87 Difference]: Start difference. First operand has 27 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:28,000 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2022-04-07 21:59:28,000 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-07 21:59:28,001 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 21:59:28,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:59:28,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 57 transitions. [2022-04-07 21:59:28,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 57 transitions. [2022-04-07 21:59:28,029 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 57 transitions. [2022-04-07 21:59:28,109 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:28,117 INFO L225 Difference]: With dead ends: 46 [2022-04-07 21:59:28,118 INFO L226 Difference]: Without dead ends: 22 [2022-04-07 21:59:28,121 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-07 21:59:28,125 INFO L913 BasicCegarLoop]: 28 mSDtfsCounter, 20 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:59:28,127 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 31 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:59:28,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-07 21:59:28,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-07 21:59:28,158 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:59:28,159 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:28,160 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:28,160 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:28,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:28,163 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-07 21:59:28,163 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-07 21:59:28,164 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:28,164 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:28,164 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 21:59:28,165 INFO L87 Difference]: Start difference. First operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 22 states. [2022-04-07 21:59:28,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:28,167 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-07 21:59:28,167 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-07 21:59:28,168 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:28,168 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:28,168 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:59:28,168 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:59:28,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:28,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2022-04-07 21:59:28,172 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 15 [2022-04-07 21:59:28,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:59:28,174 INFO L478 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2022-04-07 21:59:28,175 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,175 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-04-07 21:59:28,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-07 21:59:28,176 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:59:28,176 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:59:28,176 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-07 21:59:28,177 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:59:28,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:59:28,180 INFO L85 PathProgramCache]: Analyzing trace with hash -242476646, now seen corresponding path program 1 times [2022-04-07 21:59:28,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:59:28,181 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300141803] [2022-04-07 21:59:28,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:59:28,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:59:28,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:28,435 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:59:28,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:28,450 INFO L290 TraceCheckUtils]: 0: Hoare triple {179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {172#true} is VALID [2022-04-07 21:59:28,451 INFO L290 TraceCheckUtils]: 1: Hoare triple {172#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {172#true} is VALID [2022-04-07 21:59:28,451 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {172#true} {172#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {172#true} is VALID [2022-04-07 21:59:28,452 INFO L272 TraceCheckUtils]: 0: Hoare triple {172#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:59:28,453 INFO L290 TraceCheckUtils]: 1: Hoare triple {179#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {172#true} is VALID [2022-04-07 21:59:28,453 INFO L290 TraceCheckUtils]: 2: Hoare triple {172#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {172#true} is VALID [2022-04-07 21:59:28,453 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {172#true} {172#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {172#true} is VALID [2022-04-07 21:59:28,453 INFO L272 TraceCheckUtils]: 4: Hoare triple {172#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {172#true} is VALID [2022-04-07 21:59:28,454 INFO L290 TraceCheckUtils]: 5: Hoare triple {172#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {177#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 21:59:28,455 INFO L290 TraceCheckUtils]: 6: Hoare triple {177#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {177#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 21:59:28,457 INFO L290 TraceCheckUtils]: 7: Hoare triple {177#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {178#(and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 21:59:28,458 INFO L290 TraceCheckUtils]: 8: Hoare triple {178#(and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {173#false} is VALID [2022-04-07 21:59:28,459 INFO L290 TraceCheckUtils]: 9: Hoare triple {173#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {173#false} is VALID [2022-04-07 21:59:28,459 INFO L290 TraceCheckUtils]: 10: Hoare triple {173#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {173#false} is VALID [2022-04-07 21:59:28,459 INFO L272 TraceCheckUtils]: 11: Hoare triple {173#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {173#false} is VALID [2022-04-07 21:59:28,460 INFO L290 TraceCheckUtils]: 12: Hoare triple {173#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {173#false} is VALID [2022-04-07 21:59:28,460 INFO L290 TraceCheckUtils]: 13: Hoare triple {173#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {173#false} is VALID [2022-04-07 21:59:28,460 INFO L290 TraceCheckUtils]: 14: Hoare triple {173#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {173#false} is VALID [2022-04-07 21:59:28,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-07 21:59:28,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:59:28,461 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300141803] [2022-04-07 21:59:28,462 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1300141803] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:59:28,462 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:59:28,462 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-07 21:59:28,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427968377] [2022-04-07 21:59:28,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:59:28,465 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 21:59:28,465 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:59:28,466 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,483 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:28,484 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-07 21:59:28,484 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:59:28,484 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-07 21:59:28,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:59:28,486 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:28,690 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2022-04-07 21:59:28,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-07 21:59:28,690 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-07 21:59:28,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:59:28,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 38 transitions. [2022-04-07 21:59:28,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 38 transitions. [2022-04-07 21:59:28,695 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 38 transitions. [2022-04-07 21:59:28,737 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:28,739 INFO L225 Difference]: With dead ends: 35 [2022-04-07 21:59:28,739 INFO L226 Difference]: Without dead ends: 24 [2022-04-07 21:59:28,743 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-07 21:59:28,744 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 30 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-07 21:59:28,745 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 28 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-07 21:59:28,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2022-04-07 21:59:28,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 23. [2022-04-07 21:59:28,765 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:59:28,766 INFO L82 GeneralOperation]: Start isEquivalent. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:28,766 INFO L74 IsIncluded]: Start isIncluded. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:28,766 INFO L87 Difference]: Start difference. First operand 24 states. Second operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:28,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:28,768 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-07 21:59:28,768 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-07 21:59:28,768 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:28,768 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:28,769 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-07 21:59:28,769 INFO L87 Difference]: Start difference. First operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 24 states. [2022-04-07 21:59:28,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:28,770 INFO L93 Difference]: Finished difference Result 24 states and 26 transitions. [2022-04-07 21:59:28,771 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-07 21:59:28,771 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:28,771 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:28,771 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:59:28,771 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:59:28,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 17 states have (on average 1.1764705882352942) internal successors, (20), 17 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:28,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2022-04-07 21:59:28,773 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 15 [2022-04-07 21:59:28,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:59:28,773 INFO L478 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2022-04-07 21:59:28,774 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,774 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2022-04-07 21:59:28,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-07 21:59:28,774 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:59:28,775 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:59:28,775 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-07 21:59:28,775 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:59:28,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:59:28,776 INFO L85 PathProgramCache]: Analyzing trace with hash 1931903288, now seen corresponding path program 1 times [2022-04-07 21:59:28,776 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:59:28,776 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554807502] [2022-04-07 21:59:28,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:59:28,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:59:28,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:28,901 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:59:28,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:28,921 INFO L290 TraceCheckUtils]: 0: Hoare triple {321#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {315#true} is VALID [2022-04-07 21:59:28,921 INFO L290 TraceCheckUtils]: 1: Hoare triple {315#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {315#true} is VALID [2022-04-07 21:59:28,921 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {315#true} {315#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {315#true} is VALID [2022-04-07 21:59:28,922 INFO L272 TraceCheckUtils]: 0: Hoare triple {315#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {321#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:59:28,922 INFO L290 TraceCheckUtils]: 1: Hoare triple {321#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {315#true} is VALID [2022-04-07 21:59:28,923 INFO L290 TraceCheckUtils]: 2: Hoare triple {315#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {315#true} is VALID [2022-04-07 21:59:28,923 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {315#true} {315#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {315#true} is VALID [2022-04-07 21:59:28,923 INFO L272 TraceCheckUtils]: 4: Hoare triple {315#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {315#true} is VALID [2022-04-07 21:59:28,924 INFO L290 TraceCheckUtils]: 5: Hoare triple {315#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {320#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} is VALID [2022-04-07 21:59:28,925 INFO L290 TraceCheckUtils]: 6: Hoare triple {320#(and (<= 5 main_~max~0) (<= main_~max~0 5) (= main_~i~0 0))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {316#false} is VALID [2022-04-07 21:59:28,925 INFO L290 TraceCheckUtils]: 7: Hoare triple {316#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {316#false} is VALID [2022-04-07 21:59:28,926 INFO L290 TraceCheckUtils]: 8: Hoare triple {316#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {316#false} is VALID [2022-04-07 21:59:28,926 INFO L290 TraceCheckUtils]: 9: Hoare triple {316#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {316#false} is VALID [2022-04-07 21:59:28,926 INFO L290 TraceCheckUtils]: 10: Hoare triple {316#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {316#false} is VALID [2022-04-07 21:59:28,926 INFO L290 TraceCheckUtils]: 11: Hoare triple {316#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {316#false} is VALID [2022-04-07 21:59:28,927 INFO L290 TraceCheckUtils]: 12: Hoare triple {316#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {316#false} is VALID [2022-04-07 21:59:28,927 INFO L272 TraceCheckUtils]: 13: Hoare triple {316#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {316#false} is VALID [2022-04-07 21:59:28,927 INFO L290 TraceCheckUtils]: 14: Hoare triple {316#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {316#false} is VALID [2022-04-07 21:59:28,927 INFO L290 TraceCheckUtils]: 15: Hoare triple {316#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {316#false} is VALID [2022-04-07 21:59:28,928 INFO L290 TraceCheckUtils]: 16: Hoare triple {316#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {316#false} is VALID [2022-04-07 21:59:28,928 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 21:59:28,928 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:59:28,928 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1554807502] [2022-04-07 21:59:28,928 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1554807502] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-07 21:59:28,928 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-07 21:59:28,929 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-07 21:59:28,929 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570997558] [2022-04-07 21:59:28,929 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-07 21:59:28,930 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 21:59:28,930 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:59:28,930 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:28,946 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:28,947 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-07 21:59:28,947 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:59:28,947 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-07 21:59:28,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-07 21:59:28,948 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:29,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:29,044 INFO L93 Difference]: Finished difference Result 40 states and 44 transitions. [2022-04-07 21:59:29,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-07 21:59:29,044 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-07 21:59:29,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:59:29,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:29,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 42 transitions. [2022-04-07 21:59:29,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:29,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 42 transitions. [2022-04-07 21:59:29,048 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 42 transitions. [2022-04-07 21:59:29,087 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:29,088 INFO L225 Difference]: With dead ends: 40 [2022-04-07 21:59:29,088 INFO L226 Difference]: Without dead ends: 25 [2022-04-07 21:59:29,088 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-07 21:59:29,089 INFO L913 BasicCegarLoop]: 21 mSDtfsCounter, 19 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-07 21:59:29,090 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 28 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-07 21:59:29,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-04-07 21:59:29,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 24. [2022-04-07 21:59:29,102 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:59:29,102 INFO L82 GeneralOperation]: Start isEquivalent. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:29,102 INFO L74 IsIncluded]: Start isIncluded. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:29,103 INFO L87 Difference]: Start difference. First operand 25 states. Second operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:29,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:29,104 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-07 21:59:29,104 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-07 21:59:29,105 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:29,105 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:29,105 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 25 states. [2022-04-07 21:59:29,105 INFO L87 Difference]: Start difference. First operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand 25 states. [2022-04-07 21:59:29,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:29,108 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2022-04-07 21:59:29,108 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2022-04-07 21:59:29,108 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:29,109 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:29,109 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:59:29,109 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:59:29,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-07 21:59:29,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 26 transitions. [2022-04-07 21:59:29,112 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 26 transitions. Word has length 17 [2022-04-07 21:59:29,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:59:29,112 INFO L478 AbstractCegarLoop]: Abstraction has 24 states and 26 transitions. [2022-04-07 21:59:29,112 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:29,113 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 26 transitions. [2022-04-07 21:59:29,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-07 21:59:29,114 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:59:29,114 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:59:29,114 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-07 21:59:29,115 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:59:29,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:59:29,116 INFO L85 PathProgramCache]: Analyzing trace with hash -1226486282, now seen corresponding path program 1 times [2022-04-07 21:59:29,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:59:29,116 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [260647103] [2022-04-07 21:59:29,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:59:29,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:59:29,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:29,271 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:59:29,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:29,292 INFO L290 TraceCheckUtils]: 0: Hoare triple {474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {467#true} is VALID [2022-04-07 21:59:29,293 INFO L290 TraceCheckUtils]: 1: Hoare triple {467#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:29,293 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {467#true} {467#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:29,294 INFO L272 TraceCheckUtils]: 0: Hoare triple {467#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:59:29,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {474#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {467#true} is VALID [2022-04-07 21:59:29,294 INFO L290 TraceCheckUtils]: 2: Hoare triple {467#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:29,295 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {467#true} {467#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:29,321 INFO L272 TraceCheckUtils]: 4: Hoare triple {467#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:29,323 INFO L290 TraceCheckUtils]: 5: Hoare triple {467#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {472#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} is VALID [2022-04-07 21:59:29,324 INFO L290 TraceCheckUtils]: 6: Hoare triple {472#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {472#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} is VALID [2022-04-07 21:59:29,325 INFO L290 TraceCheckUtils]: 7: Hoare triple {472#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {473#(and (<= (+ main_~i~0 4) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} is VALID [2022-04-07 21:59:29,326 INFO L290 TraceCheckUtils]: 8: Hoare triple {473#(and (<= (+ main_~i~0 4) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {468#false} is VALID [2022-04-07 21:59:29,326 INFO L290 TraceCheckUtils]: 9: Hoare triple {468#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {468#false} is VALID [2022-04-07 21:59:29,326 INFO L290 TraceCheckUtils]: 10: Hoare triple {468#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {468#false} is VALID [2022-04-07 21:59:29,327 INFO L290 TraceCheckUtils]: 11: Hoare triple {468#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {468#false} is VALID [2022-04-07 21:59:29,327 INFO L290 TraceCheckUtils]: 12: Hoare triple {468#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {468#false} is VALID [2022-04-07 21:59:29,327 INFO L290 TraceCheckUtils]: 13: Hoare triple {468#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {468#false} is VALID [2022-04-07 21:59:29,327 INFO L290 TraceCheckUtils]: 14: Hoare triple {468#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {468#false} is VALID [2022-04-07 21:59:29,327 INFO L272 TraceCheckUtils]: 15: Hoare triple {468#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {468#false} is VALID [2022-04-07 21:59:29,328 INFO L290 TraceCheckUtils]: 16: Hoare triple {468#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {468#false} is VALID [2022-04-07 21:59:29,328 INFO L290 TraceCheckUtils]: 17: Hoare triple {468#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {468#false} is VALID [2022-04-07 21:59:29,328 INFO L290 TraceCheckUtils]: 18: Hoare triple {468#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {468#false} is VALID [2022-04-07 21:59:29,328 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 21:59:29,329 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:59:29,329 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [260647103] [2022-04-07 21:59:29,329 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [260647103] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 21:59:29,329 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [238891113] [2022-04-07 21:59:29,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:59:29,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 21:59:29,330 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 21:59:29,331 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 21:59:29,332 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-07 21:59:29,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:29,405 INFO L263 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-07 21:59:29,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:29,427 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 21:59:29,518 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 21:59:29,745 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-04-07 21:59:30,480 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 21:59:30,482 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 21:59:30,484 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 10 [2022-04-07 21:59:30,625 INFO L272 TraceCheckUtils]: 0: Hoare triple {467#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:30,626 INFO L290 TraceCheckUtils]: 1: Hoare triple {467#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {467#true} is VALID [2022-04-07 21:59:30,626 INFO L290 TraceCheckUtils]: 2: Hoare triple {467#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:30,626 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {467#true} {467#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:30,627 INFO L272 TraceCheckUtils]: 4: Hoare triple {467#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:30,627 INFO L290 TraceCheckUtils]: 5: Hoare triple {467#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:30,630 INFO L290 TraceCheckUtils]: 6: Hoare triple {493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:30,630 INFO L290 TraceCheckUtils]: 7: Hoare triple {493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:30,633 INFO L290 TraceCheckUtils]: 8: Hoare triple {493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:30,634 INFO L290 TraceCheckUtils]: 9: Hoare triple {493#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {506#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 21:59:30,642 INFO L290 TraceCheckUtils]: 10: Hoare triple {506#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {510#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:30,644 INFO L290 TraceCheckUtils]: 11: Hoare triple {510#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {514#(and (= |main_~#str2~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:30,644 INFO L290 TraceCheckUtils]: 12: Hoare triple {514#(and (= |main_~#str2~0.offset| 0) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {518#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (mod (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 21:59:30,646 INFO L290 TraceCheckUtils]: 13: Hoare triple {518#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (mod (+ main_~max~0 4294967295) 4294967296) 1))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {522#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< (mod main_~j~0 4294967296) 1) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|)))} is VALID [2022-04-07 21:59:30,647 INFO L290 TraceCheckUtils]: 14: Hoare triple {522#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< (mod main_~j~0 4294967296) 1) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) |main_~#str2~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {526#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 21:59:30,648 INFO L272 TraceCheckUtils]: 15: Hoare triple {526#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {530#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 21:59:30,648 INFO L290 TraceCheckUtils]: 16: Hoare triple {530#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {534#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 21:59:30,649 INFO L290 TraceCheckUtils]: 17: Hoare triple {534#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {468#false} is VALID [2022-04-07 21:59:30,649 INFO L290 TraceCheckUtils]: 18: Hoare triple {468#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {468#false} is VALID [2022-04-07 21:59:30,650 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 21:59:30,650 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 21:59:31,002 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 21:59:31,003 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 78 [2022-04-07 21:59:31,066 INFO L356 Elim1Store]: treesize reduction 26, result has 39.5 percent of original size [2022-04-07 21:59:31,066 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 116 treesize of output 102 [2022-04-07 21:59:31,134 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 21:59:31,135 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2022-04-07 21:59:31,144 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-07 21:59:31,179 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 21:59:31,179 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 80 treesize of output 76 [2022-04-07 21:59:31,196 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 21:59:31,197 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2022-04-07 21:59:31,207 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2022-04-07 21:59:31,230 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 21:59:31,237 INFO L356 Elim1Store]: treesize reduction 5, result has 68.8 percent of original size [2022-04-07 21:59:31,237 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 110 treesize of output 89 [2022-04-07 21:59:31,741 INFO L290 TraceCheckUtils]: 18: Hoare triple {468#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {468#false} is VALID [2022-04-07 21:59:31,742 INFO L290 TraceCheckUtils]: 17: Hoare triple {534#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {468#false} is VALID [2022-04-07 21:59:31,742 INFO L290 TraceCheckUtils]: 16: Hoare triple {530#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {534#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 21:59:31,745 INFO L272 TraceCheckUtils]: 15: Hoare triple {526#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {530#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 21:59:31,746 INFO L290 TraceCheckUtils]: 14: Hoare triple {553#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {526#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 21:59:31,747 INFO L290 TraceCheckUtils]: 13: Hoare triple {557#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {553#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 21:59:31,750 INFO L290 TraceCheckUtils]: 12: Hoare triple {561#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {557#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-07 21:59:31,753 INFO L290 TraceCheckUtils]: 11: Hoare triple {565#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {561#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-07 21:59:31,756 INFO L290 TraceCheckUtils]: 10: Hoare triple {569#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296)))))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {565#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-07 21:59:31,758 INFO L290 TraceCheckUtils]: 9: Hoare triple {467#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {569#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296)))))) (<= 1 main_~i~0))} is VALID [2022-04-07 21:59:31,758 INFO L290 TraceCheckUtils]: 8: Hoare triple {467#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:31,758 INFO L290 TraceCheckUtils]: 7: Hoare triple {467#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {467#true} is VALID [2022-04-07 21:59:31,758 INFO L290 TraceCheckUtils]: 6: Hoare triple {467#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {467#true} is VALID [2022-04-07 21:59:31,759 INFO L290 TraceCheckUtils]: 5: Hoare triple {467#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {467#true} is VALID [2022-04-07 21:59:31,759 INFO L272 TraceCheckUtils]: 4: Hoare triple {467#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:31,759 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {467#true} {467#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:31,759 INFO L290 TraceCheckUtils]: 2: Hoare triple {467#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:31,760 INFO L290 TraceCheckUtils]: 1: Hoare triple {467#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {467#true} is VALID [2022-04-07 21:59:31,760 INFO L272 TraceCheckUtils]: 0: Hoare triple {467#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {467#true} is VALID [2022-04-07 21:59:31,760 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-07 21:59:31,760 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [238891113] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 21:59:31,760 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 21:59:31,761 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 11, 10] total 19 [2022-04-07 21:59:31,761 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [147677056] [2022-04-07 21:59:31,761 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 21:59:31,761 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 21:59:31,762 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:59:31,762 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:31,809 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:31,809 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-07 21:59:31,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:59:31,810 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-07 21:59:31,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2022-04-07 21:59:31,810 INFO L87 Difference]: Start difference. First operand 24 states and 26 transitions. Second operand has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:34,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:34,385 INFO L93 Difference]: Finished difference Result 67 states and 77 transitions. [2022-04-07 21:59:34,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-07 21:59:34,385 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-07 21:59:34,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:59:34,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:34,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 76 transitions. [2022-04-07 21:59:34,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:34,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 76 transitions. [2022-04-07 21:59:34,407 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 76 transitions. [2022-04-07 21:59:34,521 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:34,522 INFO L225 Difference]: With dead ends: 67 [2022-04-07 21:59:34,523 INFO L226 Difference]: Without dead ends: 52 [2022-04-07 21:59:34,523 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 255 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=274, Invalid=1132, Unknown=0, NotChecked=0, Total=1406 [2022-04-07 21:59:34,524 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 59 mSDsluCounter, 44 mSDsCounter, 0 mSdLazyCounter, 254 mSolverCounterSat, 113 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 367 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 113 IncrementalHoareTripleChecker+Valid, 254 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-07 21:59:34,524 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [59 Valid, 54 Invalid, 367 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [113 Valid, 254 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-07 21:59:34,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-04-07 21:59:34,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 35. [2022-04-07 21:59:34,565 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:59:34,565 INFO L82 GeneralOperation]: Start isEquivalent. First operand 52 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:34,566 INFO L74 IsIncluded]: Start isIncluded. First operand 52 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:34,566 INFO L87 Difference]: Start difference. First operand 52 states. Second operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:34,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:34,572 INFO L93 Difference]: Finished difference Result 52 states and 59 transitions. [2022-04-07 21:59:34,572 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 59 transitions. [2022-04-07 21:59:34,573 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:34,573 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:34,573 INFO L74 IsIncluded]: Start isIncluded. First operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 52 states. [2022-04-07 21:59:34,574 INFO L87 Difference]: Start difference. First operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 52 states. [2022-04-07 21:59:34,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:34,579 INFO L93 Difference]: Finished difference Result 52 states and 59 transitions. [2022-04-07 21:59:34,579 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 59 transitions. [2022-04-07 21:59:34,580 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:34,580 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:34,580 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:59:34,580 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:59:34,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 28 states have internal predecessors, (31), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:34,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 38 transitions. [2022-04-07 21:59:34,583 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 38 transitions. Word has length 19 [2022-04-07 21:59:34,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:59:34,583 INFO L478 AbstractCegarLoop]: Abstraction has 35 states and 38 transitions. [2022-04-07 21:59:34,584 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 2.111111111111111) internal successors, (38), 17 states have internal predecessors, (38), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:34,584 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 38 transitions. [2022-04-07 21:59:34,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-07 21:59:34,587 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:59:34,588 INFO L499 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:59:34,612 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-07 21:59:34,812 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 21:59:34,812 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:59:34,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:59:34,813 INFO L85 PathProgramCache]: Analyzing trace with hash -1057862574, now seen corresponding path program 2 times [2022-04-07 21:59:34,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:59:34,813 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [761545738] [2022-04-07 21:59:34,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:59:34,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:59:34,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:35,098 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:59:35,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:35,107 INFO L290 TraceCheckUtils]: 0: Hoare triple {903#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {893#true} is VALID [2022-04-07 21:59:35,107 INFO L290 TraceCheckUtils]: 1: Hoare triple {893#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:35,108 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {893#true} {893#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:35,116 INFO L272 TraceCheckUtils]: 0: Hoare triple {893#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {903#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:59:35,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {903#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {893#true} is VALID [2022-04-07 21:59:35,116 INFO L290 TraceCheckUtils]: 2: Hoare triple {893#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:35,116 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {893#true} {893#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:35,116 INFO L272 TraceCheckUtils]: 4: Hoare triple {893#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:35,117 INFO L290 TraceCheckUtils]: 5: Hoare triple {893#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 21:59:35,118 INFO L290 TraceCheckUtils]: 6: Hoare triple {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 21:59:35,119 INFO L290 TraceCheckUtils]: 7: Hoare triple {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 21:59:35,120 INFO L290 TraceCheckUtils]: 8: Hoare triple {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 21:59:35,120 INFO L290 TraceCheckUtils]: 9: Hoare triple {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 21:59:35,121 INFO L290 TraceCheckUtils]: 10: Hoare triple {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 21:59:35,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {898#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {899#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 21:59:35,124 INFO L290 TraceCheckUtils]: 12: Hoare triple {899#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {899#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 21:59:35,126 INFO L290 TraceCheckUtils]: 13: Hoare triple {899#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {900#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 21:59:35,127 INFO L290 TraceCheckUtils]: 14: Hoare triple {900#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {901#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 21:59:35,128 INFO L290 TraceCheckUtils]: 15: Hoare triple {901#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {902#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 21:59:35,128 INFO L290 TraceCheckUtils]: 16: Hoare triple {902#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {894#false} is VALID [2022-04-07 21:59:35,129 INFO L290 TraceCheckUtils]: 17: Hoare triple {894#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {894#false} is VALID [2022-04-07 21:59:35,129 INFO L290 TraceCheckUtils]: 18: Hoare triple {894#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {894#false} is VALID [2022-04-07 21:59:35,129 INFO L272 TraceCheckUtils]: 19: Hoare triple {894#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {894#false} is VALID [2022-04-07 21:59:35,129 INFO L290 TraceCheckUtils]: 20: Hoare triple {894#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {894#false} is VALID [2022-04-07 21:59:35,129 INFO L290 TraceCheckUtils]: 21: Hoare triple {894#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {894#false} is VALID [2022-04-07 21:59:35,129 INFO L290 TraceCheckUtils]: 22: Hoare triple {894#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {894#false} is VALID [2022-04-07 21:59:35,130 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 21:59:35,130 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:59:35,130 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [761545738] [2022-04-07 21:59:35,130 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [761545738] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 21:59:35,130 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [847295291] [2022-04-07 21:59:35,130 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 21:59:35,130 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 21:59:35,130 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 21:59:35,131 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 21:59:35,161 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-07 21:59:35,207 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 21:59:35,207 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 21:59:35,208 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-07 21:59:35,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:35,226 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 21:59:35,249 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 21:59:35,516 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2022-04-07 21:59:37,969 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 21:59:37,976 INFO L356 Elim1Store]: treesize reduction 12, result has 20.0 percent of original size [2022-04-07 21:59:37,977 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 13 [2022-04-07 21:59:38,644 INFO L272 TraceCheckUtils]: 0: Hoare triple {893#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:38,644 INFO L290 TraceCheckUtils]: 1: Hoare triple {893#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {893#true} is VALID [2022-04-07 21:59:38,644 INFO L290 TraceCheckUtils]: 2: Hoare triple {893#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:38,644 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {893#true} {893#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:38,644 INFO L272 TraceCheckUtils]: 4: Hoare triple {893#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:38,646 INFO L290 TraceCheckUtils]: 5: Hoare triple {893#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:38,647 INFO L290 TraceCheckUtils]: 6: Hoare triple {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:38,648 INFO L290 TraceCheckUtils]: 7: Hoare triple {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:38,648 INFO L290 TraceCheckUtils]: 8: Hoare triple {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:38,649 INFO L290 TraceCheckUtils]: 9: Hoare triple {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:38,649 INFO L290 TraceCheckUtils]: 10: Hoare triple {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:38,651 INFO L290 TraceCheckUtils]: 11: Hoare triple {922#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {941#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 21:59:38,652 INFO L290 TraceCheckUtils]: 12: Hoare triple {941#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {945#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 21:59:38,653 INFO L290 TraceCheckUtils]: 13: Hoare triple {945#(and (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {949#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:38,655 INFO L290 TraceCheckUtils]: 14: Hoare triple {949#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {953#(and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 21:59:38,656 INFO L290 TraceCheckUtils]: 15: Hoare triple {953#(and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {957#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} is VALID [2022-04-07 21:59:38,657 INFO L290 TraceCheckUtils]: 16: Hoare triple {957#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {961#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 21:59:38,660 INFO L290 TraceCheckUtils]: 17: Hoare triple {961#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 (mod (+ main_~max~0 4294967295) 4294967296)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {965#(and (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 21:59:38,664 INFO L290 TraceCheckUtils]: 18: Hoare triple {965#(and (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {969#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 21:59:38,665 INFO L272 TraceCheckUtils]: 19: Hoare triple {969#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {973#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 21:59:38,665 INFO L290 TraceCheckUtils]: 20: Hoare triple {973#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {977#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 21:59:38,666 INFO L290 TraceCheckUtils]: 21: Hoare triple {977#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {894#false} is VALID [2022-04-07 21:59:38,666 INFO L290 TraceCheckUtils]: 22: Hoare triple {894#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {894#false} is VALID [2022-04-07 21:59:38,666 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 21:59:38,666 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 21:59:39,043 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 21:59:39,044 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 80 treesize of output 76 [2022-04-07 21:59:39,159 INFO L356 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2022-04-07 21:59:39,160 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 21 [2022-04-07 21:59:39,174 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2022-04-07 21:59:39,211 INFO L356 Elim1Store]: treesize reduction 27, result has 34.1 percent of original size [2022-04-07 21:59:39,211 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 45 [2022-04-07 21:59:39,265 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 21:59:39,265 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 78 [2022-04-07 21:59:39,375 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-07 21:59:39,376 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 42 [2022-04-07 21:59:39,404 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2022-04-07 21:59:39,417 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-07 21:59:39,738 INFO L290 TraceCheckUtils]: 22: Hoare triple {894#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {894#false} is VALID [2022-04-07 21:59:39,739 INFO L290 TraceCheckUtils]: 21: Hoare triple {977#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {894#false} is VALID [2022-04-07 21:59:39,740 INFO L290 TraceCheckUtils]: 20: Hoare triple {973#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {977#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 21:59:39,741 INFO L272 TraceCheckUtils]: 19: Hoare triple {969#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {973#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 21:59:39,742 INFO L290 TraceCheckUtils]: 18: Hoare triple {996#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {969#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 21:59:39,743 INFO L290 TraceCheckUtils]: 17: Hoare triple {1000#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {996#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 21:59:39,744 INFO L290 TraceCheckUtils]: 16: Hoare triple {1004#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1000#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-07 21:59:39,746 INFO L290 TraceCheckUtils]: 15: Hoare triple {1008#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1004#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-07 21:59:39,748 INFO L290 TraceCheckUtils]: 14: Hoare triple {1012#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1008#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-07 21:59:39,750 INFO L290 TraceCheckUtils]: 13: Hoare triple {1016#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1012#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} is VALID [2022-04-07 21:59:39,751 INFO L290 TraceCheckUtils]: 12: Hoare triple {1020#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1016#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 21:59:39,753 INFO L290 TraceCheckUtils]: 11: Hoare triple {893#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1020#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 21:59:39,754 INFO L290 TraceCheckUtils]: 10: Hoare triple {893#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:39,755 INFO L290 TraceCheckUtils]: 9: Hoare triple {893#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {893#true} is VALID [2022-04-07 21:59:39,755 INFO L290 TraceCheckUtils]: 8: Hoare triple {893#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {893#true} is VALID [2022-04-07 21:59:39,755 INFO L290 TraceCheckUtils]: 7: Hoare triple {893#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {893#true} is VALID [2022-04-07 21:59:39,755 INFO L290 TraceCheckUtils]: 6: Hoare triple {893#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {893#true} is VALID [2022-04-07 21:59:39,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {893#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {893#true} is VALID [2022-04-07 21:59:39,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {893#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:39,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {893#true} {893#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:39,757 INFO L290 TraceCheckUtils]: 2: Hoare triple {893#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:39,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {893#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {893#true} is VALID [2022-04-07 21:59:39,757 INFO L272 TraceCheckUtils]: 0: Hoare triple {893#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {893#true} is VALID [2022-04-07 21:59:39,758 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-07 21:59:39,758 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [847295291] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 21:59:39,758 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 21:59:39,758 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 13, 12] total 26 [2022-04-07 21:59:39,758 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [346641205] [2022-04-07 21:59:39,758 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 21:59:39,759 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 21:59:39,760 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:59:39,760 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:39,814 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:39,814 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-07 21:59:39,814 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:59:39,815 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-07 21:59:39,815 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=558, Unknown=0, NotChecked=0, Total=650 [2022-04-07 21:59:39,815 INFO L87 Difference]: Start difference. First operand 35 states and 38 transitions. Second operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:42,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:42,646 INFO L93 Difference]: Finished difference Result 69 states and 78 transitions. [2022-04-07 21:59:42,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-04-07 21:59:42,646 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-07 21:59:42,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:59:42,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:42,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 70 transitions. [2022-04-07 21:59:42,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:42,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 70 transitions. [2022-04-07 21:59:42,652 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 23 states and 70 transitions. [2022-04-07 21:59:42,743 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:42,745 INFO L225 Difference]: With dead ends: 69 [2022-04-07 21:59:42,745 INFO L226 Difference]: Without dead ends: 51 [2022-04-07 21:59:42,746 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 347 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=375, Invalid=1695, Unknown=0, NotChecked=0, Total=2070 [2022-04-07 21:59:42,747 INFO L913 BasicCegarLoop]: 10 mSDtfsCounter, 69 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 366 mSolverCounterSat, 145 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 511 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 145 IncrementalHoareTripleChecker+Valid, 366 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-07 21:59:42,748 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [69 Valid, 68 Invalid, 511 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [145 Valid, 366 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-07 21:59:42,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-04-07 21:59:42,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 41. [2022-04-07 21:59:42,810 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:59:42,810 INFO L82 GeneralOperation]: Start isEquivalent. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:42,810 INFO L74 IsIncluded]: Start isIncluded. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:42,810 INFO L87 Difference]: Start difference. First operand 51 states. Second operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:42,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:42,816 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-07 21:59:42,816 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2022-04-07 21:59:42,816 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:42,817 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:42,817 INFO L74 IsIncluded]: Start isIncluded. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 51 states. [2022-04-07 21:59:42,817 INFO L87 Difference]: Start difference. First operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 51 states. [2022-04-07 21:59:42,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:42,819 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-07 21:59:42,819 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 57 transitions. [2022-04-07 21:59:42,820 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:42,820 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:42,820 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:59:42,820 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:59:42,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 33 states have (on average 1.1515151515151516) internal successors, (38), 34 states have internal predecessors, (38), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:42,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 45 transitions. [2022-04-07 21:59:42,822 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 45 transitions. Word has length 23 [2022-04-07 21:59:42,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:59:42,822 INFO L478 AbstractCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-04-07 21:59:42,822 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 1.76) internal successors, (44), 24 states have internal predecessors, (44), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:42,822 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 45 transitions. [2022-04-07 21:59:42,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-07 21:59:42,823 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:59:42,823 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:59:42,849 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-07 21:59:43,047 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 21:59:43,047 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:59:43,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:59:43,048 INFO L85 PathProgramCache]: Analyzing trace with hash -126211412, now seen corresponding path program 3 times [2022-04-07 21:59:43,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:59:43,048 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129707024] [2022-04-07 21:59:43,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:59:43,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:59:43,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:43,168 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:59:43,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:43,181 INFO L290 TraceCheckUtils]: 0: Hoare triple {1370#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1362#true} is VALID [2022-04-07 21:59:43,181 INFO L290 TraceCheckUtils]: 1: Hoare triple {1362#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,181 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1362#true} {1362#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,182 INFO L272 TraceCheckUtils]: 0: Hoare triple {1362#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1370#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:59:43,182 INFO L290 TraceCheckUtils]: 1: Hoare triple {1370#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1362#true} is VALID [2022-04-07 21:59:43,182 INFO L290 TraceCheckUtils]: 2: Hoare triple {1362#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,182 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1362#true} {1362#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,182 INFO L272 TraceCheckUtils]: 4: Hoare triple {1362#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,183 INFO L290 TraceCheckUtils]: 5: Hoare triple {1362#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1367#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} is VALID [2022-04-07 21:59:43,184 INFO L290 TraceCheckUtils]: 6: Hoare triple {1367#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1367#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} is VALID [2022-04-07 21:59:43,185 INFO L290 TraceCheckUtils]: 7: Hoare triple {1367#(and (<= 5 main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1368#(and (<= (+ main_~i~0 4) main_~max~0) (<= (+ (* (div main_~max~0 4294967296) 4294967296) 1) main_~i~0))} is VALID [2022-04-07 21:59:43,186 INFO L290 TraceCheckUtils]: 8: Hoare triple {1368#(and (<= (+ main_~i~0 4) main_~max~0) (<= (+ (* (div main_~max~0 4294967296) 4294967296) 1) main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1368#(and (<= (+ main_~i~0 4) main_~max~0) (<= (+ (* (div main_~max~0 4294967296) 4294967296) 1) main_~i~0))} is VALID [2022-04-07 21:59:43,187 INFO L290 TraceCheckUtils]: 9: Hoare triple {1368#(and (<= (+ main_~i~0 4) main_~max~0) (<= (+ (* (div main_~max~0 4294967296) 4294967296) 1) main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1369#(and (<= (+ main_~i~0 3) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} is VALID [2022-04-07 21:59:43,188 INFO L290 TraceCheckUtils]: 10: Hoare triple {1369#(and (<= (+ main_~i~0 3) main_~max~0) (<= (div main_~max~0 4294967296) (div main_~i~0 4294967296)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,188 INFO L290 TraceCheckUtils]: 11: Hoare triple {1363#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1363#false} is VALID [2022-04-07 21:59:43,188 INFO L290 TraceCheckUtils]: 12: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,188 INFO L290 TraceCheckUtils]: 13: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,188 INFO L290 TraceCheckUtils]: 14: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,188 INFO L290 TraceCheckUtils]: 15: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,189 INFO L290 TraceCheckUtils]: 16: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,189 INFO L290 TraceCheckUtils]: 17: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,189 INFO L290 TraceCheckUtils]: 18: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,189 INFO L290 TraceCheckUtils]: 19: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,189 INFO L290 TraceCheckUtils]: 20: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,189 INFO L290 TraceCheckUtils]: 21: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,189 INFO L290 TraceCheckUtils]: 22: Hoare triple {1363#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,190 INFO L290 TraceCheckUtils]: 23: Hoare triple {1363#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1363#false} is VALID [2022-04-07 21:59:43,190 INFO L290 TraceCheckUtils]: 24: Hoare triple {1363#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1363#false} is VALID [2022-04-07 21:59:43,190 INFO L272 TraceCheckUtils]: 25: Hoare triple {1363#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1363#false} is VALID [2022-04-07 21:59:43,190 INFO L290 TraceCheckUtils]: 26: Hoare triple {1363#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1363#false} is VALID [2022-04-07 21:59:43,190 INFO L290 TraceCheckUtils]: 27: Hoare triple {1363#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,190 INFO L290 TraceCheckUtils]: 28: Hoare triple {1363#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,190 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 21:59:43,191 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:59:43,191 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129707024] [2022-04-07 21:59:43,191 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [129707024] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 21:59:43,191 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1750798349] [2022-04-07 21:59:43,191 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 21:59:43,191 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 21:59:43,191 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 21:59:43,196 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 21:59:43,197 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-07 21:59:43,281 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-07 21:59:43,281 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 21:59:43,282 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-07 21:59:43,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:43,297 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 21:59:43,425 INFO L272 TraceCheckUtils]: 0: Hoare triple {1362#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,425 INFO L290 TraceCheckUtils]: 1: Hoare triple {1362#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1362#true} is VALID [2022-04-07 21:59:43,425 INFO L290 TraceCheckUtils]: 2: Hoare triple {1362#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,425 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1362#true} {1362#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,426 INFO L272 TraceCheckUtils]: 4: Hoare triple {1362#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,439 INFO L290 TraceCheckUtils]: 5: Hoare triple {1362#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1389#(and (= 5 main_~max~0) (= main_~i~0 0))} is VALID [2022-04-07 21:59:43,440 INFO L290 TraceCheckUtils]: 6: Hoare triple {1389#(and (= 5 main_~max~0) (= main_~i~0 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1389#(and (= 5 main_~max~0) (= main_~i~0 0))} is VALID [2022-04-07 21:59:43,440 INFO L290 TraceCheckUtils]: 7: Hoare triple {1389#(and (= 5 main_~max~0) (= main_~i~0 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1396#(and (= 5 main_~max~0) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 21:59:43,441 INFO L290 TraceCheckUtils]: 8: Hoare triple {1396#(and (= 5 main_~max~0) (= (+ (- 1) main_~i~0) 0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1396#(and (= 5 main_~max~0) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 21:59:43,441 INFO L290 TraceCheckUtils]: 9: Hoare triple {1396#(and (= 5 main_~max~0) (= (+ (- 1) main_~i~0) 0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1403#(and (= (+ (- 2) main_~i~0) 0) (= 5 main_~max~0))} is VALID [2022-04-07 21:59:43,441 INFO L290 TraceCheckUtils]: 10: Hoare triple {1403#(and (= (+ (- 2) main_~i~0) 0) (= 5 main_~max~0))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,441 INFO L290 TraceCheckUtils]: 11: Hoare triple {1363#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 12: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 13: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 14: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 15: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 16: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 17: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 18: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 19: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,442 INFO L290 TraceCheckUtils]: 20: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,443 INFO L290 TraceCheckUtils]: 21: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,443 INFO L290 TraceCheckUtils]: 22: Hoare triple {1363#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,443 INFO L290 TraceCheckUtils]: 23: Hoare triple {1363#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1363#false} is VALID [2022-04-07 21:59:43,443 INFO L290 TraceCheckUtils]: 24: Hoare triple {1363#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1363#false} is VALID [2022-04-07 21:59:43,443 INFO L272 TraceCheckUtils]: 25: Hoare triple {1363#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1363#false} is VALID [2022-04-07 21:59:43,443 INFO L290 TraceCheckUtils]: 26: Hoare triple {1363#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1363#false} is VALID [2022-04-07 21:59:43,443 INFO L290 TraceCheckUtils]: 27: Hoare triple {1363#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,444 INFO L290 TraceCheckUtils]: 28: Hoare triple {1363#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,444 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 21:59:43,444 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 21:59:43,654 INFO L290 TraceCheckUtils]: 28: Hoare triple {1363#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,655 INFO L290 TraceCheckUtils]: 27: Hoare triple {1363#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,655 INFO L290 TraceCheckUtils]: 26: Hoare triple {1363#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1363#false} is VALID [2022-04-07 21:59:43,655 INFO L272 TraceCheckUtils]: 25: Hoare triple {1363#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1363#false} is VALID [2022-04-07 21:59:43,655 INFO L290 TraceCheckUtils]: 24: Hoare triple {1363#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1363#false} is VALID [2022-04-07 21:59:43,655 INFO L290 TraceCheckUtils]: 23: Hoare triple {1363#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1363#false} is VALID [2022-04-07 21:59:43,655 INFO L290 TraceCheckUtils]: 22: Hoare triple {1363#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 21: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 20: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 19: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 18: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 17: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 16: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 15: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 14: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,656 INFO L290 TraceCheckUtils]: 13: Hoare triple {1363#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1363#false} is VALID [2022-04-07 21:59:43,657 INFO L290 TraceCheckUtils]: 12: Hoare triple {1363#false} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1363#false} is VALID [2022-04-07 21:59:43,657 INFO L290 TraceCheckUtils]: 11: Hoare triple {1363#false} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1363#false} is VALID [2022-04-07 21:59:43,658 INFO L290 TraceCheckUtils]: 10: Hoare triple {1515#(< (mod main_~i~0 4294967296) (mod main_~max~0 4294967296))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1363#false} is VALID [2022-04-07 21:59:43,660 INFO L290 TraceCheckUtils]: 9: Hoare triple {1519#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1515#(< (mod main_~i~0 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-07 21:59:43,661 INFO L290 TraceCheckUtils]: 8: Hoare triple {1523#(or (< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296)) (not (< (mod main_~i~0 4294967296) (mod main_~max~0 4294967296))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1519#(< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))} is VALID [2022-04-07 21:59:43,663 INFO L290 TraceCheckUtils]: 7: Hoare triple {1527#(or (not (< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))) (< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1523#(or (< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296)) (not (< (mod main_~i~0 4294967296) (mod main_~max~0 4294967296))))} is VALID [2022-04-07 21:59:43,663 INFO L290 TraceCheckUtils]: 6: Hoare triple {1527#(or (not (< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))) (< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1527#(or (not (< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))) (< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296)))} is VALID [2022-04-07 21:59:43,665 INFO L290 TraceCheckUtils]: 5: Hoare triple {1362#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1527#(or (not (< (mod (+ main_~i~0 1) 4294967296) (mod main_~max~0 4294967296))) (< (mod (+ main_~i~0 2) 4294967296) (mod main_~max~0 4294967296)))} is VALID [2022-04-07 21:59:43,665 INFO L272 TraceCheckUtils]: 4: Hoare triple {1362#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,665 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1362#true} {1362#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,665 INFO L290 TraceCheckUtils]: 2: Hoare triple {1362#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,666 INFO L290 TraceCheckUtils]: 1: Hoare triple {1362#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1362#true} is VALID [2022-04-07 21:59:43,666 INFO L272 TraceCheckUtils]: 0: Hoare triple {1362#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1362#true} is VALID [2022-04-07 21:59:43,666 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 21:59:43,666 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1750798349] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 21:59:43,666 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 21:59:43,666 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 6] total 13 [2022-04-07 21:59:43,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706012965] [2022-04-07 21:59:43,666 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 21:59:43,667 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 12 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:59:43,667 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:59:43,667 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 12 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:43,712 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:43,712 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-07 21:59:43,712 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:59:43,712 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-07 21:59:43,713 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2022-04-07 21:59:43,713 INFO L87 Difference]: Start difference. First operand 41 states and 45 transitions. Second operand has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 12 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:44,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:44,204 INFO L93 Difference]: Finished difference Result 77 states and 87 transitions. [2022-04-07 21:59:44,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-07 21:59:44,204 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 12 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-07 21:59:44,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 21:59:44,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 12 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:44,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 53 transitions. [2022-04-07 21:59:44,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 12 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:44,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 53 transitions. [2022-04-07 21:59:44,208 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 53 transitions. [2022-04-07 21:59:44,258 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:44,259 INFO L225 Difference]: With dead ends: 77 [2022-04-07 21:59:44,259 INFO L226 Difference]: Without dead ends: 47 [2022-04-07 21:59:44,260 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=116, Invalid=264, Unknown=0, NotChecked=0, Total=380 [2022-04-07 21:59:44,261 INFO L913 BasicCegarLoop]: 17 mSDtfsCounter, 29 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 125 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 49 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 125 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-07 21:59:44,261 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 49 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 125 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-07 21:59:44,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-07 21:59:44,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2022-04-07 21:59:44,337 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 21:59:44,337 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:44,337 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:44,338 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:44,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:44,339 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2022-04-07 21:59:44,339 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-07 21:59:44,339 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:44,340 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:44,340 INFO L74 IsIncluded]: Start isIncluded. First operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 47 states. [2022-04-07 21:59:44,340 INFO L87 Difference]: Start difference. First operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 47 states. [2022-04-07 21:59:44,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 21:59:44,342 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2022-04-07 21:59:44,342 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-07 21:59:44,342 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 21:59:44,342 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 21:59:44,342 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 21:59:44,342 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 21:59:44,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 40 states have internal predecessors, (44), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 21:59:44,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 51 transitions. [2022-04-07 21:59:44,344 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 51 transitions. Word has length 29 [2022-04-07 21:59:44,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 21:59:44,344 INFO L478 AbstractCegarLoop]: Abstraction has 47 states and 51 transitions. [2022-04-07 21:59:44,344 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 12 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:44,344 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 51 transitions. [2022-04-07 21:59:44,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-07 21:59:44,345 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 21:59:44,345 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 21:59:44,374 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-07 21:59:44,574 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 21:59:44,574 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 21:59:44,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 21:59:44,575 INFO L85 PathProgramCache]: Analyzing trace with hash -1457388698, now seen corresponding path program 4 times [2022-04-07 21:59:44,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 21:59:44,575 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1910389717] [2022-04-07 21:59:44,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 21:59:44,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 21:59:44,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:45,649 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 21:59:45,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:45,658 INFO L290 TraceCheckUtils]: 0: Hoare triple {1862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1839#true} is VALID [2022-04-07 21:59:45,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {1839#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:45,658 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1839#true} {1839#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:45,659 INFO L272 TraceCheckUtils]: 0: Hoare triple {1839#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 21:59:45,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {1862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1839#true} is VALID [2022-04-07 21:59:45,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {1839#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:45,659 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1839#true} {1839#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:45,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {1839#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:45,660 INFO L290 TraceCheckUtils]: 5: Hoare triple {1839#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1844#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,661 INFO L290 TraceCheckUtils]: 6: Hoare triple {1844#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1844#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,661 INFO L290 TraceCheckUtils]: 7: Hoare triple {1844#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1845#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-07 21:59:45,662 INFO L290 TraceCheckUtils]: 8: Hoare triple {1845#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1845#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-07 21:59:45,662 INFO L290 TraceCheckUtils]: 9: Hoare triple {1845#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1846#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 21:59:45,663 INFO L290 TraceCheckUtils]: 10: Hoare triple {1846#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1846#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 21:59:45,663 INFO L290 TraceCheckUtils]: 11: Hoare triple {1846#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1847#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 21:59:45,664 INFO L290 TraceCheckUtils]: 12: Hoare triple {1847#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1847#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 21:59:45,664 INFO L290 TraceCheckUtils]: 13: Hoare triple {1847#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 main_~i~0) (<= main_~i~0 3))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1848#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} is VALID [2022-04-07 21:59:45,665 INFO L290 TraceCheckUtils]: 14: Hoare triple {1848#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1848#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} is VALID [2022-04-07 21:59:45,665 INFO L290 TraceCheckUtils]: 15: Hoare triple {1848#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (<= main_~i~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 main_~i~0))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1849#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,666 INFO L290 TraceCheckUtils]: 16: Hoare triple {1849#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1849#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,667 INFO L290 TraceCheckUtils]: 17: Hoare triple {1849#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1850#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 21:59:45,668 INFO L290 TraceCheckUtils]: 18: Hoare triple {1850#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1851#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 3 |main_~#str1~0.offset|) (+ |main_~#str1~0.offset| 4)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 21:59:45,669 INFO L290 TraceCheckUtils]: 19: Hoare triple {1851#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 3 |main_~#str1~0.offset|) (+ |main_~#str1~0.offset| 4)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1852#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,670 INFO L290 TraceCheckUtils]: 20: Hoare triple {1852#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1853#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,671 INFO L290 TraceCheckUtils]: 21: Hoare triple {1853#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1852#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,673 INFO L290 TraceCheckUtils]: 22: Hoare triple {1852#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1853#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,674 INFO L290 TraceCheckUtils]: 23: Hoare triple {1853#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1852#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,676 INFO L290 TraceCheckUtils]: 24: Hoare triple {1852#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 3 |main_~#str1~0.offset|)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 3 |main_~#str1~0.offset|)) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1853#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,677 INFO L290 TraceCheckUtils]: 25: Hoare triple {1853#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 2 |main_~#str1~0.offset|) (+ main_~j~0 2 |main_~#str1~0.offset|))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset| 4294967298) (+ main_~j~0 2 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1854#(and (= |main_~#str2~0.offset| 0) (or (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,678 INFO L290 TraceCheckUtils]: 26: Hoare triple {1854#(and (= |main_~#str2~0.offset| 0) (or (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ main_~j~0 |main_~#str2~0.offset|) (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1855#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))))) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,679 INFO L290 TraceCheckUtils]: 27: Hoare triple {1855#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (not (= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))))) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1856#(and (= |main_~#str2~0.offset| 0) (or (<= 0 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} is VALID [2022-04-07 21:59:45,680 INFO L290 TraceCheckUtils]: 28: Hoare triple {1856#(and (= |main_~#str2~0.offset| 0) (or (<= 0 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1857#(and (= |main_~#str2~0.offset| 0) (or (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,681 INFO L290 TraceCheckUtils]: 29: Hoare triple {1857#(and (= |main_~#str2~0.offset| 0) (or (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295 |main_~#str1~0.offset|)))) (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 0) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 |main_~#str1~0.offset|))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1858#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:45,683 INFO L290 TraceCheckUtils]: 30: Hoare triple {1858#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1859#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 21:59:45,683 INFO L272 TraceCheckUtils]: 31: Hoare triple {1859#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1860#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 21:59:45,684 INFO L290 TraceCheckUtils]: 32: Hoare triple {1860#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1861#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 21:59:45,684 INFO L290 TraceCheckUtils]: 33: Hoare triple {1861#(not (= __VERIFIER_assert_~cond 0))} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1840#false} is VALID [2022-04-07 21:59:45,684 INFO L290 TraceCheckUtils]: 34: Hoare triple {1840#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1840#false} is VALID [2022-04-07 21:59:45,685 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-07 21:59:45,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 21:59:45,685 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1910389717] [2022-04-07 21:59:45,685 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1910389717] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 21:59:45,685 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [36914122] [2022-04-07 21:59:45,685 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 21:59:45,685 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 21:59:45,685 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 21:59:45,686 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 21:59:45,687 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-07 21:59:45,759 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 21:59:45,759 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 21:59:45,761 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 45 conjunts are in the unsatisfiable core [2022-04-07 21:59:45,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 21:59:45,778 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 21:59:45,801 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 21:59:46,504 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2022-04-07 21:59:48,669 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 21:59:48,676 INFO L356 Elim1Store]: treesize reduction 15, result has 16.7 percent of original size [2022-04-07 21:59:48,677 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 13 [2022-04-07 21:59:49,308 INFO L272 TraceCheckUtils]: 0: Hoare triple {1839#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:49,308 INFO L290 TraceCheckUtils]: 1: Hoare triple {1839#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1839#true} is VALID [2022-04-07 21:59:49,308 INFO L290 TraceCheckUtils]: 2: Hoare triple {1839#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:49,308 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1839#true} {1839#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:49,308 INFO L272 TraceCheckUtils]: 4: Hoare triple {1839#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:49,309 INFO L290 TraceCheckUtils]: 5: Hoare triple {1839#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,310 INFO L290 TraceCheckUtils]: 6: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,310 INFO L290 TraceCheckUtils]: 7: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,311 INFO L290 TraceCheckUtils]: 8: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,311 INFO L290 TraceCheckUtils]: 9: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,311 INFO L290 TraceCheckUtils]: 10: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,312 INFO L290 TraceCheckUtils]: 11: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,312 INFO L290 TraceCheckUtils]: 12: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,331 INFO L290 TraceCheckUtils]: 13: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,334 INFO L290 TraceCheckUtils]: 14: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,335 INFO L290 TraceCheckUtils]: 15: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,337 INFO L290 TraceCheckUtils]: 16: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,338 INFO L290 TraceCheckUtils]: 17: Hoare triple {1881#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {1918#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 21:59:49,339 INFO L290 TraceCheckUtils]: 18: Hoare triple {1918#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1922#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 21:59:49,340 INFO L290 TraceCheckUtils]: 19: Hoare triple {1922#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1926#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,343 INFO L290 TraceCheckUtils]: 20: Hoare triple {1926#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1930#(and (= (+ (- 2) main_~j~0) 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,345 INFO L290 TraceCheckUtils]: 21: Hoare triple {1930#(and (= (+ (- 2) main_~j~0) 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1934#(and (= (+ (- 2) main_~j~0) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,346 INFO L290 TraceCheckUtils]: 22: Hoare triple {1934#(and (= (+ (- 2) main_~j~0) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1938#(and (= (+ main_~j~0 (- 3)) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,347 INFO L290 TraceCheckUtils]: 23: Hoare triple {1938#(and (= (+ main_~j~0 (- 3)) 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1942#(and (= (+ main_~j~0 (- 3)) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 21:59:49,348 INFO L290 TraceCheckUtils]: 24: Hoare triple {1942#(and (= (+ main_~j~0 (- 3)) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1946#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 21:59:49,348 INFO L290 TraceCheckUtils]: 25: Hoare triple {1946#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1950#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,349 INFO L290 TraceCheckUtils]: 26: Hoare triple {1950#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 4) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {1954#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 21:59:49,350 INFO L290 TraceCheckUtils]: 27: Hoare triple {1954#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {1958#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4)) (+ main_~i~0 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 21:59:49,351 INFO L290 TraceCheckUtils]: 28: Hoare triple {1958#(and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4)) (+ main_~i~0 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {1962#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 5) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 21:59:49,353 INFO L290 TraceCheckUtils]: 29: Hoare triple {1962#(and (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (< (mod (+ main_~max~0 4294967295) 4294967296) 5) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 4 (mod (+ main_~max~0 4294967295) 4294967296)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1966#(and (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-07 21:59:49,355 INFO L290 TraceCheckUtils]: 30: Hoare triple {1966#(and (< (div main_~j~0 (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1859#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 21:59:49,356 INFO L272 TraceCheckUtils]: 31: Hoare triple {1859#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1973#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 21:59:49,356 INFO L290 TraceCheckUtils]: 32: Hoare triple {1973#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1977#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 21:59:49,356 INFO L290 TraceCheckUtils]: 33: Hoare triple {1977#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1840#false} is VALID [2022-04-07 21:59:49,357 INFO L290 TraceCheckUtils]: 34: Hoare triple {1840#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1840#false} is VALID [2022-04-07 21:59:49,357 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 21:59:49,357 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 21:59:49,736 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 21:59:49,736 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 80 treesize of output 76 [2022-04-07 21:59:49,854 INFO L356 Elim1Store]: treesize reduction 27, result has 34.1 percent of original size [2022-04-07 21:59:49,854 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 45 [2022-04-07 21:59:49,893 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-04-07 21:59:49,893 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 1 [2022-04-07 21:59:49,910 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 21:59:49,911 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 82 treesize of output 78 [2022-04-07 21:59:50,004 INFO L356 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2022-04-07 21:59:50,005 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 22 [2022-04-07 21:59:50,021 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-07 21:59:50,054 INFO L356 Elim1Store]: treesize reduction 27, result has 37.2 percent of original size [2022-04-07 21:59:50,054 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 49 [2022-04-07 21:59:50,893 INFO L290 TraceCheckUtils]: 34: Hoare triple {1840#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1840#false} is VALID [2022-04-07 21:59:50,894 INFO L290 TraceCheckUtils]: 33: Hoare triple {1977#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1840#false} is VALID [2022-04-07 21:59:50,894 INFO L290 TraceCheckUtils]: 32: Hoare triple {1973#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1977#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 21:59:50,896 INFO L272 TraceCheckUtils]: 31: Hoare triple {1859#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {1973#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 21:59:50,896 INFO L290 TraceCheckUtils]: 30: Hoare triple {1996#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {1859#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 21:59:50,898 INFO L290 TraceCheckUtils]: 29: Hoare triple {2000#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {1996#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 21:59:50,899 INFO L290 TraceCheckUtils]: 28: Hoare triple {2004#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2000#(and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))))} is VALID [2022-04-07 21:59:50,900 INFO L290 TraceCheckUtils]: 27: Hoare triple {2008#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2004#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 0 main_~i~0))} is VALID [2022-04-07 21:59:50,902 INFO L290 TraceCheckUtils]: 26: Hoare triple {2012#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2008#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967296))) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) |main_~#str1~0.offset|)))) (<= 1 main_~i~0))} is VALID [2022-04-07 21:59:50,903 INFO L290 TraceCheckUtils]: 25: Hoare triple {2016#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2012#(or (not (<= 0 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 1 main_~i~0))} is VALID [2022-04-07 21:59:50,905 INFO L290 TraceCheckUtils]: 24: Hoare triple {2020#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2016#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~j~0)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 21:59:50,906 INFO L290 TraceCheckUtils]: 23: Hoare triple {2024#(or (not (<= 2 main_~i~0)) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (<= 3 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2020#(or (<= 2 main_~i~0) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 21:59:50,907 INFO L290 TraceCheckUtils]: 22: Hoare triple {2028#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (<= 3 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2024#(or (not (<= 2 main_~i~0)) (and (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)))) (<= 3 main_~i~0))} is VALID [2022-04-07 21:59:50,908 INFO L290 TraceCheckUtils]: 21: Hoare triple {2032#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2028#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (<= 3 main_~i~0))} is VALID [2022-04-07 21:59:50,910 INFO L290 TraceCheckUtils]: 20: Hoare triple {2036#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2032#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} is VALID [2022-04-07 21:59:50,911 INFO L290 TraceCheckUtils]: 19: Hoare triple {2040#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 4 main_~i~0)) (<= 5 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2036#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} is VALID [2022-04-07 21:59:50,912 INFO L290 TraceCheckUtils]: 18: Hoare triple {2044#(or (not (<= 4 main_~i~0)) (and (or (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)))) (<= 5 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2040#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)))) (not (<= 4 main_~i~0)) (<= 5 main_~i~0))} is VALID [2022-04-07 21:59:50,914 INFO L290 TraceCheckUtils]: 17: Hoare triple {1839#true} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2044#(or (not (<= 4 main_~i~0)) (and (or (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)))) (<= 5 main_~i~0))} is VALID [2022-04-07 21:59:50,914 INFO L290 TraceCheckUtils]: 16: Hoare triple {1839#true} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:50,914 INFO L290 TraceCheckUtils]: 15: Hoare triple {1839#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1839#true} is VALID [2022-04-07 21:59:50,914 INFO L290 TraceCheckUtils]: 14: Hoare triple {1839#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1839#true} is VALID [2022-04-07 21:59:50,914 INFO L290 TraceCheckUtils]: 13: Hoare triple {1839#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1839#true} is VALID [2022-04-07 21:59:50,915 INFO L290 TraceCheckUtils]: 12: Hoare triple {1839#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1839#true} is VALID [2022-04-07 21:59:50,915 INFO L290 TraceCheckUtils]: 11: Hoare triple {1839#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1839#true} is VALID [2022-04-07 21:59:50,915 INFO L290 TraceCheckUtils]: 10: Hoare triple {1839#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1839#true} is VALID [2022-04-07 21:59:50,915 INFO L290 TraceCheckUtils]: 9: Hoare triple {1839#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1839#true} is VALID [2022-04-07 21:59:50,915 INFO L290 TraceCheckUtils]: 8: Hoare triple {1839#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1839#true} is VALID [2022-04-07 21:59:50,915 INFO L290 TraceCheckUtils]: 7: Hoare triple {1839#true} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {1839#true} is VALID [2022-04-07 21:59:50,915 INFO L290 TraceCheckUtils]: 6: Hoare triple {1839#true} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {1839#true} is VALID [2022-04-07 21:59:50,915 INFO L290 TraceCheckUtils]: 5: Hoare triple {1839#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {1839#true} is VALID [2022-04-07 21:59:50,916 INFO L272 TraceCheckUtils]: 4: Hoare triple {1839#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:50,916 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1839#true} {1839#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:50,916 INFO L290 TraceCheckUtils]: 2: Hoare triple {1839#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:50,916 INFO L290 TraceCheckUtils]: 1: Hoare triple {1839#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1839#true} is VALID [2022-04-07 21:59:50,916 INFO L272 TraceCheckUtils]: 0: Hoare triple {1839#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1839#true} is VALID [2022-04-07 21:59:50,916 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 21:59:50,917 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [36914122] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 21:59:50,917 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 21:59:50,917 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 18] total 50 [2022-04-07 21:59:50,917 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614390372] [2022-04-07 21:59:50,917 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 21:59:50,918 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 21:59:50,918 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 21:59:50,918 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 21:59:51,006 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 21:59:51,006 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-07 21:59:51,006 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 21:59:51,007 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-07 21:59:51,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=303, Invalid=2147, Unknown=0, NotChecked=0, Total=2450 [2022-04-07 21:59:51,008 INFO L87 Difference]: Start difference. First operand 47 states and 51 transitions. Second operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:00:07,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:07,194 INFO L93 Difference]: Finished difference Result 147 states and 174 transitions. [2022-04-07 22:00:07,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2022-04-07 22:00:07,195 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-07 22:00:07,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:00:07,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:00:07,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 168 transitions. [2022-04-07 22:00:07,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:00:07,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 168 transitions. [2022-04-07 22:00:07,208 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 73 states and 168 transitions. [2022-04-07 22:00:07,464 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 168 edges. 168 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:00:07,467 INFO L225 Difference]: With dead ends: 147 [2022-04-07 22:00:07,467 INFO L226 Difference]: Without dead ends: 145 [2022-04-07 22:00:07,471 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 42 SyntacticMatches, 5 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3633 ImplicationChecksByTransitivity, 8.7s TimeCoverageRelationStatistics Valid=2087, Invalid=12193, Unknown=0, NotChecked=0, Total=14280 [2022-04-07 22:00:07,472 INFO L913 BasicCegarLoop]: 27 mSDtfsCounter, 312 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 1871 mSolverCounterSat, 694 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 312 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 2565 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 694 IncrementalHoareTripleChecker+Valid, 1871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:00:07,472 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [312 Valid, 134 Invalid, 2565 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [694 Valid, 1871 Invalid, 0 Unknown, 0 Unchecked, 4.2s Time] [2022-04-07 22:00:07,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2022-04-07 22:00:07,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 42. [2022-04-07 22:00:07,572 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:00:07,573 INFO L82 GeneralOperation]: Start isEquivalent. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:00:07,573 INFO L74 IsIncluded]: Start isIncluded. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:00:07,573 INFO L87 Difference]: Start difference. First operand 145 states. Second operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:00:07,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:07,579 INFO L93 Difference]: Finished difference Result 145 states and 172 transitions. [2022-04-07 22:00:07,579 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 172 transitions. [2022-04-07 22:00:07,579 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:00:07,579 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:00:07,580 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 145 states. [2022-04-07 22:00:07,580 INFO L87 Difference]: Start difference. First operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) Second operand 145 states. [2022-04-07 22:00:07,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:07,585 INFO L93 Difference]: Finished difference Result 145 states and 172 transitions. [2022-04-07 22:00:07,586 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 172 transitions. [2022-04-07 22:00:07,586 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:00:07,586 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:00:07,586 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:00:07,586 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:00:07,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 34 states have (on average 1.088235294117647) internal successors, (37), 35 states have internal predecessors, (37), 4 states have call successors, (4), 4 states have call predecessors, (4), 3 states have return successors, (3), 2 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-07 22:00:07,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 44 transitions. [2022-04-07 22:00:07,588 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 44 transitions. Word has length 35 [2022-04-07 22:00:07,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:00:07,588 INFO L478 AbstractCegarLoop]: Abstraction has 42 states and 44 transitions. [2022-04-07 22:00:07,588 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 49 states have (on average 1.3673469387755102) internal successors, (67), 47 states have internal predecessors, (67), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-07 22:00:07,589 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 44 transitions. [2022-04-07 22:00:07,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-04-07 22:00:07,589 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:00:07,589 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:00:07,610 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-07 22:00:07,803 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:00:07,803 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:00:07,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:00:07,804 INFO L85 PathProgramCache]: Analyzing trace with hash -349680096, now seen corresponding path program 1 times [2022-04-07 22:00:07,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:00:07,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336029040] [2022-04-07 22:00:07,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:00:07,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:00:07,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:08,034 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:00:08,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:08,040 INFO L290 TraceCheckUtils]: 0: Hoare triple {2821#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2806#true} is VALID [2022-04-07 22:00:08,040 INFO L290 TraceCheckUtils]: 1: Hoare triple {2806#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,040 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2806#true} {2806#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,040 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-07 22:00:08,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:08,052 INFO L290 TraceCheckUtils]: 0: Hoare triple {2806#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2806#true} is VALID [2022-04-07 22:00:08,053 INFO L290 TraceCheckUtils]: 1: Hoare triple {2806#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,053 INFO L290 TraceCheckUtils]: 2: Hoare triple {2806#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,053 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2806#true} {2807#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2807#false} is VALID [2022-04-07 22:00:08,053 INFO L272 TraceCheckUtils]: 0: Hoare triple {2806#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2821#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:00:08,054 INFO L290 TraceCheckUtils]: 1: Hoare triple {2821#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2806#true} is VALID [2022-04-07 22:00:08,054 INFO L290 TraceCheckUtils]: 2: Hoare triple {2806#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,054 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2806#true} {2806#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,054 INFO L272 TraceCheckUtils]: 4: Hoare triple {2806#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,055 INFO L290 TraceCheckUtils]: 5: Hoare triple {2806#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,056 INFO L290 TraceCheckUtils]: 6: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,056 INFO L290 TraceCheckUtils]: 7: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,057 INFO L290 TraceCheckUtils]: 8: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,057 INFO L290 TraceCheckUtils]: 9: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,058 INFO L290 TraceCheckUtils]: 10: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,058 INFO L290 TraceCheckUtils]: 11: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,059 INFO L290 TraceCheckUtils]: 12: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,059 INFO L290 TraceCheckUtils]: 13: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,062 INFO L290 TraceCheckUtils]: 14: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,063 INFO L290 TraceCheckUtils]: 15: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,063 INFO L290 TraceCheckUtils]: 16: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:00:08,065 INFO L290 TraceCheckUtils]: 17: Hoare triple {2811#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2812#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:00:08,070 INFO L290 TraceCheckUtils]: 18: Hoare triple {2812#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2812#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:00:08,072 INFO L290 TraceCheckUtils]: 19: Hoare triple {2812#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2813#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 22:00:08,073 INFO L290 TraceCheckUtils]: 20: Hoare triple {2813#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2813#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 22:00:08,073 INFO L290 TraceCheckUtils]: 21: Hoare triple {2813#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2814#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} is VALID [2022-04-07 22:00:08,074 INFO L290 TraceCheckUtils]: 22: Hoare triple {2814#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2815#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 22:00:08,075 INFO L290 TraceCheckUtils]: 23: Hoare triple {2815#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2816#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 22:00:08,075 INFO L290 TraceCheckUtils]: 24: Hoare triple {2816#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2807#false} is VALID [2022-04-07 22:00:08,075 INFO L290 TraceCheckUtils]: 25: Hoare triple {2807#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2807#false} is VALID [2022-04-07 22:00:08,075 INFO L290 TraceCheckUtils]: 26: Hoare triple {2807#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2807#false} is VALID [2022-04-07 22:00:08,075 INFO L272 TraceCheckUtils]: 27: Hoare triple {2807#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2806#true} is VALID [2022-04-07 22:00:08,075 INFO L290 TraceCheckUtils]: 28: Hoare triple {2806#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2806#true} is VALID [2022-04-07 22:00:08,076 INFO L290 TraceCheckUtils]: 29: Hoare triple {2806#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,076 INFO L290 TraceCheckUtils]: 30: Hoare triple {2806#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:08,076 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2806#true} {2807#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2807#false} is VALID [2022-04-07 22:00:08,076 INFO L290 TraceCheckUtils]: 32: Hoare triple {2807#false} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2807#false} is VALID [2022-04-07 22:00:08,076 INFO L290 TraceCheckUtils]: 33: Hoare triple {2807#false} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2807#false} is VALID [2022-04-07 22:00:08,076 INFO L290 TraceCheckUtils]: 34: Hoare triple {2807#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2807#false} is VALID [2022-04-07 22:00:08,076 INFO L272 TraceCheckUtils]: 35: Hoare triple {2807#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2807#false} is VALID [2022-04-07 22:00:08,076 INFO L290 TraceCheckUtils]: 36: Hoare triple {2807#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2807#false} is VALID [2022-04-07 22:00:08,076 INFO L290 TraceCheckUtils]: 37: Hoare triple {2807#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2807#false} is VALID [2022-04-07 22:00:08,076 INFO L290 TraceCheckUtils]: 38: Hoare triple {2807#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2807#false} is VALID [2022-04-07 22:00:08,076 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-07 22:00:08,077 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:00:08,077 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336029040] [2022-04-07 22:00:08,077 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [336029040] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:00:08,077 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1105569412] [2022-04-07 22:00:08,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:00:08,077 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:00:08,077 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:00:08,078 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:00:08,079 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-07 22:00:08,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:08,155 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 44 conjunts are in the unsatisfiable core [2022-04-07 22:00:08,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:08,170 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:00:08,190 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 22:00:08,490 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2022-04-07 22:00:08,642 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:08,643 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-04-07 22:00:14,240 WARN L855 $PredicateComparison]: unable to prove that (exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (let ((.cse1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (let ((.cse0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 .cse1))) (and (= (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1) (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296)))) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= .cse0 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 .cse1)) (<= .cse0 (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (<= .cse0 (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) .cse0) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|)))))) is different from true [2022-04-07 22:00:20,974 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:00:20,978 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:00:20,979 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 10 [2022-04-07 22:00:21,471 INFO L272 TraceCheckUtils]: 0: Hoare triple {2806#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:21,472 INFO L290 TraceCheckUtils]: 1: Hoare triple {2806#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2806#true} is VALID [2022-04-07 22:00:21,472 INFO L290 TraceCheckUtils]: 2: Hoare triple {2806#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:21,472 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2806#true} {2806#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:21,472 INFO L272 TraceCheckUtils]: 4: Hoare triple {2806#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:21,473 INFO L290 TraceCheckUtils]: 5: Hoare triple {2806#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,473 INFO L290 TraceCheckUtils]: 6: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,474 INFO L290 TraceCheckUtils]: 7: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,474 INFO L290 TraceCheckUtils]: 8: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,474 INFO L290 TraceCheckUtils]: 9: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,475 INFO L290 TraceCheckUtils]: 10: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,475 INFO L290 TraceCheckUtils]: 11: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,477 INFO L290 TraceCheckUtils]: 12: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,477 INFO L290 TraceCheckUtils]: 13: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,478 INFO L290 TraceCheckUtils]: 14: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,478 INFO L290 TraceCheckUtils]: 15: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,478 INFO L290 TraceCheckUtils]: 16: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,479 INFO L290 TraceCheckUtils]: 17: Hoare triple {2840#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {2877#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 22:00:21,480 INFO L290 TraceCheckUtils]: 18: Hoare triple {2877#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2881#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 22:00:21,481 INFO L290 TraceCheckUtils]: 19: Hoare triple {2881#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2885#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,482 INFO L290 TraceCheckUtils]: 20: Hoare triple {2885#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= main_~j~0 1) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2889#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} is VALID [2022-04-07 22:00:21,483 INFO L290 TraceCheckUtils]: 21: Hoare triple {2889#(and (= |main_~#str2~0.offset| 0) (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2893#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} is VALID [2022-04-07 22:00:21,484 INFO L290 TraceCheckUtils]: 22: Hoare triple {2893#(and (= |main_~#str2~0.offset| 0) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {2897#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,485 INFO L290 TraceCheckUtils]: 23: Hoare triple {2897#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {2901#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,486 INFO L290 TraceCheckUtils]: 24: Hoare triple {2901#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2905#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (mod (+ main_~max~0 4294967295) 4294967296) 3) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,488 INFO L290 TraceCheckUtils]: 25: Hoare triple {2905#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (mod (+ main_~max~0 4294967295) 4294967296) 3) (<= 2 (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2909#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:21,489 INFO L290 TraceCheckUtils]: 26: Hoare triple {2909#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2909#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:21,889 INFO L272 TraceCheckUtils]: 27: Hoare triple {2909#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2916#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-07 22:00:21,895 INFO L290 TraceCheckUtils]: 28: Hoare triple {2916#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2916#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-07 22:00:21,901 INFO L290 TraceCheckUtils]: 29: Hoare triple {2916#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2916#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-07 22:00:21,905 INFO L290 TraceCheckUtils]: 30: Hoare triple {2916#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2916#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} is VALID [2022-04-07 22:00:21,907 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2916#(exists ((aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 Int) (|v_main_~#str2~0.base_BEFORE_CALL_1| Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 Int) (aux_div_v_main_~j~0_BEFORE_CALL_1_46 Int) (|v_main_~#str1~0.base_BEFORE_CALL_1| Int)) (and (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168) (< aux_div_v_main_~j~0_BEFORE_CALL_1_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) 4294967295) (< 0 (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_1_46 4294967296) 4294967295)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_1|) (+ (- 1) (mod (+ 4294967295 (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168)) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_1|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296)) (+ (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 4294967296) 4294967293)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 1)) (<= (+ (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143 4294967296) 4294967293) (+ aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_1_46_123_143_168 4294967296))) (not (= |v_main_~#str2~0.base_BEFORE_CALL_1| |v_main_~#str1~0.base_BEFORE_CALL_1|))))} {2909#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2909#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:21,910 INFO L290 TraceCheckUtils]: 32: Hoare triple {2909#(and (= |main_~#str2~0.offset| 0) (< (div (+ (- 2) main_~j~0) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2932#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:21,911 INFO L290 TraceCheckUtils]: 33: Hoare triple {2932#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2936#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 22:00:21,914 INFO L290 TraceCheckUtils]: 34: Hoare triple {2936#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (< (div (+ (- 1) main_~j~0) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2940#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 22:00:21,915 INFO L272 TraceCheckUtils]: 35: Hoare triple {2940#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2944#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:00:21,915 INFO L290 TraceCheckUtils]: 36: Hoare triple {2944#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2948#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:00:21,916 INFO L290 TraceCheckUtils]: 37: Hoare triple {2948#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2807#false} is VALID [2022-04-07 22:00:21,916 INFO L290 TraceCheckUtils]: 38: Hoare triple {2807#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2807#false} is VALID [2022-04-07 22:00:21,916 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 25 trivial. 2 not checked. [2022-04-07 22:00:21,916 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:00:22,614 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:00:22,614 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 218 treesize of output 206 [2022-04-07 22:00:23,107 INFO L356 Elim1Store]: treesize reduction 31, result has 34.0 percent of original size [2022-04-07 22:00:23,108 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 233 treesize of output 206 [2022-04-07 22:00:23,208 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:23,211 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 47 [2022-04-07 22:00:23,234 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 436 treesize of output 400 [2022-04-07 22:00:23,370 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-04-07 22:00:23,370 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 105 treesize of output 92 [2022-04-07 22:00:23,436 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:23,437 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-07 22:00:23,451 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 236 treesize of output 218 [2022-04-07 22:00:23,581 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:23,582 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-07 22:00:23,589 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:23,590 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:00:23,605 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:23,611 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-07 22:00:23,611 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 129 treesize of output 108 [2022-04-07 22:00:23,691 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:00:23,691 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 218 treesize of output 206 [2022-04-07 22:00:24,111 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:24,117 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:00:24,117 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 256 treesize of output 227 [2022-04-07 22:00:24,472 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:24,473 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-07 22:00:24,489 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:00:24,494 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-07 22:00:25,976 INFO L290 TraceCheckUtils]: 38: Hoare triple {2807#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2807#false} is VALID [2022-04-07 22:00:25,977 INFO L290 TraceCheckUtils]: 37: Hoare triple {2948#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2807#false} is VALID [2022-04-07 22:00:25,978 INFO L290 TraceCheckUtils]: 36: Hoare triple {2944#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2948#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:00:25,978 INFO L272 TraceCheckUtils]: 35: Hoare triple {2940#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2944#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:00:25,979 INFO L290 TraceCheckUtils]: 34: Hoare triple {2967#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2940#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 22:00:25,980 INFO L290 TraceCheckUtils]: 33: Hoare triple {2971#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {2967#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 22:00:25,981 INFO L290 TraceCheckUtils]: 32: Hoare triple {2975#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {2971#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-07 22:00:25,982 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {2806#true} {2975#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2975#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:00:25,982 INFO L290 TraceCheckUtils]: 30: Hoare triple {2806#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:25,982 INFO L290 TraceCheckUtils]: 29: Hoare triple {2806#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:25,982 INFO L290 TraceCheckUtils]: 28: Hoare triple {2806#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2806#true} is VALID [2022-04-07 22:00:25,982 INFO L272 TraceCheckUtils]: 27: Hoare triple {2975#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {2806#true} is VALID [2022-04-07 22:00:25,983 INFO L290 TraceCheckUtils]: 26: Hoare triple {2975#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {2975#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:00:25,984 INFO L290 TraceCheckUtils]: 25: Hoare triple {2997#(and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {2975#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:00:25,985 INFO L290 TraceCheckUtils]: 24: Hoare triple {3001#(or (<= 0 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {2997#(and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))))} is VALID [2022-04-07 22:00:25,987 INFO L290 TraceCheckUtils]: 23: Hoare triple {3005#(or (<= 1 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3001#(or (<= 0 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} is VALID [2022-04-07 22:00:25,989 INFO L290 TraceCheckUtils]: 22: Hoare triple {3009#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_232 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (forall ((v_ArrVal_232 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 0 main_~i~0)) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3005#(or (<= 1 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} is VALID [2022-04-07 22:00:25,991 INFO L290 TraceCheckUtils]: 21: Hoare triple {3013#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_232 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (forall ((v_ArrVal_232 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 2 main_~i~0) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3009#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_232 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (forall ((v_ArrVal_232 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (not (<= 0 main_~i~0)) (<= 1 main_~i~0))} is VALID [2022-04-07 22:00:25,994 INFO L290 TraceCheckUtils]: 20: Hoare triple {3017#(or (<= 2 main_~i~0) (and (or (and (or (and (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|)))) (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|)))))) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3013#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_232 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (forall ((v_ArrVal_232 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_232) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 2 main_~i~0) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 22:00:25,996 INFO L290 TraceCheckUtils]: 19: Hoare triple {3021#(or (not (<= 2 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (and (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|)))) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|)))))) (<= 3 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3017#(or (<= 2 main_~i~0) (and (or (and (or (and (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|)))) (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|)))))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 22:00:25,999 INFO L290 TraceCheckUtils]: 18: Hoare triple {3025#(or (not (<= 2 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296)) (and (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3021#(or (not (<= 2 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (and (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|)))) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296))) (or (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|)))))) (<= 3 main_~i~0))} is VALID [2022-04-07 22:00:26,001 INFO L290 TraceCheckUtils]: 17: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3025#(or (not (<= 2 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967296)) (and (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2))) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} is VALID [2022-04-07 22:00:26,002 INFO L290 TraceCheckUtils]: 16: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,002 INFO L290 TraceCheckUtils]: 15: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,003 INFO L290 TraceCheckUtils]: 14: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,004 INFO L290 TraceCheckUtils]: 13: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,004 INFO L290 TraceCheckUtils]: 12: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,005 INFO L290 TraceCheckUtils]: 11: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,006 INFO L290 TraceCheckUtils]: 10: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,007 INFO L290 TraceCheckUtils]: 9: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,007 INFO L290 TraceCheckUtils]: 8: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,008 INFO L290 TraceCheckUtils]: 7: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,009 INFO L290 TraceCheckUtils]: 6: Hoare triple {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,010 INFO L290 TraceCheckUtils]: 5: Hoare triple {2806#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {3029#(or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:00:26,010 INFO L272 TraceCheckUtils]: 4: Hoare triple {2806#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:26,010 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2806#true} {2806#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:26,010 INFO L290 TraceCheckUtils]: 2: Hoare triple {2806#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:26,010 INFO L290 TraceCheckUtils]: 1: Hoare triple {2806#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2806#true} is VALID [2022-04-07 22:00:26,010 INFO L272 TraceCheckUtils]: 0: Hoare triple {2806#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2806#true} is VALID [2022-04-07 22:00:26,011 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 22:00:26,011 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1105569412] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:00:26,011 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:00:26,011 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 18, 17] total 37 [2022-04-07 22:00:26,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067998086] [2022-04-07 22:00:26,011 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:00:26,012 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 39 [2022-04-07 22:00:26,012 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:00:26,013 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:26,945 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:00:26,945 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-07 22:00:26,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:00:26,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-07 22:00:26,946 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=1107, Unknown=1, NotChecked=68, Total=1332 [2022-04-07 22:00:26,946 INFO L87 Difference]: Start difference. First operand 42 states and 44 transitions. Second operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:31,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:31,974 INFO L93 Difference]: Finished difference Result 84 states and 92 transitions. [2022-04-07 22:00:31,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-07 22:00:31,975 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 39 [2022-04-07 22:00:31,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:00:31,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:31,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 78 transitions. [2022-04-07 22:00:31,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:31,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 78 transitions. [2022-04-07 22:00:31,994 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 78 transitions. [2022-04-07 22:00:32,095 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:00:32,096 INFO L225 Difference]: With dead ends: 84 [2022-04-07 22:00:32,096 INFO L226 Difference]: Without dead ends: 67 [2022-04-07 22:00:32,098 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 53 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 807 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=499, Invalid=3164, Unknown=1, NotChecked=118, Total=3782 [2022-04-07 22:00:32,098 INFO L913 BasicCegarLoop]: 14 mSDtfsCounter, 46 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 626 mSolverCounterSat, 144 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 925 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 144 IncrementalHoareTripleChecker+Valid, 626 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 155 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:00:32,098 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [46 Valid, 101 Invalid, 925 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [144 Valid, 626 Invalid, 0 Unknown, 155 Unchecked, 1.2s Time] [2022-04-07 22:00:32,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-04-07 22:00:32,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 59. [2022-04-07 22:00:32,235 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:00:32,235 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:00:32,235 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:00:32,235 INFO L87 Difference]: Start difference. First operand 67 states. Second operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:00:32,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:32,237 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2022-04-07 22:00:32,237 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2022-04-07 22:00:32,238 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:00:32,238 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:00:32,238 INFO L74 IsIncluded]: Start isIncluded. First operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 67 states. [2022-04-07 22:00:32,238 INFO L87 Difference]: Start difference. First operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) Second operand 67 states. [2022-04-07 22:00:32,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:32,240 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2022-04-07 22:00:32,240 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2022-04-07 22:00:32,241 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:00:32,241 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:00:32,241 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:00:32,241 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:00:32,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 48 states have (on average 1.1041666666666667) internal successors, (53), 50 states have internal predecessors, (53), 6 states have call successors, (6), 5 states have call predecessors, (6), 4 states have return successors, (5), 3 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:00:32,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 64 transitions. [2022-04-07 22:00:32,243 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 64 transitions. Word has length 39 [2022-04-07 22:00:32,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:00:32,243 INFO L478 AbstractCegarLoop]: Abstraction has 59 states and 64 transitions. [2022-04-07 22:00:32,243 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 36 states have (on average 1.7777777777777777) internal successors, (64), 35 states have internal predecessors, (64), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:32,244 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 64 transitions. [2022-04-07 22:00:32,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-04-07 22:00:32,244 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:00:32,244 INFO L499 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:00:32,269 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-07 22:00:32,468 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:00:32,468 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:00:32,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:00:32,469 INFO L85 PathProgramCache]: Analyzing trace with hash -821800838, now seen corresponding path program 2 times [2022-04-07 22:00:32,469 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:00:32,469 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804664620] [2022-04-07 22:00:32,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:00:32,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:00:32,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:32,686 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:00:32,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:32,695 INFO L290 TraceCheckUtils]: 0: Hoare triple {3490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3474#true} is VALID [2022-04-07 22:00:32,698 INFO L290 TraceCheckUtils]: 1: Hoare triple {3474#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,698 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3474#true} {3474#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,699 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-04-07 22:00:32,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:32,703 INFO L290 TraceCheckUtils]: 0: Hoare triple {3474#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3474#true} is VALID [2022-04-07 22:00:32,703 INFO L290 TraceCheckUtils]: 1: Hoare triple {3474#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,703 INFO L290 TraceCheckUtils]: 2: Hoare triple {3474#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,703 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3474#true} {3475#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3475#false} is VALID [2022-04-07 22:00:32,703 INFO L272 TraceCheckUtils]: 0: Hoare triple {3474#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:00:32,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {3490#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3474#true} is VALID [2022-04-07 22:00:32,704 INFO L290 TraceCheckUtils]: 2: Hoare triple {3474#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,704 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3474#true} {3474#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,704 INFO L272 TraceCheckUtils]: 4: Hoare triple {3474#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,705 INFO L290 TraceCheckUtils]: 5: Hoare triple {3474#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,705 INFO L290 TraceCheckUtils]: 6: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,706 INFO L290 TraceCheckUtils]: 7: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,706 INFO L290 TraceCheckUtils]: 8: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,706 INFO L290 TraceCheckUtils]: 9: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,707 INFO L290 TraceCheckUtils]: 10: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,707 INFO L290 TraceCheckUtils]: 11: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,708 INFO L290 TraceCheckUtils]: 12: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,708 INFO L290 TraceCheckUtils]: 13: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,709 INFO L290 TraceCheckUtils]: 14: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,709 INFO L290 TraceCheckUtils]: 15: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,710 INFO L290 TraceCheckUtils]: 16: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} is VALID [2022-04-07 22:00:32,711 INFO L290 TraceCheckUtils]: 17: Hoare triple {3479#(and (not (<= (div (+ main_~max~0 4294967295) 4294967296) 0)) (<= main_~max~0 5))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3480#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:00:32,712 INFO L290 TraceCheckUtils]: 18: Hoare triple {3480#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3480#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:00:32,713 INFO L290 TraceCheckUtils]: 19: Hoare triple {3480#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (or (<= main_~max~0 5) (and (<= main_~max~0 4294967301) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3481#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:00:32,713 INFO L290 TraceCheckUtils]: 20: Hoare triple {3481#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3481#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:00:32,714 INFO L290 TraceCheckUtils]: 21: Hoare triple {3481#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967299) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3482#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} is VALID [2022-04-07 22:00:32,714 INFO L290 TraceCheckUtils]: 22: Hoare triple {3482#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3482#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} is VALID [2022-04-07 22:00:32,715 INFO L290 TraceCheckUtils]: 23: Hoare triple {3482#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967298))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3483#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} is VALID [2022-04-07 22:00:32,716 INFO L290 TraceCheckUtils]: 24: Hoare triple {3483#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3483#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} is VALID [2022-04-07 22:00:32,716 INFO L290 TraceCheckUtils]: 25: Hoare triple {3483#(and (< 0 (div (+ main_~max~0 4294967295) 4294967296)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967297))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3484#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:00:32,717 INFO L290 TraceCheckUtils]: 26: Hoare triple {3484#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3484#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:00:32,717 INFO L290 TraceCheckUtils]: 27: Hoare triple {3484#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967296) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3485#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967295) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} is VALID [2022-04-07 22:00:32,718 INFO L290 TraceCheckUtils]: 28: Hoare triple {3485#(and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) 4294967295) (< 0 (div (+ main_~max~0 4294967295) 4294967296)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3475#false} is VALID [2022-04-07 22:00:32,718 INFO L290 TraceCheckUtils]: 29: Hoare triple {3475#false} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3475#false} is VALID [2022-04-07 22:00:32,718 INFO L290 TraceCheckUtils]: 30: Hoare triple {3475#false} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {3475#false} is VALID [2022-04-07 22:00:32,718 INFO L290 TraceCheckUtils]: 31: Hoare triple {3475#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {3475#false} is VALID [2022-04-07 22:00:32,718 INFO L290 TraceCheckUtils]: 32: Hoare triple {3475#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3475#false} is VALID [2022-04-07 22:00:32,718 INFO L272 TraceCheckUtils]: 33: Hoare triple {3475#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3474#true} is VALID [2022-04-07 22:00:32,718 INFO L290 TraceCheckUtils]: 34: Hoare triple {3474#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3474#true} is VALID [2022-04-07 22:00:32,718 INFO L290 TraceCheckUtils]: 35: Hoare triple {3474#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,718 INFO L290 TraceCheckUtils]: 36: Hoare triple {3474#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:32,718 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {3474#true} {3475#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3475#false} is VALID [2022-04-07 22:00:32,719 INFO L290 TraceCheckUtils]: 38: Hoare triple {3475#false} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {3475#false} is VALID [2022-04-07 22:00:32,719 INFO L290 TraceCheckUtils]: 39: Hoare triple {3475#false} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {3475#false} is VALID [2022-04-07 22:00:32,719 INFO L290 TraceCheckUtils]: 40: Hoare triple {3475#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3475#false} is VALID [2022-04-07 22:00:32,719 INFO L272 TraceCheckUtils]: 41: Hoare triple {3475#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3475#false} is VALID [2022-04-07 22:00:32,719 INFO L290 TraceCheckUtils]: 42: Hoare triple {3475#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3475#false} is VALID [2022-04-07 22:00:32,719 INFO L290 TraceCheckUtils]: 43: Hoare triple {3475#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3475#false} is VALID [2022-04-07 22:00:32,719 INFO L290 TraceCheckUtils]: 44: Hoare triple {3475#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3475#false} is VALID [2022-04-07 22:00:32,719 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 29 proven. 9 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-04-07 22:00:32,719 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:00:32,719 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804664620] [2022-04-07 22:00:32,720 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1804664620] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:00:32,720 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [237787292] [2022-04-07 22:00:32,720 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-07 22:00:32,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:00:32,720 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:00:32,721 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:00:32,721 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-07 22:00:32,797 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-07 22:00:32,797 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:00:32,799 INFO L263 TraceCheckSpWp]: Trace formula consists of 216 conjuncts, 57 conjunts are in the unsatisfiable core [2022-04-07 22:00:32,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:00:32,818 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:00:32,835 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 22:00:33,440 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2022-04-07 22:00:33,614 INFO L356 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-04-07 22:00:33,614 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 32 [2022-04-07 22:00:38,257 WARN L855 $PredicateComparison]: unable to prove that (exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (let ((.cse1 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296))) (let ((.cse0 (+ .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))) (and (<= .cse0 (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= .cse0 (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4))) (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4))) (<= .cse0 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 .cse1 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)))))) is different from true [2022-04-07 22:00:45,963 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:00:45,971 INFO L356 Elim1Store]: treesize reduction 15, result has 16.7 percent of original size [2022-04-07 22:00:45,971 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 13 [2022-04-07 22:00:46,515 INFO L272 TraceCheckUtils]: 0: Hoare triple {3474#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:46,515 INFO L290 TraceCheckUtils]: 1: Hoare triple {3474#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3474#true} is VALID [2022-04-07 22:00:46,515 INFO L290 TraceCheckUtils]: 2: Hoare triple {3474#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:46,515 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3474#true} {3474#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:46,515 INFO L272 TraceCheckUtils]: 4: Hoare triple {3474#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:46,516 INFO L290 TraceCheckUtils]: 5: Hoare triple {3474#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,517 INFO L290 TraceCheckUtils]: 6: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,517 INFO L290 TraceCheckUtils]: 7: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,518 INFO L290 TraceCheckUtils]: 8: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,518 INFO L290 TraceCheckUtils]: 9: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,518 INFO L290 TraceCheckUtils]: 10: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,519 INFO L290 TraceCheckUtils]: 11: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,519 INFO L290 TraceCheckUtils]: 12: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,520 INFO L290 TraceCheckUtils]: 13: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,520 INFO L290 TraceCheckUtils]: 14: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,520 INFO L290 TraceCheckUtils]: 15: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,521 INFO L290 TraceCheckUtils]: 16: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,522 INFO L290 TraceCheckUtils]: 17: Hoare triple {3509#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3546#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 22:00:46,523 INFO L290 TraceCheckUtils]: 18: Hoare triple {3546#(and (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3550#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 22:00:46,523 INFO L290 TraceCheckUtils]: 19: Hoare triple {3550#(and (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3554#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,524 INFO L290 TraceCheckUtils]: 20: Hoare triple {3554#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= (+ (- 1) main_~j~0) 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3558#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,525 INFO L290 TraceCheckUtils]: 21: Hoare triple {3558#(and (or (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) (+ main_~i~0 1)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3562#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,526 INFO L290 TraceCheckUtils]: 22: Hoare triple {3562#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (= main_~j~0 2) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3566#(and (= main_~j~0 3) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,528 INFO L290 TraceCheckUtils]: 23: Hoare triple {3566#(and (= main_~j~0 3) (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 2) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 2)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3570#(and (= main_~j~0 3) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 22:00:46,530 INFO L290 TraceCheckUtils]: 24: Hoare triple {3570#(and (= main_~j~0 3) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3574#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (= (+ (- 1) main_~j~0) 3))} is VALID [2022-04-07 22:00:46,531 INFO L290 TraceCheckUtils]: 25: Hoare triple {3574#(and (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 3))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 3) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (= (+ (- 1) main_~j~0) 3))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3578#(and (= |main_~#str1~0.offset| 0) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 3))} is VALID [2022-04-07 22:00:46,532 INFO L290 TraceCheckUtils]: 26: Hoare triple {3578#(and (= |main_~#str1~0.offset| 0) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 3))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3582#(and (= |main_~#str1~0.offset| 0) (= (+ (- 2) main_~j~0) 3) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,534 INFO L290 TraceCheckUtils]: 27: Hoare triple {3582#(and (= |main_~#str1~0.offset| 0) (= (+ (- 2) main_~j~0) 3) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (+ main_~i~0 4) (mod (+ main_~max~0 4294967295) 4294967296))) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ main_~i~0 4) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3586#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ 5 main_~i~0) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (= |main_~#str1~0.offset| 0) (= (+ (- 2) main_~j~0) 3) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,535 INFO L290 TraceCheckUtils]: 28: Hoare triple {3586#(and (or (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (+ 5 main_~i~0) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296)))) (and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (= |main_~#str1~0.offset| 0) (= (+ (- 2) main_~j~0) 3) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3590#(and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,536 INFO L290 TraceCheckUtils]: 29: Hoare triple {3590#(and (= (+ 5 main_~i~0) (mod (+ main_~max~0 4294967295) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3594#(and (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 5)) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,536 INFO L290 TraceCheckUtils]: 30: Hoare triple {3594#(and (= (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 5)) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {3598#(and (< (mod (+ main_~max~0 4294967295) 4294967296) 6) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:00:46,538 INFO L290 TraceCheckUtils]: 31: Hoare triple {3598#(and (< (mod (+ main_~max~0 4294967295) 4294967296) 6) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4))) (= |main_~#str1~0.offset| 0) (<= 5 (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {3602#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-07 22:00:46,539 INFO L290 TraceCheckUtils]: 32: Hoare triple {3602#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3602#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-07 22:00:46,742 INFO L272 TraceCheckUtils]: 33: Hoare triple {3602#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3609#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-07 22:00:46,753 INFO L290 TraceCheckUtils]: 34: Hoare triple {3609#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3609#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-07 22:00:46,759 INFO L290 TraceCheckUtils]: 35: Hoare triple {3609#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3609#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-07 22:00:46,765 INFO L290 TraceCheckUtils]: 36: Hoare triple {3609#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3609#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} is VALID [2022-04-07 22:00:46,767 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {3609#(exists ((aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (|v_main_~#str2~0.base_BEFORE_CALL_3| Int) (aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 Int) (|v_main_~#str2~0.offset_BEFORE_CALL_3| Int) (|v_main_~#str1~0.base_BEFORE_CALL_3| Int) (aux_div_v_main_~j~0_BEFORE_CALL_3_56 Int)) (and (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (+ (* 4294967296 aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119) 5)) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (* aux_div_v_main_~j~0_BEFORE_CALL_3_56 4294967296)) (< 0 (+ 4294967291 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172)) (< aux_div_v_main_~j~0_BEFORE_CALL_3_56 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 1)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_3|) (+ |v_main_~#str2~0.offset_BEFORE_CALL_3| 4)) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_3|) (+ (mod (+ (* 4294967295 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) 4294967296) (- 4)))) (<= (+ (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) 5) (not (= |v_main_~#str2~0.base_BEFORE_CALL_3| |v_main_~#str1~0.base_BEFORE_CALL_3|)) (< aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119 (+ aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 1)) (<= 0 aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172) (<= (* aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154 4294967296) (+ 4294967290 (* aux_div_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172 4294967296) aux_mod_aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_3_56_119_154_172))))} {3602#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3602#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} is VALID [2022-04-07 22:00:46,769 INFO L290 TraceCheckUtils]: 38: Hoare triple {3602#(and (< (div (+ main_~j~0 (- 5)) (- 4294967296)) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod main_~j~0 4294967296) (- 4) |main_~#str1~0.offset|))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 5 (* (- 1) main_~j~0)) 4294967296) 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {3625#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-07 22:00:46,770 INFO L290 TraceCheckUtils]: 39: Hoare triple {3625#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {3629#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-07 22:00:46,773 INFO L290 TraceCheckUtils]: 40: Hoare triple {3629#(and (= (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 4)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (mod (+ main_~j~0 1) 4294967296) (- 4) |main_~#str1~0.offset|))) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (< (div (+ main_~j~0 (- 4)) (- 4294967296)) (+ (div (+ 4294967294 (* (- 1) main_~j~0)) 4294967296) 1)) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3633#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 22:00:46,773 INFO L272 TraceCheckUtils]: 41: Hoare triple {3633#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3637#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:00:46,774 INFO L290 TraceCheckUtils]: 42: Hoare triple {3637#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3641#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:00:46,774 INFO L290 TraceCheckUtils]: 43: Hoare triple {3641#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3475#false} is VALID [2022-04-07 22:00:46,774 INFO L290 TraceCheckUtils]: 44: Hoare triple {3475#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3475#false} is VALID [2022-04-07 22:00:46,775 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 25 trivial. 2 not checked. [2022-04-07 22:00:46,775 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:00:47,468 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:00:47,469 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 218 treesize of output 206 [2022-04-07 22:00:48,111 INFO L356 Elim1Store]: treesize reduction 25, result has 46.8 percent of original size [2022-04-07 22:00:48,112 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 515 treesize of output 452 [2022-04-07 22:00:48,802 INFO L356 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-04-07 22:00:48,803 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 1 [2022-04-07 22:00:48,830 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:00:48,831 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 218 treesize of output 206 [2022-04-07 22:00:49,652 INFO L356 Elim1Store]: treesize reduction 30, result has 36.2 percent of original size [2022-04-07 22:00:49,653 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 505 treesize of output 437 [2022-04-07 22:00:49,854 INFO L356 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-04-07 22:00:49,855 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 71 treesize of output 1 [2022-04-07 22:00:49,899 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:49,900 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2022-04-07 22:00:49,912 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 236 treesize of output 218 [2022-04-07 22:00:50,001 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:00:50,006 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-04-07 22:00:50,006 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 284 treesize of output 218 [2022-04-07 22:00:50,109 INFO L356 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-04-07 22:00:50,109 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 1 [2022-04-07 22:00:51,510 INFO L290 TraceCheckUtils]: 44: Hoare triple {3475#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3475#false} is VALID [2022-04-07 22:00:51,510 INFO L290 TraceCheckUtils]: 43: Hoare triple {3641#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3475#false} is VALID [2022-04-07 22:00:51,511 INFO L290 TraceCheckUtils]: 42: Hoare triple {3637#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3641#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:00:51,511 INFO L272 TraceCheckUtils]: 41: Hoare triple {3633#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3637#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:00:51,512 INFO L290 TraceCheckUtils]: 40: Hoare triple {3660#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3633#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 22:00:51,513 INFO L290 TraceCheckUtils]: 39: Hoare triple {3664#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {3660#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 22:00:51,513 INFO L290 TraceCheckUtils]: 38: Hoare triple {3668#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {3664#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-07 22:00:51,514 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {3474#true} {3668#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3668#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:00:51,514 INFO L290 TraceCheckUtils]: 36: Hoare triple {3474#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:51,514 INFO L290 TraceCheckUtils]: 35: Hoare triple {3474#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:51,514 INFO L290 TraceCheckUtils]: 34: Hoare triple {3474#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3474#true} is VALID [2022-04-07 22:00:51,514 INFO L272 TraceCheckUtils]: 33: Hoare triple {3668#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {3474#true} is VALID [2022-04-07 22:00:51,515 INFO L290 TraceCheckUtils]: 32: Hoare triple {3668#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {3668#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:00:51,516 INFO L290 TraceCheckUtils]: 31: Hoare triple {3690#(and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {3668#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:00:51,517 INFO L290 TraceCheckUtils]: 30: Hoare triple {3694#(or (<= 0 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {3690#(and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))))} is VALID [2022-04-07 22:00:51,518 INFO L290 TraceCheckUtils]: 29: Hoare triple {3698#(or (<= 1 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3694#(or (<= 0 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} is VALID [2022-04-07 22:00:51,524 INFO L290 TraceCheckUtils]: 28: Hoare triple {3702#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_295 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_295 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))))))) (not (<= 0 main_~i~0)) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3698#(or (<= 1 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))) (select (select |#memory_int| |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1))))))} is VALID [2022-04-07 22:00:51,527 INFO L290 TraceCheckUtils]: 27: Hoare triple {3706#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_295 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_295 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))))))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3702#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_295 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_295 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))))))) (not (<= 0 main_~i~0)) (<= 1 main_~i~0))} is VALID [2022-04-07 22:00:51,530 INFO L290 TraceCheckUtils]: 26: Hoare triple {3710#(or (<= 2 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3706#(or (<= 2 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_295 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (forall ((v_ArrVal_295 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295)) |main_~#str1~0.base|) (+ |main_~#str1~0.offset| 1)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_295) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967297))))))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 22:00:51,531 INFO L290 TraceCheckUtils]: 25: Hoare triple {3714#(or (not (<= 2 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3710#(or (<= 2 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 22:00:51,533 INFO L290 TraceCheckUtils]: 24: Hoare triple {3718#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3714#(or (not (<= 2 main_~i~0)) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967297) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} is VALID [2022-04-07 22:00:51,534 INFO L290 TraceCheckUtils]: 23: Hoare triple {3722#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3718#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 3 main_~i~0))} is VALID [2022-04-07 22:00:51,536 INFO L290 TraceCheckUtils]: 22: Hoare triple {3726#(or (not (<= 3 main_~i~0)) (<= 4 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3722#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} is VALID [2022-04-07 22:00:51,537 INFO L290 TraceCheckUtils]: 21: Hoare triple {3730#(or (not (<= 4 main_~i~0)) (<= 5 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3726#(or (not (<= 3 main_~i~0)) (<= 4 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))))} is VALID [2022-04-07 22:00:51,540 INFO L290 TraceCheckUtils]: 20: Hoare triple {3734#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4))))) (not (<= 4 main_~i~0)) (<= 5 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3730#(or (not (<= 4 main_~i~0)) (<= 5 main_~i~0) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))))))} is VALID [2022-04-07 22:00:51,541 INFO L290 TraceCheckUtils]: 19: Hoare triple {3738#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4))))) (not (<= 5 main_~i~0)) (<= 6 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {3734#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4))))) (not (<= 4 main_~i~0)) (<= 5 main_~i~0))} is VALID [2022-04-07 22:00:51,543 INFO L290 TraceCheckUtils]: 18: Hoare triple {3742#(or (not (<= 5 main_~i~0)) (<= 6 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967301) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ 5 main_~j~0))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {3738#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4))))) (not (<= 5 main_~i~0)) (<= 6 main_~i~0))} is VALID [2022-04-07 22:00:51,548 INFO L290 TraceCheckUtils]: 17: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {3742#(or (not (<= 5 main_~i~0)) (<= 6 main_~i~0) (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (= (+ main_~j~0 4294967301) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ 5 main_~j~0))))))} is VALID [2022-04-07 22:00:51,549 INFO L290 TraceCheckUtils]: 16: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,549 INFO L290 TraceCheckUtils]: 15: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,550 INFO L290 TraceCheckUtils]: 14: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,551 INFO L290 TraceCheckUtils]: 13: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,551 INFO L290 TraceCheckUtils]: 12: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,552 INFO L290 TraceCheckUtils]: 11: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,552 INFO L290 TraceCheckUtils]: 10: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,552 INFO L290 TraceCheckUtils]: 9: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,553 INFO L290 TraceCheckUtils]: 8: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,553 INFO L290 TraceCheckUtils]: 7: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,553 INFO L290 TraceCheckUtils]: 6: Hoare triple {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,554 INFO L290 TraceCheckUtils]: 5: Hoare triple {3474#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {3746#(not (= |main_~#str1~0.base| |main_~#str2~0.base|))} is VALID [2022-04-07 22:00:51,555 INFO L272 TraceCheckUtils]: 4: Hoare triple {3474#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:51,555 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3474#true} {3474#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:51,555 INFO L290 TraceCheckUtils]: 2: Hoare triple {3474#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:51,555 INFO L290 TraceCheckUtils]: 1: Hoare triple {3474#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3474#true} is VALID [2022-04-07 22:00:51,555 INFO L272 TraceCheckUtils]: 0: Hoare triple {3474#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3474#true} is VALID [2022-04-07 22:00:51,556 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 2 proven. 38 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-04-07 22:00:51,556 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [237787292] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:00:51,556 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:00:51,556 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 24, 23] total 50 [2022-04-07 22:00:51,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1926246950] [2022-04-07 22:00:51,556 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:00:51,558 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 1.6734693877551021) internal successors, (82), 48 states have internal predecessors, (82), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 45 [2022-04-07 22:00:51,558 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:00:51,558 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 50 states, 49 states have (on average 1.6734693877551021) internal successors, (82), 48 states have internal predecessors, (82), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:51,710 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:00:51,710 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2022-04-07 22:00:51,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:00:51,710 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2022-04-07 22:00:51,711 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=281, Invalid=2074, Unknown=1, NotChecked=94, Total=2450 [2022-04-07 22:00:51,711 INFO L87 Difference]: Start difference. First operand 59 states and 64 transitions. Second operand has 50 states, 49 states have (on average 1.6734693877551021) internal successors, (82), 48 states have internal predecessors, (82), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:59,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:59,532 INFO L93 Difference]: Finished difference Result 109 states and 121 transitions. [2022-04-07 22:00:59,532 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2022-04-07 22:00:59,532 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 49 states have (on average 1.6734693877551021) internal successors, (82), 48 states have internal predecessors, (82), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Word has length 45 [2022-04-07 22:00:59,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:00:59,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.6734693877551021) internal successors, (82), 48 states have internal predecessors, (82), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:59,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 112 transitions. [2022-04-07 22:00:59,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.6734693877551021) internal successors, (82), 48 states have internal predecessors, (82), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:59,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 112 transitions. [2022-04-07 22:00:59,551 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 41 states and 112 transitions. [2022-04-07 22:00:59,708 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 112 edges. 112 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:00:59,710 INFO L225 Difference]: With dead ends: 109 [2022-04-07 22:00:59,710 INFO L226 Difference]: Without dead ends: 90 [2022-04-07 22:00:59,712 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 54 SyntacticMatches, 2 SemanticMatches, 86 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1512 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=1125, Invalid=6360, Unknown=1, NotChecked=170, Total=7656 [2022-04-07 22:00:59,712 INFO L913 BasicCegarLoop]: 16 mSDtfsCounter, 114 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 288 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 1604 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 288 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 120 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:00:59,713 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [114 Valid, 143 Invalid, 1604 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [288 Valid, 1196 Invalid, 0 Unknown, 120 Unchecked, 2.2s Time] [2022-04-07 22:00:59,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-04-07 22:00:59,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 54. [2022-04-07 22:00:59,858 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:00:59,859 INFO L82 GeneralOperation]: Start isEquivalent. First operand 90 states. Second operand has 54 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 45 states have internal predecessors, (47), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:59,859 INFO L74 IsIncluded]: Start isIncluded. First operand 90 states. Second operand has 54 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 45 states have internal predecessors, (47), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:59,859 INFO L87 Difference]: Start difference. First operand 90 states. Second operand has 54 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 45 states have internal predecessors, (47), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:59,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:59,864 INFO L93 Difference]: Finished difference Result 90 states and 100 transitions. [2022-04-07 22:00:59,864 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 100 transitions. [2022-04-07 22:00:59,864 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:00:59,864 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:00:59,865 INFO L74 IsIncluded]: Start isIncluded. First operand has 54 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 45 states have internal predecessors, (47), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 90 states. [2022-04-07 22:00:59,865 INFO L87 Difference]: Start difference. First operand has 54 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 45 states have internal predecessors, (47), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) Second operand 90 states. [2022-04-07 22:00:59,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:00:59,867 INFO L93 Difference]: Finished difference Result 90 states and 100 transitions. [2022-04-07 22:00:59,867 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 100 transitions. [2022-04-07 22:00:59,868 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:00:59,868 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:00:59,868 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:00:59,868 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:00:59,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 45 states have internal predecessors, (47), 5 states have call successors, (5), 5 states have call predecessors, (5), 4 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:59,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 56 transitions. [2022-04-07 22:00:59,869 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 56 transitions. Word has length 45 [2022-04-07 22:00:59,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:00:59,870 INFO L478 AbstractCegarLoop]: Abstraction has 54 states and 56 transitions. [2022-04-07 22:00:59,870 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 49 states have (on average 1.6734693877551021) internal successors, (82), 48 states have internal predecessors, (82), 5 states have call successors, (8), 5 states have call predecessors, (8), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2022-04-07 22:00:59,870 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 56 transitions. [2022-04-07 22:00:59,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-07 22:00:59,871 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:00:59,871 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:00:59,903 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-07 22:01:00,099 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:01:00,100 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:01:00,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:01:00,100 INFO L85 PathProgramCache]: Analyzing trace with hash -246889932, now seen corresponding path program 3 times [2022-04-07 22:01:00,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:01:00,100 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864735370] [2022-04-07 22:01:00,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:01:00,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:01:00,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:01:00,324 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:01:00,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:01:00,336 INFO L290 TraceCheckUtils]: 0: Hoare triple {4314#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-07 22:01:00,336 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,336 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4294#true} {4294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,336 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-07 22:01:00,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:01:00,339 INFO L290 TraceCheckUtils]: 0: Hoare triple {4294#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4294#true} is VALID [2022-04-07 22:01:00,339 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,339 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,339 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4295#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4295#false} is VALID [2022-04-07 22:01:00,340 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-04-07 22:01:00,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:01:00,342 INFO L290 TraceCheckUtils]: 0: Hoare triple {4294#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4294#true} is VALID [2022-04-07 22:01:00,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,343 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,343 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4295#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4295#false} is VALID [2022-04-07 22:01:00,343 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4314#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:01:00,343 INFO L290 TraceCheckUtils]: 1: Hoare triple {4314#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-07 22:01:00,343 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,343 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,343 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,344 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,345 INFO L290 TraceCheckUtils]: 6: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,347 INFO L290 TraceCheckUtils]: 7: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,348 INFO L290 TraceCheckUtils]: 8: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,348 INFO L290 TraceCheckUtils]: 9: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,352 INFO L290 TraceCheckUtils]: 10: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,352 INFO L290 TraceCheckUtils]: 11: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,353 INFO L290 TraceCheckUtils]: 12: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,354 INFO L290 TraceCheckUtils]: 13: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,354 INFO L290 TraceCheckUtils]: 14: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,355 INFO L290 TraceCheckUtils]: 15: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,355 INFO L290 TraceCheckUtils]: 16: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} is VALID [2022-04-07 22:01:00,357 INFO L290 TraceCheckUtils]: 17: Hoare triple {4299#(and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {4300#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:01:00,358 INFO L290 TraceCheckUtils]: 18: Hoare triple {4300#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4300#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:01:00,360 INFO L290 TraceCheckUtils]: 19: Hoare triple {4300#(and (or (and (<= 5 main_~max~0) (<= (div (+ main_~max~0 4294967295) 4294967296) 1)) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4301#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 22:01:00,361 INFO L290 TraceCheckUtils]: 20: Hoare triple {4301#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4301#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 22:01:00,361 INFO L290 TraceCheckUtils]: 21: Hoare triple {4301#(or (<= (+ main_~i~0 2) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967299 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4302#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} is VALID [2022-04-07 22:01:00,362 INFO L290 TraceCheckUtils]: 22: Hoare triple {4302#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4302#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} is VALID [2022-04-07 22:01:00,362 INFO L290 TraceCheckUtils]: 23: Hoare triple {4302#(or (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967298 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (<= (+ main_~i~0 3) 0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4303#(or (<= (+ main_~i~0 4) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 22:01:00,363 INFO L290 TraceCheckUtils]: 24: Hoare triple {4303#(or (<= (+ main_~i~0 4) 0) (and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4304#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 22:01:00,364 INFO L290 TraceCheckUtils]: 25: Hoare triple {4304#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967297 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4305#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967296 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} is VALID [2022-04-07 22:01:00,364 INFO L290 TraceCheckUtils]: 26: Hoare triple {4305#(and (<= (div (+ main_~max~0 4294967295) 4294967296) 1) (<= 4294967296 (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-07 22:01:00,364 INFO L290 TraceCheckUtils]: 27: Hoare triple {4295#false} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {4295#false} is VALID [2022-04-07 22:01:00,364 INFO L290 TraceCheckUtils]: 28: Hoare triple {4295#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4295#false} is VALID [2022-04-07 22:01:00,365 INFO L272 TraceCheckUtils]: 29: Hoare triple {4295#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4294#true} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 30: Hoare triple {4294#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4294#true} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 31: Hoare triple {4294#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 32: Hoare triple {4294#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,365 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {4294#true} {4295#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4295#false} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 34: Hoare triple {4295#false} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {4295#false} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 35: Hoare triple {4295#false} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {4295#false} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 36: Hoare triple {4295#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4295#false} is VALID [2022-04-07 22:01:00,365 INFO L272 TraceCheckUtils]: 37: Hoare triple {4295#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4294#true} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 38: Hoare triple {4294#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4294#true} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 39: Hoare triple {4294#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 40: Hoare triple {4294#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:00,365 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {4294#true} {4295#false} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4295#false} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 42: Hoare triple {4295#false} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {4295#false} is VALID [2022-04-07 22:01:00,365 INFO L290 TraceCheckUtils]: 43: Hoare triple {4295#false} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {4295#false} is VALID [2022-04-07 22:01:00,366 INFO L290 TraceCheckUtils]: 44: Hoare triple {4295#false} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4295#false} is VALID [2022-04-07 22:01:00,366 INFO L272 TraceCheckUtils]: 45: Hoare triple {4295#false} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4295#false} is VALID [2022-04-07 22:01:00,366 INFO L290 TraceCheckUtils]: 46: Hoare triple {4295#false} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4295#false} is VALID [2022-04-07 22:01:00,366 INFO L290 TraceCheckUtils]: 47: Hoare triple {4295#false} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-07 22:01:00,366 INFO L290 TraceCheckUtils]: 48: Hoare triple {4295#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-07 22:01:00,366 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2022-04-07 22:01:00,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:01:00,366 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1864735370] [2022-04-07 22:01:00,366 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1864735370] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:01:00,366 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [724067617] [2022-04-07 22:01:00,366 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-07 22:01:00,366 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:01:00,367 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:01:00,367 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:01:00,368 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-07 22:01:00,513 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-07 22:01:00,513 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:01:00,515 INFO L263 TraceCheckSpWp]: Trace formula consists of 207 conjuncts, 60 conjunts are in the unsatisfiable core [2022-04-07 22:01:00,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:01:00,534 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:01:00,557 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 22:01:00,902 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2022-04-07 22:01:01,036 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:01:01,038 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 36 [2022-04-07 22:01:01,169 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:01:01,170 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 36 [2022-04-07 22:01:26,711 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:01:26,712 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:01:26,713 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 10 [2022-04-07 22:01:29,159 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:29,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-07 22:01:29,159 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:29,159 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:29,160 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:29,160 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {4333#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,161 INFO L290 TraceCheckUtils]: 6: Hoare triple {4333#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4333#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,161 INFO L290 TraceCheckUtils]: 7: Hoare triple {4333#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,162 INFO L290 TraceCheckUtils]: 8: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,162 INFO L290 TraceCheckUtils]: 9: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,163 INFO L290 TraceCheckUtils]: 10: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,163 INFO L290 TraceCheckUtils]: 11: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,163 INFO L290 TraceCheckUtils]: 12: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,164 INFO L290 TraceCheckUtils]: 13: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,164 INFO L290 TraceCheckUtils]: 14: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,165 INFO L290 TraceCheckUtils]: 15: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,165 INFO L290 TraceCheckUtils]: 16: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,166 INFO L290 TraceCheckUtils]: 17: Hoare triple {4340#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {4371#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} is VALID [2022-04-07 22:01:29,167 INFO L290 TraceCheckUtils]: 18: Hoare triple {4371#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0)) (and (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= main_~i~0 (+ (mod (+ main_~max~0 4294967295) 4294967296) (- 4294967296))))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4375#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 1) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,168 INFO L290 TraceCheckUtils]: 19: Hoare triple {4375#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 1) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4379#(and (= |main_~#str2~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (= main_~j~0 1) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,168 INFO L290 TraceCheckUtils]: 20: Hoare triple {4379#(and (= |main_~#str2~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (= main_~j~0 1) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4383#(and (= |main_~#str2~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} is VALID [2022-04-07 22:01:29,169 INFO L290 TraceCheckUtils]: 21: Hoare triple {4383#(and (= |main_~#str2~0.offset| 0) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4387#(and (= |main_~#str2~0.offset| 0) (= (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296)) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} is VALID [2022-04-07 22:01:29,170 INFO L290 TraceCheckUtils]: 22: Hoare triple {4387#(and (= |main_~#str2~0.offset| 0) (= (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296)) (+ main_~i~0 1)) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0) 1))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4391#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296)) (+ main_~i~0 1)) (= main_~j~0 3) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,171 INFO L290 TraceCheckUtils]: 23: Hoare triple {4391#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296)) (+ main_~i~0 1)) (= main_~j~0 3) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4395#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= main_~j~0 3) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296)) (+ main_~i~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,172 INFO L290 TraceCheckUtils]: 24: Hoare triple {4395#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= main_~j~0 3) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296)) (+ main_~i~0 2)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296)) (+ main_~i~0 2)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,173 INFO L290 TraceCheckUtils]: 25: Hoare triple {4399#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (= (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296)) (+ main_~i~0 2)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4403#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= (+ main_~i~0 3) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} is VALID [2022-04-07 22:01:29,173 INFO L290 TraceCheckUtils]: 26: Hoare triple {4403#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (= (+ main_~i~0 3) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 0 (+ main_~i~0 1)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {4407#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (mod (+ main_~max~0 4294967295) 4294967296) 4) (<= 3 (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,175 INFO L290 TraceCheckUtils]: 27: Hoare triple {4407#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (mod (+ main_~max~0 4294967295) 4294967296) 4) (<= 3 (mod (+ main_~max~0 4294967295) 4294967296)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {4411#(and (= |main_~#str2~0.offset| 0) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 3 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod main_~j~0 4294967296)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:01:29,176 INFO L290 TraceCheckUtils]: 28: Hoare triple {4411#(and (= |main_~#str2~0.offset| 0) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 3 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod main_~j~0 4294967296)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4411#(and (= |main_~#str2~0.offset| 0) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 3 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod main_~j~0 4294967296)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:01:29,186 INFO L272 TraceCheckUtils]: 29: Hoare triple {4411#(and (= |main_~#str2~0.offset| 0) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 3 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod main_~j~0 4294967296)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} is VALID [2022-04-07 22:01:29,195 INFO L290 TraceCheckUtils]: 30: Hoare triple {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} is VALID [2022-04-07 22:01:29,200 INFO L290 TraceCheckUtils]: 31: Hoare triple {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} is VALID [2022-04-07 22:01:29,202 INFO L290 TraceCheckUtils]: 32: Hoare triple {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} is VALID [2022-04-07 22:01:29,203 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} {4411#(and (= |main_~#str2~0.offset| 0) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 3 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod main_~j~0 4294967296)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4411#(and (= |main_~#str2~0.offset| 0) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 3 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod main_~j~0 4294967296)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:01:29,205 INFO L290 TraceCheckUtils]: 34: Hoare triple {4411#(and (= |main_~#str2~0.offset| 0) (< (div main_~j~0 (- 4294967296)) (+ (div (+ 3 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod main_~j~0 4294967296)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod main_~j~0 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {4434#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:01:29,206 INFO L290 TraceCheckUtils]: 35: Hoare triple {4434#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {4438#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 22:01:29,207 INFO L290 TraceCheckUtils]: 36: Hoare triple {4438#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4438#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 22:01:29,212 INFO L272 TraceCheckUtils]: 37: Hoare triple {4438#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} is VALID [2022-04-07 22:01:29,227 INFO L290 TraceCheckUtils]: 38: Hoare triple {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} is VALID [2022-04-07 22:01:29,231 INFO L290 TraceCheckUtils]: 39: Hoare triple {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} is VALID [2022-04-07 22:01:29,234 INFO L290 TraceCheckUtils]: 40: Hoare triple {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} is VALID [2022-04-07 22:01:29,236 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {4418#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_5| Int) (|v_main_~#str1~0.base_BEFORE_CALL_5| Int) (aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 Int) (aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 Int) (aux_div_v_main_~j~0_BEFORE_CALL_5_46 Int)) (and (< (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293 (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296))) (< 0 (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) 4294967293)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) 3) (not (= |v_main_~#str2~0.base_BEFORE_CALL_5| |v_main_~#str1~0.base_BEFORE_CALL_5|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_5|) (+ (- 1) (mod (+ (* aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 4294967295) 3) 4294967296))) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_5|) 1)) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (* aux_div_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53 4294967296)) (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296)) (<= 0 aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199) (<= (+ aux_mod_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 (* 4294967296 aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199)) (+ (* aux_div_v_main_~j~0_BEFORE_CALL_5_46 4294967296) 3)) (< aux_div_v_main_~j~0_BEFORE_CALL_5_46 (+ aux_div_aux_mod_aux_mod_v_main_~j~0_BEFORE_CALL_5_46_53_199 1))))} {4438#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4438#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} is VALID [2022-04-07 22:01:29,238 INFO L290 TraceCheckUtils]: 42: Hoare triple {4438#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 1) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))) (< (div (+ main_~j~0 1) (- 4294967296)) (+ (div (+ 2 (* (- 1) main_~j~0)) 4294967296) 1)) (<= 3 (mod (+ main_~j~0 1) 4294967296)) (<= 0 (+ main_~j~0 1)) (= |main_~#str1~0.offset| 0) (< main_~j~0 4294967295) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {4460#(and (= |main_~#str2~0.offset| 0) (< (div (+ main_~j~0 2) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 (+ main_~j~0 2)) (< main_~j~0 4294967294) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (<= 3 (mod (+ main_~j~0 2) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 2) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:01:29,239 INFO L290 TraceCheckUtils]: 43: Hoare triple {4460#(and (= |main_~#str2~0.offset| 0) (< (div (+ main_~j~0 2) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 (+ main_~j~0 2)) (< main_~j~0 4294967294) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~i~0) 0) (<= 3 (mod (+ main_~j~0 2) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 2) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {4464#(and (= |main_~#str2~0.offset| 0) (= (+ (- 2) main_~i~0) 0) (< (div (+ main_~j~0 2) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 (+ main_~j~0 2)) (< main_~j~0 4294967294) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 (mod (+ main_~j~0 2) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 2) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} is VALID [2022-04-07 22:01:29,241 INFO L290 TraceCheckUtils]: 44: Hoare triple {4464#(and (= |main_~#str2~0.offset| 0) (= (+ (- 2) main_~i~0) 0) (< (div (+ main_~j~0 2) (- 4294967296)) (+ (div (+ (* (- 1) main_~j~0) 1) 4294967296) 1)) (= |main_~#str1~0.offset| 0) (<= 0 (+ main_~j~0 2)) (< main_~j~0 4294967294) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 3 (mod (+ main_~j~0 2) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (- 1) (mod (+ main_~j~0 2) 4294967296) |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ |main_~#str2~0.offset| 1))))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4468#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 22:01:29,242 INFO L272 TraceCheckUtils]: 45: Hoare triple {4468#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:01:29,242 INFO L290 TraceCheckUtils]: 46: Hoare triple {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4476#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:01:29,243 INFO L290 TraceCheckUtils]: 47: Hoare triple {4476#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-07 22:01:29,243 INFO L290 TraceCheckUtils]: 48: Hoare triple {4295#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-07 22:01:29,243 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 35 refuted. 2 times theorem prover too weak. 20 trivial. 0 not checked. [2022-04-07 22:01:29,244 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:01:35,918 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:01:35,918 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 502 treesize of output 474 [2022-04-07 22:01:41,556 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:01:41,562 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:01:41,563 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 524 treesize of output 479 [2022-04-07 22:01:42,445 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:01:42,446 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2022-04-07 22:01:42,457 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:01:42,458 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:01:42,458 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:01:42,568 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:01:42,569 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2022-04-07 22:01:42,589 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1014 treesize of output 978 [2022-04-07 22:01:43,210 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-04-07 22:01:43,210 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 229 treesize of output 216 [2022-04-07 22:01:43,818 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-07 22:01:43,819 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 265 treesize of output 240 [2022-04-07 22:01:43,974 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2022-04-07 22:01:43,988 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:01:43,988 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:01:43,992 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-04-07 22:01:44,083 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:01:44,084 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 502 treesize of output 474 [2022-04-07 22:01:47,109 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-04-07 22:01:47,110 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 237 treesize of output 224 [2022-04-07 22:01:47,780 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:01:47,781 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2022-04-07 22:01:47,810 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 504 treesize of output 486 [2022-04-07 22:01:48,107 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-04-07 22:01:48,114 INFO L356 Elim1Store]: treesize reduction 5, result has 70.6 percent of original size [2022-04-07 22:01:48,115 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 515 treesize of output 465 [2022-04-07 22:01:48,464 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:01:48,474 INFO L356 Elim1Store]: treesize reduction 16, result has 5.9 percent of original size [2022-04-07 22:01:48,474 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 105 treesize of output 92 [2022-04-07 22:01:51,953 INFO L290 TraceCheckUtils]: 48: Hoare triple {4295#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-07 22:01:51,953 INFO L290 TraceCheckUtils]: 47: Hoare triple {4476#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-07 22:01:51,954 INFO L290 TraceCheckUtils]: 46: Hoare triple {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4476#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:01:51,954 INFO L272 TraceCheckUtils]: 45: Hoare triple {4468#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:01:51,955 INFO L290 TraceCheckUtils]: 44: Hoare triple {4495#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4468#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 22:01:51,955 INFO L290 TraceCheckUtils]: 43: Hoare triple {4499#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {4495#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|)))} is VALID [2022-04-07 22:01:51,956 INFO L290 TraceCheckUtils]: 42: Hoare triple {4503#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {4499#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-07 22:01:51,957 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {4294#true} {4503#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4503#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:01:51,957 INFO L290 TraceCheckUtils]: 40: Hoare triple {4294#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:51,957 INFO L290 TraceCheckUtils]: 39: Hoare triple {4294#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:51,957 INFO L290 TraceCheckUtils]: 38: Hoare triple {4294#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4294#true} is VALID [2022-04-07 22:01:51,957 INFO L272 TraceCheckUtils]: 37: Hoare triple {4503#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4294#true} is VALID [2022-04-07 22:01:51,958 INFO L290 TraceCheckUtils]: 36: Hoare triple {4503#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4503#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:01:51,958 INFO L290 TraceCheckUtils]: 35: Hoare triple {4525#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {4503#(= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)))} is VALID [2022-04-07 22:01:51,959 INFO L290 TraceCheckUtils]: 34: Hoare triple {4529#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) main_~j~0 |main_~#str2~0.offset|)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {4525#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-07 22:01:51,960 INFO L284 TraceCheckUtils]: 33: Hoare quadruple {4294#true} {4529#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) main_~j~0 |main_~#str2~0.offset|)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4529#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-07 22:01:51,960 INFO L290 TraceCheckUtils]: 32: Hoare triple {4294#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:51,960 INFO L290 TraceCheckUtils]: 31: Hoare triple {4294#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:51,960 INFO L290 TraceCheckUtils]: 30: Hoare triple {4294#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4294#true} is VALID [2022-04-07 22:01:51,960 INFO L272 TraceCheckUtils]: 29: Hoare triple {4529#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) main_~j~0 |main_~#str2~0.offset|)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {4294#true} is VALID [2022-04-07 22:01:51,961 INFO L290 TraceCheckUtils]: 28: Hoare triple {4529#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) main_~j~0 |main_~#str2~0.offset|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {4529#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-07 22:01:51,962 INFO L290 TraceCheckUtils]: 27: Hoare triple {4551#(and (or (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {4529#(= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) main_~j~0 |main_~#str2~0.offset|)))} is VALID [2022-04-07 22:01:51,962 INFO L290 TraceCheckUtils]: 26: Hoare triple {4555#(or (and (or (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (<= 0 main_~i~0))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {4551#(and (or (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))} is VALID [2022-04-07 22:01:51,963 INFO L290 TraceCheckUtils]: 25: Hoare triple {4559#(or (and (or (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (<= 1 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4555#(or (and (or (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (<= 0 main_~i~0))} is VALID [2022-04-07 22:01:51,965 INFO L290 TraceCheckUtils]: 24: Hoare triple {4563#(or (not (<= 0 main_~i~0)) (and (or (forall ((v_ArrVal_352 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298))))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_352 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (<= 1 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4559#(or (and (or (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (<= 1 main_~i~0))} is VALID [2022-04-07 22:01:51,966 INFO L290 TraceCheckUtils]: 23: Hoare triple {4567#(or (<= 2 main_~i~0) (and (or (forall ((v_ArrVal_352 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298))))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_352 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (not (<= 1 main_~i~0)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4563#(or (not (<= 0 main_~i~0)) (and (or (forall ((v_ArrVal_352 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298))))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_352 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (<= 1 main_~i~0))} is VALID [2022-04-07 22:01:51,972 INFO L290 TraceCheckUtils]: 22: Hoare triple {4571#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_352 Int) (v_ArrVal_350 Int)) (= (select (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|))))) (or (forall ((v_ArrVal_352 Int) (v_ArrVal_350 Int)) (= (select (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298))) (select (select (store |#memory_int| |main_~#str2~0.base| (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 2 main_~i~0) (not (<= 1 main_~i~0)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4567#(or (<= 2 main_~i~0) (and (or (forall ((v_ArrVal_352 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298))))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_352 Int)) (= (select (select (store |#memory_int| |main_~#str2~0.base| (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)) (select (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_352) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 22:01:51,974 INFO L290 TraceCheckUtils]: 21: Hoare triple {4575#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_352 Int) (v_ArrVal_350 Int)) (= (select (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|))))) (or (forall ((v_ArrVal_352 Int) (v_ArrVal_350 Int)) (= (select (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298))) (select (select (store |#memory_int| |main_~#str2~0.base| (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 3 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4571#(or (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_352 Int) (v_ArrVal_350 Int)) (= (select (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|))))) (or (forall ((v_ArrVal_352 Int) (v_ArrVal_350 Int)) (= (select (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298))) (select (select (store |#memory_int| |main_~#str2~0.base| (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 2 main_~i~0) (not (<= 1 main_~i~0)))} is VALID [2022-04-07 22:01:51,979 INFO L290 TraceCheckUtils]: 20: Hoare triple {4579#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 2 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967298)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))))) (<= 3 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4575#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (forall ((v_ArrVal_352 Int) (v_ArrVal_350 Int)) (= (select (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352) (+ (- 2) (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (select (select (store |#memory_int| |main_~#str2~0.base| (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|))))) (or (forall ((v_ArrVal_352 Int) (v_ArrVal_350 Int)) (= (select (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset| (- 4294967298))) (select (select (store |#memory_int| |main_~#str2~0.base| (store (store (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|) v_ArrVal_350) (+ main_~j~0 |main_~#str2~0.offset| 1) v_ArrVal_352)) |main_~#str1~0.base|) (+ 2 |main_~#str1~0.offset|)))) (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647))) (<= 3 main_~i~0))} is VALID [2022-04-07 22:01:51,981 INFO L290 TraceCheckUtils]: 19: Hoare triple {4583#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {4579#(or (not (<= 2 main_~i~0)) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 2 |main_~#str1~0.offset|) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|)))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|) (+ main_~i~0 |main_~#str1~0.offset| 4294967298)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)))))) (<= 3 main_~i~0))} is VALID [2022-04-07 22:01:51,983 INFO L290 TraceCheckUtils]: 18: Hoare triple {4587#(or (< main_~i~0 3) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1))) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ 5 main_~j~0))))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299))) (or (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 4 main_~i~0))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {4583#(or (and (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967298)) (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))))) (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) (+ |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) |main_~#str1~0.offset|))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 2)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)))))) (not (<= 3 main_~i~0)) (<= 4 main_~i~0))} is VALID [2022-04-07 22:01:51,985 INFO L290 TraceCheckUtils]: 17: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {4587#(or (< main_~i~0 3) (and (or (not (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647)) (and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1))) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 3)) (= (+ main_~i~0 |main_~#str1~0.offset| 1) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|))) (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ 5 main_~j~0))))) (or (<= (mod (+ main_~max~0 4294967295) 4294967296) 2147483647) (and (or (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) |main_~#str1~0.offset|)) (not (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|))) (or (= (+ main_~i~0 |main_~#str1~0.offset| 4294967297) (+ (mod (+ main_~max~0 4294967295) 4294967296) |main_~#str2~0.offset|)) (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299))) (or (= (+ main_~j~0 4294967300) (mod (+ main_~max~0 4294967295) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= (+ main_~j~0 |main_~#str2~0.offset| 1) (+ |main_~#str1~0.offset| 1)))) (or (= (mod (+ main_~max~0 4294967295) 4294967296) (+ main_~j~0 4294967299)) (= |main_~#str1~0.base| |main_~#str2~0.base|))))) (<= 4 main_~i~0))} is VALID [2022-04-07 22:01:51,986 INFO L290 TraceCheckUtils]: 16: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,987 INFO L290 TraceCheckUtils]: 15: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,987 INFO L290 TraceCheckUtils]: 14: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,988 INFO L290 TraceCheckUtils]: 13: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,989 INFO L290 TraceCheckUtils]: 12: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,989 INFO L290 TraceCheckUtils]: 11: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,990 INFO L290 TraceCheckUtils]: 10: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,990 INFO L290 TraceCheckUtils]: 9: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,991 INFO L290 TraceCheckUtils]: 8: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,992 INFO L290 TraceCheckUtils]: 7: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,992 INFO L290 TraceCheckUtils]: 6: Hoare triple {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,993 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {4591#(and (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str1~0.offset| (+ |main_~#str2~0.offset| 1)))) (or (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (not (= |main_~#str2~0.offset| |main_~#str1~0.offset|))))} is VALID [2022-04-07 22:01:51,993 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:51,993 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:51,993 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:51,993 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-07 22:01:51,993 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-07 22:01:51,994 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-07 22:01:51,994 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [724067617] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-07 22:01:51,994 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-07 22:01:51,994 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 23, 21] total 47 [2022-04-07 22:01:51,994 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [604407889] [2022-04-07 22:01:51,994 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-07 22:01:51,995 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 46 states have (on average 1.6956521739130435) internal successors, (78), 45 states have internal predecessors, (78), 7 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 49 [2022-04-07 22:01:51,996 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-07 22:01:51,996 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 47 states, 46 states have (on average 1.6956521739130435) internal successors, (78), 45 states have internal predecessors, (78), 7 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:01:52,127 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 94 edges. 94 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:01:52,127 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-04-07 22:01:52,127 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-07 22:01:52,127 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-04-07 22:01:52,128 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=1927, Unknown=4, NotChecked=0, Total=2162 [2022-04-07 22:01:52,128 INFO L87 Difference]: Start difference. First operand 54 states and 56 transitions. Second operand has 47 states, 46 states have (on average 1.6956521739130435) internal successors, (78), 45 states have internal predecessors, (78), 7 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:02:09,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:02:09,898 INFO L93 Difference]: Finished difference Result 88 states and 91 transitions. [2022-04-07 22:02:09,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-07 22:02:09,898 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 46 states have (on average 1.6956521739130435) internal successors, (78), 45 states have internal predecessors, (78), 7 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 49 [2022-04-07 22:02:09,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-07 22:02:09,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 46 states have (on average 1.6956521739130435) internal successors, (78), 45 states have internal predecessors, (78), 7 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:02:09,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 66 transitions. [2022-04-07 22:02:09,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 46 states have (on average 1.6956521739130435) internal successors, (78), 45 states have internal predecessors, (78), 7 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:02:09,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 66 transitions. [2022-04-07 22:02:09,902 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 66 transitions. [2022-04-07 22:02:10,007 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-07 22:02:10,008 INFO L225 Difference]: With dead ends: 88 [2022-04-07 22:02:10,008 INFO L226 Difference]: Without dead ends: 63 [2022-04-07 22:02:10,009 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 65 SyntacticMatches, 4 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1098 ImplicationChecksByTransitivity, 35.5s TimeCoverageRelationStatistics Valid=536, Invalid=4286, Unknown=8, NotChecked=0, Total=4830 [2022-04-07 22:02:10,010 INFO L913 BasicCegarLoop]: 15 mSDtfsCounter, 56 mSDsluCounter, 118 mSDsCounter, 0 mSdLazyCounter, 741 mSolverCounterSat, 100 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 954 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 100 IncrementalHoareTripleChecker+Valid, 741 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 113 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-07 22:02:10,010 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [56 Valid, 133 Invalid, 954 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [100 Valid, 741 Invalid, 0 Unknown, 113 Unchecked, 1.2s Time] [2022-04-07 22:02:10,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2022-04-07 22:02:10,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 62. [2022-04-07 22:02:10,189 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-07 22:02:10,189 INFO L82 GeneralOperation]: Start isEquivalent. First operand 63 states. Second operand has 62 states, 50 states have (on average 1.04) internal successors, (52), 51 states have internal predecessors, (52), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:02:10,189 INFO L74 IsIncluded]: Start isIncluded. First operand 63 states. Second operand has 62 states, 50 states have (on average 1.04) internal successors, (52), 51 states have internal predecessors, (52), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:02:10,189 INFO L87 Difference]: Start difference. First operand 63 states. Second operand has 62 states, 50 states have (on average 1.04) internal successors, (52), 51 states have internal predecessors, (52), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:02:10,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:02:10,191 INFO L93 Difference]: Finished difference Result 63 states and 64 transitions. [2022-04-07 22:02:10,191 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 64 transitions. [2022-04-07 22:02:10,191 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:02:10,191 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:02:10,191 INFO L74 IsIncluded]: Start isIncluded. First operand has 62 states, 50 states have (on average 1.04) internal successors, (52), 51 states have internal predecessors, (52), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 63 states. [2022-04-07 22:02:10,191 INFO L87 Difference]: Start difference. First operand has 62 states, 50 states have (on average 1.04) internal successors, (52), 51 states have internal predecessors, (52), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) Second operand 63 states. [2022-04-07 22:02:10,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-07 22:02:10,193 INFO L93 Difference]: Finished difference Result 63 states and 64 transitions. [2022-04-07 22:02:10,193 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 64 transitions. [2022-04-07 22:02:10,193 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-07 22:02:10,193 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-07 22:02:10,193 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-07 22:02:10,193 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-07 22:02:10,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 50 states have (on average 1.04) internal successors, (52), 51 states have internal predecessors, (52), 6 states have call successors, (6), 6 states have call predecessors, (6), 5 states have return successors, (5), 4 states have call predecessors, (5), 5 states have call successors, (5) [2022-04-07 22:02:10,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 63 transitions. [2022-04-07 22:02:10,195 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 63 transitions. Word has length 49 [2022-04-07 22:02:10,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-07 22:02:10,195 INFO L478 AbstractCegarLoop]: Abstraction has 62 states and 63 transitions. [2022-04-07 22:02:10,195 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 46 states have (on average 1.6956521739130435) internal successors, (78), 45 states have internal predecessors, (78), 7 states have call successors, (10), 5 states have call predecessors, (10), 2 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-04-07 22:02:10,195 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 63 transitions. [2022-04-07 22:02:10,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-04-07 22:02:10,196 INFO L491 BasicCegarLoop]: Found error trace [2022-04-07 22:02:10,196 INFO L499 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-07 22:02:10,218 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-07 22:02:10,411 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:02:10,411 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-07 22:02:10,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-07 22:02:10,412 INFO L85 PathProgramCache]: Analyzing trace with hash -458263352, now seen corresponding path program 4 times [2022-04-07 22:02:10,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-07 22:02:10,412 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039123924] [2022-04-07 22:02:10,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-07 22:02:10,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-07 22:02:10,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:02:11,971 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-07 22:02:11,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:02:11,981 INFO L290 TraceCheckUtils]: 0: Hoare triple {5074#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5033#true} is VALID [2022-04-07 22:02:11,981 INFO L290 TraceCheckUtils]: 1: Hoare triple {5033#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:11,982 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5033#true} {5033#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:11,982 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-04-07 22:02:11,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:02:11,993 INFO L290 TraceCheckUtils]: 0: Hoare triple {5033#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5033#true} is VALID [2022-04-07 22:02:11,993 INFO L290 TraceCheckUtils]: 1: Hoare triple {5033#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:11,993 INFO L290 TraceCheckUtils]: 2: Hoare triple {5033#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:11,994 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5033#true} {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:11,994 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 39 [2022-04-07 22:02:11,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:02:11,998 INFO L290 TraceCheckUtils]: 0: Hoare triple {5033#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5033#true} is VALID [2022-04-07 22:02:11,999 INFO L290 TraceCheckUtils]: 1: Hoare triple {5033#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:11,999 INFO L290 TraceCheckUtils]: 2: Hoare triple {5033#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,000 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5033#true} {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:12,000 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2022-04-07 22:02:12,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:02:12,005 INFO L290 TraceCheckUtils]: 0: Hoare triple {5033#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5033#true} is VALID [2022-04-07 22:02:12,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {5033#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,005 INFO L290 TraceCheckUtils]: 2: Hoare triple {5033#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,006 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5033#true} {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 22:02:12,006 INFO L272 TraceCheckUtils]: 0: Hoare triple {5033#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5074#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-07 22:02:12,007 INFO L290 TraceCheckUtils]: 1: Hoare triple {5074#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5033#true} is VALID [2022-04-07 22:02:12,007 INFO L290 TraceCheckUtils]: 2: Hoare triple {5033#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,007 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5033#true} {5033#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,007 INFO L272 TraceCheckUtils]: 4: Hoare triple {5033#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,008 INFO L290 TraceCheckUtils]: 5: Hoare triple {5033#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {5038#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,009 INFO L290 TraceCheckUtils]: 6: Hoare triple {5038#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5038#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,009 INFO L290 TraceCheckUtils]: 7: Hoare triple {5038#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,010 INFO L290 TraceCheckUtils]: 8: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,010 INFO L290 TraceCheckUtils]: 9: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,010 INFO L290 TraceCheckUtils]: 10: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,011 INFO L290 TraceCheckUtils]: 11: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,011 INFO L290 TraceCheckUtils]: 12: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,012 INFO L290 TraceCheckUtils]: 13: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,012 INFO L290 TraceCheckUtils]: 14: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,013 INFO L290 TraceCheckUtils]: 15: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,013 INFO L290 TraceCheckUtils]: 16: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,015 INFO L290 TraceCheckUtils]: 17: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {5040#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:02:12,016 INFO L290 TraceCheckUtils]: 18: Hoare triple {5040#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5041#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:02:12,017 INFO L290 TraceCheckUtils]: 19: Hoare triple {5041#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5042#(and (= |main_~#str2~0.offset| 0) (or (not (= (+ main_~i~0 |main_~#str1~0.offset|) 3)) (and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ main_~max~0 4294967294)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1) (<= (+ main_~max~0 4294967294) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,018 INFO L290 TraceCheckUtils]: 20: Hoare triple {5042#(and (= |main_~#str2~0.offset| 0) (or (not (= (+ main_~i~0 |main_~#str1~0.offset|) 3)) (and (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ main_~max~0 4294967294)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1) (<= (+ main_~max~0 4294967294) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5043#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= 2 (+ main_~j~0 |main_~#str2~0.offset|)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ main_~max~0 4294967294)) (<= (+ main_~max~0 4294967294) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= (+ main_~i~0 |main_~#str1~0.offset|) 3))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,020 INFO L290 TraceCheckUtils]: 21: Hoare triple {5043#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (= (select (select |#memory_int| |main_~#str2~0.base|) 1) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (<= 2 (+ main_~j~0 |main_~#str2~0.offset|)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ main_~max~0 4294967294)) (<= (+ main_~max~0 4294967294) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (not (= (+ main_~i~0 |main_~#str1~0.offset|) 3))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5044#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (<= (+ main_~i~0 |main_~#str1~0.offset|) 1) (<= 3 (+ main_~i~0 |main_~#str1~0.offset|)) (and (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (<= 2 (+ main_~j~0 |main_~#str2~0.offset|)) (<= (+ main_~max~0 4294967293) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ main_~max~0 4294967293)))))} is VALID [2022-04-07 22:02:12,022 INFO L290 TraceCheckUtils]: 22: Hoare triple {5044#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (<= (+ main_~i~0 |main_~#str1~0.offset|) 1) (<= 3 (+ main_~i~0 |main_~#str1~0.offset|)) (and (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (<= 2 (+ main_~j~0 |main_~#str2~0.offset|)) (<= (+ main_~max~0 4294967293) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ main_~max~0 4294967293)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5045#(and (= |main_~#str2~0.offset| 0) (or (<= (+ main_~i~0 |main_~#str1~0.offset|) 1) (<= 3 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= 3 (+ main_~j~0 |main_~#str2~0.offset|)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (<= (+ main_~max~0 4294967293) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ main_~max~0 4294967293)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,023 INFO L290 TraceCheckUtils]: 23: Hoare triple {5045#(and (= |main_~#str2~0.offset| 0) (or (<= (+ main_~i~0 |main_~#str1~0.offset|) 1) (<= 3 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= 3 (+ main_~j~0 |main_~#str2~0.offset|)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (<= (+ main_~max~0 4294967293) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ main_~max~0 4294967293)))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5046#(and (= |main_~#str2~0.offset| 0) (or (<= 2 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (+ 4294967292 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (<= 3 (+ main_~j~0 |main_~#str2~0.offset|)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ 4294967292 main_~max~0))) (<= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,025 INFO L290 TraceCheckUtils]: 24: Hoare triple {5046#(and (= |main_~#str2~0.offset| 0) (or (<= 2 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (+ 4294967292 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (<= 3 (+ main_~j~0 |main_~#str2~0.offset|)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ 4294967292 main_~max~0))) (<= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5047#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (<= (+ 4294967292 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) 1)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ 4294967292 main_~max~0))) (<= 2 (+ main_~i~0 |main_~#str1~0.offset|)) (<= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,026 INFO L290 TraceCheckUtils]: 25: Hoare triple {5047#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (and (<= (+ 4294967292 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) 1)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ 4294967292 main_~max~0))) (<= 2 (+ main_~i~0 |main_~#str1~0.offset|)) (<= (+ main_~i~0 |main_~#str1~0.offset|) 0)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5048#(and (= |main_~#str2~0.offset| 0) (or (and (<= (+ 4294967291 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) 1)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ 4294967291 main_~max~0))) (<= 1 (+ main_~i~0 |main_~#str1~0.offset|)) (<= (+ main_~i~0 |main_~#str1~0.offset| 1) 0)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,028 INFO L290 TraceCheckUtils]: 26: Hoare triple {5048#(and (= |main_~#str2~0.offset| 0) (or (and (<= (+ 4294967291 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (not (= (+ main_~j~0 |main_~#str2~0.offset|) 1)) (<= (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (+ 4294967291 main_~max~0))) (<= 1 (+ main_~i~0 |main_~#str1~0.offset|)) (<= (+ main_~i~0 |main_~#str1~0.offset| 1) 0)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5049#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (<= 1 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (<= (+ 4294967291 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,029 INFO L290 TraceCheckUtils]: 27: Hoare triple {5049#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (or (<= 1 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (<= (+ 4294967291 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5050#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (<= 0 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (<= (+ 4294967290 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))))} is VALID [2022-04-07 22:02:12,030 INFO L290 TraceCheckUtils]: 28: Hoare triple {5050#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (<= 0 (+ main_~i~0 |main_~#str1~0.offset|)) (and (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (<= (+ 4294967290 main_~max~0) (+ main_~i~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {5051#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,031 INFO L290 TraceCheckUtils]: 29: Hoare triple {5051#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,032 INFO L290 TraceCheckUtils]: 30: Hoare triple {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,032 INFO L272 TraceCheckUtils]: 31: Hoare triple {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5033#true} is VALID [2022-04-07 22:02:12,032 INFO L290 TraceCheckUtils]: 32: Hoare triple {5033#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5033#true} is VALID [2022-04-07 22:02:12,033 INFO L290 TraceCheckUtils]: 33: Hoare triple {5033#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,033 INFO L290 TraceCheckUtils]: 34: Hoare triple {5033#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,033 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {5033#true} {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,035 INFO L290 TraceCheckUtils]: 36: Hoare triple {5052#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ main_~max~0 4294967295) (+ main_~j~0 (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {5057#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:12,035 INFO L290 TraceCheckUtils]: 37: Hoare triple {5057#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 3))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:12,036 INFO L290 TraceCheckUtils]: 38: Hoare triple {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:12,036 INFO L272 TraceCheckUtils]: 39: Hoare triple {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5033#true} is VALID [2022-04-07 22:02:12,036 INFO L290 TraceCheckUtils]: 40: Hoare triple {5033#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5033#true} is VALID [2022-04-07 22:02:12,036 INFO L290 TraceCheckUtils]: 41: Hoare triple {5033#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,036 INFO L290 TraceCheckUtils]: 42: Hoare triple {5033#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,037 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {5033#true} {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:12,038 INFO L290 TraceCheckUtils]: 44: Hoare triple {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {5063#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= main_~i~0 1) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-07 22:02:12,039 INFO L290 TraceCheckUtils]: 45: Hoare triple {5063#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= main_~i~0 1) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 22:02:12,040 INFO L290 TraceCheckUtils]: 46: Hoare triple {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 22:02:12,040 INFO L272 TraceCheckUtils]: 47: Hoare triple {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5033#true} is VALID [2022-04-07 22:02:12,040 INFO L290 TraceCheckUtils]: 48: Hoare triple {5033#true} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5033#true} is VALID [2022-04-07 22:02:12,040 INFO L290 TraceCheckUtils]: 49: Hoare triple {5033#true} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,040 INFO L290 TraceCheckUtils]: 50: Hoare triple {5033#true} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:12,041 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {5033#true} {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 22:02:12,042 INFO L290 TraceCheckUtils]: 52: Hoare triple {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {5069#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|))))} is VALID [2022-04-07 22:02:12,042 INFO L290 TraceCheckUtils]: 53: Hoare triple {5069#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|))))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {5070#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~i~0 |main_~#str1~0.offset|) 3) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:12,043 INFO L290 TraceCheckUtils]: 54: Hoare triple {5070#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (= |main_~#str1~0.offset| 0) (= (+ main_~i~0 |main_~#str1~0.offset|) 3) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {5071#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 22:02:12,044 INFO L272 TraceCheckUtils]: 55: Hoare triple {5071#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5072#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-07 22:02:12,044 INFO L290 TraceCheckUtils]: 56: Hoare triple {5072#(not (= |__VERIFIER_assert_#in~cond| 0))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5073#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-07 22:02:12,044 INFO L290 TraceCheckUtils]: 57: Hoare triple {5073#(not (= __VERIFIER_assert_~cond 0))} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5034#false} is VALID [2022-04-07 22:02:12,044 INFO L290 TraceCheckUtils]: 58: Hoare triple {5034#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5034#false} is VALID [2022-04-07 22:02:12,045 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-07 22:02:12,045 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-07 22:02:12,045 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039123924] [2022-04-07 22:02:12,045 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2039123924] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-07 22:02:12,046 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1411170810] [2022-04-07 22:02:12,046 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-07 22:02:12,046 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-07 22:02:12,046 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-07 22:02:12,048 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-07 22:02:12,079 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-07 22:02:12,160 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-07 22:02:12,160 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-07 22:02:12,163 INFO L263 TraceCheckSpWp]: Trace formula consists of 243 conjuncts, 67 conjunts are in the unsatisfiable core [2022-04-07 22:02:12,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-07 22:02:12,188 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-07 22:02:12,210 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-04-07 22:02:12,517 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2022-04-07 22:02:12,712 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-04-07 22:02:12,968 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-04-07 22:02:13,171 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-04-07 22:02:17,834 WARN L855 $PredicateComparison]: unable to prove that (exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1) (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3)))) is different from true [2022-04-07 22:02:19,026 WARN L855 $PredicateComparison]: unable to prove that (exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1)))) is different from true [2022-04-07 22:02:20,058 WARN L855 $PredicateComparison]: unable to prove that (exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |c_#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |c_#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3)))) is different from true [2022-04-07 22:02:20,768 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:02:20,768 INFO L173 IndexEqualityManager]: detected equality via solver [2022-04-07 22:02:20,769 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 10 [2022-04-07 22:02:20,877 INFO L272 TraceCheckUtils]: 0: Hoare triple {5033#true} [70] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:20,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {5033#true} [72] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_8| 1))) (and (= 2 (select |v_#length_4| 1)) (= (select |v_#length_4| 3) 12) (< 0 |v_#StackHeapBarrier_2|) (= (select .cse0 0) 48) (= (select |v_#valid_7| 2) 1) (= (select |v_#length_4| 2) 18) (= |v_#NULL.base_1| 0) (= (select .cse0 1) 0) (= (select |v_#valid_7| 3) 1) (= (select |v_#valid_7| 1) 1) (= |v_#NULL.offset_1| 0) (= (select |v_#valid_7| 0) 0))) InVars {#memory_int=|v_#memory_int_8|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_8|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_4|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5033#true} is VALID [2022-04-07 22:02:20,877 INFO L290 TraceCheckUtils]: 2: Hoare triple {5033#true} [75] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:20,877 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5033#true} {5033#true} [100] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:20,877 INFO L272 TraceCheckUtils]: 4: Hoare triple {5033#true} [71] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5033#true} is VALID [2022-04-07 22:02:20,878 INFO L290 TraceCheckUtils]: 5: Hoare triple {5033#true} [74] mainENTRY-->L18-3: Formula: (let ((.cse0 (store |v_#valid_3| |v_main_~#str1~0.base_1| 1))) (and (= (store .cse0 |v_main_~#str2~0.base_1| 1) |v_#valid_1|) (= 5 v_main_~max~0_1) (= v_main_~i~0_1 0) (< |v_#StackHeapBarrier_1| |v_main_~#str2~0.base_1|) (= |v_main_~#str2~0.offset_1| 0) (= |v_main_~#str1~0.offset_1| 0) (< |v_#StackHeapBarrier_1| |v_main_~#str1~0.base_1|) (= |v_#length_1| (let ((.cse1 (mod v_main_~max~0_1 4294967296))) (store (store |v_#length_3| |v_main_~#str1~0.base_1| .cse1) |v_main_~#str2~0.base_1| .cse1))) (= (select .cse0 |v_main_~#str2~0.base_1|) 0) (not (= |v_main_~#str2~0.base_1| 0)) (not (= |v_main_~#str1~0.base_1| 0)) (= (select |v_#valid_3| |v_main_~#str1~0.base_1|) 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_1|, main_~max~0=v_main_~max~0_1, #StackHeapBarrier=|v_#StackHeapBarrier_1|, main_~#str2~0.base=|v_main_~#str2~0.base_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_1|, main_~j~0=v_main_~j~0_1, #valid=|v_#valid_1|, main_~i~0=v_main_~i~0_1, main_~#str1~0.base=|v_main_~#str1~0.base_1|, #length=|v_#length_1|} AuxVars[] AssignedVars[main_~#str2~0.offset, main_~max~0, main_~#str2~0.base, main_~#str1~0.offset, main_~j~0, #valid, main_~i~0, main_~#str1~0.base, #length] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,878 INFO L290 TraceCheckUtils]: 6: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,879 INFO L290 TraceCheckUtils]: 7: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,879 INFO L290 TraceCheckUtils]: 8: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,880 INFO L290 TraceCheckUtils]: 9: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,880 INFO L290 TraceCheckUtils]: 10: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,881 INFO L290 TraceCheckUtils]: 11: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,881 INFO L290 TraceCheckUtils]: 12: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,881 INFO L290 TraceCheckUtils]: 13: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,882 INFO L290 TraceCheckUtils]: 14: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [78] L18-3-->L18-2: Formula: (and (<= 0 (+ |v_main_#t~nondet5_2| 128)) (= (store |v_#memory_int_3| |v_main_~#str1~0.base_3| (store (select |v_#memory_int_3| |v_main_~#str1~0.base_3|) (+ |v_main_~#str1~0.offset_3| v_main_~i~0_6) |v_main_#t~nondet5_2|)) |v_#memory_int_2|) (<= |v_main_#t~nondet5_2| 127) (< (mod v_main_~i~0_6 4294967296) (mod v_main_~max~0_5 4294967296))) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|, #memory_int=|v_#memory_int_3|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6} OutVars{#memory_int=|v_#memory_int_2|, main_~#str1~0.base=|v_main_~#str1~0.base_3|, main_~i~0=v_main_~i~0_6, main_~max~0=v_main_~max~0_5, main_~#str1~0.offset=|v_main_~#str1~0.offset_3|} AuxVars[] AssignedVars[main_#t~nondet5, #memory_int] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,882 INFO L290 TraceCheckUtils]: 15: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [80] L18-2-->L18-3: Formula: (= v_main_~i~0_9 (+ v_main_~i~0_10 1)) InVars {main_~i~0=v_main_~i~0_10} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_9} AuxVars[] AssignedVars[main_#t~post4, main_~i~0] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,883 INFO L290 TraceCheckUtils]: 16: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [77] L18-3-->L18-4: Formula: (not (< (mod v_main_~i~0_5 4294967296) (mod v_main_~max~0_4 4294967296))) InVars {main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} OutVars{main_~i~0=v_main_~i~0_5, main_~max~0=v_main_~max~0_4} AuxVars[] AssignedVars[] {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,884 INFO L290 TraceCheckUtils]: 17: Hoare triple {5039#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [79] L18-4-->L26-3: Formula: (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_6) 4294967296))) (and (= |v_#memory_int_4| (store |v_#memory_int_5| |v_main_~#str1~0.base_6| (store (select |v_#memory_int_5| |v_main_~#str1~0.base_6|) (+ |v_main_~#str1~0.offset_6| .cse0) 0))) (= v_main_~j~0_5 0) (= (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))) v_main_~i~0_11))) InVars {#memory_int=|v_#memory_int_5|, main_~#str1~0.base=|v_main_~#str1~0.base_6|, main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|} OutVars{main_~max~0=v_main_~max~0_6, main_~#str1~0.offset=|v_main_~#str1~0.offset_6|, main_~j~0=v_main_~j~0_5, main_~i~0=v_main_~i~0_11, #memory_int=|v_#memory_int_4|, main_~#str1~0.base=|v_main_~#str1~0.base_6|} AuxVars[] AssignedVars[main_~j~0, main_~i~0, #memory_int] {5040#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:02:20,885 INFO L290 TraceCheckUtils]: 18: Hoare triple {5040#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= main_~j~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5041#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} is VALID [2022-04-07 22:02:20,886 INFO L290 TraceCheckUtils]: 19: Hoare triple {5041#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1) (or (and (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (= (+ (- 1) (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0)) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967295) 0))))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5135#(and (= |main_~#str2~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (- 2) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967294) 0))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1))} is VALID [2022-04-07 22:02:20,887 INFO L290 TraceCheckUtils]: 20: Hoare triple {5135#(and (= |main_~#str2~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (- 2) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967294) 0))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ main_~j~0 |main_~#str2~0.offset|) 1))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5139#(and (= |main_~#str2~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (- 2) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967294) 0))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0 |main_~#str2~0.offset|) 1))} is VALID [2022-04-07 22:02:20,888 INFO L290 TraceCheckUtils]: 21: Hoare triple {5139#(and (= |main_~#str2~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (- 2) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967294) 0))) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset|))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0 |main_~#str2~0.offset|) 1))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5143#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0 |main_~#str2~0.offset|) 1) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 3)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967293) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} is VALID [2022-04-07 22:02:20,890 INFO L290 TraceCheckUtils]: 22: Hoare triple {5143#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (select (select |#memory_int| |main_~#str2~0.base|) (+ (- 1) main_~j~0 |main_~#str2~0.offset|)) (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (+ (- 1) main_~j~0 |main_~#str2~0.offset|) 1) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 3)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967293) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5147#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 (+ 3 (* (- 1) |main_~#str2~0.offset|))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 3)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967293) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) 1)))} is VALID [2022-04-07 22:02:20,891 INFO L290 TraceCheckUtils]: 23: Hoare triple {5147#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 (+ 3 (* (- 1) |main_~#str2~0.offset|))) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 3)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967293) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)))) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 |main_~#str1~0.offset| 1)) (select (select |#memory_int| |main_~#str2~0.base|) 1)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5151#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 (+ 3 (* (- 1) |main_~#str2~0.offset|))) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (or (and (= (+ 4294967292 (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 4)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,896 INFO L290 TraceCheckUtils]: 24: Hoare triple {5151#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 (+ 3 (* (- 1) |main_~#str2~0.offset|))) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (or (and (= (+ 4294967292 (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 4)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5155#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 (+ (* (- 1) |main_~#str2~0.offset|) 4)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (or (and (= (+ 4294967292 (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 4)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,897 INFO L290 TraceCheckUtils]: 25: Hoare triple {5155#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 (+ (* (- 1) |main_~#str2~0.offset|) 4)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 2 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (or (and (= (+ 4294967292 (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 4)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5159#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 (+ (* (- 1) |main_~#str2~0.offset|) 4)) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) 4294967291 main_~max~0) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 5)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 3 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)))} is VALID [2022-04-07 22:02:20,899 INFO L290 TraceCheckUtils]: 26: Hoare triple {5159#(and (= |main_~#str2~0.offset| 0) (= main_~j~0 (+ (* (- 1) |main_~#str2~0.offset|) 4)) (= |main_~#str1~0.offset| 0) (or (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) 4294967291 main_~max~0) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))) (and (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 (- 5)) 0) (not (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296))))) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 3 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)))} [83] L26-3-->L26-2: Formula: (and (= v_main_~j~0_6 (+ v_main_~j~0_7 1)) (= (store |v_#memory_int_7| |v_main_~#str2~0.base_5| (store (select |v_#memory_int_7| |v_main_~#str2~0.base_5|) (+ |v_main_~#str2~0.offset_5| v_main_~j~0_7) (select (select |v_#memory_int_7| |v_main_~#str1~0.base_7|) (+ v_main_~i~0_13 |v_main_~#str1~0.offset_7|)))) |v_#memory_int_6|) (<= 0 v_main_~i~0_13)) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_7, #memory_int=|v_#memory_int_7|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_5|, main_~#str2~0.base=|v_main_~#str2~0.base_5|, main_~#str1~0.offset=|v_main_~#str1~0.offset_7|, main_~j~0=v_main_~j~0_6, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_6|, main_~#str1~0.base=|v_main_~#str1~0.base_7|, main_~i~0=v_main_~i~0_13, main_#t~post8=|v_main_#t~post8_1|} AuxVars[] AssignedVars[main_~j~0, main_#t~mem7, #memory_int, main_#t~post8] {5163#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) 4294967291 main_~max~0) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 3 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)))} is VALID [2022-04-07 22:02:20,900 INFO L290 TraceCheckUtils]: 27: Hoare triple {5163#(and (= |main_~#str2~0.offset| 0) (= |main_~#str1~0.offset| 0) (= (+ (* (- 1) main_~i~0) (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) 4294967291 main_~max~0) 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (<= 0 main_~i~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ main_~i~0 3 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)))} [85] L26-2-->L26-3: Formula: (= v_main_~i~0_15 (+ v_main_~i~0_14 1)) InVars {main_~i~0=v_main_~i~0_15} OutVars{main_~i~0=v_main_~i~0_14, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post6] {5167#(and (= |main_~#str2~0.offset| 0) (= (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) 4294967291 main_~max~0) (+ main_~i~0 1)) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= |main_~#str1~0.offset| 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967294 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,901 INFO L290 TraceCheckUtils]: 28: Hoare triple {5167#(and (= |main_~#str2~0.offset| 0) (= (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) 4294967291 main_~max~0) (+ main_~i~0 1)) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= |main_~#str1~0.offset| 0) (<= (+ main_~max~0 2147483648) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (= (select (select |#memory_int| |main_~#str1~0.base|) (+ (* (div (+ main_~max~0 4294967295) 4294967296) (- 4294967296)) main_~max~0 4294967294 |main_~#str1~0.offset|)) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [82] L26-3-->L26-4: Formula: (not (<= 0 v_main_~i~0_12)) InVars {main_~i~0=v_main_~i~0_12} OutVars{main_~i~0=v_main_~i~0_12} AuxVars[] AssignedVars[] {5051#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} is VALID [2022-04-07 22:02:20,903 INFO L290 TraceCheckUtils]: 29: Hoare triple {5051#(and (= |main_~#str2~0.offset| 0) (<= (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296) (+ 4294967291 main_~max~0)) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= (+ 4294967291 main_~max~0) (* (div (+ main_~max~0 4294967295) 4294967296) 4294967296)) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)))} [84] L26-4-->L32-3: Formula: (and (= v_main_~j~0_8 (let ((.cse0 (mod (+ 4294967295 v_main_~max~0_7) 4294967296))) (ite (<= .cse0 2147483647) .cse0 (+ .cse0 (- 4294967296))))) (= v_main_~i~0_16 0)) InVars {main_~max~0=v_main_~max~0_7} OutVars{main_~i~0=v_main_~i~0_16, main_~max~0=v_main_~max~0_7, main_~j~0=v_main_~j~0_8} AuxVars[] AssignedVars[main_~j~0, main_~i~0] {5174#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (+ (div main_~j~0 (- 4294967296)) (div (+ main_~j~0 (- 4)) (- 4294967296))) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-07 22:02:20,904 INFO L290 TraceCheckUtils]: 30: Hoare triple {5174#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (+ (div main_~j~0 (- 4294967296)) (div (+ main_~j~0 (- 4)) (- 4294967296))) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {5174#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (+ (div main_~j~0 (- 4294967296)) (div (+ main_~j~0 (- 4)) (- 4294967296))) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-07 22:02:20,906 INFO L272 TraceCheckUtils]: 31: Hoare triple {5174#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (+ (div main_~j~0 (- 4294967296)) (div (+ main_~j~0 (- 4)) (- 4294967296))) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5181#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1))))} is VALID [2022-04-07 22:02:20,907 INFO L290 TraceCheckUtils]: 32: Hoare triple {5181#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5181#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1))))} is VALID [2022-04-07 22:02:20,907 INFO L290 TraceCheckUtils]: 33: Hoare triple {5181#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5181#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1))))} is VALID [2022-04-07 22:02:20,908 INFO L290 TraceCheckUtils]: 34: Hoare triple {5181#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5181#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1))))} is VALID [2022-04-07 22:02:20,909 INFO L284 TraceCheckUtils]: 35: Hoare quadruple {5181#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_9| Int) (|v_main_~#str2~0.base_BEFORE_CALL_9| Int)) (and (not (= |v_main_~#str2~0.base_BEFORE_CALL_9| |v_main_~#str1~0.base_BEFORE_CALL_9|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_9|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_9|) 1))))} {5174#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (+ (div main_~j~0 (- 4294967296)) (div (+ main_~j~0 (- 4)) (- 4294967296))) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5174#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (+ (div main_~j~0 (- 4294967296)) (div (+ main_~j~0 (- 4)) (- 4294967296))) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} is VALID [2022-04-07 22:02:20,911 INFO L290 TraceCheckUtils]: 36: Hoare triple {5174#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= 0 main_~j~0) (< main_~j~0 4294967296) (= main_~i~0 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (< (+ (div main_~j~0 (- 4294967296)) (div (+ main_~j~0 (- 4)) (- 4294967296))) (+ (div (+ 4294967295 (* (- 1) main_~j~0)) 4294967296) (div (+ (* (- 1) main_~j~0) 4) 4294967296) 1)))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {5057#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:20,912 INFO L290 TraceCheckUtils]: 37: Hoare triple {5057#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (= main_~i~0 0) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 3))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:20,912 INFO L290 TraceCheckUtils]: 38: Hoare triple {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:20,914 INFO L272 TraceCheckUtils]: 39: Hoare triple {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5206#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1))))} is VALID [2022-04-07 22:02:20,914 INFO L290 TraceCheckUtils]: 40: Hoare triple {5206#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5206#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1))))} is VALID [2022-04-07 22:02:20,914 INFO L290 TraceCheckUtils]: 41: Hoare triple {5206#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5206#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1))))} is VALID [2022-04-07 22:02:20,915 INFO L290 TraceCheckUtils]: 42: Hoare triple {5206#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5206#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1))))} is VALID [2022-04-07 22:02:20,915 INFO L284 TraceCheckUtils]: 43: Hoare quadruple {5206#(exists ((|v_main_~#str2~0.base_BEFORE_CALL_10| Int) (|v_main_~#str1~0.base_BEFORE_CALL_10| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_10| |v_main_~#str2~0.base_BEFORE_CALL_10|)) (= (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_10|) 3) (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_10|) 1))))} {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} is VALID [2022-04-07 22:02:20,916 INFO L290 TraceCheckUtils]: 44: Hoare triple {5058#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~i~0 1) (<= 3 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0) (<= main_~j~0 3))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {5063#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= main_~i~0 1) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} is VALID [2022-04-07 22:02:20,917 INFO L290 TraceCheckUtils]: 45: Hoare triple {5063#(and (= |main_~#str2~0.offset| 0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= main_~i~0 1) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= 1 main_~i~0))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 22:02:20,917 INFO L290 TraceCheckUtils]: 46: Hoare triple {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 22:02:20,918 INFO L272 TraceCheckUtils]: 47: Hoare triple {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5231#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3))))} is VALID [2022-04-07 22:02:20,919 INFO L290 TraceCheckUtils]: 48: Hoare triple {5231#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3))))} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5231#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3))))} is VALID [2022-04-07 22:02:20,919 INFO L290 TraceCheckUtils]: 49: Hoare triple {5231#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3))))} [96] L6-->L6-2: Formula: (not (= v___VERIFIER_assert_~cond_3 0)) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5231#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3))))} is VALID [2022-04-07 22:02:20,919 INFO L290 TraceCheckUtils]: 50: Hoare triple {5231#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3))))} [99] L6-2-->__VERIFIER_assertEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5231#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3))))} is VALID [2022-04-07 22:02:20,920 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {5231#(exists ((|v_main_~#str1~0.base_BEFORE_CALL_11| Int) (|v_main_~#str2~0.base_BEFORE_CALL_11| Int)) (and (not (= |v_main_~#str1~0.base_BEFORE_CALL_11| |v_main_~#str2~0.base_BEFORE_CALL_11|)) (= (select (select |#memory_int| |v_main_~#str2~0.base_BEFORE_CALL_11|) 1) (select (select |#memory_int| |v_main_~#str1~0.base_BEFORE_CALL_11|) 3))))} {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [102] __VERIFIER_assertEXIT-->L33-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} is VALID [2022-04-07 22:02:20,921 INFO L290 TraceCheckUtils]: 52: Hoare triple {5064#(and (= |main_~#str2~0.offset| 0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (<= main_~j~0 2) (<= 2 main_~j~0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2))} [92] L33-1-->L32-2: Formula: (= (+ v_main_~j~0_3 1) v_main_~j~0_4) InVars {main_~j~0=v_main_~j~0_4} OutVars{main_#t~post12=|v_main_#t~post12_1|, main_#t~mem10=|v_main_#t~mem10_3|, main_~j~0=v_main_~j~0_3, main_#t~mem11=|v_main_#t~mem11_3|} AuxVars[] AssignedVars[main_#t~mem10, main_~j~0, main_#t~mem11, main_#t~post12] {5247#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~j~0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2) (<= main_~j~0 1))} is VALID [2022-04-07 22:02:20,922 INFO L290 TraceCheckUtils]: 53: Hoare triple {5247#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~j~0) (<= 2 main_~i~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~i~0 2) (<= main_~j~0 1))} [94] L32-2-->L32-3: Formula: (= v_main_~i~0_7 (+ v_main_~i~0_8 1)) InVars {main_~i~0=v_main_~i~0_8} OutVars{main_~i~0=v_main_~i~0_7, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_~i~0, main_#t~post9] {5251#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~j~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 1) (<= 3 main_~i~0) (<= main_~i~0 3))} is VALID [2022-04-07 22:02:20,922 INFO L290 TraceCheckUtils]: 54: Hoare triple {5251#(and (= |main_~#str2~0.offset| 0) (<= 1 main_~j~0) (= (select (select |#memory_int| |main_~#str1~0.base|) 3) (select (select |#memory_int| |main_~#str2~0.base|) 1)) (= |main_~#str1~0.offset| 0) (not (= |main_~#str1~0.base| |main_~#str2~0.base|)) (<= main_~j~0 1) (<= 3 main_~i~0) (<= main_~i~0 3))} [88] L32-3-->L33: Formula: (and (= |v_main_#t~mem11_1| (select (select |v_#memory_int_1| |v_main_~#str2~0.base_2|) (+ |v_main_~#str2~0.offset_2| v_main_~j~0_2))) (= (select (select |v_#memory_int_1| |v_main_~#str1~0.base_2|) (+ |v_main_~#str1~0.offset_2| v_main_~i~0_4)) |v_main_#t~mem10_1|) (< (mod v_main_~i~0_4 4294967296) (mod v_main_~max~0_3 4294967296))) InVars {main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} OutVars{main_~#str2~0.offset=|v_main_~#str2~0.offset_2|, main_~max~0=v_main_~max~0_3, main_~#str2~0.base=|v_main_~#str2~0.base_2|, main_#t~mem10=|v_main_#t~mem10_1|, main_~#str1~0.offset=|v_main_~#str1~0.offset_2|, main_#t~mem11=|v_main_#t~mem11_1|, main_~j~0=v_main_~j~0_2, #memory_int=|v_#memory_int_1|, main_~#str1~0.base=|v_main_~#str1~0.base_2|, main_~i~0=v_main_~i~0_4} AuxVars[] AssignedVars[main_#t~mem10, main_#t~mem11] {5071#(= |main_#t~mem11| |main_#t~mem10|)} is VALID [2022-04-07 22:02:20,925 INFO L272 TraceCheckUtils]: 55: Hoare triple {5071#(= |main_#t~mem11| |main_#t~mem10|)} [90] L33-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= |v_main_#t~mem11_4| |v_main_#t~mem10_4|) 1 0)) InVars {main_#t~mem10=|v_main_#t~mem10_4|, main_#t~mem11=|v_main_#t~mem11_4|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_#t~mem10, main_#t~mem11] {5258#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-07 22:02:20,925 INFO L290 TraceCheckUtils]: 56: Hoare triple {5258#(<= 1 |__VERIFIER_assert_#in~cond|)} [93] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5262#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-07 22:02:20,926 INFO L290 TraceCheckUtils]: 57: Hoare triple {5262#(<= 1 __VERIFIER_assert_~cond)} [95] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5034#false} is VALID [2022-04-07 22:02:20,926 INFO L290 TraceCheckUtils]: 58: Hoare triple {5034#false} [97] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5034#false} is VALID [2022-04-07 22:02:20,926 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 25 trivial. 18 not checked. [2022-04-07 22:02:20,926 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-07 22:02:23,632 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-04-07 22:02:23,632 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2266 treesize of output 2138